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rustc_target: RISC-V: add base "I"-related important extensions
Of ratified RISC-V features defined, this commit adds extensions satisfying following criteria: * Formerly a part of the "I" extension and splitted thereafter (now ratified as "I" + "Zifencei" + "Zicsr" + "Zicntr" + "Zihpm") or * Dicoverable from newer versions of the Linux kernel and implemented as a part of std_detect's feature ("Zihintpause"). This is based on the latest ratified ISA Manuals (version 20240411). Additional (1): One of those, "Zicsr", is a dependency of many other ISA extensions and this commit adds correct dependencies to "Zicsr". Additional (2): In RISC-V, "G" is an abbreviation of following extensions: * "I" * "M" * "A" * "F" * "D" * "Zicsr" (although implied by "F") * "Zifencei" and all RISC-V targets with the "G" abbreviation and targets for Android / VxWorks are updated accordingly. Note: Android will require RVA22 (likely RVA22U64) and some more extensions, which is a superset of RV64GC. For VxWorks, all BSPs currently distributed by Wind River are for boards with RV64GC (this commit also updates riscv32-wrs-vxworks though).
1 parent 9b7d5ac commit 6f40f0c

16 files changed

+28
-18
lines changed

compiler/rustc_target/src/spec/targets/riscv32_wrs_vxworks.rs

Lines changed: 1 addition & 1 deletion
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@@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
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cpu: "generic-rv32".into(),
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llvm_abiname: "ilp32d".into(),
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max_atomic_width: Some(32),
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features: "+m,+a,+f,+d,+c".into(),
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features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(),
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stack_probes: StackProbeType::Inline,
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..base::vxworks::opts()
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},

compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_gnu.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ pub(crate) fn target() -> Target {
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options: TargetOptions {
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code_model: Some(CodeModel::Medium),
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cpu: "generic-rv32".into(),
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features: "+m,+a,+f,+d,+c".into(),
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features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(),
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llvm_abiname: "ilp32d".into(),
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max_atomic_width: Some(32),
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supported_split_debuginfo: Cow::Borrowed(&[SplitDebuginfo::Off]),

compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_musl.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ pub(crate) fn target() -> Target {
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options: TargetOptions {
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code_model: Some(CodeModel::Medium),
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cpu: "generic-rv32".into(),
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features: "+m,+a,+f,+d,+c".into(),
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features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(),
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llvm_abiname: "ilp32d".into(),
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max_atomic_width: Some(32),
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supported_split_debuginfo: Cow::Borrowed(&[SplitDebuginfo::Off]),

compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ pub(crate) fn target() -> Target {
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options: TargetOptions {
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code_model: Some(CodeModel::Medium),
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cpu: "generic-rv64".into(),
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features: "+m,+a,+f,+d,+c,+zba,+zbb,+zbs,+v".into(),
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features: "+m,+a,+f,+d,+c,+zicsr,+zifencei,+zba,+zbb,+zbs,+v".into(),
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llvm_abiname: "lp64d".into(),
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supported_sanitizers: SanitizerSet::ADDRESS,
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max_atomic_width: Some(64),

compiler/rustc_target/src/spec/targets/riscv64_wrs_vxworks.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ pub(crate) fn target() -> Target {
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cpu: "generic-rv64".into(),
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llvm_abiname: "lp64d".into(),
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max_atomic_width: Some(64),
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features: "+m,+a,+f,+d,+c".into(),
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features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(),
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stack_probes: StackProbeType::Inline,
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..base::vxworks::opts()
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},

compiler/rustc_target/src/spec/targets/riscv64gc_unknown_freebsd.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ pub(crate) fn target() -> Target {
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options: TargetOptions {
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code_model: Some(CodeModel::Medium),
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cpu: "generic-rv64".into(),
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features: "+m,+a,+f,+d,+c".into(),
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features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(),
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llvm_abiname: "lp64d".into(),
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max_atomic_width: Some(64),
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..base::freebsd::opts()

compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@ pub(crate) fn target() -> Target {
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let mut base = base::fuchsia::opts();
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base.code_model = Some(CodeModel::Medium);
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base.cpu = "generic-rv64".into();
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base.features = "+m,+a,+f,+d,+c".into();
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base.features = "+m,+a,+f,+d,+c,+zicsr,+zifencei".into();
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base.llvm_abiname = "lp64d".into();
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base.max_atomic_width = Some(64);
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base.stack_probes = StackProbeType::Inline;

compiler/rustc_target/src/spec/targets/riscv64gc_unknown_hermit.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ pub(crate) fn target() -> Target {
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data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(),
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options: TargetOptions {
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cpu: "generic-rv64".into(),
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features: "+m,+a,+f,+d,+c".into(),
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features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(),
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relocation_model: RelocModel::Pic,
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code_model: Some(CodeModel::Medium),
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tls_model: TlsModel::LocalExec,

compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_gnu.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ pub(crate) fn target() -> Target {
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options: TargetOptions {
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code_model: Some(CodeModel::Medium),
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cpu: "generic-rv64".into(),
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features: "+m,+a,+f,+d,+c".into(),
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features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(),
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llvm_abiname: "lp64d".into(),
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max_atomic_width: Some(64),
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supported_split_debuginfo: Cow::Borrowed(&[SplitDebuginfo::Off]),

compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_musl.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ pub(crate) fn target() -> Target {
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options: TargetOptions {
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code_model: Some(CodeModel::Medium),
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cpu: "generic-rv64".into(),
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features: "+m,+a,+f,+d,+c".into(),
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features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(),
2121
llvm_abiname: "lp64d".into(),
2222
max_atomic_width: Some(64),
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supported_split_debuginfo: Cow::Borrowed(&[SplitDebuginfo::Off]),

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