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12 | 12 | //!
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13 | 13 | //! # Installation
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14 | 14 | //!
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15 |
| -//! ``` |
| 15 | +//! ```bash |
16 | 16 | //! $ cargo install svd2rust
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17 | 17 | //! ```
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18 | 18 | //!
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109 | 109 | //! one of them) and the only way to get an instance of them is through the `Peripherals::take`
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110 | 110 | //! method.
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111 | 111 | //!
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112 |
| -//! ``` |
| 112 | +//! ```ignore |
113 | 113 | //! fn main() {
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114 | 114 | //! let mut peripherals = stm32f30x::Peripherals::take().unwrap();
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115 | 115 | //! peripherals.GPIOA.odr.write(|w| w.bits(1));
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119 | 119 | //! This method can only be successfully called *once* -- that's why the method returns an `Option`.
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120 | 120 | //! Subsequent calls to the method will result in a `None` value being returned.
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121 | 121 | //!
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122 |
| -//! ``` |
| 122 | +//! ```ignore |
123 | 123 | //! fn main() {
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124 | 124 | //! let ok = stm32f30x::Peripherals::take().unwrap();
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125 | 125 | //! let panics = stm32f30x::Peripherals::take().unwrap();
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130 | 130 | //! available on all the peripheral types. This method is a useful for implementing safe higher
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131 | 131 | //! level abstractions.
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132 | 132 | //!
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133 |
| -//! ``` |
| 133 | +//! ```ignore |
134 | 134 | //! struct PA0 { _0: () }
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135 | 135 | //! impl PA0 {
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136 | 136 | //! fn is_high(&self) -> bool {
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159 | 159 | //! memory. Each field in this `struct` represents one register in the register block associated to
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160 | 160 | //! the peripheral.
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161 | 161 | //!
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162 |
| -//! ``` |
| 162 | +//! ```ignore |
163 | 163 | //! /// Inter-integrated circuit
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164 | 164 | //! pub mod i2c1 {
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165 | 165 | //! /// Register block
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205 | 205 | //!
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206 | 206 | //! (using `I2C`'s `CR2` register as an example)
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207 | 207 | //!
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208 |
| -//! ``` rust |
| 208 | +//! ```ignore |
209 | 209 | //! impl CR2 {
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210 | 210 | //! /// Modifies the contents of the register
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211 | 211 | //! pub fn modify<F>(&self, f: F)
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232 | 232 | //! returns a proxy `R` struct that allows access to only the readable bits (i.e. not to the
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233 | 233 | //! reserved or write-only bits) of the `CR2` register:
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234 | 234 | //!
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235 |
| -//! ``` rust |
| 235 | +//! ```ignore |
236 | 236 | //! /// Value read from the register
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237 | 237 | //! impl R {
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238 | 238 | //! /// Bit 0 - Slave address bit 0 (master mode)
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247 | 247 | //!
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248 | 248 | //! Usage looks like this:
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249 | 249 | //!
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250 |
| -//! ``` rust |
| 250 | +//! ```ignore |
251 | 251 | //! // is the SADD0 bit of the CR2 register set?
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252 | 252 | //! if i2c1.c2r.read().sadd0().bit() {
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253 | 253 | //! // yes
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264 | 264 | //! register after a reset. The rest of `W` methods are "builder-like" and can be used to modify the
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265 | 265 | //! writable bitfields of the `CR2` register.
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266 | 266 | //!
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267 |
| -//! ``` rust |
| 267 | +//! ```ignore |
268 | 268 | //! impl CR2W {
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269 | 269 | //! /// Reset value
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270 | 270 | //! pub fn reset_value() -> Self {
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286 | 286 | //!
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287 | 287 | //! Usage looks like this:
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288 | 288 | //!
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289 |
| -//! ``` rust |
| 289 | +//! ```ignore |
290 | 290 | //! // Starting from the reset value, `0x0000_0000`, change the bitfields SADD0
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291 | 291 | //! // and SADD1 to `1` and `0b0011110` respectively and write that to the
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292 | 292 | //! // register CR2.
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309 | 309 | //!
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310 | 310 | //! Usage looks like this:
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311 | 311 | //!
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312 |
| -//! ``` rust |
| 312 | +//! ```ignore |
313 | 313 | //! // Set the START bit to 1 while KEEPING the state of the other bits intact
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314 | 314 | //! i2c1.cr2.modify(|_, w| unsafe { w.start().bit(true) });
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315 | 315 | //!
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326 | 326 | //!
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327 | 327 | //! The new `read` API returns an enum that you can match:
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328 | 328 | //!
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329 |
| -//! ``` |
| 329 | +//! ```ignore |
330 | 330 | //! match gpioa.dir.read().pin0() {
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331 | 331 | //! gpioa::dir::PIN0R::Input => { .. },
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332 | 332 | //! gpioa::dir::PIN0R::Output => { .. },
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335 | 335 | //!
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336 | 336 | //! or test for equality
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337 | 337 | //!
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338 |
| -//! ``` |
| 338 | +//! ```ignore |
339 | 339 | //! if gpioa.dir.read().pin0() == gpio::dir::PIN0R::Input {
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340 | 340 | //! ..
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341 | 341 | //! }
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344 | 344 | //! It also provides convenience methods to check for a specific variant without
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345 | 345 | //! having to import the enum:
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346 | 346 | //!
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347 |
| -//! ``` |
| 347 | +//! ```ignore |
348 | 348 | //! if gpioa.dir.read().pin0().is_input() {
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349 | 349 | //! ..
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350 | 350 | //! }
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356 | 356 | //!
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357 | 357 | //! The original `bits` method is available as well:
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358 | 358 | //!
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359 |
| -//! ``` |
| 359 | +//! ```ignore |
360 | 360 | //! if gpioa.dir.read().pin0().bits() == 0 {
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361 | 361 | //! ..
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362 | 362 | //! }
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365 | 365 | //! And the new `write` API provides similar additions as well: `variant` lets you pick the value to
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366 | 366 | //! write from an `enum`eration of the possible ones:
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367 | 367 | //!
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368 |
| -//! ``` |
| 368 | +//! ```ignore |
369 | 369 | //! // enum DIRW { Input, Output }
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370 | 370 | //! gpioa.dir.write(|w| w.pin0().variant(gpio::dir::PIN0W::Output));
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371 | 371 | //! ```
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372 | 372 | //!
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373 | 373 | //! There are convenience methods to pick one of the variants without having to
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374 | 374 | //! import the enum:
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375 | 375 | //!
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376 |
| -//! ``` |
| 376 | +//! ```ignore |
377 | 377 | //! gpioa.dir.write(|w| w.pin0().output());
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378 | 378 | //! ```
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379 | 379 | //!
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380 | 380 | //! The `bits` (or `bit`) method is still available but will become safe if it's
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381 | 381 | //! impossible to write a reserved bit pattern into the register:
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382 | 382 | //!
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383 |
| -//! ``` |
| 383 | +//! ```ignore |
384 | 384 | //! // safe because there are only two options: `0` or `1`
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385 | 385 | //! gpioa.dir.write(|w| w.pin0().bit(true));
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386 | 386 | //! ```
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391 | 391 | //! of the device interrupts as an `Interrupt` `enum` in the root of the crate. This `enum` can be
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392 | 392 | //! used with the `cortex-m` crate `NVIC` API.
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393 | 393 | //!
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394 |
| -//! ``` |
| 394 | +//! ```ignore |
395 | 395 | //! extern crate cortex_m;
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396 | 396 | //! extern crate stm32f30x;
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397 | 397 | //!
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