You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Mcause::from_bits is documented as only setting BITMASK bits, but this is set to 0xffff_ffff. This excludes the interrupt bit on rv64, at bit 63. It should include at least this bit, but probably all 64 bits, since the riscv privileged spec says the Exception Code field is MXLEN-1 (with Interrupt at MXLEN-1)