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2 parents 2fc23fe + ff4dc30 commit ee84d85Copy full SHA for ee84d85
riscv-semihosting/CHANGELOG.md
@@ -8,6 +8,7 @@ This project adheres to [Semantic Versioning](http://semver.org/).
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### Changed
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- Made `cfg` variable selection more robust for custom targets
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+- Fixed debug::exit() on riscv64 QEMU simulation
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## [v0.1.0] - 2023-01-18
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riscv-semihosting/src/debug.rs
@@ -89,6 +89,10 @@ pub fn exit(status: ExitStatus) {
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pub fn report_exception(reason: Exception) {
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let code = reason as usize;
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unsafe {
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+ #[cfg(target_arch = "riscv64")]
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+ syscall!(REPORT_EXCEPTION, code, 0);
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+
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+ #[cfg(not(target_arch = "riscv64"))]
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syscall1!(REPORT_EXCEPTION, code);
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}
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