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bors[bot]luojia65
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Merge #68
68: Bug fix for interrupt bit in `scause::set` r=Disasm a=luojia65 This pull request includes a bug fix. On RISC-V's cause register, first bit means is this cause an interrupt. The code before made a mistake to or an one bit when exception. After this fix, it correctly or an one bit when interrupt. Related to https://github.com/luojia65/rustsbi/issues/10. Thank you @wyfcyx Co-authored-by: luojia65 <me@luojia.cc>
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src/register/scause.rs

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -127,31 +127,31 @@ pub unsafe fn write(bits: usize) {
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#[inline]
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pub unsafe fn set(cause: Trap) {
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let bits = match cause {
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Trap::Interrupt(i) => match i {
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Interrupt::UserSoft => 0,
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Interrupt::SupervisorSoft => 1,
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Interrupt::UserTimer => 4,
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Interrupt::SupervisorTimer => 5,
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Interrupt::UserExternal => 8,
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Interrupt::SupervisorExternal => 9,
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Interrupt::Unknown => panic!("unknown interrupt"),
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},
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Trap::Exception(e) => {
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(match e {
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Exception::InstructionMisaligned => 0,
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Exception::InstructionFault => 1,
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Exception::IllegalInstruction => 2,
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Exception::Breakpoint => 3,
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Exception::LoadFault => 5,
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Exception::StoreMisaligned => 6,
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Exception::StoreFault => 7,
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Exception::UserEnvCall => 8,
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Exception::InstructionPageFault => 12,
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Exception::LoadPageFault => 13,
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Exception::StorePageFault => 15,
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Exception::Unknown => panic!("unknown exception"),
130+
Trap::Interrupt(i) => {
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(match i {
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Interrupt::UserSoft => 0,
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Interrupt::SupervisorSoft => 1,
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Interrupt::UserTimer => 4,
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Interrupt::SupervisorTimer => 5,
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Interrupt::UserExternal => 8,
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Interrupt::SupervisorExternal => 9,
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Interrupt::Unknown => panic!("unknown interrupt"),
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} | (1 << (size_of::<usize>() * 8 - 1)))
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}
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} // interrupt bit is 1
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Trap::Exception(e) => match e {
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Exception::InstructionMisaligned => 0,
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Exception::InstructionFault => 1,
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Exception::IllegalInstruction => 2,
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Exception::Breakpoint => 3,
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Exception::LoadFault => 5,
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Exception::StoreMisaligned => 6,
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Exception::StoreFault => 7,
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Exception::UserEnvCall => 8,
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Exception::InstructionPageFault => 12,
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Exception::LoadPageFault => 13,
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Exception::StorePageFault => 15,
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Exception::Unknown => panic!("unknown exception"),
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}, // interrupt bit is 0
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};
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_write(bits);
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}

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