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Remove unused macro arguments
1 parent 388db84 commit 6d06810

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52 files changed

+294
-932
lines changed

src/asm.rs

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
//! Assembly instructions
22
33
macro_rules! instruction {
4-
($(#[$attr:meta])*, $fnname:ident, $asm:expr, $asm_fn:ident) => (
4+
($(#[$attr:meta])*, $fnname:ident, $asm:expr) => (
55
$(#[$attr])*
66
#[inline]
77
pub unsafe fn $fnname() {
@@ -20,18 +20,18 @@ instruction!(
2020
/// `nop` instruction wrapper
2121
///
2222
/// Generates a no-operation. Useful to prevent delay loops from being optimized away.
23-
, nop, "nop", __nop);
23+
, nop, "nop");
2424
instruction!(
2525
/// `EBREAK` instruction wrapper
2626
///
2727
/// Generates a breakpoint exception.
28-
, ebreak, "ebreak", __ebreak);
28+
, ebreak, "ebreak");
2929
instruction!(
3030
/// `WFI` instruction wrapper
3131
///
3232
/// Provides a hint to the implementation that the current hart can be stalled until an interrupt might need servicing.
3333
/// The WFI instruction is just a hint, and a legal implementation is to implement WFI as a NOP.
34-
, wfi, "wfi", __wfi);
34+
, wfi, "wfi");
3535
instruction!(
3636
/// `SFENCE.VMA` instruction wrapper (all address spaces and page table levels)
3737
///
@@ -40,7 +40,7 @@ instruction!(
4040
/// are ordinarily not ordered with respect to loads and stores in the instruction stream.
4141
/// Executing an `SFENCE.VMA` instruction guarantees that any stores in the instruction stream prior to the
4242
/// `SFENCE.VMA` are ordered before all implicit references subsequent to the `SFENCE.VMA`.
43-
, sfence_vma_all, "sfence.vma", __sfence_vma_all);
43+
, sfence_vma_all, "sfence.vma");
4444

4545
/// `SFENCE.VMA` instruction wrapper
4646
///

src/register/cycle.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,5 +4,5 @@
44
//! must have `scounteren::cy` or `mcounteren::cy` bit enabled depending on whether
55
//! S-mode is implemented or not
66
7-
read_csr_as_usize!(0xC00, __read_cycle);
7+
read_csr_as_usize!(0xC00);
88
read_composite_csr!(super::cycleh::read(), read());

src/register/cycleh.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,4 +4,4 @@
44
//! must have `scounteren::cy` or `mcounteren::cy` bit enabled depending on whether
55
//! S-mode is implemented or not
66
7-
read_csr_as_usize_rv32!(0xC80, __read_cycleh);
7+
read_csr_as_usize_rv32!(0xC80);

src/register/fcsr.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -101,9 +101,9 @@ impl FCSR {
101101
}
102102
}
103103

104-
read_csr!(0x003, __read_fcsr);
105-
write_csr!(0x003, __write_fcsr);
106-
clear!(0x003, __clear_fcsr);
104+
read_csr!(0x003);
105+
write_csr!(0x003);
106+
clear!(0x003);
107107

108108
/// Reads the CSR
109109
#[inline]

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