Skip to content

Commit 6878e5f

Browse files
committed
Fix weird formatting in mod.rs
Update assert! logic in mcounteren.rs and scounteren.rs Fix comment typo on `scounteren`
1 parent f273ef5 commit 6878e5f

File tree

7 files changed

+22
-27
lines changed

7 files changed

+22
-27
lines changed

src/register/cycle.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
//! cycle register
22
//! Shadow of mcycle register
3-
//! must have `scounter::cy` or `mcounteren::cy` bit enabled depending on whether
3+
//! must have `scounteren::cy` or `mcounteren::cy` bit enabled depending on whether
44
//! S-mode is implemented or not
55
66
read_csr_as_usize!(0xC00, __read_cycle);

src/register/cycleh.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
//! cycleh register
22
//! Shadow of mcycleh register (rv32)
3-
//! must have `scounter::cy` or `mcounteren::cy` bit enabled depending on whether
3+
//! must have `scounteren::cy` or `mcounteren::cy` bit enabled depending on whether
44
//! S-mode is implemented or not
55
66
read_csr_as_usize_rv32!(0xC80, __read_cycleh);

src/register/instret.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
//! instret register
22
//! Shadow of minstret register
3-
//! must have `scounter::ir` or `mcounteren::ir` bit enabled depending on whether
3+
//! must have `scounteren::ir` or `mcounteren::ir` bit enabled depending on whether
44
//! S-mode is implemented or not
55
66
read_csr_as_usize!(0xC02, __read_instret);

src/register/instreth.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
//! instreth register
22
//! Shadow of minstreth register (rv32)
3-
//! must have `scounter::ir` or `mcounteren::ir` bit enabled depending on whether
3+
//! must have `scounteren::ir` or `mcounteren::ir` bit enabled depending on whether
44
//! S-mode is implemented or not
55
66
read_csr_as_usize!(0xC82, __read_instreth);

src/register/mcounteren.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ impl Mcounteren {
3030
/// User "hpm[x]" Enable (bits 3-31)
3131
#[inline]
3232
pub fn hpm(&self, index: usize) -> bool {
33-
assert!(((3..32).contains(&index)));
33+
assert!(3 <= index && index < 32);
3434
self.bits.get_bit(index)
3535
}
3636
}
@@ -54,12 +54,12 @@ set_clear_csr!(
5454

5555
#[inline]
5656
pub unsafe fn set_hpm(index: usize) {
57-
assert!(((3..32).contains(&index)));
57+
assert!(3 <= index && index < 32);
5858
_set(1 << index);
5959
}
6060

6161
#[inline]
6262
pub unsafe fn clear_hpm(index: usize) {
63-
assert!(((3..32).contains(&index)));
63+
assert!(3 <= index && index < 32);
6464
_clear(1 << index);
6565
}

src/register/mod.rs

Lines changed: 12 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -30,23 +30,22 @@ pub mod utval;
3030
pub mod fcsr;
3131

3232
// User Counter/Timers
33+
3334
pub mod cycle;
35+
pub mod cycleh;
3436
mod hpmcounterx;
35-
pub mod instret;
36-
pub mod time;
37-
3837
pub use self::hpmcounterx::*;
39-
40-
pub mod cycleh;
38+
pub mod instret;
4139
pub mod instreth;
40+
pub mod time;
4241
pub mod timeh;
4342

4443
// Supervisor Trap Setup
4544
// TODO: sedeleg, sideleg
46-
pub mod scounteren;
4745
pub mod sie;
4846
pub mod sstatus;
4947
pub mod stvec;
48+
pub mod scounteren;
5049

5150
// Supervisor Trap Handling
5251
pub mod scause;
@@ -65,12 +64,13 @@ pub mod mimpid;
6564
pub mod mvendorid;
6665

6766
// Machine Trap Setup
67+
pub mod medeleg;
68+
pub mod mideleg;
69+
pub mod mie;
6870
pub mod misa;
6971
pub mod mstatus;
70-
// TODO: medeleg, mideleg
71-
pub mod mcounteren;
72-
pub mod mie;
7372
pub mod mtvec;
73+
pub mod mcounteren;
7474

7575
// Machine Trap Handling
7676
pub mod mcause;
@@ -81,26 +81,21 @@ pub mod mtval;
8181

8282
// Machine Protection and Translation
8383
mod pmpcfgx;
84-
8584
pub use self::pmpcfgx::*;
86-
8785
mod pmpaddrx;
88-
8986
pub use self::pmpaddrx::*;
9087

9188
// Machine Counter/Timers
9289
pub mod mcycle;
90+
pub mod mcycleh;
9391
mod mhpmcounterx;
94-
pub mod minstret;
95-
9692
pub use self::mhpmcounterx::*;
97-
98-
pub mod mcycleh;
93+
pub mod minstret;
9994
pub mod minstreth;
10095

96+
10197
// Machine Counter Setup
10298
mod mhpmeventx;
103-
10499
pub use self::mhpmeventx::*;
105100

106101
// TODO: Debug/Trace Registers (shared with Debug Mode)

src/register/scounteren.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ impl Scounteren {
3030
/// User "hpm[x]" Enable (bits 3-31)
3131
#[inline]
3232
pub fn hpm(&self, index: usize) -> bool {
33-
assert!(((3..32).contains(&index)));
33+
assert!(3 <= index && index < 32);
3434
self.bits.get_bit(index)
3535
}
3636
}
@@ -54,12 +54,12 @@ set_clear_csr!(
5454

5555
#[inline]
5656
pub unsafe fn set_hpm(index: usize) {
57-
assert!(((3..32).contains(&index)));
57+
assert!(3 <= index && index < 32);
5858
_set(1 << index);
5959
}
6060

6161
#[inline]
6262
pub unsafe fn clear_hpm(index: usize) {
63-
assert!(((3..32).contains(&index)));
63+
assert!(3 <= index && index < 32);
6464
_clear(1 << index);
6565
}

0 commit comments

Comments
 (0)