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Remove custom build script in riscv
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5 files changed

+27
-33
lines changed

5 files changed

+27
-33
lines changed

riscv/CHANGELOG.md

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@@ -7,6 +7,14 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## [Unreleased]
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### Changed
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- Use `cfg(any(target_arch = "riscv32", target_arch = "riscv64"))` instead of `cfg(riscv)`.
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### Removed
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- Removed custom build script, as `cfg(riscv)` is no longer necessary.
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## [v0.14.0] - 2025-06-10
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### Added

riscv/build.rs

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This file was deleted.

riscv/src/lib.rs

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,10 @@ pub use riscv_pac::*;
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#[macro_use]
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mod macros;
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56-
#[cfg(all(riscv, feature = "critical-section-single-hart"))]
56+
#[cfg(all(
57+
any(target_arch = "riscv32", target_arch = "riscv64"),
58+
feature = "critical-section-single-hart"
59+
))]
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mod critical_section;
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/// Used to reexport items for use in macros. Do not use directly.

riscv/src/register/mstatus.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -438,9 +438,9 @@ pub unsafe fn set_vs(vs: VS) {
438438
#[inline]
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pub unsafe fn set_sbe(endianness: Endianness) {
440440
match () {
441-
#[cfg(riscv32)]
441+
#[cfg(target_arch = "riscv32")]
442442
() => super::mstatush::set_sbe(endianness),
443-
#[cfg(not(riscv32))]
443+
#[cfg(not(target_arch = "riscv32"))]
444444
() => match endianness {
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Endianness::BigEndian => _set(1 << 36),
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Endianness::LittleEndian => _clear(1 << 36),
@@ -456,9 +456,9 @@ pub unsafe fn set_sbe(endianness: Endianness) {
456456
#[inline]
457457
pub unsafe fn set_mbe(endianness: Endianness) {
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match () {
459-
#[cfg(riscv32)]
459+
#[cfg(target_arch = "riscv32")]
460460
() => super::mstatush::set_mbe(endianness),
461-
#[cfg(not(riscv32))]
461+
#[cfg(not(target_arch = "riscv32"))]
462462
() => match endianness {
463463
Endianness::BigEndian => _set(1 << 37),
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Endianness::LittleEndian => _clear(1 << 37),

riscv/src/register/pmpcfgx.rs

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -79,11 +79,11 @@ impl Pmpcsr {
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#[inline]
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pub fn try_into_config(&self, index: usize) -> Result<Pmp> {
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let max = match () {
82-
#[cfg(riscv32)]
82+
#[cfg(target_arch = "riscv32")]
8383
() => Ok(4usize),
84-
#[cfg(riscv64)]
84+
#[cfg(target_arch = "riscv64")]
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() => Ok(8usize),
86-
#[cfg(not(any(riscv32, riscv64)))]
86+
#[cfg(not(any(target_arch = "riscv32", target_arch = "riscv64")))]
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() => Err(Error::Unimplemented),
8888
}?;
8989

@@ -122,7 +122,7 @@ pub mod pmpcfg0 {
122122

123123
/// Physical memory protection configuration
124124
/// pmpcfg1 struct contains pmp4cfg - pmp7cfg for RV32 only
125-
#[cfg(riscv32)]
125+
#[cfg(target_arch = "riscv32")]
126126
pub mod pmpcfg1 {
127127
use super::{Permission, Pmpcsr, Range};
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@@ -147,7 +147,7 @@ pub mod pmpcfg2 {
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148148
/// Physical memory protection configuration
149149
/// pmpcfg3 struct contains pmp12cfg - pmp15cfg for RV32 only
150-
#[cfg(riscv32)]
150+
#[cfg(target_arch = "riscv32")]
151151
pub mod pmpcfg3 {
152152
use super::{Permission, Pmpcsr, Range};
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@@ -172,7 +172,7 @@ pub mod pmpcfg4 {
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173173
/// Physical memory protection configuration
174174
/// pmpcfg5 struct contains pmp20cfg - pmp23cfg for RV32 only
175-
#[cfg(riscv32)]
175+
#[cfg(target_arch = "riscv32")]
176176
pub mod pmpcfg5 {
177177
use super::{Permission, Pmpcsr, Range};
178178

@@ -197,7 +197,7 @@ pub mod pmpcfg6 {
197197

198198
/// Physical memory protection configuration
199199
/// pmpcfg7 struct contains pmp28cfg - pmp31cfg for RV32 only
200-
#[cfg(riscv32)]
200+
#[cfg(target_arch = "riscv32")]
201201
pub mod pmpcfg7 {
202202
use super::{Permission, Pmpcsr, Range};
203203

@@ -222,7 +222,7 @@ pub mod pmpcfg8 {
222222

223223
/// Physical memory protection configuration
224224
/// pmpcfg9 struct contains pmp36cfg - pmp39cfg for RV32 only
225-
#[cfg(riscv32)]
225+
#[cfg(target_arch = "riscv32")]
226226
pub mod pmpcfg9 {
227227
use super::{Permission, Pmpcsr, Range};
228228

@@ -247,7 +247,7 @@ pub mod pmpcfg10 {
247247

248248
/// Physical memory protection configuration
249249
/// pmpcfg11 struct contains pmp44cfg - pmp47cfg for RV32 only
250-
#[cfg(riscv32)]
250+
#[cfg(target_arch = "riscv32")]
251251
pub mod pmpcfg11 {
252252
use super::{Permission, Pmpcsr, Range};
253253

@@ -272,7 +272,7 @@ pub mod pmpcfg12 {
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273273
/// Physical memory protection configuration
274274
/// pmpcfg13 struct contains pmp52cfg - pmp55cfg for RV32 only
275-
#[cfg(riscv32)]
275+
#[cfg(target_arch = "riscv32")]
276276
pub mod pmpcfg13 {
277277
use super::{Permission, Pmpcsr, Range};
278278

@@ -297,7 +297,7 @@ pub mod pmpcfg14 {
297297

298298
/// Physical memory protection configuration
299299
/// pmpcfg15 struct contains pmp60cfg - pmp63cfg for RV32 only
300-
#[cfg(riscv32)]
300+
#[cfg(target_arch = "riscv32")]
301301
pub mod pmpcfg15 {
302302
use super::{Permission, Pmpcsr, Range};
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