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bors[bot]austinbes
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Merge #54
54: Fix CI builds r=therealprof a=austinglaser Fixes #50, #52, #53 ~This is a work-in-progress. I'm not sure when I'm going to have time to revisit it -- hopefully within the next week or two. If anyone else feels compelled to take it over, please feel free.~ Co-authored-by: Austin Glaser <austin@boulderes.com>
2 parents 21730e8 + 8d4ae10 commit 88a0d13

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16 files changed

+146
-133
lines changed

16 files changed

+146
-133
lines changed

ci/asm/app/release.objdump

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,23 +1,25 @@
11

22
app: file format ELF32-arm-little
33

4+
45
Disassembly of section .text:
6+
57
HardFault:
6-
b #-0x4 <HardFault>
8+
b #-0x4 <HardFault>
79

810
main:
9-
trap
11+
trap
1012

1113
Reset:
12-
bl #-0x6
13-
trap
14+
bl #-0x6
15+
trap
1416

1517
DefaultExceptionHandler:
16-
b #-0x4 <DefaultExceptionHandler>
18+
b #-0x4 <DefaultExceptionHandler>
1719

1820
UsageFault:
19-
<unknown>
21+
<unknown>
2022

2123
HardFaultTrampoline:
22-
mrs r0, msp
23-
b #-0x14 <HardFault>
24+
mrs r0, msp
25+
b #-0x14 <HardFault>

ci/asm/rt/link.x

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ SECTIONS
5555

5656
/DISCARD/ :
5757
{
58-
*(.ARM.exidx.*);
58+
*(.ARM.exidx .ARM.exidx.*);
5959
}
6060
}
6161

ci/exceptions/app/app.objdump

Lines changed: 103 additions & 96 deletions
Original file line numberDiff line numberDiff line change
@@ -1,113 +1,120 @@
11

22
app: file format ELF32-arm-little
33

4+
45
Disassembly of section .text:
6+
57
main:
6-
trap
7-
trap
8+
trap
9+
trap
810

911
Reset:
10-
movw r1, #0x0
11-
movw r0, #0x0
12-
movt r1, #0x2000
13-
movt r0, #0x2000
14-
subs r1, r1, r0
15-
bl #0xd2
16-
movw r1, #0x0
17-
movw r0, #0x0
18-
movt r1, #0x2000
19-
movt r0, #0x2000
20-
subs r2, r1, r0
21-
movw r1, #0x0
22-
movt r1, #0x0
23-
bl #0x8
24-
bl #-0x3c
25-
trap
12+
movw r1, #0x0
13+
movw r0, #0x0
14+
movt r1, #0x2000
15+
movt r0, #0x2000
16+
subs r1, r1, r0
17+
bl #0xe2
18+
movw r1, #0x0
19+
movw r0, #0x0
20+
movt r1, #0x2000
21+
movt r0, #0x2000
22+
subs r2, r1, r0
23+
movw r1, #0x142
24+
movt r1, #0x0
25+
bl #0x8
26+
bl #-0x3c
27+
trap
2628

2729
DefaultExceptionHandler:
28-
b #-0x4 <DefaultExceptionHandler>
30+
b #-0x4 <DefaultExceptionHandler>
2931

3032
UsageFault:
31-
sub sp, #0x19c
33+
blo.w #0x2756a <_sidata+0x274ab>
3234

3335
__aeabi_memcpy:
34-
push {r4, r5, r7, lr}
35-
cbz r2, #0x56
36-
subs r3, r2, #0x1
37-
and r12, r2, #0x3
38-
cmp r3, #0x3
39-
bhs #0x8 <__aeabi_memcpy+0x18>
40-
movs r2, #0x0
41-
cmp.w r12, #0x0
42-
bne #0x26 <__aeabi_memcpy+0x3e>
43-
b #0x42 <__aeabi_memcpy+0x5c>
44-
sub.w lr, r2, r12
45-
movs r2, #0x0
46-
ldrb r3, [r1, r2]
47-
adds r4, r1, r2
48-
strb r3, [r0, r2]
49-
adds r3, r0, r2
50-
adds r2, #0x4
51-
ldrb r5, [r4, #0x1]
52-
cmp lr, r2
53-
strb r5, [r3, #0x1]
54-
ldrb r5, [r4, #0x2]
55-
strb r5, [r3, #0x2]
56-
ldrb r4, [r4, #0x3]
57-
strb r4, [r3, #0x3]
58-
bne #-0x1c <__aeabi_memcpy+0x1e>
59-
cmp.w r12, #0x0
60-
beq #0x1c <__aeabi_memcpy+0x5c>
61-
ldrb r3, [r1, r2]
62-
cmp.w r12, #0x1
63-
strb r3, [r0, r2]
64-
beq #0x12 <__aeabi_memcpy+0x5c>
65-
adds r3, r2, #0x1
66-
cmp.w r12, #0x2
67-
ldrb r5, [r1, r3]
68-
strb r5, [r0, r3]
69-
it eq
70-
popeq {r4, r5, r7, pc}
71-
adds r2, #0x2
72-
ldrb r1, [r1, r2]
73-
strb r1, [r0, r2]
74-
pop {r4, r5, r7, pc}
36+
push {r4, r5, r6, r7, lr}
37+
cbz r2, #0x60
38+
subs r3, r2, #0x1
39+
and r12, r2, #0x3
40+
cmp r3, #0x3
41+
bhs #0x8 <__aeabi_memcpy+0x18>
42+
movs r2, #0x0
43+
cmp.w r12, #0x0
44+
bne #0x32 <__aeabi_memcpy+0x4a>
45+
b #0x4c <__aeabi_memcpy+0x66>
46+
sub.w lr, r12, r2
47+
adds r3, r1, #0x1
48+
adds r4, r0, #0x1
49+
mvn r2, #0x3
50+
adds r6, r3, r2
51+
adds r5, r4, r2
52+
adds r2, #0x4
53+
ldrb r7, [r6, #0x3]
54+
strb r7, [r5, #0x3]
55+
ldrb r7, [r6, #0x4]
56+
strb r7, [r5, #0x4]
57+
ldrb r7, [r6, #0x5]
58+
strb r7, [r5, #0x5]
59+
ldrb r6, [r6, #0x6]
60+
strb r6, [r5, #0x6]
61+
add.w r5, lr, r2
62+
adds r5, #0x4
63+
bne #-0x20 <__aeabi_memcpy+0x24>
64+
adds r2, #0x4
65+
cmp.w r12, #0x0
66+
beq #0x1a <__aeabi_memcpy+0x66>
67+
ldrb r3, [r1, r2]
68+
cmp.w r12, #0x1
69+
strb r3, [r0, r2]
70+
beq #0x10 <__aeabi_memcpy+0x66>
71+
adds r3, r2, #0x1
72+
cmp.w r12, #0x2
73+
ldrb r7, [r1, r3]
74+
strb r7, [r0, r3]
75+
beq #0x4 <__aeabi_memcpy+0x66>
76+
adds r2, #0x2
77+
ldrb r1, [r1, r2]
78+
strb r1, [r0, r2]
79+
pop {r4, r5, r6, r7, pc}
7580

7681
__aeabi_memset:
77-
cmp r1, #0x0
78-
it eq
79-
bxeq lr
80-
push {r7, lr}
81-
subs r3, r1, #0x1
82-
and r12, r1, #0x3
83-
cmp r3, #0x3
84-
bhs #0x2 <__aeabi_memset+0x16>
85-
movs r1, #0x0
86-
b #0x14 <__aeabi_memset+0x2c>
87-
sub.w lr, r1, r12
88-
movs r1, #0x0
89-
strb r2, [r0, r1]
90-
adds r3, r0, r1
91-
adds r1, #0x4
92-
cmp lr, r1
93-
strb r2, [r3, #0x3]
94-
strb r2, [r3, #0x2]
95-
strb r2, [r3, #0x1]
96-
bne #-0x12 <__aeabi_memset+0x1c>
97-
cmp.w r12, #0x0
98-
pop.w {r7, lr}
99-
itt ne
100-
strbne r2, [r0, r1]
101-
cmpne.w r12, #0x1
102-
bne #0x0 <__aeabi_memset+0x40>
103-
bx lr
104-
add r0, r1
105-
cmp.w r12, #0x2
106-
strb r2, [r0, #0x1]
107-
it ne
108-
strbne r2, [r0, #0x2]
109-
bx lr
82+
push {r4, lr}
83+
cmp r1, #0x0
84+
it eq
85+
popeq {r4, pc}
86+
subs r3, r1, #0x1
87+
and r12, r1, #0x3
88+
cmp r3, #0x3
89+
bhs #0x2 <__aeabi_memset+0x16>
90+
movs r1, #0x0
91+
b #0x1e <__aeabi_memset+0x36>
92+
sub.w lr, r12, r1
93+
adds r1, r0, #0x1
94+
mvn r3, #0x3
95+
adds r4, r1, r3
96+
adds r3, #0x4
97+
strb r2, [r4, #0x6]
98+
strb r2, [r4, #0x5]
99+
strb r2, [r4, #0x4]
100+
strb r2, [r4, #0x3]
101+
add.w r4, lr, r3
102+
adds r4, #0x4
103+
bne #-0x16 <__aeabi_memset+0x20>
104+
adds r1, r3, #0x4
105+
cmp.w r12, #0x0
106+
itt ne
107+
strbne r2, [r0, r1]
108+
cmpne.w r12, #0x1
109+
bne #0x0 <__aeabi_memset+0x46>
110+
pop {r4, pc}
111+
add r0, r1
112+
cmp.w r12, #0x2
113+
strb r2, [r0, #0x1]
114+
it ne
115+
strbne r2, [r0, #0x2]
116+
pop {r4, pc}
110117

111118
__aeabi_memclr:
112-
movs r2, #0x0
113-
b.w #-0x54 <__aeabi_memset>
119+
movs r2, #0x0
120+
b.w #-0x5a <__aeabi_memset>

ci/exceptions/rt/link.x

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ SECTIONS
5555

5656
/DISCARD/ :
5757
{
58-
*(.ARM.exidx.*);
58+
*(.ARM.exidx .ARM.exidx.*);
5959
}
6060
}
6161

ci/logging/app2/dev.objdump

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,2 @@
1-
00000001 g O .log 00000001 Goodbye
2-
00000000 g O .log 00000001 Hello, world!
1+
00000001 g O .log 00000001 Goodbye
2+
00000000 g O .log 00000001 Hello, world!

ci/logging/app3/dev.objdump

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,2 @@
1-
00000001 g O .log 00000001 Goodbye
2-
00000000 g O .log 00000001 Hello, world!
1+
00000001 g O .log 00000001 Goodbye
2+
00000000 g O .log 00000001 Hello, world!

ci/logging/app4/dev.objdump

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,3 @@
1-
00000000 g O .log 00000001 Goodbye
2-
00000001 g O .log 00000001 Hello, world!
3-
00000001 .log 00000000 __log_warning_start__
1+
00000000 g O .log 00000001 Goodbye
2+
00000001 g O .log 00000001 Hello, world!
3+
00000001 .log 00000000 __log_warning_start__

ci/main/app/app.objdump

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,16 @@
11

22
app: file format ELF32-arm-little
33

4+
45
Disassembly of section .text:
6+
57
main:
6-
sub sp, #4
7-
movs r0, #42
8-
str r0, [sp]
9-
b #-2 <main+0x8>
10-
b #-4 <main+0x8>
8+
sub sp, #4
9+
movs r0, #42
10+
str r0, [sp]
11+
b #-2 <main+0x8>
12+
b #-4 <main+0x8>
1113

1214
Reset:
13-
bl #-14
14-
trap
15+
bl #-14
16+
trap

ci/main/rt/link.x

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,6 @@ SECTIONS
4545

4646
/DISCARD/ :
4747
{
48-
*(.ARM.exidx.*);
48+
*(.ARM.exidx .ARM.exidx.*);
4949
}
5050
}

ci/main/rt2/link.x

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,6 @@ SECTIONS
5151

5252
/DISCARD/ :
5353
{
54-
*(.ARM.exidx.*);
54+
*(.ARM.exidx .ARM.exidx.*);
5555
}
5656
}

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