@@ -60,13 +60,13 @@ PROVIDE(__pre_init = DefaultPreInit);
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/* # Sections */
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SECTIONS
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{
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- PROVIDE(_ram_start = ORIGIN(RAM ));
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- PROVIDE(_ram_end = ORIGIN(RAM ) + LENGTH(RAM ));
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+ PROVIDE(_ram_start = ORIGIN({{ram_region}} ));
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+ PROVIDE(_ram_end = ORIGIN({{ram_region}} ) + LENGTH({{ram_region}} ));
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PROVIDE(_stack_start = _ram_end);
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- /* ## Sections in FLASH */
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+ /* ## Sections in {{flash_region}} */
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/* ### Vector table */
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- .vector_table ORIGIN(FLASH ) :
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+ .vector_table ORIGIN({{flash_region}} ) :
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{
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__vector_table = .;
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@@ -87,7 +87,7 @@ SECTIONS
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/* Device specific interrupts */
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KEEP(*(.vector_table.interrupts)); /* this is the `__INTERRUPTS` symbol */
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- } > FLASH
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+ } > {{flash_region}}
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PROVIDE(_stext = ADDR(.vector_table) + SIZEOF(.vector_table));
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@@ -106,7 +106,7 @@ SECTIONS
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. = ALIGN(4); /* Pad .text to the alignment to workaround overlapping load section bug in old lld */
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__etext = .;
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- } > FLASH
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+ } > {{flash_region}}
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/* ### .rodata */
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.rodata : ALIGN(4)
@@ -120,17 +120,17 @@ SECTIONS
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section will have the correct alignment. */
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. = ALIGN(4);
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__erodata = .;
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- } > FLASH
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+ } > {{flash_region}}
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- /* ## Sections in RAM */
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+ /* ## Sections in {{ram_region}} */
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/* ### .data */
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.data : ALIGN(4)
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{
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. = ALIGN(4);
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__sdata = .;
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*(.data .data.*);
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. = ALIGN(4); /* 4-byte align the end (VMA) of this section */
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- } > RAM AT>FLASH
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+ } > {{ram_region}} AT>{{flash_region}}
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/* Allow sections from user `memory.x` injected using `INSERT AFTER .data` to
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* use the .data loading mechanism by pushing __edata. Note: do not change
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* output region or load region in those user sections! */
@@ -143,14 +143,14 @@ SECTIONS
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/* ### .gnu.sgstubs
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This section contains the TrustZone-M veneers put there by the Arm GNU linker. */
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/* Security Attribution Unit blocks must be 32 bytes aligned. */
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- /* Note that this pads the FLASH usage to 32 byte alignment. */
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+ /* Note that this pads the {{flash_region}} usage to 32 byte alignment. */
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.gnu.sgstubs : ALIGN(32)
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{
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. = ALIGN(32);
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__veneer_base = .;
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*(.gnu.sgstubs*)
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. = ALIGN(32);
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- } > FLASH
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+ } > {{flash_region}}
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/* Place `__veneer_limit` outside the `.gnu.sgstubs` section because veneers are
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* always inserted last in the section, which would otherwise be _after_ the `__veneer_limit` symbol.
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*/
@@ -165,7 +165,7 @@ SECTIONS
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*(.bss .bss.*);
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*(COMMON); /* Uninitialized C statics */
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. = ALIGN(4); /* 4-byte align the end (VMA) of this section */
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- } > RAM
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+ } > {{ram_region}}
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/* Allow sections from user `memory.x` injected using `INSERT AFTER .bss` to
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* use the .bss zeroing mechanism by pushing __ebss. Note: do not change
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* output region or load region in those user sections! */
@@ -180,12 +180,12 @@ SECTIONS
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*(.uninit .uninit.*);
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. = ALIGN(4);
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__euninit = .;
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- } > RAM
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+ } > {{ram_region}}
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/* Align `__sheap` and `_stack_end` pointers to 4 bytes */
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. = ALIGN(4);
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- /* Place the heap start and stack end at the end of allocated RAM */
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+ /* Place the heap start and stack end at the end of allocated {{ram_region}} */
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PROVIDE(__sheap = .);
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PROVIDE(_stack_end = .);
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@@ -209,11 +209,11 @@ SECTIONS
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/* Do not exceed this mark in the error messages below | */
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/* # Alignment checks */
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- ASSERT(ORIGIN(FLASH ) % 4 == 0, "
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- ERROR(cortex-m-rt): the start of the FLASH region must be 4-byte aligned");
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+ ASSERT(ORIGIN({{flash_region}} ) % 4 == 0, "
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+ ERROR(cortex-m-rt): the start of the {{flash_region}} region must be 4-byte aligned");
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- ASSERT(ORIGIN(RAM ) % 4 == 0, "
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- ERROR(cortex-m-rt): the start of the RAM region must be 4-byte aligned");
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+ ASSERT(ORIGIN({{ram_region}} ) % 4 == 0, "
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+ ERROR(cortex-m-rt): the start of the {{ram_region}} region must be 4-byte aligned");
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ASSERT(__sdata % 4 == 0 && __edata % 4 == 0, "
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BUG(cortex-m-rt): .data is not 4-byte aligned");
@@ -230,7 +230,7 @@ BUG(cortex-m-rt): start of .heap is not 4-byte aligned");
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ASSERT(_stack_start % 8 == 0, "
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ERROR(cortex-m-rt): stack start address is not 8-byte aligned.
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If you have set _stack_start, check it's set to an address which is a multiple of 8 bytes.
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- If you haven't, stack starts at the end of RAM by default. Check that both RAM
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+ If you haven't, stack starts at the end of {{ram_region}} by default. Check that both {{ram_region}}
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origin and length are set to multiples of 8 in the `memory.x` file.");
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ASSERT(_stack_end % 4 == 0, "
@@ -273,9 +273,9 @@ ASSERT(ADDR(.vector_table) + SIZEOF(.vector_table) <= _stext, "
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ERROR(cortex-m-rt): The .text section can't be placed inside the .vector_table section
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Set _stext to an address greater than the end of .vector_table (See output of `nm`)");
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- ASSERT(_stext >= ORIGIN(FLASH ) && _stext < ORIGIN(FLASH ) + LENGTH(FLASH ), "
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- ERROR(cortex-m-rt): The .text section must be placed inside the FLASH memory.
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- Set _stext to an address within the FLASH region.");
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+ ASSERT(_stext >= ORIGIN({{flash_region}} ) && _stext < ORIGIN({{flash_region}} ) + LENGTH({{flash_region}} ), "
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+ ERROR(cortex-m-rt): The .text section must be placed inside the {{flash_region}} memory.
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+ Set _stext to an address within the {{flash_region}} region.");
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/* # Other checks */
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ASSERT(SIZEOF(.got) == 0, "
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