Switch from register-rs to tock-registers

Author: andre-richter

.vscode/settings.json

@@ -3,8 +3,7 @@
     "editor.rulers": [
         100
     ],
-    "rust-analyzer.checkOnSave.extraArgs": [
-        "--target=aarch64-unknown-none-softfloat"
-    ],
-    "rust-analyzer.checkOnSave.allTargets": false
+    "rust-analyzer.cargo.target": "aarch64-unknown-none-softfloat",
+    "rust-analyzer.lens.debug": false,
+    "rust-analyzer.lens.run": false
 }

Cargo.toml

@@ -11,8 +11,12 @@ categories = ["embedded", "hardware-support", "no-std"]
 license = "MIT/Apache-2.0"
 edition = "2018"
 exclude = [
+        ".github",
+        ".gitignore",
+        ".rustfmt.toml",
+        ".vscode",
         "Makefile"
 ]
 
 [dependencies]
-register = "1.x.x"
+tock-registers = { version = "0.7.x", default-features = false } # Use it as interface-only library.

Makefile

@@ -8,10 +8,6 @@ clippy:
 	cargo clippy --target $(TARGET)
 	cargo clippy
 
-check:
-	cargo check --target $(TARGET)
-	cargo check
-
 fmt:
 	cargo fmt
 

README.md

@@ -5,21 +5,53 @@
 
 Low level access to Cortex-A processors.
 
-## Currently Supported Architectures
+## Currently Supported Execution States
 
 - [x] AArch64
 - [ ] AArch32
 
 ## Minimum Supported Rust Version
 
-Requires rustc 1.45.0 or later due to use of the new `asm!()` syntax.
+Requires a recent nightly of Rust.
 
 ## Usage
 
-Example from https://github.com/rust-embedded/rust-raspi3-OS-tutorials
+Please note that for using this crate's [register definitions](src/regs) (as provided by
+`cortex_a::regs::*`), you need to also include
+[`tock-registers`](https://crates.io/crates/tock-registers) in your project. This is because the
+`interface` traits provided by `tock-registers` are implemented by this crate. You should include
+the same version of `tock-registers` as is being used by this crate to ensure sane
+interoperatbility.
+
+For example, in the following snippet, `X.Y.Z` should be the same version of `tock-registers` that
+is mentioned in `cortex-a`'s [`Cargo.toml`](Cargo.toml).
+
+```toml
+[package]
+name = "Your embedded project"
+
+# Some parts omitted for brevity.
+
+[dependencies]
+tock-registers = "X.Y.Z"
+cortex-a = "A.B.C"       # <-- Includes tock-registers itself.
+```
+
+### Example
+
+Check out https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials for usage examples. Listed
+below is a snippet of `rust-raspberrypi-OS-tutorials`'s early boot code.
 
 ```rust
-unsafe fn el2_to_el1_transition() -> ! {
+use cortex_a::{asm, regs::*};
+use tock_registers::interfaces::Writeable; // <-- Trait needed to use `write()` and `set()`.
+
+// Some parts omitted for brevity.
+
+unsafe fn prepare_el2_to_el1_transition(
+    virt_boot_core_stack_end_exclusive_addr: u64,
+    virt_kernel_init_addr: u64,
+) {
     // Enable timer counter registers for EL1.
     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 

src/lib.rs

@@ -7,17 +7,53 @@
 
 //! Low level access to Cortex-A processors.
 //!
-//! ## Currently Supported Architectures
+//! ## Currently Supported Execution States
 //!
 //! - [x] AArch64
 //! - [ ] AArch32
 //!
+//! ## Minimum Supported Rust Version
+//!
+//! Requires a recent nightly of Rust.
+//!
 //! ## Usage
 //!
-//! Example from https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials
+//! Please note that for using this crate's [register definitions](src/regs) (as provided by
+//! `cortex_a::regs::*`), you need to also include
+//! [`tock-registers`](https://crates.io/crates/tock-registers) in your project. This is because the
+//! `interface` traits provided by `tock-registers` are implemented by this crate. You should
+//! include the same version of `tock-registers` as is being used by this crate to ensure sane
+//! interoperatbility.
+//!
+//! For example, in the following snippet, `X.Y.Z` should be the same version of `tock-registers`
+//! that is mentioned in `cortex-a`'s [`Cargo.toml`](Cargo.toml).
+//!
+//! ```toml
+//! [package]
+//! name = "Your embedded project"
+//!
+//! # Some parts omitted for brevity.
+//!
+//! [dependencies]
+//! tock-registers = "X.Y.Z"
+//! cortex-a = "A.B.C"       # <-- Includes tock-registers itself.
+//! ```
+//!
+//! ### Example
+//!
+//! Check out https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials for usage examples.
+//! Listed below is a snippet of `rust-raspberrypi-OS-tutorials`'s early boot code.
 //!
 //! ```rust
-//! unsafe fn el2_to_el1_transition() -> ! {
+//! use cortex_a::{asm, regs::*};
+//! use tock_registers::interfaces::Writeable; // <-- Trait needed to use `write()` and `set()`.
+//!
+//! // Some parts omitted for brevity.
+//!
+//! unsafe fn prepare_el2_to_el1_transition(
+//!     virt_boot_core_stack_end_exclusive_addr: u64,
+//!     virt_kernel_init_addr: u64,
+//! ) {
 //!     // Enable timer counter registers for EL1.
 //!     CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
 //!
@@ -39,13 +75,13 @@
 //!
 //! ## Disclaimer
 //!
-//! Descriptive comments in the source files are taken from the
-//! [ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile](https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf?_ga=2.266626254.1122218691.1534883460-1326731866.1530967873).
+//! Descriptive comments in the source files are taken from the [ARM Architecture Reference Manual
+//! ARMv8, for ARMv8-A architecture
+//! profile](https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf?_ga=2.266626254.1122218691.1534883460-1326731866.1530967873).
 
-#![allow(clippy::clippy::upper_case_acronyms)]
+#![feature(asm)]
 #![feature(core_intrinsics)]
 #![feature(custom_inner_attributes)]
-#![feature(asm)]
 #![no_std]
 
 pub mod asm;

src/regs/cntfrq_el0.rs

@@ -11,12 +11,15 @@
 //! must be programmed with this value as part of system initialization. The value of the register
 //! is not interpreted by hardware.
 
-use register::cpu::RegisterReadOnly;
+use tock_registers::interfaces::Readable;
 
 pub struct Reg;
 
-impl RegisterReadOnly<u64, ()> for Reg {
+impl Readable for Reg {
+    type T = u64;
+    type R = ();
+
     sys_coproc_read_raw!(u64, "CNTFRQ_EL0", "x");
 }
 
-pub static CNTFRQ_EL0: Reg = Reg {};
+pub const CNTFRQ_EL0: Reg = Reg {};

src/regs/cnthctl_el2.rs

@@ -11,7 +11,10 @@
 //! access from Non-secure EL1 to the physical counter and the Non-secure EL1
 //! physical timer.
 
-use register::{cpu::RegisterReadWrite, register_bitfields};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+};
 
 // When HCR_EL2.E2H == 0:
 // TODO: Figure out how we can differentiate depending on HCR_EL2.E2H state
@@ -53,10 +56,18 @@ register_bitfields! {u64,
 
 pub struct Reg;
 
-impl RegisterReadWrite<u64, CNTHCTL_EL2::Register> for Reg {
+impl Readable for Reg {
+    type T = u64;
+    type R = CNTHCTL_EL2::Register;
+
     sys_coproc_read_raw!(u64, "CNTHCTL_EL2", "x");
+}
+
+impl Writeable for Reg {
+    type T = u64;
+    type R = CNTHCTL_EL2::Register;
+
     sys_coproc_write_raw!(u64, "CNTHCTL_EL2", "x");
 }
 
-#[allow(non_upper_case_globals)]
-pub static CNTHCTL_EL2: Reg = Reg {};
+pub const CNTHCTL_EL2: Reg = Reg {};

src/regs/cntp_ctl_el0.rs

@@ -9,7 +9,10 @@
 //!
 //! Control register for the EL1 physical timer.
 
-use register::{cpu::RegisterReadWrite, register_bitfields};
+use tock_registers::{
+    interfaces::{Readable, Writeable},
+    register_bitfields,
+};
 
 register_bitfields! {u64,
     pub CNTP_CTL_EL0 [
@@ -43,9 +46,18 @@ register_bitfields! {u64,
 
 pub struct Reg;
 
-impl RegisterReadWrite<u64, CNTP_CTL_EL0::Register> for Reg {
+impl Readable for Reg {
+    type T = u64;
+    type R = CNTP_CTL_EL0::Register;
+
     sys_coproc_read_raw!(u64, "CNTP_CTL_EL0", "x");
+}
+
+impl Writeable for Reg {
+    type T = u64;
+    type R = CNTP_CTL_EL0::Register;
+
     sys_coproc_write_raw!(u64, "CNTP_CTL_EL0", "x");
 }
 
-pub static CNTP_CTL_EL0: Reg = Reg {};
+pub const CNTP_CTL_EL0: Reg = Reg {};

src/regs/cntp_tval_el0.rs

@@ -9,13 +9,22 @@
 //!
 //! Holds the timer value for the EL1 physical timer.
 
-use register::cpu::RegisterReadWrite;
+use tock_registers::interfaces::{Readable, Writeable};
 
 pub struct Reg;
 
-impl RegisterReadWrite<u64, ()> for Reg {
+impl Readable for Reg {
+    type T = u64;
+    type R = ();
+
     sys_coproc_read_raw!(u64, "CNTP_TVAL_EL0", "x");
+}
+
+impl Writeable for Reg {
+    type T = u64;
+    type R = ();
+
     sys_coproc_write_raw!(u64, "CNTP_TVAL_EL0", "x");
 }
 
-pub static CNTP_TVAL_EL0: Reg = Reg {};
+pub const CNTP_TVAL_EL0: Reg = Reg {};

src/regs/cntpct_el0.rs

@@ -9,12 +9,15 @@
 //!
 //! Holds the 64-bit physical count value.
 
-use register::cpu::RegisterReadOnly;
+use tock_registers::interfaces::Readable;
 
 pub struct Reg;
 
-impl RegisterReadOnly<u64, ()> for Reg {
+impl Readable for Reg {
+    type T = u64;
+    type R = ();
+
     sys_coproc_read_raw!(u64, "CNTPCT_EL0", "x");
 }
 
-pub static CNTPCT_EL0: Reg = Reg {};
+pub const CNTPCT_EL0: Reg = Reg {};