|
6 | 6 | use cortex_m::peripheral::{
|
7 | 7 | self as Core,
|
8 | 8 | dwt::{AccessType, ComparatorAddressSettings, ComparatorFunction, EmitOption},
|
9 |
| - itm::ITMSettings, |
| 9 | + itm::ITMConfiguration, |
10 | 10 | };
|
11 | 11 | pub use cortex_m::peripheral::{
|
12 | 12 | itm::{GlobalTimestampOptions, ITMConfigurationError, LocalTimestampOptions, TimestampClkSrc},
|
@@ -106,22 +106,25 @@ pub fn configure(
|
106 | 106 | }
|
107 | 107 | }
|
108 | 108 |
|
109 |
| - // Configure DCB, TPIU, DWT, ITM for hardware task tracing. |
| 109 | + // Globally enable DWT and ITM features |
110 | 110 | dcb.enable_trace();
|
| 111 | + |
111 | 112 | tpiu.set_swo_baud_rate(config.tpiu_freq, config.tpiu_baud);
|
112 | 113 | tpiu.set_trace_output_protocol(config.protocol);
|
113 | 114 | tpiu.enable_continuous_formatting(false); // drop ETM packets
|
114 |
| - dwt.enable_exception_tracing(); |
115 |
| - itm.unlock(); |
116 |
| - itm.configure(ITMSettings { |
| 115 | + |
| 116 | + itm.configure(ITMConfiguration { |
117 | 117 | enable: true, // ITMENA: master enable
|
118 | 118 | forward_dwt: true, // TXENA: forward DWT packets
|
119 | 119 | local_timestamps: config.delta_timestamps,
|
120 | 120 | global_timestamps: config.absolute_timestamps,
|
121 |
| - bus_id: None, // only a single trace source is currently supported |
| 121 | + bus_id: Some(1), // only a single trace source is currently supported |
122 | 122 | timestamp_clk_src: config.timestamp_clk_src,
|
123 | 123 | })?;
|
124 | 124 |
|
| 125 | + // Enable hardware task tracing |
| 126 | + dwt.enable_exception_tracing(); |
| 127 | + |
125 | 128 | // Configure DWT comparators for software task tracing.
|
126 | 129 | let enter_addr: u32 = unsafe { &WATCH_VARIABLE_ENTER.id as *const _ } as u32;
|
127 | 130 | let exit_addr: u32 = unsafe { &WATCH_VARIABLE_EXIT.id as *const _ } as u32;
|
|
0 commit comments