Current ACLIC spec has two interrupt types: major and external interrupts.

To achieve interrupts nesting and vectoring for both interrupt types the ACLIC spec introduces several new CSRs and extensions:

• new mivt, sivt, meivt, seivt CSRs for major and external IVTs
• new Smaiae extension to provide
  • stopi, mtopi CSRs which needed for information about priority and identity of current top major interrupt
  • iprio0-15 iCSRs array to have configurable priority for major interrupts

We want to propose an alternative approach, which is that we unify major and external interrupts:

• In ACLIC mode all major interrupt sources are forwarded to ACLIC, according to their identity numbers. CLINT is not used at all and ACLIC becomes the only source of interrupts for M/S-mode.
• When ACLIC mode is disabled (legacy mode) major interrupts are routed to CLINT (as in RISC-V ISA). In that mode there is no configurable priority for major interrupts, no vectoring, no nesting.

The resource-constrained systems targeted by ACLIC are likely to have limited number of major local interrupt sources (M-timer, S-timer, M-software interrupts). Among all of them, only the M-timer interrupt is mandatory, according to the RISC-V ISA spec. So the resources duplication between CLINT and ACLIC is minimal.

Proposed approach has several advantages:

• we don't need multiple IVTs and mivt, sivt, meivt, seivt CSRs. Existing xtvec CSRs can be used for vector base.
• no need in mtopi, stopi CSRs
• no need in iprio0-15 iCSRs array
  • we can avoid introducing of new Smaiae extension and drop AIA dependency
    • if we drop AIA dependency we can also drop miph, siph, mieh, sieh, midelegh CSRs
• we simplify interrupt trap logic
• we simplify interrupt configuration logic - all interrupts are configured the same way
• we simplify push logic of tpush extension
• still fully compatible with RISC-V ISA
• trivial further size reduction:
  • i.e.: application-specific IC with stricter resource constraints (and without requirement of being fully compatible to RISC-V) can implement ACLIC without CLINT at all. No ACLIC architectural changes needed for that, HW still be fully compatible with ACLIC handling mode

Since this approach offers a minimalistic ACLIC implementation, it may be more beneficial to use it as the default rather than as a separate extension.