Which execption should be rasied when write vstopi in VS-mode?

[Yasinhwang]

vstopi is a HRO CSR, read vstopi in VS-mode will raise illegal instruction excepiont, how about the write access, if written in VS-mode ,whch exception should be raised? Illegal instruction excepiont or virtual instruction excepion?

[yjloong]

riscv-interrupts-20250312.pdf
2.4. Virtual instruction exceptions
Following the default rules for the H extension, attempts from VS-mode to directly access a hypervisor or VS CSR other than vsireg, or from VU-mode to access any supervisor-level CSR (including hypervisor and VS CSRs) other than sireg or vsireg, usually raise not an illegal instruction exception but instead a virtual instruction exception.

riscv-privileged.pdf
2.1. CSR Address Mapping Conventions
Instructions that access a non-existent CSR are reserved. Attempts to access a CSR without appropriate privilege level raise illegal-instruction exceptions or, as described in Section 19.6.1, virtual-instruction exceptions. Attempts to write a read-only register raise illegal-instruction exceptions.

I think the access to VS CSRs is privilege question first.
So read/write vstopi in VS-mode should raise virtual instruction exception for HS-mode.

Just for reference.

[yjloong]

19.2. Hypervisor and Virtual Supervisor CSRs
When V=1, an attempt to read or write a VS CSR directly by its own separate CSR address causes a virtual-instruction exception. (Attempts from U-mode cause an illegal-instruction exception as usual.). The VS CSRs can be accessed as themselves only from M-mode or HS-mode.

[Yasinhwang]

AIA spec chapter 2.4 says:

For hypervisor CSR other than vsireg, access from VS-mode usually raise virtual instruction execption, but the vstopi is a HRO CSR, vstopi is not the usual case, rule rely on RISC-V Privileged spec:

There is a issue discussing about the exception type when writing hgeip in VS-mode
riscv/riscv-isa-manual#796

vstopi is simillar with the CSR hgeip, both the two CSRs are HRO, they should first be HS-qualified, then they can be reported with a virtual instruction execption. Wirte HRO is not HS-qualified, so I think write vstopi should raise illegal-instruction, but I need a confirmation.

[yjloong]

I'm curious about it too. 嘿嘿

[jhauser-us]

Any CSR with address 0xC00 or higher is a read-only register. Any attempt to write to a read-only CSR using a CSR instruction raises an illegal instruction exception. Notably, an attempt in HS-mode to write to a read-only CSR raises an illegal instruction exception; hence, the instruction is not HS-qualified, so an attempt to use the same instruction in VS-mode also raises an illegal instruction exception, not a virtual instruction exception.

Yes, the AIA document has this sentence:

Following the default rules for the H extension, attempts from VS-mode to directly access a hypervisor or VS CSR other than vsireg, or from VU-mode to access any supervisor-level CSR (including hypervisor and VS CSRs) other than sireg or vsireg, usually raise not an illegal instruction exception but instead a virtual instruction exception.

The words I've emphasized in bold are important ("Following the default rules ..." and "usually"). And this sentence is immediately followed by another one:

For details, see the H extension documentation.

The H extension documentation gives the default rules for when virtual instruction exceptions replace illegal instruction exceptions, based on the concept of HS-qualified instructions.