From bc769546a8cd71e4ec567102dcc84d0bb7fee718 Mon Sep 17 00:00:00 2001 From: Derek Hower Date: Thu, 3 Jul 2025 13:22:27 -0700 Subject: [PATCH 1/4] feat(idl): add constraints to IDL --- tools/ruby-gems/idlc/lib/idlc.rb | 40 ++++++ tools/ruby-gems/idlc/lib/idlc/ast.rb | 134 ++++++++++++++++++ tools/ruby-gems/idlc/lib/idlc/idl.treetop | 18 +++ .../idlc/test/idl/constraint_errors.yaml | 11 ++ .../ruby-gems/idlc/test/idl/constraints.yaml | 44 ++++++ tools/ruby-gems/idlc/test/run.rb | 2 + tools/ruby-gems/idlc/test/test_constraints.rb | 84 +++++++++++ 7 files changed, 333 insertions(+) create mode 100644 tools/ruby-gems/idlc/test/idl/constraint_errors.yaml create mode 100644 tools/ruby-gems/idlc/test/idl/constraints.yaml create mode 100644 tools/ruby-gems/idlc/test/test_constraints.rb diff --git a/tools/ruby-gems/idlc/lib/idlc.rb b/tools/ruby-gems/idlc/lib/idlc.rb index 8280707d6..07c9603ca 100644 --- a/tools/ruby-gems/idlc/lib/idlc.rb +++ b/tools/ruby-gems/idlc/lib/idlc.rb @@ -5,6 +5,7 @@ # frozen_string_literal: true require "pathname" +require "sorbet-runtime" require "treetop" require_relative "idlc/syntax_node" @@ -44,6 +45,8 @@ class IdlParser < Treetop::Runtime::CompiledParser; end module Idl # the Idl compiler class Compiler + extend T::Sig + attr_reader :parser def initialize @@ -283,5 +286,42 @@ def compile_expression(expression, symtab, pass_error: false) ast end + + sig { params(body: String, symtab: SymbolTable, pass_error: T::Boolean).returns(ConstraintBodyAst) } + def compile_constraint(body, symtab, pass_error: false) + m = @parser.parse(body, root: :constraint_body) + if m.nil? + raise SyntaxError, <<~MSG + While parsing #{body}:#{@parser.failure_line}:#{@parser.failure_column} + + #{@parser.failure_reason} + MSG + end + + # fix up left recursion + ast = m.to_ast + ast.set_input_file("[CONSTRAINT]", 0) + ast.freeze_tree(symtab) + + begin + ast.type_check(symtab) + rescue AstNode::TypeError => e + raise e if pass_error + + warn "Compiling #{body}" + warn e.what + warn T.must(e.backtrace).to_s + exit 1 + rescue AstNode::InternalError => e + raise e if pass_error + + warn "Compiling #{body}" + warn e.what + warn T.must(e.backtrace).to_s + exit 1 + end + + ast + end end end diff --git a/tools/ruby-gems/idlc/lib/idlc/ast.rb b/tools/ruby-gems/idlc/lib/idlc/ast.rb index 3a1317115..e96191a56 100644 --- a/tools/ruby-gems/idlc/lib/idlc/ast.rb +++ b/tools/ruby-gems/idlc/lib/idlc/ast.rb @@ -2993,6 +2993,123 @@ def type_check(_symtab) end end + class ImplicationExpressionSyntaxNode < SyntaxNode + sig { override.returns(ImplicationExpressionAst) } + def to_ast + ImplicationExpressionAst.new( + input, interval, + antecedent.to_ast, consequent.to_ast + ) + end + end + + class ImplicationExpressionAst < AstNode + sig { + params( + input: String, + interval: T::Range[Integer], + antecedent: RvalueAst, + consequent: RvalueAst + ).void + } + def initialize(input, interval, antecedent, consequent) + super(input, interval, [antecedent, consequent]) + end + + sig { returns(RvalueAst) } + def antecedent = @children[0] + + sig { returns(RvalueAst) } + def consequent = @children[1] + + sig { override.params(symtab: SymbolTable).void } + def type_check(symtab) + antecedent.type_error "Antecedent must a boolean" unless antecedent.type(symtab).kind == :boolean + consequent.type_error "Consequent must a boolean" unless consequent.type(symtab).kind == :boolean + end + + sig { params(symtab: SymbolTable).returns(T::Boolean) } + def satisfied?(symtab) + return true if antecedent.value(symtab) == false + consequent.value(symtab) + end + + end + + class ImplicationStatementSyntaxNode < SyntaxNode + sig { override.returns(ImplicationStatementAst) } + def to_ast + ImplicationStatementAst.new(input, interval, implication_expression.to_ast) + end + end + + class ImplicationStatementAst < AstNode + sig { + params( + input: String, + interval: T::Range[Integer], + implication_expression: ImplicationExpressionAst + ).void + } + def initialize(input, interval, implication_expression) + super(input, interval, [implication_expression]) + end + + sig { returns(ImplicationExpressionAst) } + def expression = @children[0] + + sig { override.params(symtab: SymbolTable).void } + def type_check(symtab) + expression.type_check(symtab) + end + + sig { params(symtab: SymbolTable).returns(T::Boolean) } + def satisfied?(symtab) + expression.satisfied?(symtab) + end + end + + class ConstraintBodySyntaxNode < SyntaxNode + sig { override.returns(ConstraintBodyAst) } + def to_ast + stmts = [] + elements.each do |e| + stmts << e.i.to_ast + end + ConstraintBodyAst.new(input, interval, stmts) + end + end + + class ConstraintBodyAst < AstNode + sig { + params( + input: String, + interval: T::Range[Integer], + stmts: T::Array[T.any(ImplicationStatementAst, ForLoopAst)] + ).void + } + def initialize(input, interval, stmts) + super(input, interval, stmts) + end + + sig { returns(T::Array[T.any(ImplicationStatementAst, ForLoopAst)]) } + def stmts = T.cast(@children, T::Array[T.any(ImplicationStatementAst, ForLoopAst)]) + + sig { override.params(symtab: SymbolTable).void } + def type_check(symtab) + stmts.each do |stmt| + stmt.type_check(symtab) + end + end + + sig { params(symtab: SymbolTable).returns(T::Boolean) } + def satisfied?(symtab) + stmts.all? do |stmt| + stmt.satisfied?(symtab) + end + end + end + class WidthRevealSyntaxNode < SyntaxNode def to_ast WidthRevealAst.new(input, interval, send(:expression).to_ast) @@ -6429,6 +6546,23 @@ def type_check(symtab) symtab.pop end + sig { params(symtab: SymbolTable).returns(T::Boolean) } + def satisfied?(symtab) + symtab.push(self) + begin + init.execute(symtab) + while condition.value(symtab) + stmts.each do |s| + return false unless s.satisfied?(symtab) + end + update.execute(symtab) + end + return true + ensure + symtab.pop + end + end + # @!macro return_value def return_value(symtab) symtab.push(self) diff --git a/tools/ruby-gems/idlc/lib/idlc/idl.treetop b/tools/ruby-gems/idlc/lib/idlc/idl.treetop index 22b78c652..9829cac93 100644 --- a/tools/ruby-gems/idlc/lib/idlc/idl.treetop +++ b/tools/ruby-gems/idlc/lib/idlc/idl.treetop @@ -393,6 +393,24 @@ grammar Idl e:template_safe_p9_binary_expression space* '?' space* t:expression space* ':' space* f:expression end + rule implication_expression + antecedent:p9_binary_expression space* '->' space* consequent:p9_binary_expression + end + + rule implication_for_loop + 'for' space* '(' space* single_declaration_with_initialization space* ';' space* condition:expression space* ';' space* action:(assignment / post_inc / post_dec) space* ')' space* '{' space* + stmts:(s:(implication_statement / implication_for_loop) space*)+ + '}' + end + + rule implication_statement + implication_expression space* ';' + end + + rule constraint_body + (i:(implication_statement / implication_for_loop) space*)+ + end + rule expression ( ternary_expression diff --git a/tools/ruby-gems/idlc/test/idl/constraint_errors.yaml b/tools/ruby-gems/idlc/test/idl/constraint_errors.yaml new file mode 100644 index 000000000..4ebe01bda --- /dev/null +++ b/tools/ruby-gems/idlc/test/idl/constraint_errors.yaml @@ -0,0 +1,11 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# c: constraint body, which should cause a type error + +tests: + - c: | + true -> 1; + - c: | + 1 -> false; diff --git a/tools/ruby-gems/idlc/test/idl/constraints.yaml b/tools/ruby-gems/idlc/test/idl/constraints.yaml new file mode 100644 index 000000000..5c5a2bcc6 --- /dev/null +++ b/tools/ruby-gems/idlc/test/idl/constraints.yaml @@ -0,0 +1,44 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# c: constraint body +# r: result -- true if pass, false if not + +tests: + - c: | + true -> true; + r: true + - c: | + true -> false; + r: false + - c: | + false -> true; + r: true + - c: | + false -> false; + r: true + - c: | + (false && true) -> false; + r: true + - c: | + (false || true) -> false; + r: false + - c: | + true -> (false && true); + r: false + - c: | + true -> (false || true); + r: true + - c: | + TRUE_PARAM -> TRUE_PARAM; + p: + TRUE_PARAM: true + r: true + - c: | + for (U32 i = 0; i < 8; i++) { + TRUE_ARRAY[i] -> TRUE_ARRAY[i]; + } + p: + TRUE_ARRAY: [true, true, true, true, true, true, true, true] + r: true diff --git a/tools/ruby-gems/idlc/test/run.rb b/tools/ruby-gems/idlc/test/run.rb index d95956e10..55aed7a81 100644 --- a/tools/ruby-gems/idlc/test/run.rb +++ b/tools/ruby-gems/idlc/test/run.rb @@ -1,6 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear +# typed: false # frozen_string_literal: true require "simplecov" @@ -14,4 +15,5 @@ require "minitest/autorun" require_relative "test_expressions" +require_relative "test_constraints" require_relative "test_cli" diff --git a/tools/ruby-gems/idlc/test/test_constraints.rb b/tools/ruby-gems/idlc/test/test_constraints.rb new file mode 100644 index 000000000..48657bb79 --- /dev/null +++ b/tools/ruby-gems/idlc/test/test_constraints.rb @@ -0,0 +1,84 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# typed: false +# frozen_string_literal: true + +require "minitest/autorun" + +require "yaml" + +require_relative "helpers" +require "idlc" + +$root ||= (Pathname.new(__FILE__) / ".." / ".." / ".." / "..").realpath + +def to_idl_type(value) + case value + when Integer + width = value.zero? ? 1 : value.bit_length + Idl::Type.new(:bits, width:) + when String + Idl::Type.new(:string) + when TrueClass, FalseClass + Idl::Type.new(:boolean) + when Array + Idl::Type.new(:array, sub_type: to_idl_type(value[0])) + else + raise "Unexepected type" + end +end + +class ConstraintTestFactory + def self.create(klass_name, yaml_path) + raise ArgumentError, "klass_name must be a String" unless klass_name.is_a?(String) && klass_name.size > 0 + raise ArgumentError, "klass_name must be uppercase" unless klass_name[0] == klass_name[0].upcase + + # Test IDL constraints + Object.const_set(klass_name, + Class.new(Minitest::Test) do + include TestMixin + make_my_diffs_pretty! + + def setup + @symtab = Idl::SymbolTable.new + @compiler = Idl::Compiler.new + end + + test_yaml = YAML.load(File.read("#{Kernel.__dir__}/#{yaml_path}")) + test_yaml["tests"].each_with_index do |test, i| + define_method "test_#{i}" do + if test.key?("p") + @symtab.push(nil) + test["p"].each do |name, value| + @symtab.add!(name, Idl::Var.new(name, to_idl_type(value), value)) + end + end + constraint_ast = nil + if test["r"].nil? + assert_raises Idl::AstNode::TypeError do + @compiler.compile_constraint(test["c"], @symtab, pass_error: true) + end + else + out, err = capture_io do + constraint_ast = @compiler.compile_constraint(test["c"], @symtab) + end + + if test["r"] + assert constraint_ast.satisfied?(@symtab) + else + refute constraint_ast.satisfied?(@symtab) + end + end + + @symtab.pop if test.key?("p") + end + end + end + ) + end +end + +# now list all the YAML files that specify constraints to test +ConstraintTestFactory.create("Constraints", "idl/constraints.yaml") +ConstraintTestFactory.create("BadConstraints", "idl/constraint_errors.yaml") From 60f205411dbda4fc8f2665d9c3e9c7a1ce4337db Mon Sep 17 00:00:00 2001 From: Derek Hower Date: Fri, 11 Jul 2025 10:40:08 -0700 Subject: [PATCH 2/4] feat: add mock spec to udb gem for testing, add Condition classes --- .vscode/settings.json | 15 +- Gemfile | 1 + Gemfile.lock | 89 ++- cfgs/example_rv64_with_overlay.yaml | 1 - doc/schemas.adoc | 4 + spec/schemas/csr_schema.json | 4 +- spec/schemas/ext_schema.json | 478 ++++++------- spec/schemas/inst_schema.json | 2 +- spec/schemas/schema_defs.json | 210 +++++- spec/std/isa/csr/F/fcsr.yaml | 4 +- spec/std/isa/csr/F/fflags.yaml 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spec/std/isa/csr/Zihpm/hpmcounter7h.yaml | 4 +- spec/std/isa/csr/Zihpm/hpmcounter8.yaml | 4 +- spec/std/isa/csr/Zihpm/hpmcounter8h.yaml | 4 +- spec/std/isa/csr/Zihpm/hpmcounter9.yaml | 4 +- spec/std/isa/csr/Zihpm/hpmcounter9h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter10.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter10h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter11.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter11h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter12.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter12h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter13.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter13h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter14.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter14h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter15.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter15h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter16.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter16h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter17.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter17h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter18.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter18h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter19.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter19h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter20.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter20h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter21.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter21h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter22.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter22h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter23.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter23h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter24.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter24h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter25.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter25h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter26.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter26h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter27.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter27h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter28.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter28h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter29.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter29h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter3.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter30.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter30h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter31.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter31h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter3h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter4.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter4h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter5.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter5h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter6.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter6h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter7.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter7h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter8.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter8h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter9.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmcounter9h.yaml | 4 +- spec/std/isa/csr/Zihpm/mhpmevent10.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent10h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent11.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent11h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent12.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent12h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent13.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent13h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent14.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent14h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent15.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent15h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent16.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent16h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent17.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent17h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent18.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent18h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent19.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent19h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent20.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent20h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent21.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent21h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent22.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent22h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent23.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent23h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent24.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent24h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent25.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent25h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent26.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent26h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent27.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent27h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent28.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent28h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent29.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent29h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent3.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent30.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent30h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent31.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent31h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent3h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent4.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent4h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent5.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent5h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent6.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent6h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent7.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent7h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent8.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent8h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmevent9.yaml | 32 +- spec/std/isa/csr/Zihpm/mhpmevent9h.yaml | 28 +- spec/std/isa/csr/Zihpm/mhpmeventN.layout | 32 +- spec/std/isa/csr/Zihpm/mhpmeventNh.layout | 28 +- spec/std/isa/csr/cycle.yaml | 4 +- spec/std/isa/csr/cycleh.yaml | 4 +- spec/std/isa/csr/hedeleg.yaml | 4 +- spec/std/isa/csr/hedelegh.yaml | 4 +- spec/std/isa/csr/hstateen0.yaml | 36 +- spec/std/isa/csr/hstateen0h.yaml | 32 +- spec/std/isa/csr/hstateen1.yaml | 11 +- spec/std/isa/csr/hstateen1h.yaml | 11 +- spec/std/isa/csr/hstateen2.yaml | 11 +- spec/std/isa/csr/hstateen2h.yaml | 11 +- spec/std/isa/csr/hstateen3.yaml | 11 +- spec/std/isa/csr/hstateen3h.yaml | 11 +- spec/std/isa/csr/hstatus.yaml | 4 +- spec/std/isa/csr/instret.yaml | 4 +- spec/std/isa/csr/instreth.yaml | 4 +- spec/std/isa/csr/marchid.yaml | 4 +- spec/std/isa/csr/mcause.yaml | 4 +- spec/std/isa/csr/mconfigptr.yaml | 5 +- spec/std/isa/csr/mcycle.yaml | 4 +- spec/std/isa/csr/mcycleh.yaml | 4 +- spec/std/isa/csr/medeleg.yaml | 24 +- spec/std/isa/csr/medelegh.yaml | 5 +- spec/std/isa/csr/menvcfg.yaml | 33 +- spec/std/isa/csr/menvcfgh.yaml | 21 +- spec/std/isa/csr/mepc.yaml | 4 +- spec/std/isa/csr/mhartid.yaml | 4 +- spec/std/isa/csr/mideleg.yaml | 39 +- spec/std/isa/csr/mie.yaml | 36 +- spec/std/isa/csr/mimpid.yaml | 4 +- spec/std/isa/csr/minstret.yaml | 4 +- spec/std/isa/csr/minstreth.yaml | 4 +- spec/std/isa/csr/mip.yaml | 36 +- spec/std/isa/csr/misa.yaml | 52 +- spec/std/isa/csr/mscratch.yaml | 4 +- spec/std/isa/csr/mseccfg.yaml | 5 +- spec/std/isa/csr/mseccfgh.yaml | 5 +- spec/std/isa/csr/mstateen0.yaml | 33 +- spec/std/isa/csr/mstateen0h.yaml | 29 +- spec/std/isa/csr/mstateen1.yaml | 4 +- spec/std/isa/csr/mstateen1h.yaml | 4 +- spec/std/isa/csr/mstateen2.yaml | 6 +- spec/std/isa/csr/mstateen2h.yaml | 4 +- spec/std/isa/csr/mstateen3.yaml | 4 +- spec/std/isa/csr/mstateen3h.yaml | 4 +- spec/std/isa/csr/mstatus.yaml | 114 ++-- spec/std/isa/csr/mstatush.yaml | 21 +- spec/std/isa/csr/mtval.yaml | 4 +- spec/std/isa/csr/mtvec.yaml | 4 +- spec/std/isa/csr/mvendorid.yaml | 4 +- spec/std/isa/csr/satp.yaml | 4 +- spec/std/isa/csr/scause.yaml | 4 +- spec/std/isa/csr/senvcfg.yaml | 21 +- spec/std/isa/csr/sepc.yaml | 4 +- spec/std/isa/csr/sip.yaml | 20 +- spec/std/isa/csr/sscratch.yaml | 4 +- spec/std/isa/csr/sstateen0.yaml | 13 +- spec/std/isa/csr/sstateen1.yaml | 9 +- spec/std/isa/csr/sstateen2.yaml | 9 +- spec/std/isa/csr/sstateen3.yaml | 9 +- spec/std/isa/csr/sstatus.yaml | 24 +- spec/std/isa/csr/stval.yaml | 4 +- spec/std/isa/csr/stvec.yaml | 4 +- spec/std/isa/csr/time.yaml | 4 +- spec/std/isa/csr/timeh.yaml | 4 +- spec/std/isa/csr/vscause.yaml | 4 +- spec/std/isa/csr/vsepc.yaml | 4 +- spec/std/isa/csr/vsstatus.yaml | 28 +- spec/std/isa/csr/vstval.yaml | 4 +- spec/std/isa/csr/vstvec.yaml | 4 +- spec/std/isa/ext/A.yaml | 17 +- spec/std/isa/ext/B.yaml | 18 +- spec/std/isa/ext/C.yaml | 36 +- spec/std/isa/ext/D.yaml | 9 +- spec/std/isa/ext/F.yaml | 19 +- spec/std/isa/ext/H.yaml | 173 +++-- spec/std/isa/ext/I.yaml | 2 +- spec/std/isa/ext/M.yaml | 2 +- spec/std/isa/ext/Q.yaml | 6 +- spec/std/isa/ext/S.yaml | 208 ++++-- spec/std/isa/ext/Sdext.yaml | 2 +- spec/std/isa/ext/Sdtrig.yaml | 34 +- spec/std/isa/ext/Sha.yaml | 38 +- spec/std/isa/ext/Shcounterenw.yaml | 20 +- spec/std/isa/ext/Shgatpa.yaml | 48 +- spec/std/isa/ext/Shtvala.yaml | 25 +- spec/std/isa/ext/Shvsatpa.yaml | 2 +- spec/std/isa/ext/Shvstvala.yaml | 63 +- spec/std/isa/ext/Shvstvecd.yaml | 11 +- spec/std/isa/ext/Sm.yaml | 33 +- spec/std/isa/ext/Smaia.yaml | 2 +- spec/std/isa/ext/Smcdeleg.yaml | 2 +- spec/std/isa/ext/Smcntrpmf.yaml | 2 +- spec/std/isa/ext/Smcsrind.yaml | 5 +- spec/std/isa/ext/Smhpm.yaml | 2 +- spec/std/isa/ext/Smmpm.yaml | 2 +- spec/std/isa/ext/Smnpm.yaml | 2 +- spec/std/isa/ext/Smpmp.yaml | 2 +- spec/std/isa/ext/Smrnmi.yaml | 2 +- spec/std/isa/ext/Ssaia.yaml | 72 +- spec/std/isa/ext/Ssccfg.yaml | 2 +- spec/std/isa/ext/Ssccptr.yaml | 2 +- spec/std/isa/ext/Sscofpmf.yaml | 5 +- spec/std/isa/ext/Sscounterenw.yaml | 19 +- spec/std/isa/ext/Sscsrind.yaml | 48 +- spec/std/isa/ext/Ssnpm.yaml | 2 +- spec/std/isa/ext/Sspm.yaml | 2 +- spec/std/isa/ext/Ssqosid.yaml | 5 +- spec/std/isa/ext/Ssstateen.yaml | 2 +- spec/std/isa/ext/Ssstrict.yaml | 2 +- spec/std/isa/ext/Sstc.yaml | 2 +- spec/std/isa/ext/Sstvala.yaml | 2 +- spec/std/isa/ext/Sstvecd.yaml | 2 +- spec/std/isa/ext/Ssu64xl.yaml | 2 +- spec/std/isa/ext/Supm.yaml | 2 +- spec/std/isa/ext/Sv32.yaml | 2 +- spec/std/isa/ext/Sv48.yaml | 17 +- spec/std/isa/ext/Sv57.yaml | 17 +- spec/std/isa/ext/Svade.yaml | 2 +- spec/std/isa/ext/Svadu.yaml | 6 +- spec/std/isa/ext/Svbare.yaml | 5 +- spec/std/isa/ext/Svinval.yaml | 5 +- spec/std/isa/ext/Svnapot.yaml | 5 +- spec/std/isa/ext/Svpbmt.yaml | 5 +- spec/std/isa/ext/Svvptc.yaml | 2 +- spec/std/isa/ext/U.yaml | 30 +- spec/std/isa/ext/V.yaml | 21 +- spec/std/isa/ext/Xmock.yaml | 2 +- spec/std/isa/ext/Za128rs.yaml | 2 +- spec/std/isa/ext/Za64rs.yaml | 2 +- spec/std/isa/ext/Zaamo.yaml | 2 +- spec/std/isa/ext/Zabha.yaml | 6 +- spec/std/isa/ext/Zacas.yaml | 6 +- spec/std/isa/ext/Zalasr.yaml | 2 +- spec/std/isa/ext/Zalrsc.yaml | 2 +- spec/std/isa/ext/Zama16b.yaml | 2 +- spec/std/isa/ext/Zawrs.yaml | 2 +- spec/std/isa/ext/Zba.yaml | 2 +- spec/std/isa/ext/Zbb.yaml | 2 +- spec/std/isa/ext/Zbc.yaml | 2 +- spec/std/isa/ext/Zbkb.yaml | 2 +- spec/std/isa/ext/Zbkc.yaml | 2 +- spec/std/isa/ext/Zbkx.yaml | 2 +- spec/std/isa/ext/Zbs.yaml | 2 +- spec/std/isa/ext/Zca.yaml | 2 +- spec/std/isa/ext/Zcb.yaml | 2 +- spec/std/isa/ext/Zcd.yaml | 13 +- spec/std/isa/ext/Zce.yaml | 31 +- spec/std/isa/ext/Zcf.yaml | 13 +- spec/std/isa/ext/Zclsd.yaml | 9 +- spec/std/isa/ext/Zcmop.yaml | 6 +- spec/std/isa/ext/Zcmp.yaml | 14 +- spec/std/isa/ext/Zcmt.yaml | 121 ++-- spec/std/isa/ext/Zfa.yaml | 6 +- spec/std/isa/ext/Zfbfmin.yaml | 9 +- spec/std/isa/ext/Zfh.yaml | 2 +- spec/std/isa/ext/Zfhmin.yaml | 7 +- spec/std/isa/ext/Zhinx.yaml | 8 +- spec/std/isa/ext/Zic64b.yaml | 11 +- spec/std/isa/ext/Zicbom.yaml | 2 +- spec/std/isa/ext/Zicbop.yaml | 2 +- spec/std/isa/ext/Zicboz.yaml | 2 +- spec/std/isa/ext/Ziccamoa.yaml | 2 +- spec/std/isa/ext/Ziccamoc.yaml | 2 +- spec/std/isa/ext/Ziccif.yaml | 2 +- spec/std/isa/ext/Zicclsm.yaml | 2 +- spec/std/isa/ext/Ziccrse.yaml | 2 +- spec/std/isa/ext/Zicfilp.yaml | 2 + spec/std/isa/ext/Zicfiss.yaml | 2 +- spec/std/isa/ext/Zicntr.yaml | 7 +- spec/std/isa/ext/Zicond.yaml | 2 +- spec/std/isa/ext/Zicsr.yaml | 2 +- spec/std/isa/ext/Zifencei.yaml | 2 +- spec/std/isa/ext/Zihintntl.yaml | 2 +- spec/std/isa/ext/Zihintpause.yaml | 2 +- spec/std/isa/ext/Zihpm.yaml | 5 +- spec/std/isa/ext/Zilsd.yaml | 2 + spec/std/isa/ext/Zimop.yaml | 2 +- spec/std/isa/ext/Zk.yaml | 18 +- spec/std/isa/ext/Zkn.yaml | 30 +- spec/std/isa/ext/Zknd.yaml | 2 +- spec/std/isa/ext/Zkne.yaml | 2 +- spec/std/isa/ext/Zknh.yaml | 2 +- spec/std/isa/ext/Zkr.yaml | 2 +- spec/std/isa/ext/Zks.yaml | 30 +- spec/std/isa/ext/Zksed.yaml | 2 +- spec/std/isa/ext/Zksh.yaml | 2 +- spec/std/isa/ext/Zkt.yaml | 2 +- spec/std/isa/ext/Zmmul.yaml | 2 +- spec/std/isa/ext/Zvbb.yaml | 9 +- spec/std/isa/ext/Zvbc.yaml | 2 +- spec/std/isa/ext/Zve32f.yaml | 6 +- spec/std/isa/ext/Zvfbfmin.yaml | 9 +- spec/std/isa/ext/Zvfbfwma.yaml | 9 +- spec/std/isa/ext/Zvfh.yaml | 9 +- spec/std/isa/ext/Zvfhmin.yaml | 6 +- spec/std/isa/ext/Zvkb.yaml | 2 +- spec/std/isa/ext/Zvkg.yaml | 2 +- spec/std/isa/ext/Zvkn.yaml | 22 +- spec/std/isa/ext/Zvknc.yaml | 14 +- spec/std/isa/ext/Zvkned.yaml | 2 +- spec/std/isa/ext/Zvkng.yaml | 14 +- spec/std/isa/ext/Zvknha.yaml | 2 +- spec/std/isa/ext/Zvknhb.yaml | 9 +- spec/std/isa/ext/Zvks.yaml | 22 +- spec/std/isa/ext/Zvksc.yaml | 14 +- spec/std/isa/ext/Zvksed.yaml | 2 +- spec/std/isa/ext/Zvksg.yaml | 14 +- spec/std/isa/ext/Zvksh.yaml | 2 +- spec/std/isa/ext/Zvkt.yaml | 2 +- spec/std/isa/inst/B/andn.yaml | 5 +- spec/std/isa/inst/B/clmul.yaml | 5 +- spec/std/isa/inst/B/clmulh.yaml | 5 +- spec/std/isa/inst/B/orn.yaml | 5 +- spec/std/isa/inst/B/rev8.yaml | 5 +- spec/std/isa/inst/B/rol.yaml | 5 +- spec/std/isa/inst/B/rolw.yaml | 5 +- spec/std/isa/inst/B/ror.yaml | 5 +- spec/std/isa/inst/B/rori.yaml | 5 +- spec/std/isa/inst/B/roriw.yaml | 5 +- spec/std/isa/inst/B/rorw.yaml | 5 +- spec/std/isa/inst/B/xnor.yaml | 5 +- spec/std/isa/inst/C/c.add.yaml | 7 +- spec/std/isa/inst/C/c.addi.yaml | 7 +- spec/std/isa/inst/C/c.addi16sp.yaml | 7 +- spec/std/isa/inst/C/c.addi4spn.yaml | 7 +- spec/std/isa/inst/C/c.addiw.yaml | 7 +- spec/std/isa/inst/C/c.addw.yaml | 7 +- spec/std/isa/inst/C/c.and.yaml | 7 +- spec/std/isa/inst/C/c.andi.yaml | 7 +- spec/std/isa/inst/C/c.beqz.yaml | 7 +- spec/std/isa/inst/C/c.bnez.yaml | 7 +- spec/std/isa/inst/C/c.ebreak.yaml | 7 +- spec/std/isa/inst/C/c.j.yaml | 7 +- spec/std/isa/inst/C/c.jal.yaml | 7 +- spec/std/isa/inst/C/c.jalr.yaml | 7 +- spec/std/isa/inst/C/c.jr.yaml | 7 +- spec/std/isa/inst/C/c.ld.yaml | 9 +- spec/std/isa/inst/C/c.ldsp.yaml | 7 +- spec/std/isa/inst/C/c.li.yaml | 7 +- spec/std/isa/inst/C/c.lui.yaml | 11 +- spec/std/isa/inst/C/c.lw.yaml | 7 +- spec/std/isa/inst/C/c.lwsp.yaml | 7 +- spec/std/isa/inst/C/c.mv.yaml | 7 +- spec/std/isa/inst/C/c.nop.yaml | 7 +- spec/std/isa/inst/C/c.or.yaml | 7 +- spec/std/isa/inst/C/c.sd.yaml | 9 +- spec/std/isa/inst/C/c.sdsp.yaml | 9 +- spec/std/isa/inst/C/c.slli.yaml | 7 +- spec/std/isa/inst/C/c.srai.yaml | 7 +- spec/std/isa/inst/C/c.srli.yaml | 7 +- spec/std/isa/inst/C/c.sub.yaml | 7 +- spec/std/isa/inst/C/c.subw.yaml | 7 +- spec/std/isa/inst/C/c.sw.yaml | 7 +- spec/std/isa/inst/C/c.swsp.yaml | 7 +- spec/std/isa/inst/C/c.xor.yaml | 7 +- spec/std/isa/inst/D/fadd.d.yaml | 4 +- spec/std/isa/inst/D/fclass.d.yaml | 4 +- spec/std/isa/inst/D/fcvt.d.l.yaml | 4 +- spec/std/isa/inst/D/fcvt.d.lu.yaml | 4 +- spec/std/isa/inst/D/fcvt.d.s.yaml | 4 +- spec/std/isa/inst/D/fcvt.d.w.yaml | 4 +- spec/std/isa/inst/D/fcvt.d.wu.yaml | 4 +- spec/std/isa/inst/D/fcvt.l.d.yaml | 4 +- spec/std/isa/inst/D/fcvt.lu.d.yaml | 4 +- spec/std/isa/inst/D/fcvt.s.d.yaml | 4 +- spec/std/isa/inst/D/fcvt.w.d.yaml | 4 +- spec/std/isa/inst/D/fcvt.wu.d.yaml | 4 +- spec/std/isa/inst/D/fcvtmod.w.d.yaml | 5 +- spec/std/isa/inst/D/fdiv.d.yaml | 4 +- spec/std/isa/inst/D/feq.d.yaml | 4 +- spec/std/isa/inst/D/fld.yaml | 6 +- spec/std/isa/inst/D/fle.d.yaml | 4 +- spec/std/isa/inst/D/fleq.d.yaml | 5 +- spec/std/isa/inst/D/fli.d.yaml | 5 +- spec/std/isa/inst/D/flt.d.yaml | 4 +- spec/std/isa/inst/D/fltq.d.yaml | 5 +- spec/std/isa/inst/D/fmadd.d.yaml | 6 +- spec/std/isa/inst/D/fmax.d.yaml | 4 +- spec/std/isa/inst/D/fmaxm.d.yaml | 5 +- spec/std/isa/inst/D/fmin.d.yaml | 4 +- spec/std/isa/inst/D/fminm.d.yaml | 5 +- spec/std/isa/inst/D/fmsub.d.yaml | 6 +- spec/std/isa/inst/D/fmul.d.yaml | 4 +- spec/std/isa/inst/D/fmv.d.x.yaml | 4 +- spec/std/isa/inst/D/fmv.x.d.yaml | 4 +- spec/std/isa/inst/D/fmvh.x.d.yaml | 5 +- spec/std/isa/inst/D/fmvp.d.x.yaml | 5 +- spec/std/isa/inst/D/fnmadd.d.yaml | 6 +- spec/std/isa/inst/D/fnmsub.d.yaml | 6 +- spec/std/isa/inst/D/fround.d.yaml | 5 +- spec/std/isa/inst/D/froundnx.d.yaml | 5 +- spec/std/isa/inst/D/fsd.yaml | 6 +- spec/std/isa/inst/D/fsgnj.d.yaml | 4 +- spec/std/isa/inst/D/fsgnjn.d.yaml | 4 +- spec/std/isa/inst/D/fsgnjx.d.yaml | 4 +- spec/std/isa/inst/D/fsqrt.d.yaml | 4 +- spec/std/isa/inst/D/fsub.d.yaml | 4 +- spec/std/isa/inst/F/fadd.s.yaml | 4 +- spec/std/isa/inst/F/fclass.s.yaml | 4 +- spec/std/isa/inst/F/fcvt.l.s.yaml | 4 +- spec/std/isa/inst/F/fcvt.lu.s.yaml | 4 +- spec/std/isa/inst/F/fcvt.s.l.yaml | 4 +- spec/std/isa/inst/F/fcvt.s.lu.yaml | 4 +- spec/std/isa/inst/F/fcvt.s.w.yaml | 4 +- spec/std/isa/inst/F/fcvt.s.wu.yaml | 4 +- spec/std/isa/inst/F/fcvt.w.s.yaml | 4 +- spec/std/isa/inst/F/fcvt.wu.s.yaml | 4 +- spec/std/isa/inst/F/fdiv.s.yaml | 4 +- spec/std/isa/inst/F/feq.s.yaml | 4 +- spec/std/isa/inst/F/fle.s.yaml | 4 +- spec/std/isa/inst/F/fleq.s.yaml | 4 +- spec/std/isa/inst/F/fli.s.yaml | 4 +- spec/std/isa/inst/F/flt.s.yaml | 4 +- spec/std/isa/inst/F/fltq.s.yaml | 4 +- spec/std/isa/inst/F/flw.yaml | 6 +- spec/std/isa/inst/F/fmadd.s.yaml | 6 +- spec/std/isa/inst/F/fmax.s.yaml | 4 +- spec/std/isa/inst/F/fmaxm.s.yaml | 4 +- spec/std/isa/inst/F/fmin.s.yaml | 4 +- spec/std/isa/inst/F/fminm.s.yaml | 4 +- spec/std/isa/inst/F/fmsub.s.yaml | 6 +- spec/std/isa/inst/F/fmul.s.yaml | 4 +- spec/std/isa/inst/F/fmv.w.x.yaml | 4 +- spec/std/isa/inst/F/fmv.x.w.yaml | 4 +- spec/std/isa/inst/F/fnmadd.s.yaml | 6 +- spec/std/isa/inst/F/fnmsub.s.yaml | 6 +- spec/std/isa/inst/F/fround.s.yaml | 4 +- spec/std/isa/inst/F/froundnx.s.yaml | 4 +- spec/std/isa/inst/F/fsgnj.s.yaml | 4 +- spec/std/isa/inst/F/fsgnjn.s.yaml | 4 +- spec/std/isa/inst/F/fsgnjx.s.yaml | 4 +- spec/std/isa/inst/F/fsqrt.s.yaml | 4 +- spec/std/isa/inst/F/fsub.s.yaml | 4 +- spec/std/isa/inst/F/fsw.yaml | 6 +- spec/std/isa/inst/H/hfence.gvma.yaml | 4 +- spec/std/isa/inst/H/hfence.vvma.yaml | 4 +- spec/std/isa/inst/H/hlv.b.yaml | 4 +- spec/std/isa/inst/H/hlv.bu.yaml | 4 +- spec/std/isa/inst/H/hlv.d.yaml | 4 +- spec/std/isa/inst/H/hlv.h.yaml | 4 +- spec/std/isa/inst/H/hlv.hu.yaml | 4 +- spec/std/isa/inst/H/hlv.w.yaml | 4 +- spec/std/isa/inst/H/hlv.wu.yaml | 4 +- spec/std/isa/inst/H/hlvx.hu.yaml | 4 +- spec/std/isa/inst/H/hlvx.wu.yaml | 4 +- spec/std/isa/inst/H/hsv.b.yaml | 4 +- spec/std/isa/inst/H/hsv.d.yaml | 4 +- spec/std/isa/inst/H/hsv.h.yaml | 4 +- spec/std/isa/inst/H/hsv.w.yaml | 4 +- spec/std/isa/inst/I/add.yaml | 4 +- spec/std/isa/inst/I/addi.yaml | 10 +- spec/std/isa/inst/I/addiw.yaml | 10 +- spec/std/isa/inst/I/addw.yaml | 4 +- spec/std/isa/inst/I/and.yaml | 4 +- spec/std/isa/inst/I/andi.yaml | 6 +- spec/std/isa/inst/I/auipc.yaml | 6 +- spec/std/isa/inst/I/beq.yaml | 6 +- spec/std/isa/inst/I/bge.yaml | 6 +- spec/std/isa/inst/I/bgeu.yaml | 6 +- spec/std/isa/inst/I/blt.yaml | 6 +- spec/std/isa/inst/I/bltu.yaml | 6 +- spec/std/isa/inst/I/bne.yaml | 6 +- spec/std/isa/inst/I/ebreak.yaml | 4 +- spec/std/isa/inst/I/ecall.yaml | 4 +- spec/std/isa/inst/I/fence.tso.yaml | 4 +- spec/std/isa/inst/I/fence.yaml | 6 +- spec/std/isa/inst/I/jal.yaml | 6 +- spec/std/isa/inst/I/jalr.yaml | 6 +- spec/std/isa/inst/I/lb.yaml | 6 +- spec/std/isa/inst/I/lbu.yaml | 6 +- spec/std/isa/inst/I/ld.yaml | 6 +- spec/std/isa/inst/I/lh.yaml | 6 +- spec/std/isa/inst/I/lhu.yaml | 6 +- spec/std/isa/inst/I/lui.yaml | 6 +- spec/std/isa/inst/I/lw.yaml | 6 +- spec/std/isa/inst/I/lwu.yaml | 6 +- spec/std/isa/inst/I/mret.yaml | 4 +- spec/std/isa/inst/I/or.yaml | 4 +- spec/std/isa/inst/I/ori.yaml | 6 +- spec/std/isa/inst/I/sb.yaml | 6 +- spec/std/isa/inst/I/sd.yaml | 6 +- spec/std/isa/inst/I/sh.yaml | 6 +- spec/std/isa/inst/I/sll.yaml | 4 +- spec/std/isa/inst/I/slli.yaml | 4 +- spec/std/isa/inst/I/slliw.yaml | 8 +- spec/std/isa/inst/I/sllw.yaml | 4 +- spec/std/isa/inst/I/slt.yaml | 4 +- spec/std/isa/inst/I/slti.yaml | 6 +- spec/std/isa/inst/I/sltiu.yaml | 6 +- spec/std/isa/inst/I/sltu.yaml | 4 +- spec/std/isa/inst/I/sra.yaml | 4 +- spec/std/isa/inst/I/srai.yaml | 4 +- spec/std/isa/inst/I/sraiw.yaml | 4 +- spec/std/isa/inst/I/sraw.yaml | 4 +- spec/std/isa/inst/I/srl.yaml | 4 +- spec/std/isa/inst/I/srli.yaml | 4 +- spec/std/isa/inst/I/srliw.yaml | 8 +- spec/std/isa/inst/I/srlw.yaml | 4 +- spec/std/isa/inst/I/sub.yaml | 4 +- spec/std/isa/inst/I/subw.yaml | 8 +- spec/std/isa/inst/I/sw.yaml | 6 +- spec/std/isa/inst/I/wfi.yaml | 4 +- spec/std/isa/inst/I/xor.yaml | 4 +- spec/std/isa/inst/I/xori.yaml | 10 +- spec/std/isa/inst/M/div.yaml | 4 +- spec/std/isa/inst/M/divu.yaml | 4 +- spec/std/isa/inst/M/divuw.yaml | 4 +- spec/std/isa/inst/M/divw.yaml | 4 +- spec/std/isa/inst/M/mul.yaml | 5 +- spec/std/isa/inst/M/mulh.yaml | 5 +- spec/std/isa/inst/M/mulhsu.yaml | 5 +- spec/std/isa/inst/M/mulhu.yaml | 5 +- spec/std/isa/inst/M/mulw.yaml | 5 +- spec/std/isa/inst/M/rem.yaml | 4 +- spec/std/isa/inst/M/remu.yaml | 4 +- spec/std/isa/inst/M/remuw.yaml | 4 +- spec/std/isa/inst/M/remw.yaml | 4 +- spec/std/isa/inst/Q/fadd.q.yaml | 4 +- spec/std/isa/inst/Q/fclass.q.yaml | 4 +- spec/std/isa/inst/Q/fcvt.d.q.yaml | 4 +- spec/std/isa/inst/Q/fcvt.h.q.yaml | 5 +- spec/std/isa/inst/Q/fcvt.l.q.yaml | 4 +- spec/std/isa/inst/Q/fcvt.lu.q.yaml | 4 +- spec/std/isa/inst/Q/fcvt.q.d.yaml | 4 +- spec/std/isa/inst/Q/fcvt.q.h.yaml | 5 +- spec/std/isa/inst/Q/fcvt.q.l.yaml | 4 +- spec/std/isa/inst/Q/fcvt.q.lu.yaml | 4 +- spec/std/isa/inst/Q/fcvt.q.s.yaml | 4 +- spec/std/isa/inst/Q/fcvt.q.w.yaml | 4 +- spec/std/isa/inst/Q/fcvt.q.wu.yaml | 4 +- spec/std/isa/inst/Q/fcvt.s.q.yaml | 4 +- spec/std/isa/inst/Q/fcvt.w.q.yaml | 4 +- spec/std/isa/inst/Q/fcvt.wu.q.yaml | 4 +- spec/std/isa/inst/Q/fdiv.q.yaml | 4 +- spec/std/isa/inst/Q/feq.q.yaml | 4 +- spec/std/isa/inst/Q/fle.q.yaml | 4 +- spec/std/isa/inst/Q/fleq.q.yaml | 5 +- spec/std/isa/inst/Q/fli.q.yaml | 5 +- spec/std/isa/inst/Q/flq.yaml | 6 +- spec/std/isa/inst/Q/flt.q.yaml | 4 +- spec/std/isa/inst/Q/fltq.q.yaml | 5 +- spec/std/isa/inst/Q/fmadd.q.yaml | 6 +- spec/std/isa/inst/Q/fmax.q.yaml | 4 +- spec/std/isa/inst/Q/fmaxm.q.yaml | 5 +- spec/std/isa/inst/Q/fmin.q.yaml | 4 +- spec/std/isa/inst/Q/fminm.q.yaml | 5 +- spec/std/isa/inst/Q/fmsub.q.yaml | 6 +- spec/std/isa/inst/Q/fmul.q.yaml | 4 +- spec/std/isa/inst/Q/fmvh.x.q.yaml | 5 +- spec/std/isa/inst/Q/fmvp.q.x.yaml | 5 +- spec/std/isa/inst/Q/fnmadd.q.yaml | 6 +- spec/std/isa/inst/Q/fnmsub.q.yaml | 6 +- spec/std/isa/inst/Q/fround.q.yaml | 5 +- spec/std/isa/inst/Q/froundnx.q.yaml | 5 +- spec/std/isa/inst/Q/fsgnj.q.yaml | 4 +- spec/std/isa/inst/Q/fsgnjn.q.yaml | 4 +- spec/std/isa/inst/Q/fsgnjx.q.yaml | 4 +- spec/std/isa/inst/Q/fsq.yaml | 6 +- spec/std/isa/inst/Q/fsqrt.q.yaml | 4 +- spec/std/isa/inst/Q/fsub.q.yaml | 4 +- spec/std/isa/inst/S/sfence.vma.yaml | 4 +- spec/std/isa/inst/S/sret.yaml | 4 +- spec/std/isa/inst/Sdext/dret.yaml | 4 +- spec/std/isa/inst/Smdbltrp/sctrclr.yaml | 4 +- spec/std/isa/inst/Smrnmi/mnret.yaml | 4 +- spec/std/isa/inst/Svinval/hinval.gvma.yaml | 7 +- spec/std/isa/inst/Svinval/hinval.vvma.yaml | 7 +- .../std/isa/inst/Svinval/sfence.inval.ir.yaml | 4 +- spec/std/isa/inst/Svinval/sfence.w.inval.yaml | 4 +- spec/std/isa/inst/Svinval/sinval.vma.yaml | 13 +- spec/std/isa/inst/V/vaadd.vv.yaml | 4 +- spec/std/isa/inst/V/vaadd.vx.yaml | 4 +- spec/std/isa/inst/V/vaaddu.vv.yaml | 4 +- spec/std/isa/inst/V/vaaddu.vx.yaml | 4 +- spec/std/isa/inst/V/vadc.vim.yaml | 4 +- spec/std/isa/inst/V/vadc.vvm.yaml | 4 +- spec/std/isa/inst/V/vadc.vxm.yaml | 4 +- spec/std/isa/inst/V/vadd.vi.yaml | 4 +- spec/std/isa/inst/V/vadd.vv.yaml | 4 +- spec/std/isa/inst/V/vadd.vx.yaml | 4 +- spec/std/isa/inst/V/vand.vi.yaml | 4 +- spec/std/isa/inst/V/vand.vv.yaml | 4 +- spec/std/isa/inst/V/vand.vx.yaml | 4 +- spec/std/isa/inst/V/vasub.vv.yaml | 4 +- spec/std/isa/inst/V/vasub.vx.yaml | 4 +- spec/std/isa/inst/V/vasubu.vv.yaml | 4 +- spec/std/isa/inst/V/vasubu.vx.yaml | 4 +- spec/std/isa/inst/V/vcompress.vm.yaml | 4 +- spec/std/isa/inst/V/vcpop.m.yaml | 4 +- spec/std/isa/inst/V/vdiv.vv.yaml | 4 +- spec/std/isa/inst/V/vdiv.vx.yaml | 4 +- spec/std/isa/inst/V/vdivu.vv.yaml | 4 +- spec/std/isa/inst/V/vdivu.vx.yaml | 4 +- spec/std/isa/inst/V/vfadd.vf.yaml | 4 +- spec/std/isa/inst/V/vfadd.vv.yaml | 4 +- spec/std/isa/inst/V/vfclass.v.yaml | 4 +- spec/std/isa/inst/V/vfcvt.f.x.v.yaml | 4 +- spec/std/isa/inst/V/vfcvt.f.xu.v.yaml | 4 +- spec/std/isa/inst/V/vfcvt.rtz.x.f.v.yaml | 4 +- spec/std/isa/inst/V/vfcvt.rtz.xu.f.v.yaml | 4 +- spec/std/isa/inst/V/vfcvt.x.f.v.yaml | 4 +- spec/std/isa/inst/V/vfcvt.xu.f.v.yaml | 4 +- spec/std/isa/inst/V/vfdiv.vf.yaml | 4 +- spec/std/isa/inst/V/vfdiv.vv.yaml | 4 +- spec/std/isa/inst/V/vfirst.m.yaml | 4 +- spec/std/isa/inst/V/vfmacc.vf.yaml | 4 +- spec/std/isa/inst/V/vfmacc.vv.yaml | 4 +- spec/std/isa/inst/V/vfmadd.vf.yaml | 4 +- spec/std/isa/inst/V/vfmadd.vv.yaml | 4 +- spec/std/isa/inst/V/vfmax.vf.yaml | 4 +- spec/std/isa/inst/V/vfmax.vv.yaml | 4 +- spec/std/isa/inst/V/vfmerge.vfm.yaml | 4 +- spec/std/isa/inst/V/vfmin.vf.yaml | 4 +- spec/std/isa/inst/V/vfmin.vv.yaml | 4 +- spec/std/isa/inst/V/vfmsac.vf.yaml | 4 +- spec/std/isa/inst/V/vfmsac.vv.yaml | 4 +- spec/std/isa/inst/V/vfmsub.vf.yaml | 4 +- spec/std/isa/inst/V/vfmsub.vv.yaml | 4 +- spec/std/isa/inst/V/vfmul.vf.yaml | 4 +- spec/std/isa/inst/V/vfmul.vv.yaml | 4 +- spec/std/isa/inst/V/vfmv.f.s.yaml | 4 +- spec/std/isa/inst/V/vfmv.s.f.yaml | 4 +- spec/std/isa/inst/V/vfmv.v.f.yaml | 4 +- spec/std/isa/inst/V/vfncvt.f.f.w.yaml | 4 +- spec/std/isa/inst/V/vfncvt.f.x.w.yaml | 4 +- spec/std/isa/inst/V/vfncvt.f.xu.w.yaml | 4 +- spec/std/isa/inst/V/vfncvt.rod.f.f.w.yaml | 4 +- spec/std/isa/inst/V/vfncvt.rtz.x.f.w.yaml | 4 +- spec/std/isa/inst/V/vfncvt.rtz.xu.f.w.yaml | 4 +- spec/std/isa/inst/V/vfncvt.x.f.w.yaml | 4 +- spec/std/isa/inst/V/vfncvt.xu.f.w.yaml | 4 +- spec/std/isa/inst/V/vfnmacc.vf.yaml | 4 +- spec/std/isa/inst/V/vfnmacc.vv.yaml | 4 +- spec/std/isa/inst/V/vfnmadd.vf.yaml | 4 +- spec/std/isa/inst/V/vfnmadd.vv.yaml | 4 +- spec/std/isa/inst/V/vfnmsac.vf.yaml | 4 +- spec/std/isa/inst/V/vfnmsac.vv.yaml | 4 +- spec/std/isa/inst/V/vfnmsub.vf.yaml | 4 +- spec/std/isa/inst/V/vfnmsub.vv.yaml | 4 +- spec/std/isa/inst/V/vfrdiv.vf.yaml | 4 +- spec/std/isa/inst/V/vfrec7.v.yaml | 4 +- spec/std/isa/inst/V/vfredmax.vs.yaml | 4 +- spec/std/isa/inst/V/vfredmin.vs.yaml | 4 +- spec/std/isa/inst/V/vfredosum.vs.yaml | 4 +- spec/std/isa/inst/V/vfredusum.vs.yaml | 4 +- spec/std/isa/inst/V/vfrsqrt7.v.yaml | 4 +- spec/std/isa/inst/V/vfrsub.vf.yaml | 4 +- spec/std/isa/inst/V/vfsgnj.vf.yaml | 4 +- spec/std/isa/inst/V/vfsgnj.vv.yaml | 4 +- spec/std/isa/inst/V/vfsgnjn.vf.yaml | 4 +- spec/std/isa/inst/V/vfsgnjn.vv.yaml | 4 +- spec/std/isa/inst/V/vfsgnjx.vf.yaml | 4 +- spec/std/isa/inst/V/vfsgnjx.vv.yaml | 4 +- spec/std/isa/inst/V/vfslide1down.vf.yaml | 4 +- spec/std/isa/inst/V/vfslide1up.vf.yaml | 4 +- spec/std/isa/inst/V/vfsqrt.v.yaml | 4 +- spec/std/isa/inst/V/vfsub.vf.yaml | 4 +- spec/std/isa/inst/V/vfsub.vv.yaml | 4 +- spec/std/isa/inst/V/vfwadd.vf.yaml | 4 +- spec/std/isa/inst/V/vfwadd.vv.yaml | 4 +- spec/std/isa/inst/V/vfwadd.wf.yaml | 4 +- spec/std/isa/inst/V/vfwadd.wv.yaml | 4 +- spec/std/isa/inst/V/vfwcvt.f.f.v.yaml | 4 +- spec/std/isa/inst/V/vfwcvt.f.x.v.yaml | 4 +- spec/std/isa/inst/V/vfwcvt.f.xu.v.yaml | 4 +- spec/std/isa/inst/V/vfwcvt.rtz.x.f.v.yaml | 4 +- spec/std/isa/inst/V/vfwcvt.rtz.xu.f.v.yaml | 4 +- spec/std/isa/inst/V/vfwcvt.x.f.v.yaml | 4 +- spec/std/isa/inst/V/vfwcvt.xu.f.v.yaml | 4 +- spec/std/isa/inst/V/vfwmacc.vf.yaml | 4 +- spec/std/isa/inst/V/vfwmacc.vv.yaml | 4 +- spec/std/isa/inst/V/vfwmsac.vf.yaml | 4 +- spec/std/isa/inst/V/vfwmsac.vv.yaml | 4 +- spec/std/isa/inst/V/vfwmul.vf.yaml | 4 +- spec/std/isa/inst/V/vfwmul.vv.yaml | 4 +- spec/std/isa/inst/V/vfwnmacc.vf.yaml | 4 +- spec/std/isa/inst/V/vfwnmacc.vv.yaml | 4 +- spec/std/isa/inst/V/vfwnmsac.vf.yaml | 4 +- spec/std/isa/inst/V/vfwnmsac.vv.yaml | 4 +- spec/std/isa/inst/V/vfwredosum.vs.yaml | 4 +- spec/std/isa/inst/V/vfwredusum.vs.yaml | 4 +- spec/std/isa/inst/V/vfwsub.vf.yaml | 4 +- spec/std/isa/inst/V/vfwsub.vv.yaml | 4 +- spec/std/isa/inst/V/vfwsub.wf.yaml | 4 +- spec/std/isa/inst/V/vfwsub.wv.yaml | 4 +- spec/std/isa/inst/V/vid.v.yaml | 4 +- spec/std/isa/inst/V/viota.m.yaml | 4 +- spec/std/isa/inst/V/vl1re16.v.yaml | 4 +- spec/std/isa/inst/V/vl1re32.v.yaml | 4 +- spec/std/isa/inst/V/vl1re64.v.yaml | 4 +- spec/std/isa/inst/V/vl1re8.v.yaml | 4 +- spec/std/isa/inst/V/vl2re16.v.yaml | 4 +- spec/std/isa/inst/V/vl2re32.v.yaml | 4 +- spec/std/isa/inst/V/vl2re64.v.yaml | 4 +- spec/std/isa/inst/V/vl2re8.v.yaml | 4 +- spec/std/isa/inst/V/vl4re16.v.yaml | 4 +- spec/std/isa/inst/V/vl4re32.v.yaml | 4 +- spec/std/isa/inst/V/vl4re64.v.yaml | 4 +- spec/std/isa/inst/V/vl4re8.v.yaml | 4 +- spec/std/isa/inst/V/vl8re16.v.yaml | 4 +- spec/std/isa/inst/V/vl8re32.v.yaml | 4 +- spec/std/isa/inst/V/vl8re64.v.yaml | 4 +- spec/std/isa/inst/V/vl8re8.v.yaml | 4 +- spec/std/isa/inst/V/vle16.v.yaml | 4 +- spec/std/isa/inst/V/vle16ff.v.yaml | 4 +- spec/std/isa/inst/V/vle32.v.yaml | 4 +- spec/std/isa/inst/V/vle32ff.v.yaml | 4 +- spec/std/isa/inst/V/vle64.v.yaml | 4 +- spec/std/isa/inst/V/vle64ff.v.yaml | 4 +- spec/std/isa/inst/V/vle8.v.yaml | 4 +- spec/std/isa/inst/V/vle8ff.v.yaml | 4 +- spec/std/isa/inst/V/vlm.v.yaml | 4 +- spec/std/isa/inst/V/vloxei16.v.yaml | 4 +- spec/std/isa/inst/V/vloxei32.v.yaml | 4 +- spec/std/isa/inst/V/vloxei64.v.yaml | 4 +- spec/std/isa/inst/V/vloxei8.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg2ei16.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg2ei32.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg2ei64.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg2ei8.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg3ei16.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg3ei32.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg3ei64.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg3ei8.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg4ei16.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg4ei32.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg4ei64.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg4ei8.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg5ei16.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg5ei32.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg5ei64.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg5ei8.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg6ei16.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg6ei32.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg6ei64.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg6ei8.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg7ei16.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg7ei32.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg7ei64.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg7ei8.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg8ei16.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg8ei32.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg8ei64.v.yaml | 4 +- spec/std/isa/inst/V/vloxseg8ei8.v.yaml | 4 +- spec/std/isa/inst/V/vlse16.v.yaml | 4 +- spec/std/isa/inst/V/vlse32.v.yaml | 4 +- spec/std/isa/inst/V/vlse64.v.yaml | 4 +- spec/std/isa/inst/V/vlse8.v.yaml | 4 +- spec/std/isa/inst/V/vlseg2e16.v.yaml | 4 +- spec/std/isa/inst/V/vlseg2e16ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg2e32.v.yaml | 4 +- spec/std/isa/inst/V/vlseg2e32ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg2e64.v.yaml | 4 +- spec/std/isa/inst/V/vlseg2e64ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg2e8.v.yaml | 4 +- spec/std/isa/inst/V/vlseg2e8ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg3e16.v.yaml | 4 +- spec/std/isa/inst/V/vlseg3e16ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg3e32.v.yaml | 4 +- spec/std/isa/inst/V/vlseg3e32ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg3e64.v.yaml | 4 +- spec/std/isa/inst/V/vlseg3e64ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg3e8.v.yaml | 4 +- spec/std/isa/inst/V/vlseg3e8ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg4e16.v.yaml | 4 +- spec/std/isa/inst/V/vlseg4e16ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg4e32.v.yaml | 4 +- spec/std/isa/inst/V/vlseg4e32ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg4e64.v.yaml | 4 +- spec/std/isa/inst/V/vlseg4e64ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg4e8.v.yaml | 4 +- spec/std/isa/inst/V/vlseg4e8ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg5e16.v.yaml | 4 +- spec/std/isa/inst/V/vlseg5e16ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg5e32.v.yaml | 4 +- spec/std/isa/inst/V/vlseg5e32ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg5e64.v.yaml | 4 +- spec/std/isa/inst/V/vlseg5e64ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg5e8.v.yaml | 4 +- spec/std/isa/inst/V/vlseg5e8ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg6e16.v.yaml | 4 +- spec/std/isa/inst/V/vlseg6e16ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg6e32.v.yaml | 4 +- spec/std/isa/inst/V/vlseg6e32ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg6e64.v.yaml | 4 +- spec/std/isa/inst/V/vlseg6e64ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg6e8.v.yaml | 4 +- spec/std/isa/inst/V/vlseg6e8ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg7e16.v.yaml | 4 +- spec/std/isa/inst/V/vlseg7e16ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg7e32.v.yaml | 4 +- spec/std/isa/inst/V/vlseg7e32ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg7e64.v.yaml | 4 +- spec/std/isa/inst/V/vlseg7e64ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg7e8.v.yaml | 4 +- spec/std/isa/inst/V/vlseg7e8ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg8e16.v.yaml | 4 +- spec/std/isa/inst/V/vlseg8e16ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg8e32.v.yaml | 4 +- spec/std/isa/inst/V/vlseg8e32ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg8e64.v.yaml | 4 +- spec/std/isa/inst/V/vlseg8e64ff.v.yaml | 4 +- spec/std/isa/inst/V/vlseg8e8.v.yaml | 4 +- spec/std/isa/inst/V/vlseg8e8ff.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg2e16.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg2e32.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg2e64.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg2e8.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg3e16.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg3e32.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg3e64.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg3e8.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg4e16.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg4e32.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg4e64.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg4e8.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg5e16.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg5e32.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg5e64.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg5e8.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg6e16.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg6e32.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg6e64.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg6e8.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg7e16.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg7e32.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg7e64.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg7e8.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg8e16.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg8e32.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg8e64.v.yaml | 4 +- spec/std/isa/inst/V/vlsseg8e8.v.yaml | 4 +- spec/std/isa/inst/V/vluxei16.v.yaml | 4 +- spec/std/isa/inst/V/vluxei32.v.yaml | 4 +- spec/std/isa/inst/V/vluxei64.v.yaml | 4 +- spec/std/isa/inst/V/vluxei8.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg2ei16.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg2ei32.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg2ei64.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg2ei8.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg3ei16.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg3ei32.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg3ei64.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg3ei8.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg4ei16.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg4ei32.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg4ei64.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg4ei8.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg5ei16.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg5ei32.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg5ei64.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg5ei8.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg6ei16.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg6ei32.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg6ei64.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg6ei8.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg7ei16.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg7ei32.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg7ei64.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg7ei8.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg8ei16.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg8ei32.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg8ei64.v.yaml | 4 +- spec/std/isa/inst/V/vluxseg8ei8.v.yaml | 4 +- spec/std/isa/inst/V/vmacc.vv.yaml | 4 +- spec/std/isa/inst/V/vmacc.vx.yaml | 4 +- spec/std/isa/inst/V/vmadc.vi.yaml | 4 +- spec/std/isa/inst/V/vmadc.vim.yaml | 4 +- spec/std/isa/inst/V/vmadc.vv.yaml | 4 +- spec/std/isa/inst/V/vmadc.vvm.yaml | 4 +- spec/std/isa/inst/V/vmadc.vx.yaml | 4 +- spec/std/isa/inst/V/vmadc.vxm.yaml | 4 +- spec/std/isa/inst/V/vmadd.vv.yaml | 4 +- spec/std/isa/inst/V/vmadd.vx.yaml | 4 +- spec/std/isa/inst/V/vmand.mm.yaml | 4 +- spec/std/isa/inst/V/vmandn.mm.yaml | 4 +- spec/std/isa/inst/V/vmax.vv.yaml | 4 +- spec/std/isa/inst/V/vmax.vx.yaml | 4 +- spec/std/isa/inst/V/vmaxu.vv.yaml | 4 +- spec/std/isa/inst/V/vmaxu.vx.yaml | 4 +- spec/std/isa/inst/V/vmerge.vim.yaml | 4 +- spec/std/isa/inst/V/vmerge.vvm.yaml | 4 +- spec/std/isa/inst/V/vmerge.vxm.yaml | 4 +- spec/std/isa/inst/V/vmfeq.vf.yaml | 4 +- spec/std/isa/inst/V/vmfeq.vv.yaml | 4 +- spec/std/isa/inst/V/vmfge.vf.yaml | 4 +- spec/std/isa/inst/V/vmfgt.vf.yaml | 4 +- spec/std/isa/inst/V/vmfle.vf.yaml | 4 +- spec/std/isa/inst/V/vmfle.vv.yaml | 4 +- spec/std/isa/inst/V/vmflt.vf.yaml | 4 +- spec/std/isa/inst/V/vmflt.vv.yaml | 4 +- spec/std/isa/inst/V/vmfne.vf.yaml | 4 +- spec/std/isa/inst/V/vmfne.vv.yaml | 4 +- spec/std/isa/inst/V/vmin.vv.yaml | 4 +- spec/std/isa/inst/V/vmin.vx.yaml | 4 +- spec/std/isa/inst/V/vminu.vv.yaml | 4 +- spec/std/isa/inst/V/vminu.vx.yaml | 4 +- spec/std/isa/inst/V/vmnand.mm.yaml | 4 +- spec/std/isa/inst/V/vmnor.mm.yaml | 4 +- spec/std/isa/inst/V/vmor.mm.yaml | 4 +- spec/std/isa/inst/V/vmorn.mm.yaml | 4 +- spec/std/isa/inst/V/vmsbc.vv.yaml | 4 +- spec/std/isa/inst/V/vmsbc.vvm.yaml | 4 +- spec/std/isa/inst/V/vmsbc.vx.yaml | 4 +- spec/std/isa/inst/V/vmsbc.vxm.yaml | 4 +- spec/std/isa/inst/V/vmsbf.m.yaml | 4 +- spec/std/isa/inst/V/vmseq.vi.yaml | 4 +- spec/std/isa/inst/V/vmseq.vv.yaml | 4 +- spec/std/isa/inst/V/vmseq.vx.yaml | 4 +- spec/std/isa/inst/V/vmsgt.vi.yaml | 4 +- spec/std/isa/inst/V/vmsgt.vx.yaml | 4 +- spec/std/isa/inst/V/vmsgtu.vi.yaml | 4 +- spec/std/isa/inst/V/vmsgtu.vx.yaml | 4 +- spec/std/isa/inst/V/vmsif.m.yaml | 4 +- spec/std/isa/inst/V/vmsle.vi.yaml | 4 +- spec/std/isa/inst/V/vmsle.vv.yaml | 4 +- spec/std/isa/inst/V/vmsle.vx.yaml | 4 +- spec/std/isa/inst/V/vmsleu.vi.yaml | 4 +- spec/std/isa/inst/V/vmsleu.vv.yaml | 4 +- spec/std/isa/inst/V/vmsleu.vx.yaml | 4 +- spec/std/isa/inst/V/vmslt.vv.yaml | 4 +- spec/std/isa/inst/V/vmslt.vx.yaml | 4 +- spec/std/isa/inst/V/vmsltu.vv.yaml | 4 +- spec/std/isa/inst/V/vmsltu.vx.yaml | 4 +- spec/std/isa/inst/V/vmsne.vi.yaml | 4 +- spec/std/isa/inst/V/vmsne.vv.yaml | 4 +- spec/std/isa/inst/V/vmsne.vx.yaml | 4 +- spec/std/isa/inst/V/vmsof.m.yaml | 4 +- spec/std/isa/inst/V/vmul.vv.yaml | 4 +- spec/std/isa/inst/V/vmul.vx.yaml | 4 +- spec/std/isa/inst/V/vmulh.vv.yaml | 4 +- spec/std/isa/inst/V/vmulh.vx.yaml | 4 +- spec/std/isa/inst/V/vmulhsu.vv.yaml | 4 +- spec/std/isa/inst/V/vmulhsu.vx.yaml | 4 +- spec/std/isa/inst/V/vmulhu.vv.yaml | 4 +- spec/std/isa/inst/V/vmulhu.vx.yaml | 4 +- spec/std/isa/inst/V/vmv.s.x.yaml | 4 +- spec/std/isa/inst/V/vmv.v.i.yaml | 4 +- spec/std/isa/inst/V/vmv.v.v.yaml | 4 +- spec/std/isa/inst/V/vmv.v.x.yaml | 4 +- spec/std/isa/inst/V/vmv.x.s.yaml | 4 +- spec/std/isa/inst/V/vmv1r.v.yaml | 4 +- spec/std/isa/inst/V/vmv2r.v.yaml | 4 +- spec/std/isa/inst/V/vmv4r.v.yaml | 4 +- spec/std/isa/inst/V/vmv8r.v.yaml | 4 +- spec/std/isa/inst/V/vmxnor.mm.yaml | 4 +- spec/std/isa/inst/V/vmxor.mm.yaml | 4 +- spec/std/isa/inst/V/vnclip.wi.yaml | 4 +- spec/std/isa/inst/V/vnclip.wv.yaml | 4 +- spec/std/isa/inst/V/vnclip.wx.yaml | 4 +- spec/std/isa/inst/V/vnclipu.wi.yaml | 4 +- spec/std/isa/inst/V/vnclipu.wv.yaml | 4 +- spec/std/isa/inst/V/vnclipu.wx.yaml | 4 +- spec/std/isa/inst/V/vnmsac.vv.yaml | 4 +- spec/std/isa/inst/V/vnmsac.vx.yaml | 4 +- spec/std/isa/inst/V/vnmsub.vv.yaml | 4 +- spec/std/isa/inst/V/vnmsub.vx.yaml | 4 +- spec/std/isa/inst/V/vnsra.wi.yaml | 4 +- spec/std/isa/inst/V/vnsra.wv.yaml | 4 +- spec/std/isa/inst/V/vnsra.wx.yaml | 4 +- spec/std/isa/inst/V/vnsrl.wi.yaml | 4 +- spec/std/isa/inst/V/vnsrl.wv.yaml | 4 +- spec/std/isa/inst/V/vnsrl.wx.yaml | 4 +- spec/std/isa/inst/V/vor.vi.yaml | 4 +- spec/std/isa/inst/V/vor.vv.yaml | 4 +- spec/std/isa/inst/V/vor.vx.yaml | 4 +- spec/std/isa/inst/V/vredand.vs.yaml | 4 +- spec/std/isa/inst/V/vredmax.vs.yaml | 4 +- spec/std/isa/inst/V/vredmaxu.vs.yaml | 4 +- spec/std/isa/inst/V/vredmin.vs.yaml | 4 +- spec/std/isa/inst/V/vredminu.vs.yaml | 4 +- spec/std/isa/inst/V/vredor.vs.yaml | 4 +- spec/std/isa/inst/V/vredsum.vs.yaml | 4 +- spec/std/isa/inst/V/vredxor.vs.yaml | 4 +- spec/std/isa/inst/V/vrem.vv.yaml | 4 +- spec/std/isa/inst/V/vrem.vx.yaml | 4 +- spec/std/isa/inst/V/vremu.vv.yaml | 4 +- spec/std/isa/inst/V/vremu.vx.yaml | 4 +- spec/std/isa/inst/V/vrgather.vi.yaml | 4 +- spec/std/isa/inst/V/vrgather.vv.yaml | 4 +- spec/std/isa/inst/V/vrgather.vx.yaml | 4 +- spec/std/isa/inst/V/vrgatherei16.vv.yaml | 4 +- spec/std/isa/inst/V/vrsub.vi.yaml | 4 +- spec/std/isa/inst/V/vrsub.vx.yaml | 4 +- spec/std/isa/inst/V/vs1r.v.yaml | 4 +- spec/std/isa/inst/V/vs2r.v.yaml | 4 +- spec/std/isa/inst/V/vs4r.v.yaml | 4 +- spec/std/isa/inst/V/vs8r.v.yaml | 4 +- spec/std/isa/inst/V/vsadd.vi.yaml | 4 +- spec/std/isa/inst/V/vsadd.vv.yaml | 4 +- spec/std/isa/inst/V/vsadd.vx.yaml | 4 +- spec/std/isa/inst/V/vsaddu.vi.yaml | 4 +- spec/std/isa/inst/V/vsaddu.vv.yaml | 4 +- spec/std/isa/inst/V/vsaddu.vx.yaml | 4 +- spec/std/isa/inst/V/vsbc.vvm.yaml | 4 +- spec/std/isa/inst/V/vsbc.vxm.yaml | 4 +- spec/std/isa/inst/V/vse16.v.yaml | 4 +- spec/std/isa/inst/V/vse32.v.yaml | 4 +- spec/std/isa/inst/V/vse64.v.yaml | 4 +- spec/std/isa/inst/V/vse8.v.yaml | 4 +- spec/std/isa/inst/V/vsetivli.yaml | 4 +- spec/std/isa/inst/V/vsetvl.yaml | 4 +- spec/std/isa/inst/V/vsetvli.yaml | 4 +- spec/std/isa/inst/V/vsext.vf2.yaml | 4 +- spec/std/isa/inst/V/vsext.vf4.yaml | 4 +- spec/std/isa/inst/V/vsext.vf8.yaml | 4 +- spec/std/isa/inst/V/vslide1down.vx.yaml | 4 +- spec/std/isa/inst/V/vslide1up.vx.yaml | 4 +- spec/std/isa/inst/V/vslidedown.vi.yaml | 4 +- spec/std/isa/inst/V/vslidedown.vx.yaml | 4 +- spec/std/isa/inst/V/vslideup.vi.yaml | 4 +- spec/std/isa/inst/V/vslideup.vx.yaml | 4 +- spec/std/isa/inst/V/vsll.vi.yaml | 4 +- spec/std/isa/inst/V/vsll.vv.yaml | 4 +- spec/std/isa/inst/V/vsll.vx.yaml | 4 +- spec/std/isa/inst/V/vsm.v.yaml | 4 +- spec/std/isa/inst/V/vsmul.vv.yaml | 4 +- spec/std/isa/inst/V/vsmul.vx.yaml | 4 +- spec/std/isa/inst/V/vsoxei16.v.yaml | 4 +- spec/std/isa/inst/V/vsoxei32.v.yaml | 4 +- spec/std/isa/inst/V/vsoxei64.v.yaml | 4 +- spec/std/isa/inst/V/vsoxei8.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg2ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg2ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg2ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg2ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg3ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg3ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg3ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg3ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg4ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg4ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg4ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg4ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg5ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg5ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg5ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg5ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg6ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg6ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg6ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg6ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg7ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg7ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg7ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg7ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg8ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg8ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg8ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsoxseg8ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsra.vi.yaml | 4 +- spec/std/isa/inst/V/vsra.vv.yaml | 4 +- spec/std/isa/inst/V/vsra.vx.yaml | 4 +- spec/std/isa/inst/V/vsrl.vi.yaml | 4 +- spec/std/isa/inst/V/vsrl.vv.yaml | 4 +- spec/std/isa/inst/V/vsrl.vx.yaml | 4 +- spec/std/isa/inst/V/vsse16.v.yaml | 4 +- spec/std/isa/inst/V/vsse32.v.yaml | 4 +- spec/std/isa/inst/V/vsse64.v.yaml | 4 +- spec/std/isa/inst/V/vsse8.v.yaml | 4 +- spec/std/isa/inst/V/vsseg2e16.v.yaml | 4 +- spec/std/isa/inst/V/vsseg2e32.v.yaml | 4 +- spec/std/isa/inst/V/vsseg2e64.v.yaml | 4 +- spec/std/isa/inst/V/vsseg2e8.v.yaml | 4 +- spec/std/isa/inst/V/vsseg3e16.v.yaml | 4 +- spec/std/isa/inst/V/vsseg3e32.v.yaml | 4 +- spec/std/isa/inst/V/vsseg3e64.v.yaml | 4 +- spec/std/isa/inst/V/vsseg3e8.v.yaml | 4 +- spec/std/isa/inst/V/vsseg4e16.v.yaml | 4 +- spec/std/isa/inst/V/vsseg4e32.v.yaml | 4 +- spec/std/isa/inst/V/vsseg4e64.v.yaml | 4 +- spec/std/isa/inst/V/vsseg4e8.v.yaml | 4 +- spec/std/isa/inst/V/vsseg5e16.v.yaml | 4 +- spec/std/isa/inst/V/vsseg5e32.v.yaml | 4 +- spec/std/isa/inst/V/vsseg5e64.v.yaml | 4 +- spec/std/isa/inst/V/vsseg5e8.v.yaml | 4 +- spec/std/isa/inst/V/vsseg6e16.v.yaml | 4 +- spec/std/isa/inst/V/vsseg6e32.v.yaml | 4 +- spec/std/isa/inst/V/vsseg6e64.v.yaml | 4 +- spec/std/isa/inst/V/vsseg6e8.v.yaml | 4 +- spec/std/isa/inst/V/vsseg7e16.v.yaml | 4 +- spec/std/isa/inst/V/vsseg7e32.v.yaml | 4 +- spec/std/isa/inst/V/vsseg7e64.v.yaml | 4 +- spec/std/isa/inst/V/vsseg7e8.v.yaml | 4 +- spec/std/isa/inst/V/vsseg8e16.v.yaml | 4 +- spec/std/isa/inst/V/vsseg8e32.v.yaml | 4 +- spec/std/isa/inst/V/vsseg8e64.v.yaml | 4 +- spec/std/isa/inst/V/vsseg8e8.v.yaml | 4 +- spec/std/isa/inst/V/vssra.vi.yaml | 4 +- spec/std/isa/inst/V/vssra.vv.yaml | 4 +- spec/std/isa/inst/V/vssra.vx.yaml | 4 +- spec/std/isa/inst/V/vssrl.vi.yaml | 4 +- spec/std/isa/inst/V/vssrl.vv.yaml | 4 +- spec/std/isa/inst/V/vssrl.vx.yaml | 4 +- spec/std/isa/inst/V/vssseg2e16.v.yaml | 4 +- spec/std/isa/inst/V/vssseg2e32.v.yaml | 4 +- spec/std/isa/inst/V/vssseg2e64.v.yaml | 4 +- spec/std/isa/inst/V/vssseg2e8.v.yaml | 4 +- spec/std/isa/inst/V/vssseg3e16.v.yaml | 4 +- spec/std/isa/inst/V/vssseg3e32.v.yaml | 4 +- spec/std/isa/inst/V/vssseg3e64.v.yaml | 4 +- spec/std/isa/inst/V/vssseg3e8.v.yaml | 4 +- spec/std/isa/inst/V/vssseg4e16.v.yaml | 4 +- spec/std/isa/inst/V/vssseg4e32.v.yaml | 4 +- spec/std/isa/inst/V/vssseg4e64.v.yaml | 4 +- spec/std/isa/inst/V/vssseg4e8.v.yaml | 4 +- spec/std/isa/inst/V/vssseg5e16.v.yaml | 4 +- spec/std/isa/inst/V/vssseg5e32.v.yaml | 4 +- spec/std/isa/inst/V/vssseg5e64.v.yaml | 4 +- spec/std/isa/inst/V/vssseg5e8.v.yaml | 4 +- spec/std/isa/inst/V/vssseg6e16.v.yaml | 4 +- spec/std/isa/inst/V/vssseg6e32.v.yaml | 4 +- spec/std/isa/inst/V/vssseg6e64.v.yaml | 4 +- spec/std/isa/inst/V/vssseg6e8.v.yaml | 4 +- spec/std/isa/inst/V/vssseg7e16.v.yaml | 4 +- spec/std/isa/inst/V/vssseg7e32.v.yaml | 4 +- spec/std/isa/inst/V/vssseg7e64.v.yaml | 4 +- spec/std/isa/inst/V/vssseg7e8.v.yaml | 4 +- spec/std/isa/inst/V/vssseg8e16.v.yaml | 4 +- spec/std/isa/inst/V/vssseg8e32.v.yaml | 4 +- spec/std/isa/inst/V/vssseg8e64.v.yaml | 4 +- spec/std/isa/inst/V/vssseg8e8.v.yaml | 4 +- spec/std/isa/inst/V/vssub.vv.yaml | 4 +- spec/std/isa/inst/V/vssub.vx.yaml | 4 +- spec/std/isa/inst/V/vssubu.vv.yaml | 4 +- spec/std/isa/inst/V/vssubu.vx.yaml | 4 +- spec/std/isa/inst/V/vsub.vv.yaml | 4 +- spec/std/isa/inst/V/vsub.vx.yaml | 4 +- spec/std/isa/inst/V/vsuxei16.v.yaml | 4 +- spec/std/isa/inst/V/vsuxei32.v.yaml | 4 +- spec/std/isa/inst/V/vsuxei64.v.yaml | 4 +- spec/std/isa/inst/V/vsuxei8.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg2ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg2ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg2ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg2ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg3ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg3ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg3ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg3ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg4ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg4ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg4ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg4ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg5ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg5ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg5ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg5ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg6ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg6ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg6ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg6ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg7ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg7ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg7ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg7ei8.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg8ei16.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg8ei32.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg8ei64.v.yaml | 4 +- spec/std/isa/inst/V/vsuxseg8ei8.v.yaml | 4 +- spec/std/isa/inst/V/vwadd.vv.yaml | 4 +- spec/std/isa/inst/V/vwadd.vx.yaml | 4 +- spec/std/isa/inst/V/vwadd.wv.yaml | 4 +- spec/std/isa/inst/V/vwadd.wx.yaml | 4 +- spec/std/isa/inst/V/vwaddu.vv.yaml | 4 +- spec/std/isa/inst/V/vwaddu.vx.yaml | 4 +- spec/std/isa/inst/V/vwaddu.wv.yaml | 4 +- spec/std/isa/inst/V/vwaddu.wx.yaml | 4 +- spec/std/isa/inst/V/vwmacc.vv.yaml | 4 +- spec/std/isa/inst/V/vwmacc.vx.yaml | 4 +- spec/std/isa/inst/V/vwmaccsu.vv.yaml | 4 +- spec/std/isa/inst/V/vwmaccsu.vx.yaml | 4 +- spec/std/isa/inst/V/vwmaccu.vv.yaml | 4 +- spec/std/isa/inst/V/vwmaccu.vx.yaml | 4 +- spec/std/isa/inst/V/vwmaccus.vx.yaml | 4 +- spec/std/isa/inst/V/vwmul.vv.yaml | 4 +- spec/std/isa/inst/V/vwmul.vx.yaml | 4 +- spec/std/isa/inst/V/vwmulsu.vv.yaml | 4 +- spec/std/isa/inst/V/vwmulsu.vx.yaml | 4 +- spec/std/isa/inst/V/vwmulu.vv.yaml | 4 +- spec/std/isa/inst/V/vwmulu.vx.yaml | 4 +- spec/std/isa/inst/V/vwredsum.vs.yaml | 4 +- spec/std/isa/inst/V/vwredsumu.vs.yaml | 4 +- spec/std/isa/inst/V/vwsub.vv.yaml | 4 +- spec/std/isa/inst/V/vwsub.vx.yaml | 4 +- spec/std/isa/inst/V/vwsub.wv.yaml | 4 +- spec/std/isa/inst/V/vwsub.wx.yaml | 4 +- spec/std/isa/inst/V/vwsubu.vv.yaml | 4 +- spec/std/isa/inst/V/vwsubu.vx.yaml | 4 +- spec/std/isa/inst/V/vwsubu.wv.yaml | 4 +- spec/std/isa/inst/V/vwsubu.wx.yaml | 4 +- spec/std/isa/inst/V/vxor.vi.yaml | 4 +- spec/std/isa/inst/V/vxor.vv.yaml | 4 +- spec/std/isa/inst/V/vxor.vx.yaml | 4 +- spec/std/isa/inst/V/vzext.vf2.yaml | 4 +- spec/std/isa/inst/V/vzext.vf4.yaml | 4 +- spec/std/isa/inst/V/vzext.vf8.yaml | 4 +- spec/std/isa/inst/Zaamo/amoadd.d.yaml | 4 +- spec/std/isa/inst/Zaamo/amoadd.w.yaml | 4 +- spec/std/isa/inst/Zaamo/amoand.d.yaml | 4 +- spec/std/isa/inst/Zaamo/amoand.w.yaml | 4 +- spec/std/isa/inst/Zaamo/amomax.d.yaml | 4 +- spec/std/isa/inst/Zaamo/amomax.w.yaml | 4 +- spec/std/isa/inst/Zaamo/amomaxu.d.yaml | 4 +- spec/std/isa/inst/Zaamo/amomaxu.w.yaml | 4 +- spec/std/isa/inst/Zaamo/amomin.d.yaml | 4 +- spec/std/isa/inst/Zaamo/amomin.w.yaml | 4 +- spec/std/isa/inst/Zaamo/amominu.d.yaml | 4 +- spec/std/isa/inst/Zaamo/amominu.w.yaml | 4 +- spec/std/isa/inst/Zaamo/amoor.d.yaml | 4 +- spec/std/isa/inst/Zaamo/amoor.w.yaml | 4 +- spec/std/isa/inst/Zaamo/amoswap.d.yaml | 4 +- spec/std/isa/inst/Zaamo/amoswap.w.yaml | 4 +- spec/std/isa/inst/Zaamo/amoxor.d.yaml | 4 +- spec/std/isa/inst/Zaamo/amoxor.w.yaml | 4 +- spec/std/isa/inst/Zabha/amoadd.b.yaml | 4 +- spec/std/isa/inst/Zabha/amoadd.h.yaml | 4 +- spec/std/isa/inst/Zabha/amoand.b.yaml | 4 +- spec/std/isa/inst/Zabha/amoand.h.yaml | 4 +- spec/std/isa/inst/Zabha/amocas.b.yaml | 4 +- spec/std/isa/inst/Zabha/amocas.h.yaml | 4 +- spec/std/isa/inst/Zabha/amomax.b.yaml | 4 +- spec/std/isa/inst/Zabha/amomax.h.yaml | 4 +- spec/std/isa/inst/Zabha/amomaxu.b.yaml | 4 +- spec/std/isa/inst/Zabha/amomaxu.h.yaml | 4 +- spec/std/isa/inst/Zabha/amomin.b.yaml | 4 +- spec/std/isa/inst/Zabha/amomin.h.yaml | 4 +- spec/std/isa/inst/Zabha/amominu.b.yaml | 4 +- spec/std/isa/inst/Zabha/amominu.h.yaml | 4 +- spec/std/isa/inst/Zabha/amoor.b.yaml | 4 +- spec/std/isa/inst/Zabha/amoor.h.yaml | 4 +- spec/std/isa/inst/Zabha/amoswap.b.yaml | 4 +- spec/std/isa/inst/Zabha/amoswap.h.yaml | 4 +- spec/std/isa/inst/Zabha/amoxor.b.yaml | 4 +- spec/std/isa/inst/Zabha/amoxor.h.yaml | 4 +- spec/std/isa/inst/Zacas/amocas.d.yaml | 5 +- spec/std/isa/inst/Zacas/amocas.q.yaml | 5 +- spec/std/isa/inst/Zacas/amocas.w.yaml | 5 +- spec/std/isa/inst/Zalasr/lb.aq.yaml | 4 +- spec/std/isa/inst/Zalasr/ld.aq.yaml | 4 +- spec/std/isa/inst/Zalasr/lh.aq.yaml | 4 +- spec/std/isa/inst/Zalasr/lw.aq.yaml | 4 +- spec/std/isa/inst/Zalasr/sb.rl.yaml | 4 +- spec/std/isa/inst/Zalasr/sd.rl.yaml | 4 +- spec/std/isa/inst/Zalasr/sh.rl.yaml | 4 +- spec/std/isa/inst/Zalasr/sw.rl.yaml | 4 +- spec/std/isa/inst/Zalrsc/lr.d.yaml | 4 +- spec/std/isa/inst/Zalrsc/lr.w.yaml | 4 +- spec/std/isa/inst/Zalrsc/sc.d.yaml | 4 +- spec/std/isa/inst/Zalrsc/sc.w.yaml | 4 +- spec/std/isa/inst/Zawrs/wrs.nto.yaml | 4 +- spec/std/isa/inst/Zawrs/wrs.sto.yaml | 4 +- spec/std/isa/inst/Zba/add.uw.yaml | 4 +- spec/std/isa/inst/Zba/sh1add.uw.yaml | 4 +- spec/std/isa/inst/Zba/sh1add.yaml | 4 +- spec/std/isa/inst/Zba/sh2add.uw.yaml | 4 +- spec/std/isa/inst/Zba/sh2add.yaml | 4 +- spec/std/isa/inst/Zba/sh3add.uw.yaml | 4 +- spec/std/isa/inst/Zba/sh3add.yaml | 4 +- spec/std/isa/inst/Zba/slli.uw.yaml | 4 +- spec/std/isa/inst/Zbb/clz.yaml | 4 +- spec/std/isa/inst/Zbb/clzw.yaml | 4 +- spec/std/isa/inst/Zbb/cpop.yaml | 4 +- spec/std/isa/inst/Zbb/cpopw.yaml | 4 +- spec/std/isa/inst/Zbb/ctz.yaml | 4 +- spec/std/isa/inst/Zbb/ctzw.yaml | 4 +- spec/std/isa/inst/Zbb/max.yaml | 4 +- spec/std/isa/inst/Zbb/maxu.yaml | 4 +- spec/std/isa/inst/Zbb/min.yaml | 4 +- spec/std/isa/inst/Zbb/minu.yaml | 4 +- spec/std/isa/inst/Zbb/orc.b.yaml | 4 +- spec/std/isa/inst/Zbb/sext.b.yaml | 4 +- spec/std/isa/inst/Zbb/sext.h.yaml | 4 +- spec/std/isa/inst/Zbb/zext.h.yaml | 8 +- spec/std/isa/inst/Zbc/clmulr.yaml | 4 +- spec/std/isa/inst/Zbkb/brev8.yaml | 4 +- spec/std/isa/inst/Zbkb/pack.yaml | 4 +- spec/std/isa/inst/Zbkb/packh.yaml | 4 +- spec/std/isa/inst/Zbkb/packw.yaml | 4 +- spec/std/isa/inst/Zbkb/unzip.yaml | 4 +- spec/std/isa/inst/Zbkb/zip.yaml | 4 +- spec/std/isa/inst/Zbkx/xperm4.yaml | 4 +- spec/std/isa/inst/Zbkx/xperm8.yaml | 4 +- spec/std/isa/inst/Zbs/bclr.yaml | 4 +- spec/std/isa/inst/Zbs/bclri.yaml | 4 +- spec/std/isa/inst/Zbs/bext.yaml | 4 +- spec/std/isa/inst/Zbs/bexti.yaml | 4 +- spec/std/isa/inst/Zbs/binv.yaml | 4 +- spec/std/isa/inst/Zbs/binvi.yaml | 4 +- spec/std/isa/inst/Zbs/bset.yaml | 4 +- spec/std/isa/inst/Zbs/bseti.yaml | 4 +- spec/std/isa/inst/Zcb/c.lbu.yaml | 7 +- spec/std/isa/inst/Zcb/c.lh.yaml | 7 +- spec/std/isa/inst/Zcb/c.lhu.yaml | 7 +- spec/std/isa/inst/Zcb/c.mul.yaml | 9 +- spec/std/isa/inst/Zcb/c.not.yaml | 9 +- spec/std/isa/inst/Zcb/c.sb.yaml | 7 +- spec/std/isa/inst/Zcb/c.sext.b.yaml | 9 +- spec/std/isa/inst/Zcb/c.sext.h.yaml | 9 +- spec/std/isa/inst/Zcb/c.sh.yaml | 7 +- spec/std/isa/inst/Zcb/c.zext.b.yaml | 9 +- spec/std/isa/inst/Zcb/c.zext.h.yaml | 9 +- spec/std/isa/inst/Zcb/c.zext.w.yaml | 9 +- spec/std/isa/inst/Zcd/c.fld.yaml | 11 +- spec/std/isa/inst/Zcd/c.fldsp.yaml | 11 +- spec/std/isa/inst/Zcd/c.fsd.yaml | 11 +- spec/std/isa/inst/Zcd/c.fsdsp.yaml | 11 +- spec/std/isa/inst/Zcf/c.flw.yaml | 11 +- spec/std/isa/inst/Zcf/c.flwsp.yaml | 11 +- spec/std/isa/inst/Zcf/c.fsw.yaml | 11 +- spec/std/isa/inst/Zcf/c.fswsp.yaml | 11 +- spec/std/isa/inst/Zcmop/c.mop.n.yaml | 10 +- spec/std/isa/inst/Zcmp/cm.mva01s.yaml | 4 +- spec/std/isa/inst/Zcmp/cm.mvsa01.yaml | 4 +- spec/std/isa/inst/Zcmp/cm.pop.yaml | 4 +- spec/std/isa/inst/Zcmp/cm.popret.yaml | 4 +- spec/std/isa/inst/Zcmp/cm.popretz.yaml | 4 +- spec/std/isa/inst/Zcmp/cm.push.yaml | 4 +- spec/std/isa/inst/Zfbfmin/fcvt.bf16.s.yaml | 4 +- spec/std/isa/inst/Zfbfmin/fcvt.s.bf16.yaml | 4 +- spec/std/isa/inst/Zfh/fadd.h.yaml | 4 +- spec/std/isa/inst/Zfh/fclass.h.yaml | 4 +- spec/std/isa/inst/Zfh/fcvt.d.h.yaml | 5 +- spec/std/isa/inst/Zfh/fcvt.h.d.yaml | 5 +- spec/std/isa/inst/Zfh/fcvt.h.l.yaml | 4 +- spec/std/isa/inst/Zfh/fcvt.h.lu.yaml | 4 +- spec/std/isa/inst/Zfh/fcvt.h.s.yaml | 5 +- spec/std/isa/inst/Zfh/fcvt.h.w.yaml | 4 +- spec/std/isa/inst/Zfh/fcvt.h.wu.yaml | 4 +- spec/std/isa/inst/Zfh/fcvt.l.h.yaml | 4 +- spec/std/isa/inst/Zfh/fcvt.lu.h.yaml | 4 +- spec/std/isa/inst/Zfh/fcvt.s.h.yaml | 5 +- spec/std/isa/inst/Zfh/fcvt.w.h.yaml | 4 +- spec/std/isa/inst/Zfh/fcvt.wu.h.yaml | 4 +- spec/std/isa/inst/Zfh/fdiv.h.yaml | 4 +- spec/std/isa/inst/Zfh/feq.h.yaml | 4 +- spec/std/isa/inst/Zfh/fle.h.yaml | 4 +- spec/std/isa/inst/Zfh/fleq.h.yaml | 5 +- spec/std/isa/inst/Zfh/flh.yaml | 8 +- spec/std/isa/inst/Zfh/fli.h.yaml | 5 +- spec/std/isa/inst/Zfh/flt.h.yaml | 4 +- spec/std/isa/inst/Zfh/fltq.h.yaml | 5 +- spec/std/isa/inst/Zfh/fmadd.h.yaml | 6 +- spec/std/isa/inst/Zfh/fmax.h.yaml | 4 +- spec/std/isa/inst/Zfh/fmaxm.h.yaml | 5 +- spec/std/isa/inst/Zfh/fmin.h.yaml | 4 +- spec/std/isa/inst/Zfh/fminm.h.yaml | 5 +- spec/std/isa/inst/Zfh/fmsub.h.yaml | 6 +- spec/std/isa/inst/Zfh/fmul.h.yaml | 4 +- spec/std/isa/inst/Zfh/fmv.h.x.yaml | 4 +- spec/std/isa/inst/Zfh/fmv.x.h.yaml | 6 +- spec/std/isa/inst/Zfh/fnmadd.h.yaml | 6 +- spec/std/isa/inst/Zfh/fnmsub.h.yaml | 6 +- spec/std/isa/inst/Zfh/fround.h.yaml | 5 +- spec/std/isa/inst/Zfh/froundnx.h.yaml | 5 +- spec/std/isa/inst/Zfh/fsgnj.h.yaml | 4 +- spec/std/isa/inst/Zfh/fsgnjn.h.yaml | 4 +- spec/std/isa/inst/Zfh/fsgnjx.h.yaml | 4 +- spec/std/isa/inst/Zfh/fsh.yaml | 8 +- spec/std/isa/inst/Zfh/fsqrt.h.yaml | 4 +- spec/std/isa/inst/Zfh/fsub.h.yaml | 4 +- spec/std/isa/inst/Zicbom/cbo.clean.yaml | 4 +- spec/std/isa/inst/Zicbom/cbo.flush.yaml | 4 +- spec/std/isa/inst/Zicbom/cbo.inval.yaml | 4 +- spec/std/isa/inst/Zicboz/cbo.zero.yaml | 4 +- spec/std/isa/inst/Zicfilp/lpad.yaml | 6 +- spec/std/isa/inst/Zicfiss/ssamoswap.d.yaml | 4 +- spec/std/isa/inst/Zicfiss/ssamoswap.w.yaml | 4 +- spec/std/isa/inst/Zicfiss/sspopchk.x1.yaml | 4 +- spec/std/isa/inst/Zicfiss/sspopchk.x5.yaml | 4 +- spec/std/isa/inst/Zicfiss/sspush.x1.yaml | 4 +- spec/std/isa/inst/Zicfiss/sspush.x5.yaml | 4 +- spec/std/isa/inst/Zicfiss/ssrdp.yaml | 4 +- spec/std/isa/inst/Zicond/czero.eqz.yaml | 4 +- spec/std/isa/inst/Zicond/czero.nez.yaml | 4 +- spec/std/isa/inst/Zicsr/csrrc.yaml | 6 +- spec/std/isa/inst/Zicsr/csrrci.yaml | 6 +- spec/std/isa/inst/Zicsr/csrrs.yaml | 6 +- spec/std/isa/inst/Zicsr/csrrsi.yaml | 6 +- spec/std/isa/inst/Zicsr/csrrw.yaml | 6 +- spec/std/isa/inst/Zicsr/csrrwi.yaml | 6 +- spec/std/isa/inst/Zifencei/fence.i.yaml | 6 +- spec/std/isa/inst/Zilsd/ld.yaml | 6 +- spec/std/isa/inst/Zilsd/sd.yaml | 6 +- spec/std/isa/inst/Zimop/mop.r.n.yaml | 4 +- spec/std/isa/inst/Zimop/mop.rr.n.yaml | 4 +- spec/std/isa/inst/Zkn/aes64ks1i.yaml | 5 +- spec/std/isa/inst/Zkn/aes64ks2.yaml | 5 +- spec/std/isa/inst/Zknd/aes32dsi.yaml | 4 +- spec/std/isa/inst/Zknd/aes32dsmi.yaml | 4 +- spec/std/isa/inst/Zknd/aes64ds.yaml | 4 +- spec/std/isa/inst/Zknd/aes64dsm.yaml | 4 +- spec/std/isa/inst/Zknd/aes64im.yaml | 4 +- spec/std/isa/inst/Zkne/aes32esi.yaml | 4 +- spec/std/isa/inst/Zkne/aes32esmi.yaml | 4 +- spec/std/isa/inst/Zkne/aes64es.yaml | 4 +- spec/std/isa/inst/Zkne/aes64esm.yaml | 4 +- spec/std/isa/inst/Zknh/sha256sig0.yaml | 4 +- spec/std/isa/inst/Zknh/sha256sig1.yaml | 4 +- spec/std/isa/inst/Zknh/sha256sum0.yaml | 4 +- spec/std/isa/inst/Zknh/sha256sum1.yaml | 4 +- spec/std/isa/inst/Zknh/sha512sig0.yaml | 4 +- spec/std/isa/inst/Zknh/sha512sig0h.yaml | 4 +- spec/std/isa/inst/Zknh/sha512sig0l.yaml | 4 +- spec/std/isa/inst/Zknh/sha512sig1.yaml | 4 +- spec/std/isa/inst/Zknh/sha512sig1h.yaml | 4 +- spec/std/isa/inst/Zknh/sha512sig1l.yaml | 4 +- spec/std/isa/inst/Zknh/sha512sum0.yaml | 4 +- spec/std/isa/inst/Zknh/sha512sum0r.yaml | 4 +- spec/std/isa/inst/Zknh/sha512sum1.yaml | 4 +- spec/std/isa/inst/Zknh/sha512sum1r.yaml | 4 +- spec/std/isa/inst/Zks/sm3p0.yaml | 5 +- spec/std/isa/inst/Zks/sm3p1.yaml | 5 +- spec/std/isa/inst/Zks/sm4ed.yaml | 5 +- spec/std/isa/inst/Zks/sm4ks.yaml | 5 +- spec/std/isa/inst/Zvbb/vandn.vv.yaml | 4 +- spec/std/isa/inst/Zvbb/vandn.vx.yaml | 4 +- spec/std/isa/inst/Zvbb/vbrev.v.yaml | 4 +- spec/std/isa/inst/Zvbb/vbrev8.v.yaml | 4 +- spec/std/isa/inst/Zvbb/vclz.v.yaml | 4 +- spec/std/isa/inst/Zvbb/vcpop.v.yaml | 4 +- spec/std/isa/inst/Zvbb/vctz.v.yaml | 4 +- spec/std/isa/inst/Zvbb/vrev8.v.yaml | 4 +- spec/std/isa/inst/Zvbb/vrol.vv.yaml | 4 +- spec/std/isa/inst/Zvbb/vrol.vx.yaml | 4 +- spec/std/isa/inst/Zvbb/vror.vi.yaml | 4 +- spec/std/isa/inst/Zvbb/vror.vv.yaml | 4 +- spec/std/isa/inst/Zvbb/vror.vx.yaml | 4 +- spec/std/isa/inst/Zvbb/vwsll.vi.yaml | 4 +- spec/std/isa/inst/Zvbb/vwsll.vv.yaml | 4 +- spec/std/isa/inst/Zvbb/vwsll.vx.yaml | 4 +- spec/std/isa/inst/Zvbc/vclmul.vv.yaml | 4 +- spec/std/isa/inst/Zvbc/vclmul.vx.yaml | 4 +- spec/std/isa/inst/Zvbc/vclmulh.vv.yaml | 4 +- spec/std/isa/inst/Zvbc/vclmulh.vx.yaml | 4 +- .../isa/inst/Zvfbfmin/vfncvtbf16.f.f.w.yaml | 4 +- .../isa/inst/Zvfbfmin/vfwcvtbf16.f.f.v.yaml | 4 +- .../std/isa/inst/Zvfbfwma/vfwmaccbf16.vf.yaml | 4 +- .../std/isa/inst/Zvfbfwma/vfwmaccbf16.vv.yaml | 4 +- spec/std/isa/inst/Zvkg/vghsh.vv.yaml | 4 +- spec/std/isa/inst/Zvkg/vgmul.vv.yaml | 4 +- spec/std/isa/inst/Zvkned/vaesdf.vs.yaml | 4 +- spec/std/isa/inst/Zvkned/vaesdf.vv.yaml | 4 +- spec/std/isa/inst/Zvkned/vaesdm.vs.yaml | 4 +- spec/std/isa/inst/Zvkned/vaesdm.vv.yaml | 4 +- spec/std/isa/inst/Zvkned/vaesef.vs.yaml | 4 +- spec/std/isa/inst/Zvkned/vaesef.vv.yaml | 4 +- spec/std/isa/inst/Zvkned/vaesem.vs.yaml | 4 +- spec/std/isa/inst/Zvkned/vaesem.vv.yaml | 4 +- spec/std/isa/inst/Zvkned/vaeskf1.vi.yaml | 4 +- spec/std/isa/inst/Zvkned/vaeskf2.vi.yaml | 4 +- spec/std/isa/inst/Zvkned/vaesz.vs.yaml | 4 +- spec/std/isa/inst/Zvknha/vsha2ch.vv.yaml | 4 +- spec/std/isa/inst/Zvknha/vsha2cl.vv.yaml | 4 +- spec/std/isa/inst/Zvknha/vsha2ms.vv.yaml | 4 +- spec/std/isa/inst/Zvks/vsm3c.vi.yaml | 5 +- spec/std/isa/inst/Zvks/vsm3me.vv.yaml | 5 +- spec/std/isa/inst/Zvks/vsm4k.vi.yaml | 5 +- spec/std/isa/inst/Zvks/vsm4r.vs.yaml | 5 +- spec/std/isa/inst/Zvks/vsm4r.vv.yaml | 5 +- .../idl_highlighter/idl_highlighter.gemspec | 2 +- tools/ruby-gems/idlc/Gemfile.lock | 1 + tools/ruby-gems/idlc/Rakefile | 12 +- tools/ruby-gems/idlc/idlc.gemspec | 4 +- tools/ruby-gems/idlc/lib/idlc/ast.rb | 35 +- tools/ruby-gems/idlc/lib/idlc/idl.treetop | 2 +- tools/ruby-gems/idlc/test/idl/literals.yaml | 5 + tools/ruby-gems/udb/lib/udb/cfg_arch.rb | 2 +- tools/ruby-gems/udb/lib/udb/cli.rb | 35 + tools/ruby-gems/udb/lib/udb/condition.rb | 642 ++++++++++++++++++ tools/ruby-gems/udb/lib/udb/obj/extension.rb | 109 +-- tools/ruby-gems/udb/lib/udb/resolver.rb | 20 +- tools/ruby-gems/udb/lib/udb/version_spec.rb | 364 +++++----- tools/ruby-gems/udb/schemas | 1 + tools/ruby-gems/udb/test/mock_cfgs/_.yaml | 11 + .../udb/test/mock_spec/isa/ext/A.yaml | 29 + .../udb/test/mock_spec/isa/ext/B.yaml | 20 + .../udb/test/mock_spec/isa/ext/C.yaml | 21 + .../udb/test/mock_spec/isa/ext/D.yaml | 29 + .../udb/test/mock_spec}/isa/inst/mock.yaml | 8 +- .../udb/test/mock_spec/isa/isa/globals.isa | 4 + tools/ruby-gems/udb/test/test_conditions.rb | 188 +++++ tools/ruby-gems/udb/udb.gemspec | 3 +- .../ruby-gems/udb_helpers/udb_helpers.gemspec | 2 +- 1697 files changed, 9501 insertions(+), 3678 deletions(-) create mode 100644 tools/ruby-gems/udb/lib/udb/condition.rb create mode 120000 tools/ruby-gems/udb/schemas create mode 100644 tools/ruby-gems/udb/test/mock_cfgs/_.yaml create mode 100644 tools/ruby-gems/udb/test/mock_spec/isa/ext/A.yaml create mode 100644 tools/ruby-gems/udb/test/mock_spec/isa/ext/B.yaml create mode 100644 tools/ruby-gems/udb/test/mock_spec/isa/ext/C.yaml create mode 100644 tools/ruby-gems/udb/test/mock_spec/isa/ext/D.yaml rename {spec/std => tools/ruby-gems/udb/test/mock_spec}/isa/inst/mock.yaml (94%) create mode 100644 tools/ruby-gems/udb/test/mock_spec/isa/isa/globals.isa create mode 100644 tools/ruby-gems/udb/test/test_conditions.rb diff --git a/.vscode/settings.json b/.vscode/settings.json index acb684458..ce5e9f207 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -1,8 +1,9 @@ { - "solargraph.bundlerPath": "bin/bundle", + "solargraph.bundlerPath": "./bin/bundle", "solargraph.useBundler": true, "sorbet.lspConfigs": [ + { "id": "container", "name": "Sorbet (UDB)", @@ -34,13 +35,13 @@ "name": "Sorbet (Host)", "description": "Sorbet on the host", "command": [ - "/usr2/dhower/.rbenv/shims/bundle", + "bundle", "exec", "srb", "typecheck", "--lsp", "--dir", - "tools/gems", + "tools/ruby-gems", "--ignore", "api_doc", "--ignore", @@ -66,5 +67,11 @@ ] } ], - "sorbet.selectedLspConfigId": "host" + "sorbet.selectedLspConfigId": "host", + "rubyTestExplorer.debugCommand": "bundle exec rdebug-ide", + "rubyTestExplorer.minitestCommand": "bundle exec rake", + "rubyTestExplorer.rspecCommand": "bundle exec rspec", + "rubyTestExplorer.testFramework": "minitest", + "rubyTestExplorer.minitestDirectory": "./tools/ruby-gems/idlc/test/", + "ipynb.experimental.serialization": false } diff --git a/Gemfile b/Gemfile index 829afa750..b0124c654 100644 --- a/Gemfile +++ b/Gemfile @@ -33,6 +33,7 @@ group :development do gem "awesome_print" gem "debug" gem "rdbg" + gem "ruby-debug-ide" gem "rubocop-github" gem "rubocop-minitest" gem "rubocop-performance" diff --git a/Gemfile.lock b/Gemfile.lock index 38e816ca6..d2f054d75 100644 --- a/Gemfile.lock +++ b/Gemfile.lock @@ -38,19 +38,16 @@ GEM remote: https://rubygems.org/ specs: Ascii85 (2.0.1) - activesupport (8.0.2) + activesupport (7.1.4.2) base64 - benchmark (>= 0.3) bigdecimal - concurrent-ruby (~> 1.0, >= 1.3.1) + concurrent-ruby (~> 1.0, >= 1.0.2) connection_pool (>= 2.2.5) drb i18n (>= 1.6, < 2) - logger (>= 1.4.2) minitest (>= 5.1) - securerandom (>= 0.3) - tzinfo (~> 2.0, >= 2.0.5) - uri (>= 0.13.1) + mutex_m + tzinfo (~> 2.0) addressable (2.8.7) public_suffix (>= 2.0.2, < 7.0) afm (0.2.2) @@ -81,6 +78,8 @@ GEM base64 (0.3.0) benchmark (0.4.1) bigdecimal (3.2.2) + cgi (0.5.0) + coderay (1.1.3) commander (5.0.0) highline (~> 3.0.0) concurrent-ruby (1.3.5) @@ -96,7 +95,8 @@ GEM diff-lcs (1.6.2) docile (1.4.1) drb (2.2.3) - erb (5.0.1) + erb (4.0.4) + cgi (>= 0.3.3) erubi (1.13.1) hana (1.3.7) hashery (2.1.2) @@ -122,16 +122,22 @@ GEM lint_roller (1.1.0) logger (1.7.0) matrix (0.4.2) + method_source (1.1.0) minitest (5.25.5) - netrc (0.11.0) + mutex_m (0.3.0) nkf (0.2.0) nokogiri (1.18.8-aarch64-linux-gnu) racc (~> 1.4) nokogiri (1.18.8-x86_64-linux-gnu) racc (~> 1.4) observer (0.1.2) - ostruct (0.6.1) + ostruct (0.6.2) parallel (1.27.0) + parlour (9.1.2) + commander (~> 5.0) + parser + rainbow (~> 3.0) + sorbet-runtime (>= 0.5) parser (3.3.8.0) ast (~> 2.4.1) racc @@ -162,6 +168,9 @@ GEM prawn (~> 2.2) prettyprint (0.2.0) prism (1.4.0) + pry (0.15.2) + coderay (~> 1.1) + method_source (~> 1.0) psych (5.2.6) date stringio @@ -170,10 +179,6 @@ GEM rack (3.1.16) rainbow (3.1.1) rake (13.3.0) - rbi (0.3.3) - prism (~> 1.0) - rbs (>= 3.4.4) - sorbet-runtime (>= 0.5.9204) rbs (3.9.4) logger rdbg (0.1.0) @@ -188,7 +193,7 @@ GEM nokogiri rexml (3.4.1) rouge (4.5.2) - rubocop (1.76.0) + rubocop (1.78.0) json (~> 2.3) language_server-protocol (~> 3.17.0.2) lint_roller (~> 1.1.0) @@ -196,14 +201,14 @@ GEM parser (>= 3.3.0.2) rainbow (>= 2.2.2, < 4.0) regexp_parser (>= 2.9.3, < 3.0) - rubocop-ast (>= 1.45.0, < 2.0) + rubocop-ast (>= 1.45.1, < 2.0) ruby-progressbar (~> 1.7) unicode-display_width (>= 2.4.0, < 4.0) - rubocop-ast (1.45.0) + rubocop-ast (1.45.1) parser (>= 3.3.7.2) prism (~> 1.4) - rubocop-github (0.26.0) - rubocop (>= 1.76) + rubocop-github (0.23.0) + rubocop (>= 1.72) rubocop-performance (>= 1.24) rubocop-rails (>= 2.23) rubocop-minitest (0.38.1) @@ -220,15 +225,15 @@ GEM rack (>= 1.1) rubocop (>= 1.75.0, < 2.0) rubocop-ast (>= 1.44.0, < 2.0) - rubocop-sorbet (0.10.2) - lint_roller - rubocop (>= 1.75.2) + rubocop-sorbet (0.10.0) + rubocop (>= 1) + ruby-debug-ide (0.7.5) + rake (>= 0.8.1) ruby-prof (1.7.2) base64 ruby-progressbar (1.13.0) ruby-rc4 (0.1.5) rubyzip (2.4.1) - securerandom (0.4.1) simplecov (0.22.0) docile (~> 1.1) simplecov-html (~> 0.11) @@ -236,7 +241,7 @@ GEM simplecov-html (0.13.1) simplecov_json_formatter (0.1.4) simpleidn (0.2.3) - solargraph (0.55.0) + solargraph (0.56.0) backport (~> 1.2) benchmark (~> 0.4) bundler (~> 2.0) @@ -248,6 +253,7 @@ GEM observer (~> 0.1) ostruct (~> 0.6) parser (~> 3.0) + prism (~> 1.4) rbs (~> 3.3) reverse_markdown (~> 3.0) rubocop (~> 1.38) @@ -263,28 +269,24 @@ GEM sorbet-static-and-runtime (0.5.12157) sorbet (= 0.5.12157) sorbet-runtime (= 0.5.12157) - spoom (1.6.3) + spoom (1.3.2) erubi (>= 1.10.0) - prism (>= 0.28.0) - rbi (>= 0.3.3) - rexml (>= 3.2.6) + prism (>= 0.19.0) sorbet-static-and-runtime (>= 0.5.10187) thor (>= 0.19.2) stringio (3.1.7) - tapioca (0.16.11) - benchmark - bundler (>= 2.2.25) - netrc (>= 0.11.0) - parallel (>= 1.21.0) - rbi (~> 0.2) - sorbet-static-and-runtime (>= 0.5.11087) - spoom (>= 1.2.0) - thor (>= 1.2.0) - yard-sorbet + tapioca (0.4.27) + bundler (>= 1.17.3) + parlour (>= 2.1.0) + pry (>= 0.12.2) + sorbet-runtime + sorbet-static (>= 0.4.4471) + spoom + thor (>= 0.19.2) terminal-table (4.0.0) unicode-display_width (>= 1.1.1, < 4) thor (1.3.2) - tilt (2.6.0) + tilt (2.6.1) treetop (1.6.12) polyglot (~> 0.3) ttfunk (1.7.0) @@ -293,7 +295,6 @@ GEM unicode-display_width (3.1.4) unicode-emoji (~> 4.0, >= 4.0.4) unicode-emoji (4.0.4) - uri (1.0.3) webrick (1.9.1) write_xlsx (1.12.1) nkf @@ -301,13 +302,10 @@ GEM yard (0.9.37) yard-solargraph (0.1.0) yard (~> 0.9) - yard-sorbet (0.9.0) - sorbet-runtime - yard PLATFORMS - aarch64-linux-gnu - x86_64-linux-gnu + aarch64-linux + x86_64-linux DEPENDENCIES asciidoctor-diagram (~> 2.2) @@ -328,6 +326,7 @@ DEPENDENCIES rubocop-minitest rubocop-performance rubocop-sorbet + ruby-debug-ide ruby-prof ruby-progressbar (~> 1.13) simplecov diff --git a/cfgs/example_rv64_with_overlay.yaml b/cfgs/example_rv64_with_overlay.yaml index 5275fc760..a11016a21 100644 --- a/cfgs/example_rv64_with_overlay.yaml +++ b/cfgs/example_rv64_with_overlay.yaml @@ -547,7 +547,6 @@ params: MTVEC_BASE_ALIGNMENT_DIRECT: 4 MTVEC_BASE_ALIGNMENT_VECTORED: 4 MSTATUS_FS_LEGAL_VALUES: [0, 1, 2, 3] - MSTATUS_FS_WRITABLE: true MSTATUS_TVM_IMPLEMENTED: true HW_MSTATUS_FS_DIRTY_UPDATE: precise MSTATUS_VS_WRITABLE: true diff --git a/doc/schemas.adoc b/doc/schemas.adoc index d32257401..e4c0faf1e 100644 --- a/doc/schemas.adoc +++ b/doc/schemas.adoc @@ -8,3 +8,7 @@ Many UDB data objects share common field types, including: * xref:prose-schema.adoc[Schema for Prose] TODO + +== Conditions + +All conditions are represented using the same schema. diff --git a/spec/schemas/csr_schema.json b/spec/schemas/csr_schema.json index ee55b58b0..5f59aafdd 100644 --- a/spec/schemas/csr_schema.json +++ b/spec/schemas/csr_schema.json @@ -99,7 +99,7 @@ "description": "When specified, indicates that this field aliases (a portion of) another CSR field" }, "definedBy": { - "$ref": "schema_defs.json#/$defs/requires_entry", + "$ref": "schema_defs.json#/$defs/condition", "description": "Where this field is defined: indicates that the field is only present if the extension(s) are implemented. If definedBy is not given, defaults to the definedBy field of the parent CSR" }, "affectedBy": { @@ -222,7 +222,7 @@ "description": "Function of the field" }, "definedBy": { - "$ref": "schema_defs.json#/$defs/requires_entry", + "$ref": "schema_defs.json#/$defs/condition", "description": "Extension(s) that define the CSR" }, "address": { diff --git a/spec/schemas/ext_schema.json b/spec/schemas/ext_schema.json index e13d233b4..401af72f5 100644 --- a/spec/schemas/ext_schema.json +++ b/spec/schemas/ext_schema.json @@ -2,36 +2,6 @@ "$schema": "http://json-schema.org/draft-07/schema#", "$defs": { - "implies_entry": { - "oneOf": [ - { - "$ref": "schema_defs.json#/$defs/extension_with_version" - }, - { - "type": "object", - "required": ["if", "then"], - "additionalProperties": false, - "properties": { - "if": { - "$ref": "schema_defs.json#/$defs/requires_entry" - }, - "then": { - "oneOf": [ - { - "$ref": "schema_defs.json#/$defs/extension_with_version" - }, - { - "type": "array", - "items": { - "$ref": "schema_defs.json#/$defs/extension_with_version" - } - } - ] - } - } - } - ] - }, "param_data": { "type": "object", "required": ["description", "schema"], @@ -57,9 +27,12 @@ "schema": { "$ref": "json-schema-draft-07.json#" }, - "when": { + "restrictions": { + "$ref": "schema_defs.json#/$defs/constraint_list" + }, + "definedBy": { "description": "Extension requirement condition that must be met for parameter to exist. The condition that the defining extension is implemented is implicit, and does not need to be explicitly listed", - "$ref": "schema_defs.json#/$defs/requires_entry" + "$ref": "schema_defs.json#/$defs/condition" }, "extra_validation": { "description": "Ruby code to perform extra validation, when it is not easily expressed with JSON Schema (_e.g._, because it depends on the value of another parameter)", @@ -67,215 +40,172 @@ } }, "additionalProperties": false + } + }, + + "type": "object", + "required": [ + "$schema", + "kind", + "name", + "type", + "description", + "long_name", + "versions" + ], + "properties": { + "$schema": { + "type": "string", + "format": "uri-reference", + "const": "ext_schema.json#", + "description": "Path to schema, relative to /schemas" }, - "ext_data": { - "type": "object", - "required": [ - "$schema", - "kind", - "name", - "type", - "description", - "long_name", - "versions" - ], - "properties": { - "$schema": { - "type": "string", - "format": "uri-reference", - "const": "ext_schema.json#", - "description": "Path to schema, relative to /schemas" - }, - "kind": { - "type": "string", - "const": "extension", - "description": "Object type" - }, - "name": { "$ref": "schema_defs.json#/$defs/extension_name" }, - "long_name": { - "type": "string", - "description": "One line description for the extension" - }, - "description": { - "$ref": "schema_defs.json#/$defs/spec_text", - "description": "Full documentation of the extension" - }, - "rvi_jira_issue": { - "type": "string", - "description": "JIRA issue number for the RVI issue that tracks this extension" - }, - "company": { - "description": "The company that developed this extension", - "$ref": "schema_defs.json#/$defs/company" - }, - "doc_license": { - "$ref": "schema_defs.json#/$defs/license" - }, - "type": { - "enum": ["unprivileged", "privileged"], - "description": "Either unprivileged or privileged" + "kind": { + "type": "string", + "const": "extension", + "description": "Object type" + }, + "name": { "$ref": "schema_defs.json#/$defs/extension_name" }, + "long_name": { + "type": "string", + "description": "One line description for the extension" + }, + "description": { + "$ref": "schema_defs.json#/$defs/spec_text", + "description": "Full documentation of the extension" + }, + "rvi_jira_issue": { + "type": "string", + "description": "JIRA issue number for the RVI issue that tracks this extension" + }, + "company": { + "description": "The company that developed this extension", + "$ref": "schema_defs.json#/$defs/company" + }, + "doc_license": { + "$ref": "schema_defs.json#/$defs/license" + }, + "type": { + "enum": ["unprivileged", "privileged"], + "description": "Either unprivileged or privileged" + }, + "conflicts": { + "description": "Extension(s) that conflict with this extension; both cannot be implemented at the same time", + "$ref": "schema_defs.json#/$defs/extension_condition" + }, + "versions": { + "type": "array", + "items": { + "type": "object", + "required": ["version", "state"], + "if": { + "properties": { + "state": { + "const": "ratified" + } + } }, - "conflicts": { - "description": "Extension(s) that conflict with this extension; both cannot be implemented at the same time", - "$ref": "schema_defs.json#/$defs/requires_entry" + "then": { + "required": ["ratification_date"] }, - "versions": { - "type": "array", - "items": { - "type": "object", - "required": ["version", "state"], - "if": { + "properties": { + "version": { + "$ref": "schema_defs.json#/$defs/extension_version" + }, + "state": { + "$ref": "schema_defs.json#/$defs/spec_state", + "description": "Current state of this version" + }, + "repositories": { + "description": "Repositories associated with this extension", + "type": "array", + "items": { + "type": "object", "properties": { - "state": { - "const": "ratified" - } - } - }, - "then": { - "required": ["ratification_date"] - }, - "properties": { - "version": { - "$ref": "schema_defs.json#/$defs/extension_version" - }, - "state": { - "$ref": "schema_defs.json#/$defs/spec_state", - "description": "Current state of this version" - }, - "repositories": { - "description": "Repositories associated with this extension", - "type": "array", - "items": { - "type": "object", - "properties": { - "url": { - "type": "string", - "format": "uri" - }, - "branch": { - "type": "string", - "description": "Branch/tag where the work is done" - } - }, - "additionalProperties": false - } - }, - "ratification_date": { - "oneOf": [ - { - "type": "string", - "pattern": "^20[0-9][0-9]-(0[1-9]|1[0-2])$", - "$comment": "When ratification date is known", - "description": "A specific year and month in YYYY-MM format", - "examples": ["2019-01", "2024-12"] - }, - { - "type": "string", - "pattern": "^unknown$", - "$comment": "When ratification date is unknown" - }, - { "type": "null", "$comment": "When version isn't ratified" } - ] - }, - "changes": { - "type": "array", - "items": { - "type": "string" + "url": { + "type": "string", + "format": "uri" }, - "description": "Changes since last version" + "branch": { + "type": "string", + "description": "Branch/tag where the work is done" + } }, - "url": { + "additionalProperties": false + } + }, + "ratification_date": { + "oneOf": [ + { "type": "string", - "format": "uri", - "description": "Link to ratified document" + "pattern": "^20[0-9][0-9]-(0[1-9]|1[0-2])$", + "$comment": "When ratification date is known", + "description": "A specific year and month in YYYY-MM format", + "examples": ["2019-01", "2024-12"] }, - "implies": { - "description": "Extension(s) implied by this extension (i.e., any subextensions)", - "oneOf": [ - { - "$ref": "#/$defs/implies_entry" - }, - { - "type": "array", - "items": { - "$ref": "#/$defs/implies_entry" - } - } - ] - }, - "requires": { - "description": "Extension(s) required by this extension", - "$ref": "schema_defs.json#/$defs/requires_entry" - }, - "contributors": { - "description": "List of contributors to this version of the extension", - "type": "array", - "items": { - "type": "object", - "properties": { - "name": { - "type": "string", - "description": "Contributor name, in 'GIVEN_NAME SURNAME' format" - }, - "company": { - "type": "string", - "description": "Company the contributor worked for, or 'Individual'" - }, - "email": { - "type": "string", - "format": "email", - "description": "E-mail address for the contributor" - } - } - } + { + "type": "string", + "pattern": "^unknown$", + "$comment": "When ratification date is unknown" }, - "param_constraints": { - "type": "object", - "patternProperties": { - "[A-Z][a-zA-Z0-9_]": { - "type": "object", - "properties": { - "schema": { - "$ref": "json-schema-draft-07.json#", - "description": "Extra schema constraints for the parameter" - }, - "extra_validation": { - "type": "string", - "description": "Extra validation to be performed in Ruby after JSON schema validation. Useful for complex conditions JSON Schema cannot handle (e.g., cross-parameter, data-dependent validation)" - } - }, - "additionalProperties": false - } + { "type": "null", "$comment": "When version isn't ratified" } + ] + }, + "changes": { + "type": "array", + "items": { + "type": "string" + }, + "description": "Changes since last version" + }, + "url": { + "type": "string", + "format": "uri", + "description": "Link to ratified document" + }, + "requires": { + "description": "Extension(s) required by this extension", + "$ref": "schema_defs.json#/$defs/condition" + }, + "contributors": { + "description": "List of contributors to this version of the extension", + "type": "array", + "items": { + "type": "object", + "properties": { + "name": { + "type": "string", + "description": "Contributor name, in 'GIVEN_NAME SURNAME' format" }, - "additionalProperties": false + "company": { + "type": "string", + "description": "Company the contributor worked for, or 'Individual'" + }, + "email": { + "type": "string", + "format": "email", + "description": "E-mail address for the contributor" + } } - }, - "additionalProperties": false - } - }, - "exception_codes": { - "type": "array", - "items": { + } + }, + "restrictions": { + "describe": "Any restrictions imposed by this extension version", + "$ref": "schema_defs.json#/$defs/constraint_list" + }, + "param_constraints": { "type": "object", - "description": "Exceptions defined by this extension", - "required": ["num", "name", "var"], - "properties": { - "num": { - "type": "integer" - }, - "name": { - "type": "string", - "description": "Long-form name (can have special characters)" - }, - "var": { - "type": "string", - "description": "Field name for the InterruptCode enum in IDL" - }, - "when": { + "patternProperties": { + "[A-Z][a-zA-Z0-9_]": { "type": "object", "properties": { - "version": { - "$ref": "schema_defs.json#/$defs/version_requirements" + "schema": { + "$ref": "json-schema-draft-07.json#", + "description": "Extra schema constraints for the parameter" + }, + "extra_validation": { + "type": "string", + "description": "Extra validation to be performed in Ruby after JSON schema validation. Useful for complex conditions JSON Schema cannot handle (e.g., cross-parameter, data-dependent validation)" } }, "additionalProperties": false @@ -284,50 +214,80 @@ "additionalProperties": false } }, - "interrupt_codes": { - "type": "array", - "items": { + "additionalProperties": false + } + }, + "exception_codes": { + "type": "array", + "items": { + "type": "object", + "description": "Exceptions defined by this extension", + "required": ["num", "name", "var"], + "properties": { + "num": { + "type": "integer" + }, + "name": { + "type": "string", + "description": "Long-form name (can have special characters)" + }, + "var": { + "type": "string", + "description": "Field name for the InterruptCode enum in IDL" + }, + "when": { "type": "object", - "description": "Interrupts defined by this extension", "properties": { - "num": { - "type": "integer" - }, - "name": { - "type": "string", - "description": "Long-form name (can have special characters)" - }, - "var": { - "type": "string", - "description": "Field name for the InterruptCode enum in IDL" + "version": { + "$ref": "schema_defs.json#/$defs/version_requirements" } }, "additionalProperties": false } }, - "params": { - "type": "object", - "patternProperties": { - "^[A-Z][A-Z_0-9]*$": { - "$ref": "#/$defs/param_data" - } + "additionalProperties": false + } + }, + "interrupt_codes": { + "type": "array", + "items": { + "type": "object", + "description": "Interrupts defined by this extension", + "properties": { + "num": { + "type": "integer" }, - "additionalProperties": false - }, - "$source": { - "type": "string", - "description": "Source file where this extension was defined" - }, - "cert_normative_rules": { - "$ref": "schema_defs.json#/$defs/cert_normative_rules" + "name": { + "type": "string", + "description": "Long-form name (can have special characters)" + }, + "var": { + "type": "string", + "description": "Field name for the InterruptCode enum in IDL" + } }, - "cert_test_procedures": { - "$ref": "schema_defs.json#/$defs/cert_test_procedures" + "additionalProperties": false + } + }, + "params": { + "type": "object", + "patternProperties": { + "^[A-Z][A-Z_0-9]*$": { + "$ref": "#/$defs/param_data" } }, "additionalProperties": false + }, + "$source": { + "type": "string", + "description": "Source file where this extension was defined" + }, + "cert_normative_rules": { + "$ref": "schema_defs.json#/$defs/cert_normative_rules" + }, + "cert_test_procedures": { + "$ref": "schema_defs.json#/$defs/cert_test_procedures" } }, - - "$ref": "#/$defs/ext_data" + "additionalProperties": false } diff --git a/spec/schemas/inst_schema.json b/spec/schemas/inst_schema.json index f1a8aa206..88089d4bd 100644 --- a/spec/schemas/inst_schema.json +++ b/spec/schemas/inst_schema.json @@ -330,7 +330,7 @@ "description": "Detailed description of the instruction" }, "definedBy": { - "$ref": "schema_defs.json#/$defs/requires_entry", + "$ref": "schema_defs.json#/$defs/condition", "description": "Extension(s) that defines the instruction" }, diff --git a/spec/schemas/schema_defs.json b/spec/schemas/schema_defs.json index a9a9d1729..afb91fd82 100644 --- a/spec/schemas/schema_defs.json +++ b/spec/schemas/schema_defs.json @@ -221,22 +221,34 @@ }, "extension_requirement": { "description": "A requirement on an extension. Can either specify just an extension name, in which case version '>= 0' is implied, or both a name and a requirement", - "oneOf": [ - { "$ref": "#/$defs/extension_name" }, - { - "type": "object", - "properties": { - "name": { - "$ref": "#/$defs/extension_name" - }, - "version": { - "$ref": "#/$defs/version_requirements" - } - }, - "required": ["name"], - "additionalProperties": false + "type": "object", + "properties": { + "name": { + "$ref": "#/$defs/extension_name" + }, + "version": { + "$ref": "#/$defs/version_requirements" } - ] + }, + "required": ["name"], + "additionalProperties": false + }, + "param_name": { + "type": "string", + "pattern": "^[A-Z][A-Z_0-9]*$" + }, + "param_requirement": { + "type": "object", + "required": ["name", "schema"], + "properties": { + "name": { + "$ref": "#/$defs/param_name" + }, + "schema": { + "$ref": "json-schema-draft-07.json#" + } + }, + "additionalProperties": false }, "requires_entry": { "oneOf": [ @@ -455,6 +467,174 @@ } } ] + }, + "extension_condition": { + "description": "A logic condition specifying certain extension version requirements", + "type": "object", + "required": ["extension"], + "properties": { + "extension": { + "oneOf": [ + { + "$ref": "#/$defs/extension_requirement" + }, + { + "type": "object", + "additionalProperties": false, + "properties": { + "allOf": { + "type": "array", + "items": { + "$ref": "schema_defs.json#/$defs/extension_condition/properties/extension" + }, + "minItems": 1 + }, + "anyOf": { + "type": "array", + "items": { + "$ref": "schema_defs.json#/$defs/extension_condition/properties/extension" + }, + "minItems": 1 + }, + "oneOf": { + "type": "array", + "items": { + "$ref": "schema_defs.json#/$defs/extension_condition/properties/extension" + }, + "minItems": 1 + }, + "noneOf": { + "type": "array", + "items": { + "$ref": "schema_defs.json#/$defs/extension_condition/properties/extension" + }, + "minItems": 1 + }, + "not": { + "$ref": "schema_defs.json#/$defs/extension_condition/properties/extension" + } + }, + "minProperties": 1, + "maxProperties": 1 + }, + { + "type": "object", + "required": ["if", "then"], + "properties": { + "if": { + "$ref": "schema_defs.json#/$defs/condition" + }, + "then": { + "$ref": "schema_defs.json#/$defs/extension_condition/properties/extension" + } + }, + "additionalProperties": false + } + ] + } + }, + "additionalProperties": false + }, + "param_condition": { + "type": "object", + "required": ["param"], + "properties": { + "param": { + "$ref": "#/$defs/param_requirement" + } + }, + "additionalProperties": false + }, + + "idl": { + "description": "IDL code", + "type": "string" + }, + + "constraint": { + "description": "A constraint, along with an English reasoning", + "type": "object", + "required": ["constraint()", "reason"], + "additionalProperties": false, + "properties": { + "constraint()": { + "description": "IDL function containing one or more implications (e.g., A -> B).", + "$ref": "#/$defs/idl" + }, + "reason": { + "description": "Why the constraint exists", + "type": "string" + } + } + }, + "constraint_list": { + "oneOf": [ + { + "$ref": "#/$defs/constraint" + }, + { + "type": "object", + "additionalProperties": false, + "properties": { + "allOf": { + "type": "array", + "items": { + "$ref": "#/$defs/constraint_list" + } + } + } + } + ] + }, + + "condition": { + "oneOf": [ + { + "type": "object", + "properties": { + "allOf": { + "type": "array", + "items": { + "$ref": "#/$defs/condition" + }, + "minItems": 1 + }, + "anyOf": { + "type": "array", + "items": { + "$ref": "#/$defs/condition" + }, + "minItems": 1 + }, + "oneOf": { + "type": "array", + "items": { + "$ref": "#/$defs/condition" + }, + "minItems": 1 + }, + "noneOf": { + "type": "array", + "items": { + "$ref": "#/$defs/condition" + }, + "minItems": 1 + }, + "not": { + "$ref": "#/$defs/condition" + } + }, + "minProperties": 1, + "maxProperties": 1, + "additionalProperties": false + }, + { + "$ref": "#/$defs/extension_condition" + }, + { + "$ref": "#/$defs/param_condition" + } + ] } } } diff --git a/spec/std/isa/csr/F/fcsr.yaml b/spec/std/isa/csr/F/fcsr.yaml index fc0aa0cc3..c48d68cf6 100644 --- a/spec/std/isa/csr/F/fcsr.yaml +++ b/spec/std/isa/csr/F/fcsr.yaml @@ -97,7 +97,9 @@ description: | priv_mode: U length: 32 -definedBy: F +definedBy: + extension: + name: F fields: FRM: location: 7-5 diff --git a/spec/std/isa/csr/F/fflags.yaml b/spec/std/isa/csr/F/fflags.yaml index 5949bb39f..cb80c92c2 100644 --- a/spec/std/isa/csr/F/fflags.yaml +++ b/spec/std/isa/csr/F/fflags.yaml @@ -16,7 +16,9 @@ description: instruction since the field was last reset by software. - id: csr-fflags-fptrap normative: false - text: The base RISC-V ISA does not support generating a trap on the setting of a floating-point exception flag. + text: + The base RISC-V ISA does not support generating a trap on the setting of a + floating-point exception flag. - id: csr-fflags-reasoning normative: false text: | @@ -27,7 +29,9 @@ description: priv_mode: U length: 32 -definedBy: F +definedBy: + extension: + name: F fields: NV: alias: fcsr.NV diff --git a/spec/std/isa/csr/F/frm.yaml b/spec/std/isa/csr/F/frm.yaml index a2a098b3b..34c68091d 100644 --- a/spec/std/isa/csr/F/frm.yaml +++ b/spec/std/isa/csr/F/frm.yaml @@ -44,7 +44,9 @@ description: priv_mode: U length: 32 -definedBy: F +definedBy: + extension: + name: F fields: ROUNDINGMODE: alias: fcsr.FRM diff --git a/spec/std/isa/csr/H/hcounteren.yaml b/spec/std/isa/csr/H/hcounteren.yaml index 191d4b895..1c57417df 100644 --- a/spec/std/isa/csr/H/hcounteren.yaml +++ b/spec/std/isa/csr/H/hcounteren.yaml @@ -16,7 +16,9 @@ description: | to VS/VU-mode See `cycle` for a table describing how exceptions occur. -definedBy: H +definedBy: + extension: + name: H fields: CY: location: 0 @@ -43,7 +45,9 @@ fields: ! 1 ! 1 ! 0 ! allowed ! `VirtualInstruction` ! 1 ! 1 ! 1 ! allowed ! allowed !=== - definedBy: Zicntr + definedBy: + extension: + name: Zicntr type(): | if (HCOUNTENABLE_EN[0]) { return CsrFieldType::RW; @@ -81,7 +85,9 @@ fields: ! 1 ! 1 ! 0 ! allowed ! `VirtualInstruction` ! 1 ! 1 ! 1 ! allowed ! allowed !=== - definedBy: Zicntr + definedBy: + extension: + name: Zicntr type(): | if (HCOUNTENABLE_EN[1]) { return CsrFieldType::RW; diff --git a/spec/std/isa/csr/H/henvcfg.yaml b/spec/std/isa/csr/H/henvcfg.yaml index 0bd10fe66..c92c795cf 100644 --- a/spec/std/isa/csr/H/henvcfg.yaml +++ b/spec/std/isa/csr/H/henvcfg.yaml @@ -96,10 +96,11 @@ description: | priv_mode: S length: 64 definedBy: - allOf: - - name: Sm - version: ">=1.12" - - name: H + extension: + allOf: + - name: Sm + version: ">=1.12" + - name: H fields: STCE: location: 63 @@ -119,7 +120,9 @@ fields: * `hip.VSTIP` reverts to its defined behavior as if Sstc is not implemented. * VS-mode timer interrupts will not be generated - definedBy: Sstc + definedBy: + extension: + name: Sstc type(): | return (implemented?(ExtensionName::Sstc)) ? CsrFieldType::RO : CsrFieldType::RW; reset_value(): | @@ -159,7 +162,9 @@ fields: `vsatp` but before writing the new `vsatp` value, obviating the need to execute an `hfence.vvma` instruction. -- - definedBy: Svpbmt + definedBy: + extension: + name: Svpbmt type(): | return (implemented?(ExtensionName::Svpbmt)) ? CsrFieldType::RO : CsrFieldType::RW; reset_value(): | @@ -181,7 +186,9 @@ fields: Furthermore, for implementations with the hypervisor extension, henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero. - definedBy: Svadu + definedBy: + extension: + name: Svadu type(): | return (implemented?(ExtensionName::Svadu)) ? CsrFieldType::RO : CsrFieldType::RW; reset_value(): | @@ -201,7 +208,9 @@ fields: * `0`: The instruction raises an illegal instruction or virtual instruction exception * `1`: The instruction is executed - definedBy: Zicboz + definedBy: + extension: + name: Zicboz type: RW reset_value: UNDEFINED_LEGAL CBCFE: @@ -220,7 +229,9 @@ fields: * `0`: The instruction raises an illegal instruction or virtual instruction exception * `1`: The instruction is executed - definedBy: Zicbom + definedBy: + extension: + name: Zicbom type: RW reset_value: UNDEFINED_LEGAL CBIE: @@ -239,7 +250,9 @@ fields: * `01`: The instruction is executed and performs a flush operation * `10`: _Reserved_ * `11`: The instruction is executed and performs an invalidate operation - definedBy: Zicbom + definedBy: + extension: + name: Zicbom type: RW-R sw_write(csr_value): | if (csr_value.CBIE == 0 || csr_value.CBIE == 1 || csr_value.CBIE == 3) { diff --git a/spec/std/isa/csr/H/henvcfgh.yaml b/spec/std/isa/csr/H/henvcfgh.yaml index 3f5baac9a..d131fac96 100644 --- a/spec/std/isa/csr/H/henvcfgh.yaml +++ b/spec/std/isa/csr/H/henvcfgh.yaml @@ -15,10 +15,11 @@ description: | priv_mode: S length: 32 definedBy: - allOf: - - name: Sm - version: ">=1.12" - - name: H + extension: + allOf: + - name: Sm + version: ">=1.12" + - name: H fields: STCE: location: 31 @@ -39,7 +40,9 @@ fields: * `hip.VSTIP` reverts to its defined behavior as if Sstc is not implemented. * VS-mode timer interrupts will not be generated - definedBy: Sstc + definedBy: + extension: + name: Sstc type(): | return (implemented?(ExtensionName::Sstc)) ? CsrFieldType::RO : CsrFieldType::RW; reset_value(): | @@ -80,7 +83,9 @@ fields: `vsatp` but before writing the new `vsatp` value, obviating the need to execute an `hfence.vvma` instruction. -- - definedBy: Svpbmt + definedBy: + extension: + name: Svpbmt type(): | return (implemented?(ExtensionName::Svpbmt)) ? CsrFieldType::RO : CsrFieldType::RW; reset_value(): | @@ -103,7 +108,9 @@ fields: Furthermore, for implementations with the hypervisor extension, henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero. - definedBy: Svadu + definedBy: + extension: + name: Svadu type(): | return (implemented?(ExtensionName::Svadu)) ? CsrFieldType::RO : CsrFieldType::RW; reset_value(): | diff --git a/spec/std/isa/csr/H/hgatp.yaml b/spec/std/isa/csr/H/hgatp.yaml index ab49dbbc2..137acf039 100644 --- a/spec/std/isa/csr/H/hgatp.yaml +++ b/spec/std/isa/csr/H/hgatp.yaml @@ -107,7 +107,9 @@ description: | address: 0x680 writable: true priv_mode: S -definedBy: H +definedBy: + extension: + name: H length: SXLEN fields: MODE: diff --git a/spec/std/isa/csr/H/htimedelta.yaml b/spec/std/isa/csr/H/htimedelta.yaml index 331481701..f2dd4c67f 100644 --- a/spec/std/isa/csr/H/htimedelta.yaml +++ b/spec/std/isa/csr/H/htimedelta.yaml @@ -20,7 +20,9 @@ description: | address: 0x605 writable: true priv_mode: S -definedBy: H +definedBy: + extension: + name: H length: 64 fields: DELTA: diff --git a/spec/std/isa/csr/H/htimedeltah.yaml b/spec/std/isa/csr/H/htimedeltah.yaml index ca1ff35d2..b8c3a9901 100644 --- a/spec/std/isa/csr/H/htimedeltah.yaml +++ b/spec/std/isa/csr/H/htimedeltah.yaml @@ -13,7 +13,9 @@ description: | address: 0x615 writable: true priv_mode: S -definedBy: H +definedBy: + extension: + name: H length: 32 base: 32 fields: diff --git a/spec/std/isa/csr/H/htinst.yaml b/spec/std/isa/csr/H/htinst.yaml index ac1043d9f..87511ebfe 100644 --- a/spec/std/isa/csr/H/htinst.yaml +++ b/spec/std/isa/csr/H/htinst.yaml @@ -17,7 +17,9 @@ description: | htinst is a WARL register that need only be able to hold the values that the implementation may automatically write to it on a trap. priv_mode: S length: SXLEN -definedBy: H +definedBy: + extension: + name: H fields: VALUE: location_rv64: 63-0 diff --git a/spec/std/isa/csr/H/htval.yaml b/spec/std/isa/csr/H/htval.yaml index 931260aad..5ea05b2c1 100644 --- a/spec/std/isa/csr/H/htval.yaml +++ b/spec/std/isa/csr/H/htval.yaml @@ -21,7 +21,9 @@ description: | htval is a WARL register that must be able to hold zero and may be capable of holding only an arbitrary subset of other 2-bit-shifted guest physical addresses, if any. priv_mode: M length: MXLEN -definedBy: H +definedBy: + extension: + name: H fields: VALUE: location_rv64: 63-0 diff --git a/spec/std/isa/csr/H/mtinst.yaml b/spec/std/isa/csr/H/mtinst.yaml index e8aa3f37c..a25b1edb6 100644 --- a/spec/std/isa/csr/H/mtinst.yaml +++ b/spec/std/isa/csr/H/mtinst.yaml @@ -17,7 +17,9 @@ description: | mtinst is a WARL register that need only be able to hold the values that the implementation may automatically write to it on a trap. priv_mode: M length: MXLEN -definedBy: H +definedBy: + extension: + name: H fields: VALUE: location_rv64: 63-0 diff --git a/spec/std/isa/csr/H/mtval2.yaml b/spec/std/isa/csr/H/mtval2.yaml index d4af3709b..5b5ab8b4d 100644 --- a/spec/std/isa/csr/H/mtval2.yaml +++ b/spec/std/isa/csr/H/mtval2.yaml @@ -22,7 +22,9 @@ description: | mtval2 is a WARL register that must be able to hold zero and may be capable of holding only an arbitrary subset of other 2-bit-shifted guest physical addresses, if any. priv_mode: M length: MXLEN -definedBy: H +definedBy: + extension: + name: H fields: VALUE: location_rv64: 63-0 diff --git a/spec/std/isa/csr/H/vsatp.yaml b/spec/std/isa/csr/H/vsatp.yaml index 22d8f2dae..ea84a30f7 100644 --- a/spec/std/isa/csr/H/vsatp.yaml +++ b/spec/std/isa/csr/H/vsatp.yaml @@ -33,7 +33,9 @@ description: | `vsatp` is effected. priv_mode: VS length: VSXLEN -definedBy: H +definedBy: + extension: + name: H fields: MODE: location_rv64: 63-60 diff --git a/spec/std/isa/csr/I/mcounteren.yaml b/spec/std/isa/csr/I/mcounteren.yaml index 5cf2dcda6..809f168d8 100644 --- a/spec/std/isa/csr/I/mcounteren.yaml +++ b/spec/std/isa/csr/I/mcounteren.yaml @@ -84,7 +84,9 @@ description: | <%- end -%> . <%- end -%> -definedBy: U # actually, defined by RV64, but must implement U-mode for this CSR to exist +definedBy: # actually, defined by RV64, but must implement U-mode for this CSR to exist + extension: + name: U fields: CY: location: 0 diff --git a/spec/std/isa/csr/I/pmpaddr0.yaml b/spec/std/isa/csr/I/pmpaddr0.yaml index 5cdacb75a..2ecf9cd05 100644 --- a/spec/std/isa/csr/I/pmpaddr0.yaml +++ b/spec/std/isa/csr/I/pmpaddr0.yaml @@ -12,7 +12,9 @@ address: 0x3B0 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr1.yaml b/spec/std/isa/csr/I/pmpaddr1.yaml index 6fec399a0..309b6face 100644 --- a/spec/std/isa/csr/I/pmpaddr1.yaml +++ b/spec/std/isa/csr/I/pmpaddr1.yaml @@ -12,7 +12,9 @@ address: 0x3B1 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr10.yaml b/spec/std/isa/csr/I/pmpaddr10.yaml index 8a16ce4da..0c1a16d8b 100644 --- a/spec/std/isa/csr/I/pmpaddr10.yaml +++ b/spec/std/isa/csr/I/pmpaddr10.yaml @@ -12,7 +12,9 @@ address: 0x3BA priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr11.yaml b/spec/std/isa/csr/I/pmpaddr11.yaml index 8c7a03214..44a5724b4 100644 --- a/spec/std/isa/csr/I/pmpaddr11.yaml +++ b/spec/std/isa/csr/I/pmpaddr11.yaml @@ -12,7 +12,9 @@ address: 0x3BB priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr12.yaml b/spec/std/isa/csr/I/pmpaddr12.yaml index b4cc1d03c..da5f0217e 100644 --- a/spec/std/isa/csr/I/pmpaddr12.yaml +++ b/spec/std/isa/csr/I/pmpaddr12.yaml @@ -12,7 +12,9 @@ address: 0x3BC priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr13.yaml b/spec/std/isa/csr/I/pmpaddr13.yaml index 1ad1a6bd9..1f03da088 100644 --- a/spec/std/isa/csr/I/pmpaddr13.yaml +++ b/spec/std/isa/csr/I/pmpaddr13.yaml @@ -12,7 +12,9 @@ address: 0x3BD priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr14.yaml b/spec/std/isa/csr/I/pmpaddr14.yaml index 91b9f9c14..9ce2b0742 100644 --- a/spec/std/isa/csr/I/pmpaddr14.yaml +++ b/spec/std/isa/csr/I/pmpaddr14.yaml @@ -12,7 +12,9 @@ address: 0x3BE priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr15.yaml b/spec/std/isa/csr/I/pmpaddr15.yaml index 3ad0c10fe..2c8f9e90e 100644 --- a/spec/std/isa/csr/I/pmpaddr15.yaml +++ b/spec/std/isa/csr/I/pmpaddr15.yaml @@ -12,7 +12,9 @@ address: 0x3BF priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr16.yaml b/spec/std/isa/csr/I/pmpaddr16.yaml index 4963b366c..c2754d636 100644 --- a/spec/std/isa/csr/I/pmpaddr16.yaml +++ b/spec/std/isa/csr/I/pmpaddr16.yaml @@ -12,7 +12,9 @@ address: 0x3C0 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr17.yaml b/spec/std/isa/csr/I/pmpaddr17.yaml index e06063e81..80d0febb6 100644 --- a/spec/std/isa/csr/I/pmpaddr17.yaml +++ b/spec/std/isa/csr/I/pmpaddr17.yaml @@ -12,7 +12,9 @@ address: 0x3C1 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr18.yaml b/spec/std/isa/csr/I/pmpaddr18.yaml index c1d15db18..f6f655eb5 100644 --- a/spec/std/isa/csr/I/pmpaddr18.yaml +++ b/spec/std/isa/csr/I/pmpaddr18.yaml @@ -12,7 +12,9 @@ address: 0x3C2 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr19.yaml b/spec/std/isa/csr/I/pmpaddr19.yaml index a54fc520a..92bc68ee2 100644 --- a/spec/std/isa/csr/I/pmpaddr19.yaml +++ b/spec/std/isa/csr/I/pmpaddr19.yaml @@ -12,7 +12,9 @@ address: 0x3C3 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr2.yaml b/spec/std/isa/csr/I/pmpaddr2.yaml index 011a00792..b791e6d33 100644 --- a/spec/std/isa/csr/I/pmpaddr2.yaml +++ b/spec/std/isa/csr/I/pmpaddr2.yaml @@ -12,7 +12,9 @@ address: 0x3B2 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr20.yaml b/spec/std/isa/csr/I/pmpaddr20.yaml index d367115e3..4dcb517e5 100644 --- a/spec/std/isa/csr/I/pmpaddr20.yaml +++ b/spec/std/isa/csr/I/pmpaddr20.yaml @@ -12,7 +12,9 @@ address: 0x3C4 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr21.yaml b/spec/std/isa/csr/I/pmpaddr21.yaml index 968d6c1f2..c23efd659 100644 --- a/spec/std/isa/csr/I/pmpaddr21.yaml +++ b/spec/std/isa/csr/I/pmpaddr21.yaml @@ -12,7 +12,9 @@ address: 0x3C5 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr22.yaml b/spec/std/isa/csr/I/pmpaddr22.yaml index 120cf52ca..7d9d61cb6 100644 --- a/spec/std/isa/csr/I/pmpaddr22.yaml +++ b/spec/std/isa/csr/I/pmpaddr22.yaml @@ -12,7 +12,9 @@ address: 0x3C6 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr23.yaml b/spec/std/isa/csr/I/pmpaddr23.yaml index 77dbadabd..e4b8a24f4 100644 --- a/spec/std/isa/csr/I/pmpaddr23.yaml +++ b/spec/std/isa/csr/I/pmpaddr23.yaml @@ -12,7 +12,9 @@ address: 0x3C7 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr24.yaml b/spec/std/isa/csr/I/pmpaddr24.yaml index 2a9e15ecf..34783c071 100644 --- a/spec/std/isa/csr/I/pmpaddr24.yaml +++ b/spec/std/isa/csr/I/pmpaddr24.yaml @@ -12,7 +12,9 @@ address: 0x3C8 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr25.yaml b/spec/std/isa/csr/I/pmpaddr25.yaml index 21d5db78f..8f85ea7c3 100644 --- a/spec/std/isa/csr/I/pmpaddr25.yaml +++ b/spec/std/isa/csr/I/pmpaddr25.yaml @@ -12,7 +12,9 @@ address: 0x3C9 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr26.yaml b/spec/std/isa/csr/I/pmpaddr26.yaml index 70f3e75fa..20bee6890 100644 --- a/spec/std/isa/csr/I/pmpaddr26.yaml +++ b/spec/std/isa/csr/I/pmpaddr26.yaml @@ -12,7 +12,9 @@ address: 0x3CA priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr27.yaml b/spec/std/isa/csr/I/pmpaddr27.yaml index abe3298d8..2710a5c86 100644 --- a/spec/std/isa/csr/I/pmpaddr27.yaml +++ b/spec/std/isa/csr/I/pmpaddr27.yaml @@ -12,7 +12,9 @@ address: 0x3CB priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr28.yaml b/spec/std/isa/csr/I/pmpaddr28.yaml index 605e23753..cd5696ef0 100644 --- a/spec/std/isa/csr/I/pmpaddr28.yaml +++ b/spec/std/isa/csr/I/pmpaddr28.yaml @@ -12,7 +12,9 @@ address: 0x3CC priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr29.yaml b/spec/std/isa/csr/I/pmpaddr29.yaml index 555b52c0c..3b67d4ddc 100644 --- a/spec/std/isa/csr/I/pmpaddr29.yaml +++ b/spec/std/isa/csr/I/pmpaddr29.yaml @@ -12,7 +12,9 @@ address: 0x3CD priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr3.yaml b/spec/std/isa/csr/I/pmpaddr3.yaml index 8cc606841..89b7119d0 100644 --- a/spec/std/isa/csr/I/pmpaddr3.yaml +++ b/spec/std/isa/csr/I/pmpaddr3.yaml @@ -12,7 +12,9 @@ address: 0x3B3 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr30.yaml b/spec/std/isa/csr/I/pmpaddr30.yaml index aa1da2d2c..93c258305 100644 --- a/spec/std/isa/csr/I/pmpaddr30.yaml +++ b/spec/std/isa/csr/I/pmpaddr30.yaml @@ -12,7 +12,9 @@ address: 0x3CE priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr31.yaml b/spec/std/isa/csr/I/pmpaddr31.yaml index 045b2c8b8..a65fef292 100644 --- a/spec/std/isa/csr/I/pmpaddr31.yaml +++ b/spec/std/isa/csr/I/pmpaddr31.yaml @@ -12,7 +12,9 @@ address: 0x3CF priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr32.yaml b/spec/std/isa/csr/I/pmpaddr32.yaml index 6477beaa2..68318bf5f 100644 --- a/spec/std/isa/csr/I/pmpaddr32.yaml +++ b/spec/std/isa/csr/I/pmpaddr32.yaml @@ -12,7 +12,9 @@ address: 0x3D0 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr33.yaml b/spec/std/isa/csr/I/pmpaddr33.yaml index 59c4ebdc6..c235bbe80 100644 --- a/spec/std/isa/csr/I/pmpaddr33.yaml +++ b/spec/std/isa/csr/I/pmpaddr33.yaml @@ -12,7 +12,9 @@ address: 0x3D1 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr34.yaml b/spec/std/isa/csr/I/pmpaddr34.yaml index cffdaf44c..a3181a83f 100644 --- a/spec/std/isa/csr/I/pmpaddr34.yaml +++ b/spec/std/isa/csr/I/pmpaddr34.yaml @@ -12,7 +12,9 @@ address: 0x3D2 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr35.yaml b/spec/std/isa/csr/I/pmpaddr35.yaml index ecd6cb3eb..a7d7f24d2 100644 --- a/spec/std/isa/csr/I/pmpaddr35.yaml +++ b/spec/std/isa/csr/I/pmpaddr35.yaml @@ -12,7 +12,9 @@ address: 0x3D3 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr36.yaml b/spec/std/isa/csr/I/pmpaddr36.yaml index 79026af85..865c6444a 100644 --- a/spec/std/isa/csr/I/pmpaddr36.yaml +++ b/spec/std/isa/csr/I/pmpaddr36.yaml @@ -12,7 +12,9 @@ address: 0x3D4 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr37.yaml b/spec/std/isa/csr/I/pmpaddr37.yaml index a75ab138f..888f50154 100644 --- a/spec/std/isa/csr/I/pmpaddr37.yaml +++ b/spec/std/isa/csr/I/pmpaddr37.yaml @@ -12,7 +12,9 @@ address: 0x3D5 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr38.yaml b/spec/std/isa/csr/I/pmpaddr38.yaml index 0994c85d0..0e6ec3384 100644 --- a/spec/std/isa/csr/I/pmpaddr38.yaml +++ b/spec/std/isa/csr/I/pmpaddr38.yaml @@ -12,7 +12,9 @@ address: 0x3D6 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr39.yaml b/spec/std/isa/csr/I/pmpaddr39.yaml index 8f1d7326f..488e7bb6a 100644 --- a/spec/std/isa/csr/I/pmpaddr39.yaml +++ b/spec/std/isa/csr/I/pmpaddr39.yaml @@ -12,7 +12,9 @@ address: 0x3D7 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr4.yaml b/spec/std/isa/csr/I/pmpaddr4.yaml index e4e07b664..d633869e2 100644 --- a/spec/std/isa/csr/I/pmpaddr4.yaml +++ b/spec/std/isa/csr/I/pmpaddr4.yaml @@ -12,7 +12,9 @@ address: 0x3B4 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr40.yaml b/spec/std/isa/csr/I/pmpaddr40.yaml index 9a64c3cfc..cefbdff0b 100644 --- a/spec/std/isa/csr/I/pmpaddr40.yaml +++ b/spec/std/isa/csr/I/pmpaddr40.yaml @@ -12,7 +12,9 @@ address: 0x3D8 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr41.yaml b/spec/std/isa/csr/I/pmpaddr41.yaml index 7aca912a5..2a97583c2 100644 --- a/spec/std/isa/csr/I/pmpaddr41.yaml +++ b/spec/std/isa/csr/I/pmpaddr41.yaml @@ -12,7 +12,9 @@ address: 0x3D9 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr42.yaml b/spec/std/isa/csr/I/pmpaddr42.yaml index 36e26fd92..4f2dd637f 100644 --- a/spec/std/isa/csr/I/pmpaddr42.yaml +++ b/spec/std/isa/csr/I/pmpaddr42.yaml @@ -12,7 +12,9 @@ address: 0x3DA priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr43.yaml b/spec/std/isa/csr/I/pmpaddr43.yaml index f63113962..60e2793da 100644 --- a/spec/std/isa/csr/I/pmpaddr43.yaml +++ b/spec/std/isa/csr/I/pmpaddr43.yaml @@ -12,7 +12,9 @@ address: 0x3DB priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr44.yaml b/spec/std/isa/csr/I/pmpaddr44.yaml index dee6029d4..1161bae57 100644 --- a/spec/std/isa/csr/I/pmpaddr44.yaml +++ b/spec/std/isa/csr/I/pmpaddr44.yaml @@ -12,7 +12,9 @@ address: 0x3DC priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr45.yaml b/spec/std/isa/csr/I/pmpaddr45.yaml index 161146f99..e338c8b5e 100644 --- a/spec/std/isa/csr/I/pmpaddr45.yaml +++ b/spec/std/isa/csr/I/pmpaddr45.yaml @@ -12,7 +12,9 @@ address: 0x3DD priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr46.yaml b/spec/std/isa/csr/I/pmpaddr46.yaml index f1dd8383d..5868e2e85 100644 --- a/spec/std/isa/csr/I/pmpaddr46.yaml +++ b/spec/std/isa/csr/I/pmpaddr46.yaml @@ -12,7 +12,9 @@ address: 0x3DE priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr47.yaml b/spec/std/isa/csr/I/pmpaddr47.yaml index 5688d9bd2..1311b5976 100644 --- a/spec/std/isa/csr/I/pmpaddr47.yaml +++ b/spec/std/isa/csr/I/pmpaddr47.yaml @@ -12,7 +12,9 @@ address: 0x3DF priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr48.yaml b/spec/std/isa/csr/I/pmpaddr48.yaml index 22f29bea9..4a2706931 100644 --- a/spec/std/isa/csr/I/pmpaddr48.yaml +++ b/spec/std/isa/csr/I/pmpaddr48.yaml @@ -12,7 +12,9 @@ address: 0x3E0 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr49.yaml b/spec/std/isa/csr/I/pmpaddr49.yaml index d0113ac93..0e8f97b49 100644 --- a/spec/std/isa/csr/I/pmpaddr49.yaml +++ b/spec/std/isa/csr/I/pmpaddr49.yaml @@ -12,7 +12,9 @@ address: 0x3E1 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr5.yaml b/spec/std/isa/csr/I/pmpaddr5.yaml index 30df6aabd..a42d9ddbf 100644 --- a/spec/std/isa/csr/I/pmpaddr5.yaml +++ b/spec/std/isa/csr/I/pmpaddr5.yaml @@ -12,7 +12,9 @@ address: 0x3B5 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr50.yaml b/spec/std/isa/csr/I/pmpaddr50.yaml index 6069b364d..8c4a26bc6 100644 --- a/spec/std/isa/csr/I/pmpaddr50.yaml +++ b/spec/std/isa/csr/I/pmpaddr50.yaml @@ -12,7 +12,9 @@ address: 0x3E2 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr51.yaml b/spec/std/isa/csr/I/pmpaddr51.yaml index b75590549..d189eba9b 100644 --- a/spec/std/isa/csr/I/pmpaddr51.yaml +++ b/spec/std/isa/csr/I/pmpaddr51.yaml @@ -12,7 +12,9 @@ address: 0x3E3 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr52.yaml b/spec/std/isa/csr/I/pmpaddr52.yaml index 8bb739962..3e47d9ea6 100644 --- a/spec/std/isa/csr/I/pmpaddr52.yaml +++ b/spec/std/isa/csr/I/pmpaddr52.yaml @@ -12,7 +12,9 @@ address: 0x3E4 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr53.yaml b/spec/std/isa/csr/I/pmpaddr53.yaml index 848340ccc..03cab458d 100644 --- a/spec/std/isa/csr/I/pmpaddr53.yaml +++ b/spec/std/isa/csr/I/pmpaddr53.yaml @@ -12,7 +12,9 @@ address: 0x3E5 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr54.yaml b/spec/std/isa/csr/I/pmpaddr54.yaml index 599296d9c..fab4654f9 100644 --- a/spec/std/isa/csr/I/pmpaddr54.yaml +++ b/spec/std/isa/csr/I/pmpaddr54.yaml @@ -12,7 +12,9 @@ address: 0x3E6 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr55.yaml b/spec/std/isa/csr/I/pmpaddr55.yaml index 2a28c2efe..b67e9a4f6 100644 --- a/spec/std/isa/csr/I/pmpaddr55.yaml +++ b/spec/std/isa/csr/I/pmpaddr55.yaml @@ -12,7 +12,9 @@ address: 0x3E7 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr56.yaml b/spec/std/isa/csr/I/pmpaddr56.yaml index fb0ebf32f..30274e01d 100644 --- a/spec/std/isa/csr/I/pmpaddr56.yaml +++ b/spec/std/isa/csr/I/pmpaddr56.yaml @@ -12,7 +12,9 @@ address: 0x3E8 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr57.yaml b/spec/std/isa/csr/I/pmpaddr57.yaml index b249eaca9..7d911e025 100644 --- a/spec/std/isa/csr/I/pmpaddr57.yaml +++ b/spec/std/isa/csr/I/pmpaddr57.yaml @@ -12,7 +12,9 @@ address: 0x3E9 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr58.yaml b/spec/std/isa/csr/I/pmpaddr58.yaml index 72fc2f570..65487df37 100644 --- a/spec/std/isa/csr/I/pmpaddr58.yaml +++ b/spec/std/isa/csr/I/pmpaddr58.yaml @@ -12,7 +12,9 @@ address: 0x3EA priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr59.yaml b/spec/std/isa/csr/I/pmpaddr59.yaml index 70fb16ffe..77178bb07 100644 --- a/spec/std/isa/csr/I/pmpaddr59.yaml +++ b/spec/std/isa/csr/I/pmpaddr59.yaml @@ -12,7 +12,9 @@ address: 0x3EB priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr6.yaml b/spec/std/isa/csr/I/pmpaddr6.yaml index 1ba8bdfb5..e076cb311 100644 --- a/spec/std/isa/csr/I/pmpaddr6.yaml +++ b/spec/std/isa/csr/I/pmpaddr6.yaml @@ -12,7 +12,9 @@ address: 0x3B6 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr60.yaml b/spec/std/isa/csr/I/pmpaddr60.yaml index 327e24325..b90278829 100644 --- a/spec/std/isa/csr/I/pmpaddr60.yaml +++ b/spec/std/isa/csr/I/pmpaddr60.yaml @@ -12,7 +12,9 @@ address: 0x3EC priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr61.yaml b/spec/std/isa/csr/I/pmpaddr61.yaml index 2679f6667..6a7431055 100644 --- a/spec/std/isa/csr/I/pmpaddr61.yaml +++ b/spec/std/isa/csr/I/pmpaddr61.yaml @@ -12,7 +12,9 @@ address: 0x3ED priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr62.yaml b/spec/std/isa/csr/I/pmpaddr62.yaml index 15e8ddcd9..a81930558 100644 --- a/spec/std/isa/csr/I/pmpaddr62.yaml +++ b/spec/std/isa/csr/I/pmpaddr62.yaml @@ -12,7 +12,9 @@ address: 0x3EE priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr63.yaml b/spec/std/isa/csr/I/pmpaddr63.yaml index fe8d8e4e5..0c2d2c918 100644 --- a/spec/std/isa/csr/I/pmpaddr63.yaml +++ b/spec/std/isa/csr/I/pmpaddr63.yaml @@ -12,7 +12,9 @@ address: 0x3EF priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr7.yaml b/spec/std/isa/csr/I/pmpaddr7.yaml index 962f3c8d1..460a10ea9 100644 --- a/spec/std/isa/csr/I/pmpaddr7.yaml +++ b/spec/std/isa/csr/I/pmpaddr7.yaml @@ -12,7 +12,9 @@ address: 0x3B7 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr8.yaml b/spec/std/isa/csr/I/pmpaddr8.yaml index 9d281ac6e..4a1314c07 100644 --- a/spec/std/isa/csr/I/pmpaddr8.yaml +++ b/spec/std/isa/csr/I/pmpaddr8.yaml @@ -12,7 +12,9 @@ address: 0x3B8 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpaddr9.yaml b/spec/std/isa/csr/I/pmpaddr9.yaml index 1bbe1e398..da84b1871 100644 --- a/spec/std/isa/csr/I/pmpaddr9.yaml +++ b/spec/std/isa/csr/I/pmpaddr9.yaml @@ -12,7 +12,9 @@ address: 0x3B9 priv_mode: M length: MXLEN description: PMP entry address -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: ADDR: location_rv32: 31-0 diff --git a/spec/std/isa/csr/I/pmpcfg0.yaml b/spec/std/isa/csr/I/pmpcfg0.yaml index 98494bb96..784d7b9c3 100644 --- a/spec/std/isa/csr/I/pmpcfg0.yaml +++ b/spec/std/isa/csr/I/pmpcfg0.yaml @@ -12,7 +12,9 @@ address: 0x3A0 priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp0cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg1.yaml b/spec/std/isa/csr/I/pmpcfg1.yaml index 2c6e3bd15..df35a9abd 100644 --- a/spec/std/isa/csr/I/pmpcfg1.yaml +++ b/spec/std/isa/csr/I/pmpcfg1.yaml @@ -13,7 +13,9 @@ address: 0x3A1 priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp4cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg10.yaml b/spec/std/isa/csr/I/pmpcfg10.yaml index 9e67a6034..6fc7ed377 100644 --- a/spec/std/isa/csr/I/pmpcfg10.yaml +++ b/spec/std/isa/csr/I/pmpcfg10.yaml @@ -12,7 +12,9 @@ address: 0x3AA priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp40cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg11.yaml b/spec/std/isa/csr/I/pmpcfg11.yaml index 4d99d5b51..93519d5c6 100644 --- a/spec/std/isa/csr/I/pmpcfg11.yaml +++ b/spec/std/isa/csr/I/pmpcfg11.yaml @@ -13,7 +13,9 @@ address: 0x3AB priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp44cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg12.yaml b/spec/std/isa/csr/I/pmpcfg12.yaml index c01e981af..e33183e9f 100644 --- a/spec/std/isa/csr/I/pmpcfg12.yaml +++ b/spec/std/isa/csr/I/pmpcfg12.yaml @@ -12,7 +12,9 @@ address: 0x3AC priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp48cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg13.yaml b/spec/std/isa/csr/I/pmpcfg13.yaml index 787b927c6..25a392bd8 100644 --- a/spec/std/isa/csr/I/pmpcfg13.yaml +++ b/spec/std/isa/csr/I/pmpcfg13.yaml @@ -13,7 +13,9 @@ address: 0x3AD priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp52cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg14.yaml b/spec/std/isa/csr/I/pmpcfg14.yaml index 0a76eeb62..057187199 100644 --- a/spec/std/isa/csr/I/pmpcfg14.yaml +++ b/spec/std/isa/csr/I/pmpcfg14.yaml @@ -12,7 +12,9 @@ address: 0x3AE priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp56cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg15.yaml b/spec/std/isa/csr/I/pmpcfg15.yaml index f4a53aeae..a6db34abd 100644 --- a/spec/std/isa/csr/I/pmpcfg15.yaml +++ b/spec/std/isa/csr/I/pmpcfg15.yaml @@ -13,7 +13,9 @@ address: 0x3AF priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp60cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg2.yaml b/spec/std/isa/csr/I/pmpcfg2.yaml index 1643f8c18..ad45a1931 100644 --- a/spec/std/isa/csr/I/pmpcfg2.yaml +++ b/spec/std/isa/csr/I/pmpcfg2.yaml @@ -12,7 +12,9 @@ address: 0x3A2 priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp8cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg3.yaml b/spec/std/isa/csr/I/pmpcfg3.yaml index 122481871..b68385b24 100644 --- a/spec/std/isa/csr/I/pmpcfg3.yaml +++ b/spec/std/isa/csr/I/pmpcfg3.yaml @@ -13,7 +13,9 @@ address: 0x3A3 priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp12cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg4.yaml b/spec/std/isa/csr/I/pmpcfg4.yaml index 1092e7b5a..3f9dd52b2 100644 --- a/spec/std/isa/csr/I/pmpcfg4.yaml +++ b/spec/std/isa/csr/I/pmpcfg4.yaml @@ -12,7 +12,9 @@ address: 0x3A4 priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp16cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg5.yaml b/spec/std/isa/csr/I/pmpcfg5.yaml index 71c8f9150..d2ccbfe54 100644 --- a/spec/std/isa/csr/I/pmpcfg5.yaml +++ b/spec/std/isa/csr/I/pmpcfg5.yaml @@ -13,7 +13,9 @@ address: 0x3A5 priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp20cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg6.yaml b/spec/std/isa/csr/I/pmpcfg6.yaml index 2087ce15b..6a6c8d68e 100644 --- a/spec/std/isa/csr/I/pmpcfg6.yaml +++ b/spec/std/isa/csr/I/pmpcfg6.yaml @@ -12,7 +12,9 @@ address: 0x3A6 priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp24cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg7.yaml b/spec/std/isa/csr/I/pmpcfg7.yaml index 058f9deca..833280660 100644 --- a/spec/std/isa/csr/I/pmpcfg7.yaml +++ b/spec/std/isa/csr/I/pmpcfg7.yaml @@ -13,7 +13,9 @@ address: 0x3A7 priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp28cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg8.yaml b/spec/std/isa/csr/I/pmpcfg8.yaml index 1e3e56cee..52149c0c1 100644 --- a/spec/std/isa/csr/I/pmpcfg8.yaml +++ b/spec/std/isa/csr/I/pmpcfg8.yaml @@ -12,7 +12,9 @@ address: 0x3A8 priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp32cfg: location: 7-0 diff --git a/spec/std/isa/csr/I/pmpcfg9.yaml b/spec/std/isa/csr/I/pmpcfg9.yaml index e482f7819..9f65d7294 100644 --- a/spec/std/isa/csr/I/pmpcfg9.yaml +++ b/spec/std/isa/csr/I/pmpcfg9.yaml @@ -13,7 +13,9 @@ address: 0x3A9 priv_mode: M length: MXLEN description: PMP entry configuration -definedBy: Smpmp +definedBy: + extension: + name: Smpmp fields: pmp36cfg: location: 7-0 diff --git a/spec/std/isa/csr/S/scounteren.yaml b/spec/std/isa/csr/S/scounteren.yaml index 21fc4e024..e6775643b 100644 --- a/spec/std/isa/csr/S/scounteren.yaml +++ b/spec/std/isa/csr/S/scounteren.yaml @@ -14,14 +14,18 @@ length: 32 description: | Delegates control of the hardware performance-monitoring counters to U-mode -definedBy: S +definedBy: + extension: + name: S fields: CY: location: 0 description: | When both `scounteren.CY` and `mcounteren.CY` are set, the `cycle` CSR (an alias of `mcycle`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.CY`)<% end %>. - definedBy: Zicntr + definedBy: + extension: + name: Zicntr type(): | if (SCOUNTENABLE_EN[0]) { return CsrFieldType::RW; @@ -39,7 +43,9 @@ fields: description: | When both `scounteren.TM` and `mcounteren.TM` are set, the `time` CSR (an alias of `mtime` memory-mapped CSR) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.TM`)<% end %>. - definedBy: Zicntr + definedBy: + extension: + name: Zicntr type(): | if (SCOUNTENABLE_EN[1]) { return CsrFieldType::RW; @@ -57,7 +63,9 @@ fields: description: | When both `scounteren.IR` and `mcounteren.IR` are set, the `instret` CSR (an alias of memory-mapped `minstret`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.IR`)<% end %>. - definedBy: Zicntr + definedBy: + extension: + name: Zicntr type(): | if (SCOUNTENABLE_EN[2]) { return CsrFieldType::RW; @@ -76,7 +84,9 @@ fields: When both `scounteren.HPM3` and `mcounteren.HPM3` are set, the `hpmcounter3` CSR (an alias of `mhpmcounter3`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM3`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[3]) { return CsrFieldType::RW; @@ -95,7 +105,9 @@ fields: When both `scounteren.HPM4` and `mcounteren.HPM4` are set, the `hpmcounter4` CSR (an alias of `mhpmcounter4`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM4`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[4]) { return CsrFieldType::RW; @@ -114,7 +126,9 @@ fields: When both `scounteren.HPM5` and `mcounteren.HPM5` are set, the `hpmcounter5` CSR (an alias of `mhpmcounter5`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM5`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[5]) { return CsrFieldType::RW; @@ -133,7 +147,9 @@ fields: When both `scounteren.HPM6` and `mcounteren.HPM6` are set, the `hpmcounter6` CSR (an alias of `mhpmcounter6`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM6`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[6]) { return CsrFieldType::RW; @@ -152,7 +168,9 @@ fields: When both `scounteren.HPM7` and `mcounteren.HPM7` are set, the `hpmcounter7` CSR (an alias of `mhpmcounter7`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM7`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[7]) { return CsrFieldType::RW; @@ -171,7 +189,9 @@ fields: When both `scounteren.HPM8` and `mcounteren.HPM8` are set, the `hpmcounter8` CSR (an alias of `mhpmcounter8`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM8`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[8]) { return CsrFieldType::RW; @@ -190,7 +210,9 @@ fields: When both `scounteren.HPM9` and `mcounteren.HPM9` are set, the `hpmcounter9` CSR (an alias of `mhpmcounter9`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM9`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[9]) { return CsrFieldType::RW; @@ -209,7 +231,9 @@ fields: When both `scounteren.HPM10` and `mcounteren.HPM10` are set, the `hpmcounter10` CSR (an alias of `mhpmcounter10`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM10`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[10]) { return CsrFieldType::RW; @@ -228,7 +252,9 @@ fields: When both `scounteren.HPM11` and `mcounteren.HPM11` are set, the `hpmcounter11` CSR (an alias of `mhpmcounter11`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM11`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[11]) { return CsrFieldType::RW; @@ -247,7 +273,9 @@ fields: When both `scounteren.HPM12` and `mcounteren.HPM12` are set, the `hpmcounter12` CSR (an alias of `mhpmcounter12`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM12`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[12]) { return CsrFieldType::RW; @@ -266,7 +294,9 @@ fields: When both `scounteren.HPM13` and `mcounteren.HPM13` are set, the `hpmcounter13` CSR (an alias of `mhpmcounter13`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM13`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[13]) { return CsrFieldType::RW; @@ -285,7 +315,9 @@ fields: When both `scounteren.HPM14` and `mcounteren.HPM14` are set, the `hpmcounter14` CSR (an alias of `mhpmcounter14`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM14`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[14]) { return CsrFieldType::RW; @@ -304,7 +336,9 @@ fields: When both `scounteren.HPM15` and `mcounteren.HPM15` are set, the `hpmcounter15` CSR (an alias of `mhpmcounter15`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM15`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[15]) { return CsrFieldType::RW; @@ -323,7 +357,9 @@ fields: When both `scounteren.HPM16` and `mcounteren.HPM16` are set, the `hpmcounter16` CSR (an alias of `mhpmcounter16`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM16`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[16]) { return CsrFieldType::RW; @@ -342,7 +378,9 @@ fields: When both `scounteren.HPM17` and `mcounteren.HPM17` are set, the `hpmcounter17` CSR (an alias of `mhpmcounter17`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM17`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[17]) { return CsrFieldType::RW; @@ -361,7 +399,9 @@ fields: When both `scounteren.HPM18` and `mcounteren.HPM18` are set, the `hpmcounter18` CSR (an alias of `mhpmcounter18`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM18`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[18]) { return CsrFieldType::RW; @@ -380,7 +420,9 @@ fields: When both `scounteren.HPM19` and `mcounteren.HPM19` are set, the `hpmcounter19` CSR (an alias of `mhpmcounter19`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM19`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[19]) { return CsrFieldType::RW; @@ -399,7 +441,9 @@ fields: When both `scounteren.HPM20` and `mcounteren.HPM20` are set, the `hpmcounter20` CSR (an alias of `mhpmcounter20`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM20`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[20]) { return CsrFieldType::RW; @@ -418,7 +462,9 @@ fields: When both `scounteren.HPM21` and `mcounteren.HPM21` are set, the `hpmcounter21` CSR (an alias of `mhpmcounter21`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM21`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[21]) { return CsrFieldType::RW; @@ -437,7 +483,9 @@ fields: When both `scounteren.HPM22` and `mcounteren.HPM22` are set, the `hpmcounter22` CSR (an alias of `mhpmcounter22`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM22`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[22]) { return CsrFieldType::RW; @@ -456,7 +504,9 @@ fields: When both `scounteren.HPM23` and `mcounteren.HPM23` are set, the `hpmcounter23` CSR (an alias of `mhpmcounter23`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM23`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[23]) { return CsrFieldType::RW; @@ -475,7 +525,9 @@ fields: When both `scounteren.HPM24` and `mcounteren.HPM24` are set, the `hpmcounter24` CSR (an alias of `mhpmcounter24`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM24`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[24]) { return CsrFieldType::RW; @@ -494,7 +546,9 @@ fields: When both `scounteren.HPM25` and `mcounteren.HPM25` are set, the `hpmcounter25` CSR (an alias of `mhpmcounter25`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM25`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[25]) { return CsrFieldType::RW; @@ -513,7 +567,9 @@ fields: When both `scounteren.HPM26` and `mcounteren.HPM26` are set, the `hpmcounter26` CSR (an alias of `mhpmcounter26`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM26`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[26]) { return CsrFieldType::RW; @@ -532,7 +588,9 @@ fields: When both `scounteren.HPM27` and `mcounteren.HPM27` are set, the `hpmcounter27` CSR (an alias of `mhpmcounter27`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM27`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[27]) { return CsrFieldType::RW; @@ -551,7 +609,9 @@ fields: When both `scounteren.HPM28` and `mcounteren.HPM28` are set, the `hpmcounter28` CSR (an alias of `mhpmcounter28`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM28`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[28]) { return CsrFieldType::RW; @@ -570,7 +630,9 @@ fields: When both `scounteren.HPM29` and `mcounteren.HPM29` are set, the `hpmcounter29` CSR (an alias of `mhpmcounter29`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM29`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[29]) { return CsrFieldType::RW; @@ -589,7 +651,9 @@ fields: When both `scounteren.HPM30` and `mcounteren.HPM30` are set, the `hpmcounter30` CSR (an alias of `mhpmcounter30`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM30`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[30]) { return CsrFieldType::RW; @@ -608,7 +672,9 @@ fields: When both `scounteren.HPM31` and `mcounteren.HPM31` are set, the `hpmcounter31` CSR (an alias of `mhpmcounter31`) is accessible to U-mode <% if ext?(:H) %>(delegation to VS/VU mode is further handled by `hcounteren.HPM31`)<% end %>. - definedBy: Zihpm + definedBy: + extension: + name: Zihpm type(): | if (SCOUNTENABLE_EN[31]) { return CsrFieldType::RW; diff --git a/spec/std/isa/csr/Smcntrpmf/mcyclecfg.yaml b/spec/std/isa/csr/Smcntrpmf/mcyclecfg.yaml index ede8e1a3d..e351eecd3 100644 --- a/spec/std/isa/csr/Smcntrpmf/mcyclecfg.yaml +++ b/spec/std/isa/csr/Smcntrpmf/mcyclecfg.yaml @@ -9,7 +9,9 @@ long_name: Machine Cycle Counter Configuration address: 0x321 priv_mode: M length: 64 -definedBy: Smcntrpmf +definedBy: + extension: + name: Smcntrpmf description: | The `mcyclecfg` CSR is a 64-bit machine-level register that configures privilege mode filtering for the cycle counter. Each inhibit bit (xINH) suppresses @@ -42,7 +44,9 @@ fields: location: 62 base: 64 type: RW - definedBy: M + definedBy: + extension: + name: M description: If set, then counting of events in M-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -50,7 +54,9 @@ fields: location: 61 base: 64 type: RW - definedBy: S + definedBy: + extension: + name: S description: If set, then counting of events in S/HS-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -58,7 +64,9 @@ fields: location: 60 base: 64 type: RW - definedBy: U + definedBy: + extension: + name: U description: If set, then counting of events in U-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -66,7 +74,9 @@ fields: location: 59 base: 64 type: RW - definedBy: H + definedBy: + extension: + name: H description: If set, then counting of events in VS-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -74,6 +84,8 @@ fields: location: 58 base: 64 type: RW - definedBy: H + definedBy: + extension: + name: H description: If set, then counting of events in VU-mode is inhibited. reset_value: UNDEFINED_LEGAL diff --git a/spec/std/isa/csr/Smcntrpmf/mcyclecfgh.yaml b/spec/std/isa/csr/Smcntrpmf/mcyclecfgh.yaml index 42a764b95..c8683b24e 100644 --- a/spec/std/isa/csr/Smcntrpmf/mcyclecfgh.yaml +++ b/spec/std/isa/csr/Smcntrpmf/mcyclecfgh.yaml @@ -9,7 +9,9 @@ long_name: Machine Cycle Counter Configuration High address: 0x721 priv_mode: M length: 32 -definedBy: Smcntrpmf +definedBy: + extension: + name: Smcntrpmf description: | Upper 32 bits of the 64-bit `mcyclecfg` CSR, used for RV32 systems to access the privilege mode filtering inhibit bits. @@ -19,7 +21,9 @@ fields: alias: mcyclecfg.MINH location: 30 type: RW - definedBy: M + definedBy: + extension: + name: M description: If set, then counting of events in M-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -27,7 +31,9 @@ fields: alias: mcyclecfg.SINH location: 29 type: RW - definedBy: S + definedBy: + extension: + name: S description: If set, then counting of events in S/HS-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -35,7 +41,9 @@ fields: alias: mcyclecfg.UINH location: 28 type: RW - definedBy: U + definedBy: + extension: + name: U description: If set, then counting of events in U-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -43,7 +51,9 @@ fields: alias: mcyclecfg.VSINH location: 27 type: RW - definedBy: H + definedBy: + extension: + name: H description: If set, then counting of events in VS-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -51,6 +61,8 @@ fields: alias: mcyclecfg.VUINH location: 26 type: RW - definedBy: H + definedBy: + extension: + name: H description: If set, then counting of events in VU-mode is inhibited. reset_value: UNDEFINED_LEGAL diff --git a/spec/std/isa/csr/Smcntrpmf/minstretcfg.yaml b/spec/std/isa/csr/Smcntrpmf/minstretcfg.yaml index 63dcb4743..669c0d39c 100644 --- a/spec/std/isa/csr/Smcntrpmf/minstretcfg.yaml +++ b/spec/std/isa/csr/Smcntrpmf/minstretcfg.yaml @@ -10,7 +10,9 @@ long_name: Machine Instructions-Retired Counter Configuration address: 0x322 priv_mode: M length: 64 -definedBy: Smcntrpmf +definedBy: + extension: + name: Smcntrpmf description: | The `minstretcfg` CSR is a 64-bit machine-level register that configures privilege mode filtering for the `minstret` (Machine Instructions-Retired Counter). Each inhibit bit (xINH) @@ -39,7 +41,9 @@ fields: location: 62 base: 64 type: RW - definedBy: M + definedBy: + extension: + name: M description: If set, then counting of events in M-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -47,7 +51,9 @@ fields: location: 61 base: 64 type: RW - definedBy: S + definedBy: + extension: + name: S description: If set, then counting of events in S/HS-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -55,7 +61,9 @@ fields: location: 60 base: 64 type: RW - definedBy: U + definedBy: + extension: + name: U description: If set, then counting of events in U-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -63,7 +71,9 @@ fields: location: 59 base: 64 type: RW - definedBy: H + definedBy: + extension: + name: H description: If set, then counting of events in VS-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -71,6 +81,8 @@ fields: location: 58 base: 64 type: RW - definedBy: H + definedBy: + extension: + name: H description: If set, then counting of events in VU-mode is inhibited. reset_value: UNDEFINED_LEGAL diff --git a/spec/std/isa/csr/Smcntrpmf/minstretcfgh.yaml b/spec/std/isa/csr/Smcntrpmf/minstretcfgh.yaml index 4cedea673..3f1ec735f 100644 --- a/spec/std/isa/csr/Smcntrpmf/minstretcfgh.yaml +++ b/spec/std/isa/csr/Smcntrpmf/minstretcfgh.yaml @@ -9,7 +9,9 @@ long_name: Machine Instructions-Retired Counter Configuration High address: 0x722 priv_mode: M length: 32 -definedBy: Smcntrpmf +definedBy: + extension: + name: Smcntrpmf description: | Upper 32 bits of the 64-bit `minstretcfg` CSR, used on RV32 systems to access privilege mode filtering inhibit bits for instruction retirement. @@ -19,7 +21,9 @@ fields: alias: minstretcfg.MINH location: 30 type: RW - definedBy: M + definedBy: + extension: + name: M description: If set, then counting of events in M-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -27,7 +31,9 @@ fields: alias: minstretcfg.SINH location: 29 type: RW - definedBy: S + definedBy: + extension: + name: S description: If set, then counting of events in S/HS-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -35,7 +41,9 @@ fields: alias: minstretcfg.UINH location: 28 type: RW - definedBy: U + definedBy: + extension: + name: U description: If set, then counting of events in U-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -43,7 +51,9 @@ fields: alias: minstretcfg.VSINH location: 27 type: RW - definedBy: H + definedBy: + extension: + name: H description: If set, then counting of events in VS-mode is inhibited. reset_value: UNDEFINED_LEGAL @@ -51,6 +61,8 @@ fields: alias: minstretcfg.VUINH location: 26 type: RW - definedBy: H + definedBy: + extension: + name: H description: If set, then counting of events in VU-mode is inhibited. reset_value: UNDEFINED_LEGAL diff --git a/spec/std/isa/csr/Smcsrind/mireg.yaml b/spec/std/isa/csr/Smcsrind/mireg.yaml index 803d99aca..966d26e1d 100644 --- a/spec/std/isa/csr/Smcsrind/mireg.yaml +++ b/spec/std/isa/csr/Smcsrind/mireg.yaml @@ -9,7 +9,9 @@ long_name: Machine Indirect Register Alias address: 0x351 priv_mode: M length: MXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-mireg-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/mireg2.yaml b/spec/std/isa/csr/Smcsrind/mireg2.yaml index 4c9b585cb..01f480a66 100644 --- a/spec/std/isa/csr/Smcsrind/mireg2.yaml +++ b/spec/std/isa/csr/Smcsrind/mireg2.yaml @@ -9,7 +9,9 @@ long_name: Machine Indirect Register Alias 2 address: 0x352 priv_mode: M length: MXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-mireg2-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/mireg3.yaml b/spec/std/isa/csr/Smcsrind/mireg3.yaml index ac3d101e8..0f93d639d 100644 --- a/spec/std/isa/csr/Smcsrind/mireg3.yaml +++ b/spec/std/isa/csr/Smcsrind/mireg3.yaml @@ -9,7 +9,9 @@ long_name: Machine Indirect Register Alias 3 address: 0x353 priv_mode: M length: MXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-mireg3-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/mireg4.yaml b/spec/std/isa/csr/Smcsrind/mireg4.yaml index 66a5dfca0..1a21189be 100644 --- a/spec/std/isa/csr/Smcsrind/mireg4.yaml +++ b/spec/std/isa/csr/Smcsrind/mireg4.yaml @@ -9,7 +9,9 @@ long_name: Machine Indirect Register Alias 4 address: 0x355 priv_mode: M length: MXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-mireg4-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/mireg5.yaml b/spec/std/isa/csr/Smcsrind/mireg5.yaml index 82defb806..335ed2952 100644 --- a/spec/std/isa/csr/Smcsrind/mireg5.yaml +++ b/spec/std/isa/csr/Smcsrind/mireg5.yaml @@ -9,7 +9,9 @@ long_name: Machine Indirect Register Alias 5 address: 0x356 priv_mode: M length: MXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-mireg5-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/mireg6.yaml b/spec/std/isa/csr/Smcsrind/mireg6.yaml index 9f8dd5984..02d25b3d9 100644 --- a/spec/std/isa/csr/Smcsrind/mireg6.yaml +++ b/spec/std/isa/csr/Smcsrind/mireg6.yaml @@ -9,7 +9,9 @@ long_name: Machine Indirect Register Alias 6 address: 0x357 priv_mode: M length: MXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-mireg6-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/miselect.yaml b/spec/std/isa/csr/Smcsrind/miselect.yaml index a3c2d35bb..4f8254565 100644 --- a/spec/std/isa/csr/Smcsrind/miselect.yaml +++ b/spec/std/isa/csr/Smcsrind/miselect.yaml @@ -9,7 +9,9 @@ long_name: Machine Indirect Register Select address: 0x350 priv_mode: M length: MXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-miselect-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/sireg.yaml b/spec/std/isa/csr/Smcsrind/sireg.yaml index 3850cf8d2..3173093b9 100644 --- a/spec/std/isa/csr/Smcsrind/sireg.yaml +++ b/spec/std/isa/csr/Smcsrind/sireg.yaml @@ -9,7 +9,9 @@ long_name: Supervisor Indirect Register Alias address: 0x151 priv_mode: S length: SXLEN -definedBy: Sscsrind +definedBy: + extension: + name: Sscsrind description: - id: csr-sireg-behavior-implemented normative: true @@ -60,7 +62,9 @@ fields: description: - id: csr-sireg-value-desc normative: true - text: The data read from or written to the register selected by the current `siselect` value. + text: + The data read from or written to the register selected by the current + `siselect` value. reset_value: UNDEFINED_LEGAL sw_write(csr_value): | Csr handle = indirect_csr_lookup(CSR[siselect].VALUE, 1); diff --git a/spec/std/isa/csr/Smcsrind/sireg2.yaml b/spec/std/isa/csr/Smcsrind/sireg2.yaml index e8bcaefe7..cc7afd11f 100644 --- a/spec/std/isa/csr/Smcsrind/sireg2.yaml +++ b/spec/std/isa/csr/Smcsrind/sireg2.yaml @@ -9,7 +9,9 @@ long_name: Supervisor Indirect Register Alias 2 address: 0x152 priv_mode: S length: SXLEN -definedBy: Sscsrind +definedBy: + extension: + name: Sscsrind description: - id: csr-sireg2-behavior-implemented normative: true @@ -60,7 +62,9 @@ fields: description: - id: csr-sireg2-value-desc normative: true - text: The data read from or written to the register selected by the current `siselect` value. + text: + The data read from or written to the register selected by the current + `siselect` value. reset_value: UNDEFINED_LEGAL sw_write(csr_value): | Csr handle = indirect_csr_lookup(CSR[siselect].VALUE, 2); diff --git a/spec/std/isa/csr/Smcsrind/sireg3.yaml b/spec/std/isa/csr/Smcsrind/sireg3.yaml index eba20c5b8..186be1ad9 100644 --- a/spec/std/isa/csr/Smcsrind/sireg3.yaml +++ b/spec/std/isa/csr/Smcsrind/sireg3.yaml @@ -9,7 +9,9 @@ long_name: Supervisor Indirect Register Alias 3 address: 0x153 priv_mode: S length: SXLEN -definedBy: Sscsrind +definedBy: + extension: + name: Sscsrind description: - id: csr-sireg3-behavior-implemented normative: true @@ -60,7 +62,9 @@ fields: description: - id: csr-sireg3-value-desc normative: true - text: The data read from or written to the register selected by the current `siselect` value. + text: + The data read from or written to the register selected by the current + `siselect` value. reset_value: UNDEFINED_LEGAL sw_write(csr_value): | Csr handle = indirect_csr_lookup(CSR[siselect].VALUE, 3); diff --git a/spec/std/isa/csr/Smcsrind/sireg4.yaml b/spec/std/isa/csr/Smcsrind/sireg4.yaml index 2151332c7..81e57a79f 100644 --- a/spec/std/isa/csr/Smcsrind/sireg4.yaml +++ b/spec/std/isa/csr/Smcsrind/sireg4.yaml @@ -9,7 +9,9 @@ long_name: Supervisor Indirect Register Alias 4 address: 0x155 priv_mode: S length: SXLEN -definedBy: Sscsrind +definedBy: + extension: + name: Sscsrind description: - id: csr-sireg4-behavior-implemented normative: true @@ -60,7 +62,9 @@ fields: description: - id: csr-sireg4-value-desc normative: true - text: The data read from or written to the register selected by the current `siselect` value. + text: + The data read from or written to the register selected by the current + `siselect` value. reset_value: UNDEFINED_LEGAL sw_write(csr_value): | Csr handle = indirect_csr_lookup(CSR[siselect].VALUE, 4); diff --git a/spec/std/isa/csr/Smcsrind/sireg5.yaml b/spec/std/isa/csr/Smcsrind/sireg5.yaml index 088cc6895..01a86a8c0 100644 --- a/spec/std/isa/csr/Smcsrind/sireg5.yaml +++ b/spec/std/isa/csr/Smcsrind/sireg5.yaml @@ -9,7 +9,9 @@ long_name: Supervisor Indirect Register Alias 5 address: 0x156 priv_mode: S length: SXLEN -definedBy: Sscsrind +definedBy: + extension: + name: Sscsrind description: - id: csr-sireg5-behavior-implemented normative: true @@ -60,7 +62,9 @@ fields: description: - id: csr-sireg5-value-desc normative: true - text: The data read from or written to the register selected by the current `siselect` value. + text: + The data read from or written to the register selected by the current + `siselect` value. reset_value: UNDEFINED_LEGAL sw_write(csr_value): | Csr handle = indirect_csr_lookup(CSR[siselect].VALUE, 5); diff --git a/spec/std/isa/csr/Smcsrind/sireg6.yaml b/spec/std/isa/csr/Smcsrind/sireg6.yaml index 9cba75cef..75904c5d6 100644 --- a/spec/std/isa/csr/Smcsrind/sireg6.yaml +++ b/spec/std/isa/csr/Smcsrind/sireg6.yaml @@ -9,7 +9,9 @@ long_name: Supervisor Indirect Register Alias 6 address: 0x157 priv_mode: S length: SXLEN -definedBy: Sscsrind +definedBy: + extension: + name: Sscsrind description: - id: csr-sireg6-behavior-implemented normative: true @@ -60,7 +62,9 @@ fields: description: - id: csr-sireg6-value-desc normative: true - text: The data read from or written to the register selected by the current `siselect` value. + text: + The data read from or written to the register selected by the current + `siselect` value. reset_value: UNDEFINED_LEGAL sw_write(csr_value): | Csr handle = indirect_csr_lookup(CSR[siselect].VALUE, 6); diff --git a/spec/std/isa/csr/Smcsrind/siselect.yaml b/spec/std/isa/csr/Smcsrind/siselect.yaml index a16bd7e0b..edc2e3e88 100644 --- a/spec/std/isa/csr/Smcsrind/siselect.yaml +++ b/spec/std/isa/csr/Smcsrind/siselect.yaml @@ -9,7 +9,9 @@ long_name: Supervisor Indirect Register Select address: 0x150 priv_mode: S length: SXLEN -definedBy: Sscsrind +definedBy: + extension: + name: Sscsrind description: - id: csr-siselect-value-range normative: true diff --git a/spec/std/isa/csr/Smcsrind/vsireg.yaml b/spec/std/isa/csr/Smcsrind/vsireg.yaml index 3c18e4d7c..abce16b4a 100644 --- a/spec/std/isa/csr/Smcsrind/vsireg.yaml +++ b/spec/std/isa/csr/Smcsrind/vsireg.yaml @@ -10,7 +10,9 @@ address: 0x251 virtual_address: 0x251 priv_mode: VS length: VSXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-vsireg-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/vsireg2.yaml b/spec/std/isa/csr/Smcsrind/vsireg2.yaml index 9b201725f..9d4bfcc6b 100644 --- a/spec/std/isa/csr/Smcsrind/vsireg2.yaml +++ b/spec/std/isa/csr/Smcsrind/vsireg2.yaml @@ -10,7 +10,9 @@ address: 0x252 virtual_address: 0x252 priv_mode: VS length: VSXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-vsireg2-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/vsireg3.yaml b/spec/std/isa/csr/Smcsrind/vsireg3.yaml index 42811be5d..f0adb7f92 100644 --- a/spec/std/isa/csr/Smcsrind/vsireg3.yaml +++ b/spec/std/isa/csr/Smcsrind/vsireg3.yaml @@ -10,7 +10,9 @@ address: 0x253 virtual_address: 0x253 priv_mode: VS length: VSXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-vsireg3-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/vsireg4.yaml b/spec/std/isa/csr/Smcsrind/vsireg4.yaml index a8dee9a7f..76415cfbe 100644 --- a/spec/std/isa/csr/Smcsrind/vsireg4.yaml +++ b/spec/std/isa/csr/Smcsrind/vsireg4.yaml @@ -10,7 +10,9 @@ address: 0x255 virtual_address: 0x255 priv_mode: VS length: VSXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-vsireg4-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/vsireg5.yaml b/spec/std/isa/csr/Smcsrind/vsireg5.yaml index 294baf6df..a79676a5e 100644 --- a/spec/std/isa/csr/Smcsrind/vsireg5.yaml +++ b/spec/std/isa/csr/Smcsrind/vsireg5.yaml @@ -10,7 +10,9 @@ address: 0x256 virtual_address: 0x256 priv_mode: VS length: VSXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-vsireg5-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/vsireg6.yaml b/spec/std/isa/csr/Smcsrind/vsireg6.yaml index 45fa12149..439eb744c 100644 --- a/spec/std/isa/csr/Smcsrind/vsireg6.yaml +++ b/spec/std/isa/csr/Smcsrind/vsireg6.yaml @@ -10,7 +10,9 @@ address: 0x257 virtual_address: 0x257 priv_mode: VS length: VSXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-vsireg6-purpose normative: true diff --git a/spec/std/isa/csr/Smcsrind/vsiselect.yaml b/spec/std/isa/csr/Smcsrind/vsiselect.yaml index 2b7c485b4..290bfc350 100644 --- a/spec/std/isa/csr/Smcsrind/vsiselect.yaml +++ b/spec/std/isa/csr/Smcsrind/vsiselect.yaml @@ -10,7 +10,9 @@ address: 0x250 virtual_address: 0x250 priv_mode: VS length: VSXLEN -definedBy: Smcsrind +definedBy: + extension: + name: Smcsrind description: - id: csr-vsiselect-range-minimum normative: true diff --git a/spec/std/isa/csr/Smrnmi/mncause.yaml b/spec/std/isa/csr/Smrnmi/mncause.yaml index 46c8f70f4..4fdd02dc4 100644 --- a/spec/std/isa/csr/Smrnmi/mncause.yaml +++ b/spec/std/isa/csr/Smrnmi/mncause.yaml @@ -11,7 +11,9 @@ address: 0x742 writable: true priv_mode: M length: MXLEN -definedBy: Smrnmi +definedBy: + extension: + name: Smrnmi description: | The mncause CSR holds the reason for the NMI. If the reason is an interrupt, bit MXLEN-1 is set to 1, and the NMI cause is encoded in diff --git a/spec/std/isa/csr/Smrnmi/mnepc.yaml b/spec/std/isa/csr/Smrnmi/mnepc.yaml index 1886a366f..c32c34eae 100644 --- a/spec/std/isa/csr/Smrnmi/mnepc.yaml +++ b/spec/std/isa/csr/Smrnmi/mnepc.yaml @@ -15,7 +15,9 @@ description: | Written with the PC of an instruction on an exception or interrupt taken in M-mode. Also controls where the hart jumps on an exception return from M-mode. -definedBy: Sm +definedBy: + extension: + name: Sm fields: PC: location_rv32: 31-0 diff --git a/spec/std/isa/csr/Smrnmi/mnscratch.yaml b/spec/std/isa/csr/Smrnmi/mnscratch.yaml index 59a7fb834..df873c34e 100644 --- a/spec/std/isa/csr/Smrnmi/mnscratch.yaml +++ b/spec/std/isa/csr/Smrnmi/mnscratch.yaml @@ -14,7 +14,9 @@ length: MXLEN description: Scratch register for software use in NMI / double trap. Bits are not interpreted by hardware. -definedBy: Smrnmi +definedBy: + extension: + name: Smrnmi fields: SCRATCH: location_rv32: 31-0 diff --git a/spec/std/isa/csr/Smrnmi/mnstatus.yaml b/spec/std/isa/csr/Smrnmi/mnstatus.yaml index 1d36040c9..b5de1a83a 100644 --- a/spec/std/isa/csr/Smrnmi/mnstatus.yaml +++ b/spec/std/isa/csr/Smrnmi/mnstatus.yaml @@ -16,7 +16,9 @@ length: MXLEN description: The mnstatus register tracks and controls the hart's current NMI operating state. -definedBy: Smrnmi +definedBy: + extension: + name: Smrnmi fields: MNPP: location: 12-11 @@ -69,7 +71,9 @@ fields: Can also be written by software. type: RW-H reset_value: UNDEFINED_LEGAL - definedBy: H + definedBy: + extension: + name: H NMIE: location: 3 description: | diff --git a/spec/std/isa/csr/Sscofpmf/scountovf.yaml b/spec/std/isa/csr/Sscofpmf/scountovf.yaml index 303efed8b..2106e833d 100644 --- a/spec/std/isa/csr/Sscofpmf/scountovf.yaml +++ b/spec/std/isa/csr/Sscofpmf/scountovf.yaml @@ -11,7 +11,9 @@ long_name: Supervisor Count Overflow address: 0xDA0 priv_mode: S length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf description: | A 32-bit read-only register that contains shadow copies of the OF bits in the 29 `mhpmevent` CSRs (`mhpmevent3` - `mhpmevent31`) — where `scountovf` bit X corresponds to `mhpmeventX`. diff --git a/spec/std/isa/csr/Ssqosid/srmcfg.yaml b/spec/std/isa/csr/Ssqosid/srmcfg.yaml index 3dfffe9ae..d3c14ee49 100644 --- a/spec/std/isa/csr/Ssqosid/srmcfg.yaml +++ b/spec/std/isa/csr/Ssqosid/srmcfg.yaml @@ -9,7 +9,9 @@ long_name: Supervisor Resource Management Configuration address: 0x181 priv_mode: S length: SXLEN -definedBy: Ssqosid +definedBy: + extension: + name: Ssqosid description: - id: csr-srmcfg-purpose normative: true diff --git a/spec/std/isa/csr/Zicntr/mcountinhibit.yaml b/spec/std/isa/csr/Zicntr/mcountinhibit.yaml index 165a6fbfc..806e83333 100644 --- a/spec/std/isa/csr/Zicntr/mcountinhibit.yaml +++ b/spec/std/isa/csr/Zicntr/mcountinhibit.yaml @@ -44,13 +44,16 @@ description: | ==== definedBy: - anyOf: - - name: Sm - - name: Smhpm + extension: + anyOf: + - name: Sm + - name: Smhpm fields: CY: location: 0 - definedBy: Sm + definedBy: + extension: + name: Sm description: When set, `mcycle.COUNT` stops counting in all privilege modes. type(): | return COUNTINHIBIT_EN[0] ? CsrFieldType::RW : CsrFieldType::RO; @@ -58,7 +61,9 @@ fields: return COUNTINHIBIT_EN[0] ? UNDEFINED_LEGAL : 0; IR: location: 2 - definedBy: Sm + definedBy: + extension: + name: Sm description: When set, `minstret.COUNT` stops counting in all privilege modes. type(): | return COUNTINHIBIT_EN[2] ? CsrFieldType::RW : CsrFieldType::RO; @@ -66,7 +71,9 @@ fields: return COUNTINHIBIT_EN[2] ? UNDEFINED_LEGAL : 0; HPM3: location: 3 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[3] == true"] When set, `hpmcounter3.COUNT` stops counting in all privilege modes. @@ -79,7 +86,9 @@ fields: return COUNTINHIBIT_EN[3] ? UNDEFINED_LEGAL : 0; HPM4: location: 4 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[4] == true"] When set, `hpmcounter4.COUNT` stops counting in all privilege modes. @@ -92,7 +101,9 @@ fields: return COUNTINHIBIT_EN[4] ? UNDEFINED_LEGAL : 0; HPM5: location: 5 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[5] == true"] When set, `hpmcounter5.COUNT` stops counting in all privilege modes. @@ -105,7 +116,9 @@ fields: return COUNTINHIBIT_EN[5] ? UNDEFINED_LEGAL : 0; HPM6: location: 6 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[6] == true"] When set, `hpmcounter6.COUNT` stops counting in all privilege modes. @@ -118,7 +131,9 @@ fields: return COUNTINHIBIT_EN[6] ? UNDEFINED_LEGAL : 0; HPM7: location: 7 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[7] == true"] When set, `hpmcounter7.COUNT` stops counting in all privilege modes. @@ -131,7 +146,9 @@ fields: return COUNTINHIBIT_EN[7] ? UNDEFINED_LEGAL : 0; HPM8: location: 8 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[8] == true"] When set, `hpmcounter8.COUNT` stops counting in all privilege modes. @@ -144,7 +161,9 @@ fields: return COUNTINHIBIT_EN[8] ? UNDEFINED_LEGAL : 0; HPM9: location: 9 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[9] == true"] When set, `hpmcounter9.COUNT` stops counting in all privilege modes. @@ -157,7 +176,9 @@ fields: return COUNTINHIBIT_EN[9] ? UNDEFINED_LEGAL : 0; HPM10: location: 10 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[10] == true"] When set, `hpmcounter10.COUNT` stops counting in all privilege modes. @@ -170,7 +191,9 @@ fields: return COUNTINHIBIT_EN[10] ? UNDEFINED_LEGAL : 0; HPM11: location: 11 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[11] == true"] When set, `hpmcounter11.COUNT` stops counting in all privilege modes. @@ -183,7 +206,9 @@ fields: return COUNTINHIBIT_EN[11] ? UNDEFINED_LEGAL : 0; HPM12: location: 12 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[12] == true"] When set, `hpmcounter12.COUNT` stops counting in all privilege modes. @@ -196,7 +221,9 @@ fields: return COUNTINHIBIT_EN[12] ? UNDEFINED_LEGAL : 0; HPM13: location: 13 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[13] == true"] When set, `hpmcounter13.COUNT` stops counting in all privilege modes. @@ -209,7 +236,9 @@ fields: return COUNTINHIBIT_EN[13] ? UNDEFINED_LEGAL : 0; HPM14: location: 14 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[14] == true"] When set, `hpmcounter14.COUNT` stops counting in all privilege modes. @@ -222,7 +251,9 @@ fields: return COUNTINHIBIT_EN[14] ? UNDEFINED_LEGAL : 0; HPM15: location: 15 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[15] == true"] When set, `hpmcounter15.COUNT` stops counting in all privilege modes. @@ -235,7 +266,9 @@ fields: return COUNTINHIBIT_EN[15] ? UNDEFINED_LEGAL : 0; HPM16: location: 16 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[16] == true"] When set, `hpmcounter16.COUNT` stops counting in all privilege modes. @@ -248,7 +281,9 @@ fields: return COUNTINHIBIT_EN[16] ? UNDEFINED_LEGAL : 0; HPM17: location: 17 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[17] == true"] When set, `hpmcounter17.COUNT` stops counting in all privilege modes. @@ -261,7 +296,9 @@ fields: return COUNTINHIBIT_EN[17] ? UNDEFINED_LEGAL : 0; HPM18: location: 18 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[18] == true"] When set, `hpmcounter18.COUNT` stops counting in all privilege modes. @@ -274,7 +311,9 @@ fields: return COUNTINHIBIT_EN[18] ? UNDEFINED_LEGAL : 0; HPM19: location: 19 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[19] == true"] When set, `hpmcounter19.COUNT` stops counting in all privilege modes. @@ -287,7 +326,9 @@ fields: return COUNTINHIBIT_EN[19] ? UNDEFINED_LEGAL : 0; HPM20: location: 20 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[20] == true"] When set, `hpmcounter20.COUNT` stops counting in all privilege modes. @@ -300,7 +341,9 @@ fields: return COUNTINHIBIT_EN[20] ? UNDEFINED_LEGAL : 0; HPM21: location: 21 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[21] == true"] When set, `hpmcounter21.COUNT` stops counting in all privilege modes. @@ -313,7 +356,9 @@ fields: return COUNTINHIBIT_EN[21] ? UNDEFINED_LEGAL : 0; HPM22: location: 22 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[22] == true"] When set, `hpmcounter22.COUNT` stops counting in all privilege modes. @@ -326,7 +371,9 @@ fields: return COUNTINHIBIT_EN[22] ? UNDEFINED_LEGAL : 0; HPM23: location: 23 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[23] == true"] When set, `hpmcounter23.COUNT` stops counting in all privilege modes. @@ -339,7 +386,9 @@ fields: return COUNTINHIBIT_EN[23] ? UNDEFINED_LEGAL : 0; HPM24: location: 24 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[24] == true"] When set, `hpmcounter24.COUNT` stops counting in all privilege modes. @@ -352,7 +401,9 @@ fields: return COUNTINHIBIT_EN[24] ? UNDEFINED_LEGAL : 0; HPM25: location: 25 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[25] == true"] When set, `hpmcounter25.COUNT` stops counting in all privilege modes. @@ -365,7 +416,9 @@ fields: return COUNTINHIBIT_EN[25] ? UNDEFINED_LEGAL : 0; HPM26: location: 26 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[26] == true"] When set, `hpmcounter26.COUNT` stops counting in all privilege modes. @@ -378,7 +431,9 @@ fields: return COUNTINHIBIT_EN[26] ? UNDEFINED_LEGAL : 0; HPM27: location: 27 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[27] == true"] When set, `hpmcounter27.COUNT` stops counting in all privilege modes. @@ -391,7 +446,9 @@ fields: return COUNTINHIBIT_EN[27] ? UNDEFINED_LEGAL : 0; HPM28: location: 28 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[28] == true"] When set, `hpmcounter28.COUNT` stops counting in all privilege modes. @@ -404,7 +461,9 @@ fields: return COUNTINHIBIT_EN[28] ? UNDEFINED_LEGAL : 0; HPM29: location: 29 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[29] == true"] When set, `hpmcounter29.COUNT` stops counting in all privilege modes. @@ -417,7 +476,9 @@ fields: return COUNTINHIBIT_EN[29] ? UNDEFINED_LEGAL : 0; HPM30: location: 30 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[30] == true"] When set, `hpmcounter30.COUNT` stops counting in all privilege modes. @@ -430,7 +491,9 @@ fields: return COUNTINHIBIT_EN[30] ? UNDEFINED_LEGAL : 0; HPM31: location: 31 - definedBy: Smhpm + definedBy: + extension: + name: Smhpm description: | [when="COUNTINHIBIT_EN[31] == true"] When set, `hpmcounter31.COUNT` stops counting in all privilege modes. diff --git a/spec/std/isa/csr/Zihpm/hpmcounter10.yaml b/spec/std/isa/csr/Zihpm/hpmcounter10.yaml index 16ce79865..361867e48 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter10.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter10.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter10h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter10h.yaml index 1904a7a51..4d333e6d6 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter10h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter10h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter11.yaml b/spec/std/isa/csr/Zihpm/hpmcounter11.yaml index db5c9855a..6d807fda1 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter11.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter11.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter11h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter11h.yaml index 05d89e6ee..47b1c6a55 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter11h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter11h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter12.yaml b/spec/std/isa/csr/Zihpm/hpmcounter12.yaml index a71ce781b..1a168c32a 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter12.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter12.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter12h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter12h.yaml index 76e87433d..2fba6b031 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter12h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter12h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter13.yaml b/spec/std/isa/csr/Zihpm/hpmcounter13.yaml index 23cb3ff2e..c075b535f 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter13.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter13.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter13h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter13h.yaml index 4433247f4..d4530513a 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter13h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter13h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter14.yaml b/spec/std/isa/csr/Zihpm/hpmcounter14.yaml index 1cb9917a5..f186d2713 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter14.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter14.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter14h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter14h.yaml index 77b6511de..b4ee004e4 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter14h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter14h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter15.yaml b/spec/std/isa/csr/Zihpm/hpmcounter15.yaml index 1eea1eee3..4f3da2144 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter15.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter15.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter15h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter15h.yaml index 2c58cd0c5..0188ce51a 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter15h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter15h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter16.yaml b/spec/std/isa/csr/Zihpm/hpmcounter16.yaml index c2cc62ca1..2f9db611e 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter16.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter16.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter16h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter16h.yaml index a05e7bb6c..0e71c2bdc 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter16h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter16h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter17.yaml b/spec/std/isa/csr/Zihpm/hpmcounter17.yaml index 2b086157e..58d2036a3 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter17.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter17.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter17h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter17h.yaml index e74a464b2..a20a061ec 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter17h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter17h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter18.yaml b/spec/std/isa/csr/Zihpm/hpmcounter18.yaml index 81859b24e..9232fed87 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter18.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter18.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter18h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter18h.yaml index 93b23b206..b339739e9 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter18h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter18h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter19.yaml b/spec/std/isa/csr/Zihpm/hpmcounter19.yaml index 4ee716fda..7fdad74d3 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter19.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter19.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter19h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter19h.yaml index 814f5eafd..b3a2cd762 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter19h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter19h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter20.yaml b/spec/std/isa/csr/Zihpm/hpmcounter20.yaml index 6efe13728..f244f8377 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter20.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter20.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter20h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter20h.yaml index 118bccf38..99add2af8 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter20h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter20h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter21.yaml b/spec/std/isa/csr/Zihpm/hpmcounter21.yaml index b1c889ada..d212ba1d0 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter21.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter21.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter21h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter21h.yaml index 4be633416..ef0ac2d07 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter21h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter21h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter22.yaml b/spec/std/isa/csr/Zihpm/hpmcounter22.yaml index 87d75190e..f4856f6e9 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter22.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter22.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter22h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter22h.yaml index e814bcaa6..3c44541d3 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter22h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter22h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter23.yaml b/spec/std/isa/csr/Zihpm/hpmcounter23.yaml index 1adbcc486..84dacef6c 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter23.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter23.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter23h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter23h.yaml index 543d08d25..2af5c5e2b 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter23h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter23h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter24.yaml b/spec/std/isa/csr/Zihpm/hpmcounter24.yaml index f7d50d42a..36cdff93d 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter24.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter24.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter24h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter24h.yaml index 2046a8466..cf2d79da9 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter24h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter24h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter25.yaml b/spec/std/isa/csr/Zihpm/hpmcounter25.yaml index 014077fa8..792b93cdf 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter25.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter25.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter25h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter25h.yaml index 6998d842b..e4f0c1262 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter25h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter25h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter26.yaml b/spec/std/isa/csr/Zihpm/hpmcounter26.yaml index b49ef2c9d..eefc8883c 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter26.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter26.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter26h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter26h.yaml index 2786ce0a2..7b82c1a3c 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter26h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter26h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter27.yaml b/spec/std/isa/csr/Zihpm/hpmcounter27.yaml index 3e33cedcd..3742fe8d8 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter27.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter27.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter27h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter27h.yaml index b3fea04b0..1c9440d6b 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter27h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter27h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter28.yaml b/spec/std/isa/csr/Zihpm/hpmcounter28.yaml index 6f6f644e4..3a18f1329 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter28.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter28.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter28h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter28h.yaml index 5e357f095..52c7df6b4 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter28h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter28h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter29.yaml b/spec/std/isa/csr/Zihpm/hpmcounter29.yaml index ab58a0467..681a20228 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter29.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter29.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter29h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter29h.yaml index 6b44497e5..d3bb63cf5 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter29h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter29h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter3.yaml b/spec/std/isa/csr/Zihpm/hpmcounter3.yaml index d45e3d311..3be3f8aca 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter3.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter3.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter30.yaml b/spec/std/isa/csr/Zihpm/hpmcounter30.yaml index 0d65cf816..7ac40c339 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter30.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter30.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter30h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter30h.yaml index fa2b3c27a..b50dbabe4 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter30h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter30h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter31.yaml b/spec/std/isa/csr/Zihpm/hpmcounter31.yaml index dafca3fc5..f96a817d3 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter31.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter31.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter31h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter31h.yaml index b6d5a58ac..9092ef46a 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter31h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter31h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter3h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter3h.yaml index 9192d4415..ce66b813b 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter3h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter3h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter4.yaml b/spec/std/isa/csr/Zihpm/hpmcounter4.yaml index f7b6396fc..2033aec2c 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter4.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter4.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter4h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter4h.yaml index fdc6f9916..70a934f6b 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter4h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter4h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter5.yaml b/spec/std/isa/csr/Zihpm/hpmcounter5.yaml index 1113f17dc..91b75d1cd 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter5.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter5.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter5h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter5h.yaml index c1422e018..cac5e904a 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter5h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter5h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter6.yaml b/spec/std/isa/csr/Zihpm/hpmcounter6.yaml index 326832b97..30ab88a30 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter6.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter6.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter6h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter6h.yaml index 0e43ba9e4..2b74fdcba 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter6h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter6h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter7.yaml b/spec/std/isa/csr/Zihpm/hpmcounter7.yaml index 614163273..7366a1474 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter7.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter7.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter7h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter7h.yaml index dc259a629..58e2cee48 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter7h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter7h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter8.yaml b/spec/std/isa/csr/Zihpm/hpmcounter8.yaml index 5c8e07649..104c4063c 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter8.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter8.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter8h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter8h.yaml index d4f8fb60f..d3f438755 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter8h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter8h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter9.yaml b/spec/std/isa/csr/Zihpm/hpmcounter9.yaml index 0551590f6..81dd89aa6 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter9.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter9.yaml @@ -58,7 +58,9 @@ description: | <%- end -%> priv_mode: U length: 64 -definedBy: Zihpm +definedBy: + extension: + name: Zihpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/hpmcounter9h.yaml b/spec/std/isa/csr/Zihpm/hpmcounter9h.yaml index 94a01a783..9c6ebd32f 100644 --- a/spec/std/isa/csr/Zihpm/hpmcounter9h.yaml +++ b/spec/std/isa/csr/Zihpm/hpmcounter9h.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter10.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter10.yaml index 4bbb77714..21e0a5176 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter10.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter10.yaml @@ -12,7 +12,9 @@ address: 0xB0A priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter10h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter10h.yaml index fd4a5ef0b..afafeae98 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter10h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter10h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter10. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter11.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter11.yaml index 4e4a2e001..188662b10 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter11.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter11.yaml @@ -12,7 +12,9 @@ address: 0xB0B priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter11h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter11h.yaml index c069c3260..c342ef654 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter11h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter11h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter11. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter12.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter12.yaml index 3e06930e8..e3a920a50 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter12.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter12.yaml @@ -12,7 +12,9 @@ address: 0xB0C priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter12h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter12h.yaml index 10f51542a..b7df45966 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter12h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter12h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter12. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter13.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter13.yaml index 41544164d..26b70897b 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter13.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter13.yaml @@ -12,7 +12,9 @@ address: 0xB0D priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter13h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter13h.yaml index a4889f5e2..0a6004b98 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter13h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter13h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter13. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter14.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter14.yaml index 080f14e86..79b495a7b 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter14.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter14.yaml @@ -12,7 +12,9 @@ address: 0xB0E priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter14h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter14h.yaml index 75e58ae7b..67da69c18 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter14h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter14h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter14. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter15.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter15.yaml index d5fc38941..87c383b96 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter15.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter15.yaml @@ -12,7 +12,9 @@ address: 0xB0F priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter15h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter15h.yaml index 811ebc6c4..719d71b93 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter15h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter15h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter15. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter16.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter16.yaml index 097296ba7..cadd652be 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter16.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter16.yaml @@ -12,7 +12,9 @@ address: 0xB10 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter16h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter16h.yaml index bf639139b..41a5de87f 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter16h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter16h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter16. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter17.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter17.yaml index 26a00483b..6614f1f25 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter17.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter17.yaml @@ -12,7 +12,9 @@ address: 0xB11 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter17h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter17h.yaml index d5f72444e..22c47a67b 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter17h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter17h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter17. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter18.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter18.yaml index b12257285..520364d4d 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter18.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter18.yaml @@ -12,7 +12,9 @@ address: 0xB12 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter18h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter18h.yaml index 0122cf28c..b76b60174 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter18h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter18h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter18. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter19.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter19.yaml index e65104d91..1279db420 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter19.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter19.yaml @@ -12,7 +12,9 @@ address: 0xB13 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter19h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter19h.yaml index 809a591df..49fd1fb1b 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter19h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter19h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter19. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter20.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter20.yaml index 000b4466d..565b9ddb8 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter20.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter20.yaml @@ -12,7 +12,9 @@ address: 0xB14 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter20h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter20h.yaml index 10e2f7b05..eae693f13 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter20h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter20h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter20. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter21.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter21.yaml index 803d5a71a..d83e7ee14 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter21.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter21.yaml @@ -12,7 +12,9 @@ address: 0xB15 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter21h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter21h.yaml index 00adaba90..d20df3aae 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter21h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter21h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter21. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter22.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter22.yaml index c5d399c42..ad42eee52 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter22.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter22.yaml @@ -12,7 +12,9 @@ address: 0xB16 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter22h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter22h.yaml index d6b208470..0279419f7 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter22h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter22h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter22. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter23.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter23.yaml index cc4e61b36..b562518d2 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter23.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter23.yaml @@ -12,7 +12,9 @@ address: 0xB17 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter23h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter23h.yaml index bef0a48c4..1f6f443ea 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter23h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter23h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter23. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter24.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter24.yaml index 957925a18..7b015a689 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter24.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter24.yaml @@ -12,7 +12,9 @@ address: 0xB18 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter24h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter24h.yaml index 3358bf0a9..3580c6ad6 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter24h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter24h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter24. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter25.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter25.yaml index 75dbbc51b..1e4beacc8 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter25.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter25.yaml @@ -12,7 +12,9 @@ address: 0xB19 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter25h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter25h.yaml index e4df3fdb4..e1607e6ae 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter25h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter25h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter25. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter26.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter26.yaml index fc1cd8fd6..438a46be1 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter26.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter26.yaml @@ -12,7 +12,9 @@ address: 0xB1A priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter26h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter26h.yaml index e82f8e7db..f23122d91 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter26h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter26h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter26. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter27.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter27.yaml index 5ef101482..cb58bba9d 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter27.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter27.yaml @@ -12,7 +12,9 @@ address: 0xB1B priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter27h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter27h.yaml index 914c9270f..78fb800a4 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter27h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter27h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter27. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter28.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter28.yaml index 0a4d880e1..3df6e0592 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter28.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter28.yaml @@ -12,7 +12,9 @@ address: 0xB1C priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter28h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter28h.yaml index a07f19a9b..dd7c1539f 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter28h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter28h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter28. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter29.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter29.yaml index a274aac94..692b23055 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter29.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter29.yaml @@ -12,7 +12,9 @@ address: 0xB1D priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter29h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter29h.yaml index 30a68559e..fb236926a 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter29h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter29h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter29. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter3.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter3.yaml index 6b1727d07..a1fdc7226 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter3.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter3.yaml @@ -12,7 +12,9 @@ address: 0xB03 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter30.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter30.yaml index 7d6476bba..4ab3ca075 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter30.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter30.yaml @@ -12,7 +12,9 @@ address: 0xB1E priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter30h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter30h.yaml index 92f22a0ac..aaade5074 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter30h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter30h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter30. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter31.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter31.yaml index 03422f484..5f4fd7127 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter31.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter31.yaml @@ -12,7 +12,9 @@ address: 0xB1F priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter31h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter31h.yaml index e43e6f443..a812f30b1 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter31h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter31h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter31. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter3h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter3h.yaml index 1d8aca337..e3ba4e174 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter3h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter3h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter3. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter4.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter4.yaml index c9490c91c..3e452fced 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter4.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter4.yaml @@ -12,7 +12,9 @@ address: 0xB04 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter4h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter4h.yaml index 31e49082b..78f3bcdbd 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter4h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter4h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter4. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter5.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter5.yaml index a0236dec6..c2319868b 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter5.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter5.yaml @@ -12,7 +12,9 @@ address: 0xB05 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter5h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter5h.yaml index 866272eaa..f3f2dc233 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter5h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter5h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter5. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter6.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter6.yaml index 2b1495fa1..ac50fe976 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter6.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter6.yaml @@ -12,7 +12,9 @@ address: 0xB06 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter6h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter6h.yaml index ada753563..4289e81b2 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter6h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter6h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter6. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter7.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter7.yaml index 7b0b1ff8c..e5f505552 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter7.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter7.yaml @@ -12,7 +12,9 @@ address: 0xB07 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter7h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter7h.yaml index 22e96d018..a5b8efcf1 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter7h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter7h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter7. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter8.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter8.yaml index 986e5ef87..da473c1a7 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter8.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter8.yaml @@ -12,7 +12,9 @@ address: 0xB08 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter8h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter8h.yaml index ca7f268ea..85b6343bd 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter8h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter8h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter8. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter9.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter9.yaml index ebd797734..6ecff1aac 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter9.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter9.yaml @@ -12,7 +12,9 @@ address: 0xB09 priv_mode: M length: 64 description: Programmable hardware performance counter. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmcounter9h.yaml b/spec/std/isa/csr/Zihpm/mhpmcounter9h.yaml index 0eb1db93b..d88fb51cd 100644 --- a/spec/std/isa/csr/Zihpm/mhpmcounter9h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmcounter9h.yaml @@ -14,7 +14,9 @@ length: 32 base: 32 description: | Upper half of mhpmcounter9. -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/Zihpm/mhpmevent10.yaml b/spec/std/isa/csr/Zihpm/mhpmevent10.yaml index 09969118b..218052f86 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent10.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent10.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter10 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter10 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter10 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter10 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter10 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter10`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent10h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent10h.yaml index 0948d9656..66f408723 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent10h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent10h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent10.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent10.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent10.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent10.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent10.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter10`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent11.yaml b/spec/std/isa/csr/Zihpm/mhpmevent11.yaml index 2a7dbc15d..534472ad0 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent11.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent11.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter11 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter11 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter11 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter11 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter11 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter11`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent11h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent11h.yaml index f5af0fc10..4898cb479 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent11h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent11h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent11.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent11.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent11.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent11.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent11.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter11`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent12.yaml b/spec/std/isa/csr/Zihpm/mhpmevent12.yaml index 632c99b97..e004c8b8a 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent12.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent12.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter12 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter12 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter12 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter12 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter12 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter12`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent12h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent12h.yaml index 2504b5dc5..f96b8bb5b 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent12h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent12h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent12.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent12.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent12.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent12.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent12.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter12`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent13.yaml b/spec/std/isa/csr/Zihpm/mhpmevent13.yaml index 38576c5bc..ac1d98ed1 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent13.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent13.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter13 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter13 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter13 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter13 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter13 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter13`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent13h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent13h.yaml index 8a30059a4..52e75b1c6 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent13h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent13h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent13.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent13.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent13.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent13.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent13.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter13`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent14.yaml b/spec/std/isa/csr/Zihpm/mhpmevent14.yaml index 76e18bd46..ae6127c52 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent14.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent14.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter14 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter14 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter14 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter14 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter14 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter14`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent14h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent14h.yaml index 54d4425e0..c89bacbdc 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent14h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent14h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent14.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent14.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent14.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent14.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent14.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter14`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent15.yaml b/spec/std/isa/csr/Zihpm/mhpmevent15.yaml index 50298e903..d97ff2161 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent15.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent15.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter15 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter15 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter15 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter15 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter15 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter15`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent15h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent15h.yaml index 3b3b974d6..05f36e612 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent15h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent15h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent15.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent15.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent15.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent15.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent15.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter15`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent16.yaml b/spec/std/isa/csr/Zihpm/mhpmevent16.yaml index 4479002ad..39eaf65a9 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent16.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent16.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter16 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter16 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter16 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter16 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter16 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter16`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent16h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent16h.yaml index 268d77eeb..1640522c0 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent16h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent16h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent16.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent16.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent16.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent16.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent16.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter16`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent17.yaml b/spec/std/isa/csr/Zihpm/mhpmevent17.yaml index 00b8b9083..1265a4a06 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent17.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent17.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter17 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter17 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter17 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter17 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter17 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter17`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent17h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent17h.yaml index 7391d292a..c1e9bedba 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent17h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent17h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent17.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent17.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent17.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent17.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent17.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter17`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent18.yaml b/spec/std/isa/csr/Zihpm/mhpmevent18.yaml index 593ededbf..34da58a68 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent18.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent18.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter18 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter18 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter18 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter18 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter18 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter18`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent18h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent18h.yaml index 8bd0288cf..741e78256 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent18h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent18h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent18.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent18.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent18.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent18.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent18.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter18`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent19.yaml b/spec/std/isa/csr/Zihpm/mhpmevent19.yaml index b4d8192db..b9ac65a73 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent19.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent19.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter19 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter19 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter19 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter19 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter19 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter19`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent19h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent19h.yaml index 29eee51b0..1d57e2d6a 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent19h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent19h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent19.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent19.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent19.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent19.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent19.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter19`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent20.yaml b/spec/std/isa/csr/Zihpm/mhpmevent20.yaml index d03da405e..56c5ff7ca 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent20.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent20.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter20 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter20 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter20 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter20 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter20 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter20`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent20h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent20h.yaml index 5d0b60245..594fd2e2e 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent20h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent20h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent20.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent20.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent20.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent20.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent20.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter20`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent21.yaml b/spec/std/isa/csr/Zihpm/mhpmevent21.yaml index b5c2af07d..f91f4ea28 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent21.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent21.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter21 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter21 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter21 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter21 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter21 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter21`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent21h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent21h.yaml index db9059f3b..7eda0b7d1 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent21h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent21h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent21.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent21.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent21.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent21.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent21.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter21`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent22.yaml b/spec/std/isa/csr/Zihpm/mhpmevent22.yaml index 14ca0f663..aa82c162f 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent22.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent22.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter22 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter22 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter22 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter22 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter22 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter22`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent22h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent22h.yaml index eaf74703b..73c627220 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent22h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent22h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent22.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent22.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent22.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent22.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent22.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter22`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent23.yaml b/spec/std/isa/csr/Zihpm/mhpmevent23.yaml index 7fd4d6603..d162e702b 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent23.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent23.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter23 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter23 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter23 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter23 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter23 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter23`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent23h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent23h.yaml index 85e268cad..d35f5ae2d 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent23h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent23h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent23.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent23.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent23.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent23.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent23.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter23`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent24.yaml b/spec/std/isa/csr/Zihpm/mhpmevent24.yaml index 1d27dcefb..e4bc7f3fb 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent24.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent24.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter24 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter24 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter24 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter24 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter24 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter24`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent24h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent24h.yaml index 64c556586..2c265ad38 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent24h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent24h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent24.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent24.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent24.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent24.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent24.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter24`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent25.yaml b/spec/std/isa/csr/Zihpm/mhpmevent25.yaml index a00130563..1df2d20ba 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent25.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent25.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter25 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter25 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter25 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter25 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter25 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter25`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent25h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent25h.yaml index 25b72fb6e..ef363893c 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent25h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent25h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent25.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent25.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent25.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent25.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent25.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter25`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent26.yaml b/spec/std/isa/csr/Zihpm/mhpmevent26.yaml index 07913a9db..5f27b2a81 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent26.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent26.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter26 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter26 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter26 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter26 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter26 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter26`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent26h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent26h.yaml index 21bb5835e..003591235 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent26h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent26h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent26.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent26.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent26.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent26.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent26.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter26`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent27.yaml b/spec/std/isa/csr/Zihpm/mhpmevent27.yaml index a104747b1..ebd4a8a75 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent27.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent27.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter27 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter27 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter27 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter27 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter27 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter27`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent27h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent27h.yaml index 387d1ba74..0038c7448 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent27h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent27h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent27.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent27.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent27.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent27.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent27.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter27`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent28.yaml b/spec/std/isa/csr/Zihpm/mhpmevent28.yaml index 38d85fe0d..d67075e8e 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent28.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent28.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter28 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter28 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter28 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter28 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter28 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter28`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent28h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent28h.yaml index 0eedb9c0b..a34d930e7 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent28h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent28h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent28.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent28.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent28.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent28.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent28.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter28`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent29.yaml b/spec/std/isa/csr/Zihpm/mhpmevent29.yaml index 41b100095..9b12e1b78 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent29.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent29.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter29 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter29 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter29 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter29 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter29 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter29`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent29h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent29h.yaml index a02326791..fcb6d328a 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent29h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent29h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent29.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent29.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent29.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent29.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent29.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter29`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent3.yaml b/spec/std/isa/csr/Zihpm/mhpmevent3.yaml index 6d5c5c17e..b2a084bff 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent3.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent3.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter3 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter3 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter3 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter3 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter3 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter3`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent30.yaml b/spec/std/isa/csr/Zihpm/mhpmevent30.yaml index 38bfd75ae..0211cb8da 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent30.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent30.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter30 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter30 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter30 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter30 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter30 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter30`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent30h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent30h.yaml index c1bdf5265..9c1867253 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent30h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent30h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent30.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent30.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent30.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent30.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent30.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter30`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent31.yaml b/spec/std/isa/csr/Zihpm/mhpmevent31.yaml index 7410e9379..9e8b7f07a 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent31.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent31.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter31 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter31 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter31 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter31 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter31 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter31`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent31h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent31h.yaml index d55209f4e..e72d4f7c5 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent31h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent31h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent31.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent31.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent31.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent31.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent31.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter31`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent3h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent3h.yaml index 14fe4a607..cab7e915f 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent3h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent3h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent3.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent3.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent3.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent3.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent3.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter3`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent4.yaml b/spec/std/isa/csr/Zihpm/mhpmevent4.yaml index aa3bd3e86..eec674ff3 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent4.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent4.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter4 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter4 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter4 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter4 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter4 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter4`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent4h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent4h.yaml index e3494f0bb..a400b1745 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent4h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent4h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent4.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent4.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent4.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent4.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent4.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter4`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent5.yaml b/spec/std/isa/csr/Zihpm/mhpmevent5.yaml index 039e50e65..ade4d6d11 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent5.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent5.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter5 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter5 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter5 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter5 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter5 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter5`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent5h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent5h.yaml index d7c2ea5ec..55a4bda54 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent5h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent5h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent5.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent5.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent5.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent5.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent5.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter5`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent6.yaml b/spec/std/isa/csr/Zihpm/mhpmevent6.yaml index 0636a2dfd..6d0d2fdca 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent6.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent6.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter6 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter6 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter6 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter6 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter6 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter6`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent6h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent6h.yaml index a84938aad..0cc635e19 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent6h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent6h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent6.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent6.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent6.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent6.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent6.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter6`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent7.yaml b/spec/std/isa/csr/Zihpm/mhpmevent7.yaml index 3663fbe54..a16a6b80c 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent7.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent7.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter7 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter7 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter7 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter7 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter7 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter7`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent7h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent7h.yaml index 4ade0c79d..0b6bfa0e0 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent7h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent7h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent7.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent7.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent7.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent7.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent7.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter7`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent8.yaml b/spec/std/isa/csr/Zihpm/mhpmevent8.yaml index 22a1fcd10..e43e0aaf3 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent8.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent8.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter8 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter8 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter8 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter8 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter8 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter8`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent8h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent8h.yaml index abdf46fc7..43cbc6e31 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent8h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent8h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent8.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent8.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent8.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent8.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent8.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter8`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent9.yaml b/spec/std/isa/csr/Zihpm/mhpmevent9.yaml index fccf6abe1..52790c033 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent9.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent9.yaml @@ -14,7 +14,9 @@ length: 64 description: | Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -41,7 +43,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter9 does not increment while the hart in operating in M-mode. @@ -57,7 +61,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter9 does not increment while the hart in operating in (H)S-mode. @@ -74,7 +80,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter9 does not increment while the hart in operating in U-mode. @@ -91,7 +100,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter9 does not increment while the hart in operating in VS-mode. @@ -108,7 +120,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter9 does not increment while the hart in operating in VU-mode. @@ -125,7 +140,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter9`. diff --git a/spec/std/isa/csr/Zihpm/mhpmevent9h.yaml b/spec/std/isa/csr/Zihpm/mhpmevent9h.yaml index c933068b2..a8cb0bac3 100644 --- a/spec/std/isa/csr/Zihpm/mhpmevent9h.yaml +++ b/spec/std/isa/csr/Zihpm/mhpmevent9h.yaml @@ -17,7 +17,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -36,7 +38,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent9.MINH @@ -54,7 +58,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent9.SINH @@ -72,7 +78,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent9.UINH @@ -90,7 +98,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent9.VSINH @@ -108,7 +118,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent9.VUINH @@ -126,7 +138,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter9`. diff --git a/spec/std/isa/csr/Zihpm/mhpmeventN.layout b/spec/std/isa/csr/Zihpm/mhpmeventN.layout index 6d1b6c48a..62112e095 100644 --- a/spec/std/isa/csr/Zihpm/mhpmeventN.layout +++ b/spec/std/isa/csr/Zihpm/mhpmeventN.layout @@ -15,7 +15,9 @@ length: 64 description: | Programmable hardware performance counter event selector <%% if ext?(:Sscofpmf) %> and overflow/filtering control<%% end %> -definedBy: Smhpm +definedBy: + extension: + name: Smhpm fields: OF: location: 63 @@ -42,7 +44,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 62 description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in M-mode. @@ -58,7 +62,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 61 description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in (H)S-mode. @@ -75,7 +81,10 @@ fields: return 0; } definedBy: - allOf: [S, Sscofpmf] + extension: + allOf: + - name: S + - name: Sscofpmf UINH: location: 60 description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in U-mode. @@ -92,7 +101,10 @@ fields: return 0; } definedBy: - allOf: [U, Sscofpmf] + extension: + allOf: + - name: U + - name: Sscofpmf VSINH: location: 59 description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in VS-mode. @@ -109,7 +121,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf VUINH: location: 58 description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in VU-mode. @@ -126,7 +141,10 @@ fields: return 0; } definedBy: - allOf: [H, Sscofpmf] + extension: + allOf: + - name: H + - name: Sscofpmf EVENT: location: 57-0 description: Event selector for performance counter `mhpmcounter<%= hpm_num %>`. diff --git a/spec/std/isa/csr/Zihpm/mhpmeventNh.layout b/spec/std/isa/csr/Zihpm/mhpmeventNh.layout index ba1a1323b..5b5b66c2c 100644 --- a/spec/std/isa/csr/Zihpm/mhpmeventNh.layout +++ b/spec/std/isa/csr/Zihpm/mhpmeventNh.layout @@ -18,7 +18,9 @@ description: | Introduced with the `Sscofpmf` extension. Prior to that, there was no way to access the upper 32-bits of `mhpmevent#{hpm_num}`. -definedBy: Sscofpmf +definedBy: + extension: + name: Sscofpmf fields: OF: location: 31 @@ -37,7 +39,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf MINH: location: 30 alias: mhpmevent<%= hpm_num %>.MINH @@ -55,7 +59,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf SINH: location: 29 alias: mhpmevent<%= hpm_num %>.SINH @@ -73,7 +79,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf UINH: location: 28 alias: mhpmevent<%= hpm_num %>.UINH @@ -91,7 +99,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VSINH: location: 27 alias: mhpmevent<%= hpm_num %>.VSINH @@ -109,7 +119,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf VUINH: location: 26 alias: mhpmevent<%= hpm_num %>.VUINH @@ -127,7 +139,9 @@ fields: } else { return 0; } - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf EVENT: location: 25-0 description: High part of event selector for performance counter `mhpmcounter<%= hpm_num %>`. diff --git a/spec/std/isa/csr/cycle.yaml b/spec/std/isa/csr/cycle.yaml index 54c48b4cb..75e6b764f 100644 --- a/spec/std/isa/csr/cycle.yaml +++ b/spec/std/isa/csr/cycle.yaml @@ -28,7 +28,9 @@ description: | !=== priv_mode: U length: 64 -definedBy: Zicntr +definedBy: + extension: + name: Zicntr fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/cycleh.yaml b/spec/std/isa/csr/cycleh.yaml index 8278d58ff..ffd040d89 100644 --- a/spec/std/isa/csr/cycleh.yaml +++ b/spec/std/isa/csr/cycleh.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Zicntr +definedBy: + extension: + name: Zicntr fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/hedeleg.yaml b/spec/std/isa/csr/hedeleg.yaml index 93e420e39..baedb94d4 100644 --- a/spec/std/isa/csr/hedeleg.yaml +++ b/spec/std/isa/csr/hedeleg.yaml @@ -37,7 +37,9 @@ description: | that aliases bits 63:32 of `hedeleg`. Register `hedelegh` does not exist when XLEN=64. -definedBy: H +definedBy: + extension: + name: H fields: IAM: location: 0 diff --git a/spec/std/isa/csr/hedelegh.yaml b/spec/std/isa/csr/hedelegh.yaml index 501881d0a..b31b8c286 100644 --- a/spec/std/isa/csr/hedelegh.yaml +++ b/spec/std/isa/csr/hedelegh.yaml @@ -16,5 +16,7 @@ description: | Controls exception delegation from HS-mode to VS-mode. Alias of upper bits of `hedeleg`[63:32]. -definedBy: H +definedBy: + extension: + name: H fields: {} diff --git a/spec/std/isa/csr/hstateen0.yaml b/spec/std/isa/csr/hstateen0.yaml index c89e3f7b5..d3604e409 100644 --- a/spec/std/isa/csr/hstateen0.yaml +++ b/spec/std/isa/csr/hstateen0.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -57,10 +57,11 @@ description: in the matching `mstateen` CSR. definedBy: - allOf: - - H - - Smstateen - - Ssstateen + extension: + allOf: + - name: H + - name: Smstateen + - name: Ssstateen fields: SE0: long_name: sstateen0 access control @@ -78,8 +79,9 @@ fields: long_name: senvcfg access control location: 62 definedBy: - name: S - version: ">= 1.11" + extension: + name: S + version: ">= 1.11" description: | The ENVCFG bit in `hstateen0` controls access to the `senvcfg` CSRs. type: RW @@ -92,7 +94,9 @@ fields: CSRIND: long_name: siselect and sireg* access control location: 60 - definedBy: Sscsrind + definedBy: + extension: + name: Sscsrind description: | The CSRIND bit in `hstateen0` controls access to the `siselect` and the `sireg*`, (really `vsiselect` and `vsireg*`) CSRs provided by the Sscsrind @@ -107,7 +111,9 @@ fields: AIA: long_name: Ssaia state access control location: 59 - definedBy: Ssaia + definedBy: + extension: + name: Ssaia description: | The AIA bit in `hstateen0` controls access to all state introduced by the Ssaia extension and is not controlled by either the CSRIND or the @@ -122,7 +128,9 @@ fields: IMSIC: long_name: IMSIC state access control location: 58 - definedBy: Ssaia + definedBy: + extension: + name: Ssaia description: | The IMSIC bit in `hstateen0` controls access to the guest IMSIC state, including CSRs `stopei` (really `vstopei`), provided by the Ssaia extension. @@ -139,7 +147,9 @@ fields: CONTEXT: long_name: scontext access control location: 57 - definedBy: Sdtrig + definedBy: + extension: + name: Sdtrig description: | The CONTEXT bit in `hstateen0` controls access to the `scontext` CSR provided by the Sdtrig extension. @@ -168,7 +178,9 @@ fields: JVT: long_name: jvt access control location: 2 - definedBy: Zcmt + definedBy: + extension: + name: Zcmt description: | The JVT bit controls access to the `jvt` CSR provided by the Zcmt extension. type: RW diff --git a/spec/std/isa/csr/hstateen0h.yaml b/spec/std/isa/csr/hstateen0h.yaml index b6c725051..fcd4f3a28 100644 --- a/spec/std/isa/csr/hstateen0h.yaml +++ b/spec/std/isa/csr/hstateen0h.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -25,10 +25,11 @@ description: `hstateen1h`, `hstateen2h`, and `hstateen3h`. definedBy: - allOf: - - H - - Smstateen - - Ssstateen + extension: + allOf: + - name: H + - name: Smstateen + - name: Ssstateen fields: SE0: long_name: sstateen0 access control @@ -48,8 +49,9 @@ fields: long_name: senvcfg access control location: 30 definedBy: - name: S - version: ">= 1.11" + extension: + name: S + version: ">= 1.11" alias: hstateen0.ENVCFG sw_write(csr_value): | if (CSR[mstateen0].ENVCFG == 1'b0){ @@ -64,7 +66,9 @@ fields: CSRIND: long_name: siselect and sireg* access control location: 28 - definedBy: Sscsrind + definedBy: + extension: + name: Sscsrind alias: hstateen0.CSRIND sw_write(csr_value): | if (CSR[mstateen0].CSRIND == 1'b0){ @@ -81,7 +85,9 @@ fields: AIA: long_name: Ssaia state access control location: 27 - definedBy: Ssaia + definedBy: + extension: + name: Ssaia alias: hstateen0.AIA sw_write(csr_value): | if (CSR[mstateen0].AIA == 1'b0){ @@ -98,7 +104,9 @@ fields: IMSIC: long_name: IMSIC state access control location: 26 - definedBy: Ssaia + definedBy: + extension: + name: Ssaia alias: hstateen0.IMSIC sw_write(csr_value): | if (CSR[mstateen0].IMSIC == 1'b0){ @@ -117,7 +125,9 @@ fields: CONTEXT: long_name: scontext access control location: 25 - definedBy: Sdtrig + definedBy: + extension: + name: Sdtrig alias: hstateen0.CONTEXT sw_write(csr_value): | if (CSR[mstateen0].CONTEXT == 1'b0){ diff --git a/spec/std/isa/csr/hstateen1.yaml b/spec/std/isa/csr/hstateen1.yaml index 83eef886f..864c07e00 100644 --- a/spec/std/isa/csr/hstateen1.yaml +++ b/spec/std/isa/csr/hstateen1.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -57,10 +57,11 @@ description: in the matching `mstateen` CSR. definedBy: - allOf: - - H - - Smstateen - - Ssstateen + extension: + allOf: + - name: H + - name: Smstateen + - name: Ssstateen fields: SE0: long_name: sstateen1 access control diff --git a/spec/std/isa/csr/hstateen1h.yaml b/spec/std/isa/csr/hstateen1h.yaml index 55b1b577b..7321abcca 100644 --- a/spec/std/isa/csr/hstateen1h.yaml +++ b/spec/std/isa/csr/hstateen1h.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -25,10 +25,11 @@ description: `hstateen1h`, `hstateen2h`, and `hstateen3h`. definedBy: - allOf: - - H - - Smstateen - - Ssstateen + extension: + allOf: + - name: H + - name: Smstateen + - name: Ssstateen fields: SE0: long_name: sstateen1 access control diff --git a/spec/std/isa/csr/hstateen2.yaml b/spec/std/isa/csr/hstateen2.yaml index d6e35c4ef..1557cbc45 100644 --- a/spec/std/isa/csr/hstateen2.yaml +++ b/spec/std/isa/csr/hstateen2.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -57,10 +57,11 @@ description: in the matching `mstateen` CSR. definedBy: - allOf: - - H - - Smstateen - - Ssstateen + extension: + allOf: + - name: H + - name: Smstateen + - name: Ssstateen fields: SE0: long_name: sstateen2 access control diff --git a/spec/std/isa/csr/hstateen2h.yaml b/spec/std/isa/csr/hstateen2h.yaml index f71af66e8..47896e45f 100644 --- a/spec/std/isa/csr/hstateen2h.yaml +++ b/spec/std/isa/csr/hstateen2h.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -25,10 +25,11 @@ description: `hstateen1h`, `hstateen2h`, and `hstateen3h`. definedBy: - allOf: - - H - - Smstateen - - Ssstateen + extension: + allOf: + - name: H + - name: Smstateen + - name: Ssstateen fields: SE0: long_name: sstateen2 access control diff --git a/spec/std/isa/csr/hstateen3.yaml b/spec/std/isa/csr/hstateen3.yaml index 3e6e5ca20..6df888d73 100644 --- a/spec/std/isa/csr/hstateen3.yaml +++ b/spec/std/isa/csr/hstateen3.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -57,10 +57,11 @@ description: in the matching `mstateen` CSR. definedBy: - allOf: - - H - - Smstateen - - Ssstateen + extension: + allOf: + - name: H + - name: Smstateen + - name: Ssstateen fields: SE0: long_name: sstateen3 access control diff --git a/spec/std/isa/csr/hstateen3h.yaml b/spec/std/isa/csr/hstateen3h.yaml index a3b069eaf..9ee9466ca 100644 --- a/spec/std/isa/csr/hstateen3h.yaml +++ b/spec/std/isa/csr/hstateen3h.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -25,10 +25,11 @@ description: `hstateen1h`, `hstateen2h`, and `hstateen3h`. definedBy: - allOf: - - H - - Smstateen - - Ssstateen + extension: + allOf: + - name: H + - name: Smstateen + - name: Ssstateen fields: SE0: long_name: sstateen3 access control diff --git a/spec/std/isa/csr/hstatus.yaml b/spec/std/isa/csr/hstatus.yaml index f02930b66..28ecd19a5 100644 --- a/spec/std/isa/csr/hstatus.yaml +++ b/spec/std/isa/csr/hstatus.yaml @@ -16,7 +16,9 @@ description: | Unlike fields in `sstatus`, which are all aliases of fields `mstatus`, bits in `hstatus` are independent bits and do not have aliases. -definedBy: H +definedBy: + extension: + name: H fields: VSXL: long_name: VS-mode XLen diff --git a/spec/std/isa/csr/instret.yaml b/spec/std/isa/csr/instret.yaml index 9b0388c32..0635c6016 100644 --- a/spec/std/isa/csr/instret.yaml +++ b/spec/std/isa/csr/instret.yaml @@ -28,7 +28,9 @@ description: | !=== priv_mode: U length: 64 -definedBy: Zicntr +definedBy: + extension: + name: Zicntr fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/instreth.yaml b/spec/std/isa/csr/instreth.yaml index 15264e3ae..b6c5aecb1 100644 --- a/spec/std/isa/csr/instreth.yaml +++ b/spec/std/isa/csr/instreth.yaml @@ -29,7 +29,9 @@ description: | !=== priv_mode: U length: 32 -definedBy: Zicntr +definedBy: + extension: + name: Zicntr fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/marchid.yaml b/spec/std/isa/csr/marchid.yaml index b8931371d..d3f5a4feb 100644 --- a/spec/std/isa/csr/marchid.yaml +++ b/spec/std/isa/csr/marchid.yaml @@ -46,7 +46,9 @@ description: | variants of a design. ==== -definedBy: Sm +definedBy: + extension: + name: Sm fields: Architecture: location_rv32: 31-0 diff --git a/spec/std/isa/csr/mcause.yaml b/spec/std/isa/csr/mcause.yaml index c185cba0a..eb6391c2f 100644 --- a/spec/std/isa/csr/mcause.yaml +++ b/spec/std/isa/csr/mcause.yaml @@ -12,7 +12,9 @@ writable: true priv_mode: M length: MXLEN description: Reports the cause of the latest exception. -definedBy: Sm +definedBy: + extension: + name: Sm fields: INT: location_rv32: 31 diff --git a/spec/std/isa/csr/mconfigptr.yaml b/spec/std/isa/csr/mconfigptr.yaml index eba69fefa..8ef973855 100644 --- a/spec/std/isa/csr/mconfigptr.yaml +++ b/spec/std/isa/csr/mconfigptr.yaml @@ -43,8 +43,9 @@ description: | priv_mode: M length: MXLEN definedBy: - name: Sm - version: ">=1.12" + extension: + name: Sm + version: ">=1.12" fields: ADDRESS: location_rv32: 31-0 diff --git a/spec/std/isa/csr/mcycle.yaml b/spec/std/isa/csr/mcycle.yaml index 12284d5f4..f7a92b520 100644 --- a/spec/std/isa/csr/mcycle.yaml +++ b/spec/std/isa/csr/mcycle.yaml @@ -7,7 +7,9 @@ $schema: "csr_schema.json#" kind: csr name: mcycle long_name: Machine Cycle Counter -definedBy: Zicntr +definedBy: + extension: + name: Zicntr address: 0xB00 writable: true description: | diff --git a/spec/std/isa/csr/mcycleh.yaml b/spec/std/isa/csr/mcycleh.yaml index e1d3c2dac..354c155f0 100644 --- a/spec/std/isa/csr/mcycleh.yaml +++ b/spec/std/isa/csr/mcycleh.yaml @@ -7,7 +7,9 @@ $schema: "csr_schema.json#" kind: csr name: mcycleh long_name: High-half machine Cycle Counter -definedBy: Zicntr +definedBy: + extension: + name: Zicntr address: 0xB80 writable: true description: | diff --git a/spec/std/isa/csr/medeleg.yaml b/spec/std/isa/csr/medeleg.yaml index 8e92b6e74..81ba02af3 100644 --- a/spec/std/isa/csr/medeleg.yaml +++ b/spec/std/isa/csr/medeleg.yaml @@ -37,7 +37,9 @@ description: | Otherwise, an exception cause is handled by M-mode. See xref:prose:interrupts.adoc[interrupt documentation] for more details. -definedBy: S # medeleg does not exist when S-mode is not implemented +definedBy: # medeleg does not exist when S-mode is not implemented + extension: + name: S fields: IAM: location: 0 @@ -433,7 +435,9 @@ fields: !=== type: RW reset_value: UNDEFINED_LEGAL - definedBy: H + definedBy: + extension: + name: H EM: location: 11 description: | @@ -580,7 +584,9 @@ fields: !=== type: RW reset_value: UNDEFINED_LEGAL - definedBy: H + definedBy: + extension: + name: H LGPF: location: 21 description: | @@ -606,7 +612,9 @@ fields: type: RW reset_value: UNDEFINED_LEGAL - definedBy: H + definedBy: + extension: + name: H VI: location: 22 description: | @@ -632,7 +640,9 @@ fields: type: RW reset_value: UNDEFINED_LEGAL - definedBy: H + definedBy: + extension: + name: H SGPF: location: 23 description: | @@ -657,4 +667,6 @@ fields: !=== type: RW reset_value: UNDEFINED_LEGAL - definedBy: H + definedBy: + extension: + name: H diff --git a/spec/std/isa/csr/medelegh.yaml b/spec/std/isa/csr/medelegh.yaml index ec125f80e..922d47e9e 100644 --- a/spec/std/isa/csr/medelegh.yaml +++ b/spec/std/isa/csr/medelegh.yaml @@ -15,6 +15,7 @@ base: 32 description: | Alias of the upper 32 bits of `medeleg`. definedBy: - name: S - version: ">= 1.13" + extension: + name: S + version: ">= 1.13" fields: {} diff --git a/spec/std/isa/csr/menvcfg.yaml b/spec/std/isa/csr/menvcfg.yaml index 7ddf70e81..6938bda25 100644 --- a/spec/std/isa/csr/menvcfg.yaml +++ b/spec/std/isa/csr/menvcfg.yaml @@ -134,10 +134,11 @@ description: | priv_mode: M length: 64 definedBy: - allOf: - - name: Sm - version: ">=1.12" - - name: U + extension: + allOf: + - name: Sm + version: ">=1.12" + - name: U fields: STCE: location: 63 @@ -148,7 +149,9 @@ fields: When clear, `stimecmp` access in a mode other than M-mode raises an `Illegal Instruction` trap. S-mode timer interrupts will not be generated when clear, and `mip` and `sip` revert to their prior behavior without `Sstc`. - definedBy: Sstc + definedBy: + extension: + name: Sstc type: RW reset_value: UNDEFINED_LEGAL PBMTE: @@ -170,7 +173,9 @@ fields: _rs2_=_x0_ suffices to synchronize address-translation caches with respect to the altered interpretation of page-table entries' PBMT fields. - definedBy: Svpbmt + definedBy: + extension: + name: Svpbmt type: RW reset_value: UNDEFINED_LEGAL ADUE: @@ -192,7 +197,9 @@ fields: Furthermore, for implementations with the hypervisor extension, henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero. - definedBy: Svadu + definedBy: + extension: + name: Svadu type(): | return (implemented?(ExtensionName::Svadu)) ? CsrFieldType::RO : CsrFieldType::RW; reset_value(): | @@ -212,7 +219,9 @@ fields: * `0`: The instruction raises an illegal instruction or virtual instruction exception * `1`: The instruction is executed - definedBy: Zicboz + definedBy: + extension: + name: Zicboz type: RW reset_value: UNDEFINED_LEGAL CBCFE: @@ -231,7 +240,9 @@ fields: * `0`: The instruction raises an illegal instruction or virtual instruction exception * `1`: The instruction is executed - definedBy: Zicbom + definedBy: + extension: + name: Zicbom type: RW reset_value: UNDEFINED_LEGAL CBIE: @@ -250,7 +261,9 @@ fields: * `01`: The instruction is executed and performs a flush operation * `10`: _Reserved_ * `11`: The instruction is executed and performs an invalidate operation - definedBy: Zicbom + definedBy: + extension: + name: Zicbom type: RW-R sw_write(csr_value): | if ((csr_value.CBIE == 0) || diff --git a/spec/std/isa/csr/menvcfgh.yaml b/spec/std/isa/csr/menvcfgh.yaml index 5d6c1bfec..5a2633835 100644 --- a/spec/std/isa/csr/menvcfgh.yaml +++ b/spec/std/isa/csr/menvcfgh.yaml @@ -14,10 +14,11 @@ description: Contains bits to enable/disable extensions priv_mode: M length: 32 definedBy: - allOf: - - name: Sm - version: ">=1.12" - - name: U + extension: + allOf: + - name: Sm + version: ">=1.12" + - name: U fields: STCE: location: 31 @@ -26,7 +27,9 @@ fields: *STimecmp Enable* Alias of `menvcfg.STCE` - definedBy: Sstc + definedBy: + extension: + name: Sstc type: RW reset_value: UNDEFINED_LEGAL PBMTE: @@ -36,7 +39,9 @@ fields: *Page Based Memory Type Enable* Alias of `menvcfg.PBMTE` - definedBy: Svpbmt + definedBy: + extension: + name: Svpbmt type: RW reset_value: UNDEFINED_LEGAL ADUE: @@ -44,7 +49,9 @@ fields: alias: menvcfg.ADUE description: | Alias of `menvcfg.ADUE` - definedBy: Svadu + definedBy: + extension: + name: Svadu type(): | return (implemented?(ExtensionName::Svadu)) ? CsrFieldType::RO : CsrFieldType::RW; reset_value(): | diff --git a/spec/std/isa/csr/mepc.yaml b/spec/std/isa/csr/mepc.yaml index f30e13af0..0bf57133c 100644 --- a/spec/std/isa/csr/mepc.yaml +++ b/spec/std/isa/csr/mepc.yaml @@ -15,7 +15,9 @@ description: | Written with the PC of an instruction on an exception or interrupt taken in M-mode. Also controls where the hart jumps on an exception return from M-mode. -definedBy: Sm +definedBy: + extension: + name: Sm fields: PC: location_rv32: 31-0 diff --git a/spec/std/isa/csr/mhartid.yaml b/spec/std/isa/csr/mhartid.yaml index 534daead5..a260d1024 100644 --- a/spec/std/isa/csr/mhartid.yaml +++ b/spec/std/isa/csr/mhartid.yaml @@ -12,7 +12,9 @@ writable: false priv_mode: M length: MXLEN description: Reports the unique hart-specific ID in the system. -definedBy: Sm +definedBy: + extension: + name: Sm fields: ID: location_rv32: 31-0 diff --git a/spec/std/isa/csr/mideleg.yaml b/spec/std/isa/csr/mideleg.yaml index 3467f018c..69a133abf 100644 --- a/spec/std/isa/csr/mideleg.yaml +++ b/spec/std/isa/csr/mideleg.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -15,14 +15,15 @@ definedBy: # "In harts without S-mode, the medeleg and mideleg registers should not exist." -- priv # after 1.9.1, mideleg does not exist when S-mode is not implemented # we can represent that by making mideleg an S extension CSR post 1.9.1 - oneOf: - - name: Sm - version: "<= 1.9.1" - - allOf: - - name: S - version: "> 1.9.1" - - name: Sm - version: "> 1.9.1" + extension: + oneOf: + - name: Sm + version: "<= 1.9.1" + - allOf: + - name: S + version: "> 1.9.1" + - name: Sm + version: "> 1.9.1" description: | Controls exception delegation from M-mode to HS/S-mode @@ -112,7 +113,9 @@ fields: Virtual Supervisor Software Interrupts are always delegated to HS-mode, so this field is read-only one. type: RO reset_value: 1 - definedBy: H + definedBy: + extension: + name: H MSI: location: 3 description: | @@ -139,7 +142,9 @@ fields: Virtual Supervisor Time Interrupts are always delegated to HS-mode, so this field is read-only one. type: RO reset_value: 1 - definedBy: H + definedBy: + extension: + name: H MTI: location: 7 description: | @@ -164,7 +169,9 @@ fields: Virtual Supervisor External Interrupts are always delegated to HS-mode, so this field is read-only one. type: RO reset_value: 1 - definedBy: H + definedBy: + extension: + name: H MEI: location: 11 description: | @@ -181,7 +188,9 @@ fields: Supervisor Guest External interrupts are always delegated to HS-mode, so this field is read-only one. type: RO reset_value: 1 - definedBy: H + definedBy: + extension: + name: H LCOFI: location: 13 description: | @@ -190,4 +199,6 @@ fields: When 1, local counter overflow interrupts are delegated to (H)S-mode. type: RW reset_value: 0 - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf diff --git a/spec/std/isa/csr/mie.yaml b/spec/std/isa/csr/mie.yaml index fb1bc44d2..c03a70424 100644 --- a/spec/std/isa/csr/mie.yaml +++ b/spec/std/isa/csr/mie.yaml @@ -11,7 +11,9 @@ address: 0x304 writable: true priv_mode: M length: MXLEN -definedBy: Sm +definedBy: + extension: + name: Sm description: "mip.yaml#/description" fields: SSIE: @@ -23,7 +25,9 @@ fields: Alias of `sie.SSIE` when `mideleg.SSI` is set. Otherwise, `sie.SSIE` is read-only 0. type: RW - definedBy: S + definedBy: + extension: + name: S reset_value: 0 VSSIE: location: 2 @@ -41,7 +45,9 @@ fields: Alias of `sie.SSIE` when `hideleg.VSSI` is set and the current mode is VS or VU (Because `mie` is inaccessible in VS or VU mode, this alias can never be observed by software). type: RW - definedBy: H + definedBy: + extension: + name: H reset_value: 0 MSIE: location: 3 @@ -56,7 +62,9 @@ fields: Alias of `sip.STIE` when `mideleg.STI` is set. Otherwise, `sip.STIE` is read-only 0. type: RW - definedBy: S + definedBy: + extension: + name: S reset_value: 0 VSTIE: location: 6 @@ -74,7 +82,9 @@ fields: Alias of `sie.STIE` when `hideleg.VSTI` is set and the current mode is VS or VU (Because `mie` is inaccessible in VS or VU mode, this alias can never be observed by software). type: RW - definedBy: H + definedBy: + extension: + name: H reset_value: 0 MTIE: location: 7 @@ -89,7 +99,9 @@ fields: Alias of `sie.SEIE` when `mideleg.SEI` is set. Otherwise, `sie.SEIE` is read-only 0. type: RW - definedBy: S + definedBy: + extension: + name: S reset_value: 0 VSEIE: location: 10 @@ -107,7 +119,9 @@ fields: Alias of `sie.SEIE` when `hideleg.VSEI` is set and the current mode is VS or VU (Because `mie` is inaccessible in VS or VU mode, this alias can never be observed by software). type: RW - definedBy: H + definedBy: + extension: + name: H reset_value: 0 MEIE: location: 11 @@ -122,7 +136,9 @@ fields: Alias of `hie.SGEIE`. type: RW - definedBy: H + definedBy: + extension: + name: H reset_value: 0 LCOFIE: location: 13 @@ -136,5 +152,7 @@ fields: Alias of `vsip.LCOFIE` when `hideleg.LCOFI` is set. Otherwise, `vsip.LCOFIE` is read-only 0. type: RW - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf reset_value: 0 diff --git a/spec/std/isa/csr/mimpid.yaml b/spec/std/isa/csr/mimpid.yaml index 4845d2068..1495c1388 100644 --- a/spec/std/isa/csr/mimpid.yaml +++ b/spec/std/isa/csr/mimpid.yaml @@ -29,7 +29,9 @@ description: | most-significant nibble down) with subfields aligned on nibble boundaries to ease human readability. ==== -definedBy: Sm +definedBy: + extension: + name: Sm fields: Implementation: location_rv32: 31-0 diff --git a/spec/std/isa/csr/minstret.yaml b/spec/std/isa/csr/minstret.yaml index 9ad6194b1..bd67c37b1 100644 --- a/spec/std/isa/csr/minstret.yaml +++ b/spec/std/isa/csr/minstret.yaml @@ -49,4 +49,6 @@ fields: does not retire and does not cause `minstret.COUNT` to increment. reset_value: UNDEFINED_LEGAL affectedBy: [Zicntr, Smcntrpmf, Smcdeleg, Ssccfg] -definedBy: Zicntr +definedBy: + extension: + name: Zicntr diff --git a/spec/std/isa/csr/minstreth.yaml b/spec/std/isa/csr/minstreth.yaml index 5889fb0b5..0cfa80893 100644 --- a/spec/std/isa/csr/minstreth.yaml +++ b/spec/std/isa/csr/minstreth.yaml @@ -31,6 +31,8 @@ fields: sw_write(csr_value): | CSR[mcycle].COUNT = {csr_value.COUNT[31:0], CSR[minstret].COUNT[31:0]}; return csr_value.COUNT; -definedBy: Zicntr +definedBy: + extension: + name: Zicntr sw_read(): | return CSR[minstret].COUNT[63:32]; diff --git a/spec/std/isa/csr/mip.yaml b/spec/std/isa/csr/mip.yaml index 931ca6ea9..b7f4aabaa 100644 --- a/spec/std/isa/csr/mip.yaml +++ b/spec/std/isa/csr/mip.yaml @@ -158,7 +158,9 @@ description: | in the `sip` register and is maskable using the `sie` register. Otherwise, the corresponding bits in `sip` and `sie` are read-only zero. length: MXLEN -definedBy: Sm +definedBy: + extension: + name: Sm fields: SSIP: location: 1 @@ -185,7 +187,9 @@ fields: <%- end -%> type: RW reset_value: 0 - definedBy: S + definedBy: + extension: + name: S affectedBy: Smaia VSSIP: location: 2 @@ -212,7 +216,9 @@ fields: * `vsip.SSIP` when `hideleg.VSSI` is set type: RW reset_value: 0 - definedBy: H + definedBy: + extension: + name: H affectedBy: Smaia MSIP: location: 3 @@ -257,7 +263,9 @@ fields: type: RW reset_value: 0 - definedBy: S + definedBy: + extension: + name: S affectedBy: Sstc VSTIP: location: 6 @@ -292,7 +300,9 @@ fields: * `hvip.VSTIP` <% if ext?(:Sstc) %>when `menvcfg.STCE` is clear<% end %> (though `hvip.VSTIP` is writable) type: RO-H reset_value: 0 - definedBy: H + definedBy: + extension: + name: H affectedBy: Sstc MTIP: location: 7 @@ -325,7 +335,9 @@ fields: * `sip.SEIP` when `mideleg.SEI` is set (though `sip.SEIP` is read-only) type: RW-H - definedBy: S + definedBy: + extension: + name: S affectedBy: Smaia reset_value: 0 VSEIP: @@ -353,7 +365,9 @@ fields: * `vsip.SEIP` when `hideleg.VSEI` is set type: RO-H reset_value: 0 - definedBy: H + definedBy: + extension: + name: H affectedBy: Smaia MEIP: location: 11 @@ -380,7 +394,9 @@ fields: * `hip.SGEIP` type: RO-H reset_value: 0 - definedBy: H + definedBy: + extension: + name: H LCOFIP: location: 13 alias: @@ -406,7 +422,9 @@ fields: <%- end -%> type: RW-H reset_value: 0 - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf sw_read(): | # OR in the hidden smode external interrupt return diff --git a/spec/std/isa/csr/misa.yaml b/spec/std/isa/csr/misa.yaml index cde93bc27..e9f756a59 100644 --- a/spec/std/isa/csr/misa.yaml +++ b/spec/std/isa/csr/misa.yaml @@ -12,7 +12,9 @@ writable: true priv_mode: M length: MXLEN description: Reports the XLEN and "major" extensions supported by the ISA. -definedBy: Sm +definedBy: + extension: + name: Sm fields: MXL: location_rv32: 31-30 @@ -32,7 +34,9 @@ fields: return (implemented?(ExtensionName::A) && MUTABLE_MISA_A) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::A) ? 1 : 0; - definedBy: A + definedBy: + extension: + name: A B: location: 1 description: | @@ -44,7 +48,9 @@ fields: return (implemented?(ExtensionName::B) && MUTABLE_MISA_B) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::B) ? 1 : 0; - definedBy: B + definedBy: + extension: + name: B C: location: 2 description: | @@ -57,7 +63,9 @@ fields: return (implemented?(ExtensionName::C) && MUTABLE_MISA_C) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::C) ? 1 : 0; - definedBy: C + definedBy: + extension: + name: C D: location: 3 description: | @@ -73,7 +81,9 @@ fields: return (implemented?(ExtensionName::D) && MUTABLE_MISA_D) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::D) ? 1 : 0; - definedBy: D + definedBy: + extension: + name: D F: location: 5 description: | @@ -89,7 +99,9 @@ fields: return (implemented?(ExtensionName::F) && MUTABLE_MISA_F) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::F) ? 1 : 0; - definedBy: F + definedBy: + extension: + name: F sw_write(csr_value): | if (csr_value.F == 0 && csr_value.D == 1) { return UNDEFINED_LEGAL_DETERMINISTIC; @@ -127,7 +139,9 @@ fields: Writing 0 to this field will cause all attempts to enter VS- or VU- mode, execute a hypervisor instruction, or access a hypervisor CSR to raise an `IllegalInstruction` fault. type(): | return (implemented?(ExtensionName::H) && MUTABLE_MISA_H) ? CsrFieldType::RW : CsrFieldType::RO; - definedBy: H + definedBy: + extension: + name: H reset_value(): | return implemented?(ExtensionName::H) ? 1 : 0; I: @@ -135,7 +149,9 @@ fields: description: | Indicates support for the `I` (base) extension. type: RO - definedBy: I + definedBy: + extension: + name: I reset_value: 1 M: location: 12 @@ -148,7 +164,9 @@ fields: return (implemented?(ExtensionName::M) && MUTABLE_MISA_M) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::M) ? 1 : 0; - definedBy: M + definedBy: + extension: + name: M cert_normative_rules: - id: csr_field.misa.M.disabled name: Disabling `misa.M` bit @@ -184,7 +202,9 @@ fields: type(): | return MUTABLE_MISA_Q ? CsrFieldType::RW : CsrFieldType::RO; reset_value: 1 - definedBy: Q + definedBy: + extension: + name: Q sw_write(csr_value): | if ((csr_value.F == 0 || csr_value.D == 0) && csr_value.Q == 1) { return UNDEFINED_LEGAL_DETERMINISTIC; @@ -205,7 +225,9 @@ fields: return (implemented?(ExtensionName::S) && MUTABLE_MISA_S) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::S) ? 1 : 0; - definedBy: S + definedBy: + extension: + name: S U: location: 20 description: | @@ -217,7 +239,9 @@ fields: return (implemented?(ExtensionName::U) && MUTABLE_MISA_U) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::U) ? 1 : 0; - definedBy: U + definedBy: + extension: + name: U V: location: 21 description: | @@ -229,7 +253,9 @@ fields: return (implemented?(ExtensionName::V) && MUTABLE_MISA_V) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::V) ? 1 : 0; - definedBy: V + definedBy: + extension: + name: V sw_read(): | return ( (CSR[misa].MXL << (xlen() - 2)) | diff --git a/spec/std/isa/csr/mscratch.yaml b/spec/std/isa/csr/mscratch.yaml index adc43a459..42a40a063 100644 --- a/spec/std/isa/csr/mscratch.yaml +++ b/spec/std/isa/csr/mscratch.yaml @@ -12,7 +12,9 @@ writable: true priv_mode: M length: MXLEN description: Scratch register for software use. Bits are not interpreted by hardware. -definedBy: Sm +definedBy: + extension: + name: Sm fields: SCRATCH: location_rv32: 31-0 diff --git a/spec/std/isa/csr/mseccfg.yaml b/spec/std/isa/csr/mseccfg.yaml index 2dbcd3863..ba54ec9e5 100644 --- a/spec/std/isa/csr/mseccfg.yaml +++ b/spec/std/isa/csr/mseccfg.yaml @@ -13,6 +13,7 @@ priv_mode: M length: 64 description: Machine Security Configuration definedBy: - name: Sm - version: ">= 1.12" + extension: + name: Sm + version: ">= 1.12" fields: {} diff --git a/spec/std/isa/csr/mseccfgh.yaml b/spec/std/isa/csr/mseccfgh.yaml index 859f9a52d..ebc0d4623 100644 --- a/spec/std/isa/csr/mseccfgh.yaml +++ b/spec/std/isa/csr/mseccfgh.yaml @@ -14,6 +14,7 @@ priv_mode: M length: 32 description: Machine Security Configuration definedBy: - name: Sm - version: ">= 1.12" + extension: + name: Sm + version: ">= 1.12" fields: {} diff --git a/spec/std/isa/csr/mstateen0.yaml b/spec/std/isa/csr/mstateen0.yaml index fafbe9044..c687f43ed 100644 --- a/spec/std/isa/csr/mstateen0.yaml +++ b/spec/std/isa/csr/mstateen0.yaml @@ -66,7 +66,9 @@ description: the same bit is read-only one in the matching `mstateen` CSR. Bit 63 of each `mstateen` CSR may be read-only zero only if the hypervisor extension is not implemented and the matching supervisor-level `sstateen` CSR is all read-only zeros. -definedBy: Smstateen +definedBy: + extension: + name: Smstateen fields: SE0: long_name: hstateen0, hstateen0h, and sstateen0 access control @@ -79,8 +81,9 @@ fields: long_name: henvcfg, henvcfgh, and senvcfg access control location: 62 definedBy: - name: S - version: ">= 1.11" + extension: + name: S + version: ">= 1.11" description: | The ENVCFG bit in `mstateen0` controls access to the `henvcfg`, `henvcfgh`, and the `senvcfg` CSRs. type: RW @@ -88,7 +91,9 @@ fields: CSRIND: long_name: siselect, sireg*, vsiselect, and vsireg* access control location: 60 - definedBy: Sscsrind + definedBy: + extension: + name: Sscsrind description: | The CSRIND bit in `mstateen0` controls access to the `siselect`, `sireg*`, `vsiselect`, and the `vsireg*` CSRs provided by the Sscsrind extensions. @@ -97,7 +102,9 @@ fields: AIA: long_name: Ssaia state access control location: 59 - definedBy: Ssaia + definedBy: + extension: + name: Ssaia description: | The AIA bit in `mstateen0` controls access to all state introduced by the Ssaia extension and is not controlled by either the CSRIND or the IMSIC bits. @@ -106,7 +113,9 @@ fields: IMSIC: long_name: IMSIC state access control location: 58 - definedBy: Ssaia + definedBy: + extension: + name: Ssaia description: | The IMSIC bit in `mstateen0` controls access to the IMSIC state, including CSRs `stopei` and `vstopei`, provided by the Ssaia extension. @@ -115,7 +124,9 @@ fields: CONTEXT: long_name: scontext and hcontext access control location: 57 - definedBy: Sdtrig + definedBy: + extension: + name: Sdtrig description: | The CONTEXT bit in `mstateen0` controls access to the `scontext` and `hcontext` CSRs provided by the Sdtrig extension. @@ -132,7 +143,9 @@ fields: SRMCFG: long_name: srmcfg access control location: 55 - definedBy: Ssqosid + definedBy: + extension: + name: Ssqosid description: | The SRMCFG bit in `mstateen0` controls access to the `srmcfg`` CSR introduced by the Ssqosid Chapter 18 extension. @@ -149,7 +162,9 @@ fields: JVT: long_name: jvt access control location: 2 - definedBy: Zcmt + definedBy: + extension: + name: Zcmt description: | The JVT bit controls access to the `jvt` CSR provided by the Zcmt extension. type: RW diff --git a/spec/std/isa/csr/mstateen0h.yaml b/spec/std/isa/csr/mstateen0h.yaml index 16306fd97..07f60c79a 100644 --- a/spec/std/isa/csr/mstateen0h.yaml +++ b/spec/std/isa/csr/mstateen0h.yaml @@ -20,7 +20,9 @@ description: machine-level CSRs there is a corresponding set of high-half CSRs for the upper 32 bits of each register: `mstateen0h`, `mstateen1h`, `mstateen2h`, `mstateen3h`. -definedBy: Smstateen +definedBy: + extension: + name: Smstateen fields: SE0: long_name: hstateen0, hstateen0h, and sstateen0 access control @@ -37,8 +39,9 @@ fields: long_name: henvcfg, henvcfgh, and senvcfg access control location: 30 definedBy: - name: S - version: ">= 1.11" + extension: + name: S + version: ">= 1.11" alias: mstateen0.ENVCFG sw_write(csr_value): | CSR[mstateen0].ENVCFG = csr_value.ENVCFG; @@ -50,7 +53,9 @@ fields: CSRIND: long_name: siselect, sireg*, vsiselect, and vsireg* access control location: 28 - definedBy: Sscsrind + definedBy: + extension: + name: Sscsrind alias: mstateen0.CSRIND sw_write(csr_value): | CSR[mstateen0].CSRIND = csr_value.CSRIND; @@ -63,7 +68,9 @@ fields: AIA: long_name: Ssaia state access control location: 27 - definedBy: Ssaia + definedBy: + extension: + name: Ssaia alias: mstateen0.AIA sw_write(csr_value): | CSR[mstateen0].AIA = csr_value.AIA; @@ -76,7 +83,9 @@ fields: IMSIC: long_name: IMSIC state access control location: 26 - definedBy: Ssaia + definedBy: + extension: + name: Ssaia alias: mstateen0.IMSIC sw_write(csr_value): | CSR[mstateen0].IMSIC = csr_value.IMSIC; @@ -89,7 +98,9 @@ fields: CONTEXT: long_name: scontext and hcontext access control location: 25 - definedBy: Sdtrig + definedBy: + extension: + name: Sdtrig alias: mstateen0.CONTEXT sw_write(csr_value): | CSR[mstateen0].CONTEXT = csr_value.CONTEXT; @@ -114,7 +125,9 @@ fields: SRMCFG: long_name: srmcfg access control location: 23 - definedBy: Ssqosid + definedBy: + extension: + name: Ssqosid alias: mstateen0.SRMCFG sw_write(csr_value): | CSR[mstateen0].SRMCFG = csr_value.SRMCFG; diff --git a/spec/std/isa/csr/mstateen1.yaml b/spec/std/isa/csr/mstateen1.yaml index c80e8cadc..3611d170d 100644 --- a/spec/std/isa/csr/mstateen1.yaml +++ b/spec/std/isa/csr/mstateen1.yaml @@ -66,7 +66,9 @@ description: the same bit is read-only one in the matching `mstateen` CSR. Bit 63 of each `mstateen` CSR may be read-only zero only if the hypervisor extension is not implemented and the matching supervisor-level `sstateen` CSR is all read-only zeros. -definedBy: Smstateen +definedBy: + extension: + name: Smstateen fields: SE0: long_name: hstateen1, hstateen1h, and sstateen1 access control diff --git a/spec/std/isa/csr/mstateen1h.yaml b/spec/std/isa/csr/mstateen1h.yaml index 0e34cc2c7..83ad4af12 100644 --- a/spec/std/isa/csr/mstateen1h.yaml +++ b/spec/std/isa/csr/mstateen1h.yaml @@ -20,7 +20,9 @@ description: machine-level CSRs there is a corresponding set of high-half CSRs for the upper 32 bits of each register: `mstateen0h`, `mstateen1h`, `mstateen2h`, `mstateen3h`. -definedBy: Smstateen +definedBy: + extension: + name: Smstateen fields: SE0: long_name: hstateen1, hstateen1h, and sstateen1 access control diff --git a/spec/std/isa/csr/mstateen2.yaml b/spec/std/isa/csr/mstateen2.yaml index d0424d1aa..19f7e40a6 100644 --- a/spec/std/isa/csr/mstateen2.yaml +++ b/spec/std/isa/csr/mstateen2.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -66,7 +66,9 @@ description: the same bit is read-only one in the matching `mstateen` CSR. Bit 63 of each `mstateen` CSR may be read-only zero only if the hypervisor extension is not implemented and the matching supervisor-level `sstateen` CSR is all read-only zeros. -definedBy: Smstateen +definedBy: + extension: + name: Smstateen fields: SE0: long_name: hstateen2, hstateen2h, and sstateen2 access control diff --git a/spec/std/isa/csr/mstateen2h.yaml b/spec/std/isa/csr/mstateen2h.yaml index 99284e5a6..2ae8d2c0e 100644 --- a/spec/std/isa/csr/mstateen2h.yaml +++ b/spec/std/isa/csr/mstateen2h.yaml @@ -20,7 +20,9 @@ description: machine-level CSRs there is a corresponding set of high-half CSRs for the upper 32 bits of each register: `mstateen0h`, `mstateen1h`, `mstateen2h`, `mstateen3h`. -definedBy: Smstateen +definedBy: + extension: + name: Smstateen fields: SE0: long_name: hstateen2, hstateen2h, and sstateen2 access control diff --git a/spec/std/isa/csr/mstateen3.yaml b/spec/std/isa/csr/mstateen3.yaml index 5c1da64fb..cc7bfe164 100644 --- a/spec/std/isa/csr/mstateen3.yaml +++ b/spec/std/isa/csr/mstateen3.yaml @@ -66,7 +66,9 @@ description: the same bit is read-only one in the matching `mstateen` CSR. Bit 63 of each `mstateen` CSR may be read-only zero only if the hypervisor extension is not implemented and the matching supervisor-level `sstateen` CSR is all read-only zeros. -definedBy: Smstateen +definedBy: + extension: + name: Smstateen fields: SE0: long_name: hstateen3, hstateen3h, and sstateen3 access control diff --git a/spec/std/isa/csr/mstateen3h.yaml b/spec/std/isa/csr/mstateen3h.yaml index 3034d5084..ee9c71a64 100644 --- a/spec/std/isa/csr/mstateen3h.yaml +++ b/spec/std/isa/csr/mstateen3h.yaml @@ -20,7 +20,9 @@ description: machine-level CSRs there is a corresponding set of high-half CSRs for the upper 32 bits of each register: `mstateen0h`, `mstateen1h`, `mstateen2h`, `mstateen3h`. -definedBy: Smstateen +definedBy: + extension: + name: Smstateen fields: SE0: long_name: hstateen3, hstateen3h, and sstateen3 access control diff --git a/spec/std/isa/csr/mstatus.yaml b/spec/std/isa/csr/mstatus.yaml index 9d505537a..1a8e6d4d6 100644 --- a/spec/std/isa/csr/mstatus.yaml +++ b/spec/std/isa/csr/mstatus.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -19,7 +19,9 @@ length: MXLEN description: The mstatus register tracks and controls the hart's current operating state. -definedBy: Sm +definedBy: + extension: + name: Sm fields: SD: location_rv32: 31 @@ -30,7 +32,11 @@ fields: Read-only bit that summarizes whether either the FS, XS, or VS fields signal the presence of some dirty state. definedBy: - anyOf: [F, V] # NOTE: if you implement a custom extension overlay that writes to XS, then you need to add your extension here in the overlay as well + extension: + anyOf: + - name: F + - name: V + # NOTE: if you implement a custom extension overlay that writes to XS, then you need to add your extension here in the overlay as well type(): | # this is read-only if FS and VS are both read-only # otherwise, it is read-only with hardware update @@ -62,7 +68,9 @@ fields: When returning via an MRET instruction, the bit is written to 0. On reset in set to 1, and software should write it to 0 when boot sequence is done. When mstatus.MDT=1, direct write by CSR instruction cannot set mstatus.MIE to 1, if not written together. - definedBy: Smdbltrp + definedBy: + extension: + name: Smdbltrp type: RW-H reset_value: UNDEFINED_LEGAL MPV: @@ -76,7 +84,9 @@ fields: Can also be written by software. type: RW-H reset_value: UNDEFINED_LEGAL - definedBy: H + definedBy: + extension: + name: H GVA: location: 38 base: 64 @@ -87,7 +97,9 @@ fields: When a trap is taken and a guest virtual address is written into mtval, GVA is cleared. type: RW-H reset_value: 0 - definedBy: H + definedBy: + extension: + name: H MBE: location: 37 base: 64 @@ -112,7 +124,9 @@ fields: SBE: location: 36 base: 64 - definedBy: S + definedBy: + extension: + name: S description: | *S-mode Big Endian* @@ -139,7 +153,9 @@ fields: SXL: location: 35-34 base: 64 - definedBy: S + definedBy: + extension: + name: S description: | *S-mode XLEN* @@ -188,7 +204,9 @@ fields: UXL: location: 33-32 base: 64 - definedBy: U + definedBy: + extension: + name: U description: | U-mode XLEN. @@ -251,7 +269,9 @@ fields: [when,"ext?(:H)"] Does not affect the behavior of `sret` in VS_mode (see `hstatus.VTSR`). type: RW - definedBy: S + definedBy: + extension: + name: S reset_value: UNDEFINED_LEGAL TW: location: 21 @@ -264,7 +284,9 @@ fields: When 0, the `wfi` instruction is permitted to wait forever in (H)S-mode but must trap after an implementation-defined wait period in U-mode. type: RW - definedBy: S + definedBy: + extension: + name: S reset_value: UNDEFINED_LEGAL TVM: location: 20 @@ -287,7 +309,9 @@ fields: } else { return CsrFieldType::RW; } - definedBy: S + definedBy: + extension: + name: S reset_value(): | if (CSR[misa].S == 1'b0) { return 0; @@ -311,7 +335,9 @@ fields: When 1, loads from pages marked readable *or executable* are allowed. When 0, loads from pages marked executable raise a Page Fault exception. - definedBy: S + definedBy: + extension: + name: S type: RW reset_value: UNDEFINED_LEGAL SUM: @@ -321,7 +347,9 @@ fields: When 0, an S-mode read or an M-mode read with mstatus.MPRV=1 and mstatus.MPP=01 to a 'U' (user) page will cause an ILLEGAL INSTRUCTION exception. - definedBy: S + definedBy: + extension: + name: S type(): | # only writable if there is some translation supported if (has_virt_mem?()) { @@ -345,7 +373,9 @@ fields: `mstatus.MPV`:`mstatus.MPP`. `mstatus.MPRV` is cleared on any exception return (`mret` or `sret` instruction, regardless of the trap handler privilege mode). - definedBy: U + definedBy: + extension: + name: U type(): | return (CSR[misa].U == 1'b1) ? CsrFieldType::RWH : CsrFieldType::RO; reset_value: 0 @@ -370,37 +400,30 @@ fields: Values 1 and 2 are valid write values for software, but are not interpreted by hardware other than to possibly enable a previously-disabled floating point unit. type(): | - if (CSR[misa].F == 1'b1){ + if (implemented?(ExtensionName::F) && (!MISA_CSR_IMPLEMENTED || CSR[misa].F == 1'b1)) { + # "If the F extension is implemented, the FS field shall not be read-only zero." return CsrFieldType::RWH; - } else if ((CSR[misa].S == 1'b0) && (CSR[misa].F == 1'b0)) { - # must be read-only-0 + } else if (MISA_CSR_IMPLEMENTED && (CSR[misa].S == 1'b0) && (CSR[misa].F == 1'b0)) { + # "If neither the F extension nor S-mode is implemented, then FS is read-only zero" return CsrFieldType::RO; } else { + # " If S-mode is implemented but the F extension is not, FS may optionally be read-only zero." # there will be no hardware update in this case because we know the F extension isn't implemented - return MSTATUS_FS_WRITABLE ? CsrFieldType::RW : CsrFieldType::RO; + return $array_size(MSTATUS_FS_LEGAL_VALUES) == 1 ? CsrFieldType::RO : CsrFieldType::RW; } definedBy: - anyOf: [F, S] + extension: + anyOf: + - name: F + - name: S reset_value(): | - if (CSR[misa].F == 1'b1){ - return UNDEFINED_LEGAL; - } else if ((CSR[misa].S == 1'b0) && (CSR[misa].F == 1'b0)) { - # must be read-only-0 - return 0; - } else { - # there will be no hardware update in this case because we know the F extension isn't implemented - return MSTATUS_FS_WRITABLE ? UNDEFINED_LEGAL : 0; - } + return $array_size(MSTATUS_FS_LEGAL_VALUES) == 1 ? MSTATUS_FS_LEGAL_VALUES[0] : UNDEFINED_LEGAL; sw_write(csr_value): | - if (CSR[misa].F == 1'b1){ - return ary_includes?<$array_size(MSTATUS_FS_LEGAL_VALUES), 2>(MSTATUS_FS_LEGAL_VALUES, csr_value.FS) ? csr_value.FS : UNDEFINED_LEGAL_DETERMINISTIC; - } else if ((CSR[misa].S == 1'b0) && (CSR[misa].F == 1'b0)) { + if (MISA_CSR_IMPLEMENTED && (CSR[misa].S == 1'b0) && (CSR[misa].F == 1'b0)) { # must be read-only-0 return 0; - } else { - # there will be no hardware update in this case because we know the F extension isn't implemented - return ary_includes?<$array_size(MSTATUS_FS_LEGAL_VALUES), 2>(MSTATUS_FS_LEGAL_VALUES, csr_value.FS) ? csr_value.FS : UNDEFINED_LEGAL_DETERMINISTIC; } + return ary_includes?<$array_size(MSTATUS_FS_LEGAL_VALUES), 2>(MSTATUS_FS_LEGAL_VALUES, csr_value.FS) ? csr_value.FS : UNDEFINED_LEGAL_DETERMINISTIC; MPP: location: 12-11 description: | @@ -452,7 +475,10 @@ fields: Values 1 and 2 are valid write values for software, but are not interpreted by hardware other than to possibly enable a previously-disabled vector unit. definedBy: - anyOf: [V, S] + extension: + anyOf: + - name: V + - name: S type(): | if (CSR[misa].V == 1'b1){ return CsrFieldType::RWH; @@ -503,7 +529,9 @@ fields: Notably, `mstatus.SPP` does not affect exception return in VS-mode (see `vsstatus.SPP`). type: RW-H - definedBy: S + definedBy: + extension: + name: S reset_value: UNDEFINED_LEGAL sw_write(csr_value): | if (csr_value.SPP == 2'b10) { @@ -531,7 +559,9 @@ fields: reset_value: UNDEFINED_LEGAL UBE: location: 6 - definedBy: U + definedBy: + extension: + name: U description: | *U-mode Big Endian* @@ -570,7 +600,9 @@ fields: Other than serving as a record of nested traps as described above, `mstatus.SPIE` does not affect execution. type(): | return (CSR[misa].S == 1'b1) ? CsrFieldType::RWH : CsrFieldType::RO; - definedBy: S + definedBy: + extension: + name: S reset_value(): | return (CSR[misa].S == 1'b1) ? UNDEFINED_LEGAL : 0; MIE: @@ -607,6 +639,8 @@ fields: type(): | return (CSR[misa].S == 1'b1) ? CsrFieldType::RWH : CsrFieldType::RO; - definedBy: S + definedBy: + extension: + name: S reset_value(): | return (CSR[misa].S == 1'b1) ? UNDEFINED_LEGAL : 0; diff --git a/spec/std/isa/csr/mstatush.yaml b/spec/std/isa/csr/mstatush.yaml index df31f24af..c2b5775ee 100644 --- a/spec/std/isa/csr/mstatush.yaml +++ b/spec/std/isa/csr/mstatush.yaml @@ -16,8 +16,9 @@ description: The mstatus register tracks and controls the hart's current operating state. definedBy: - name: Sm - version: ">= 1.12" + extension: + name: Sm + version: ">= 1.12" fields: MDT: location: 10 @@ -28,7 +29,9 @@ fields: When returning via an MRET instruction, the bit is written to 0. On reset in set to 1, and software should write it to 0 when boot sequence is done. When mstatush.MDT=1, direct write by CSR instruction cannot set mstatus.MIE to 1. - definedBy: Smdbltrp + definedBy: + extension: + name: Smdbltrp type: RW-H reset_value: UNDEFINED_LEGAL MPV: @@ -41,7 +44,9 @@ fields: Can also be written by software. type: RW-H reset_value: UNDEFINED_LEGAL - definedBy: H + definedBy: + extension: + name: H GVA: location: 6 description: | @@ -51,7 +56,9 @@ fields: When a trap is taken and a guest virtual address is written into mtval, GVA is cleared. type: RW-H reset_value: 0 - definedBy: H + definedBy: + extension: + name: H MBE: location: 5 description: | @@ -61,7 +68,9 @@ fields: alias: mstatus.MBE SBE: location: 4 - definedBy: S + definedBy: + extension: + name: S description: | see `mstatus.SBE` type(): 'return (S_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;' diff --git a/spec/std/isa/csr/mtval.yaml b/spec/std/isa/csr/mtval.yaml index 34dff3ccc..0e669b773 100644 --- a/spec/std/isa/csr/mtval.yaml +++ b/spec/std/isa/csr/mtval.yaml @@ -12,7 +12,9 @@ writable: true description: Holds trap-specific information priv_mode: M length: MXLEN -definedBy: Sm +definedBy: + extension: + name: Sm fields: VALUE: location_rv32: 31-0 diff --git a/spec/std/isa/csr/mtvec.yaml b/spec/std/isa/csr/mtvec.yaml index fcd4e892a..49092fe88 100644 --- a/spec/std/isa/csr/mtvec.yaml +++ b/spec/std/isa/csr/mtvec.yaml @@ -12,7 +12,9 @@ writable: true priv_mode: M length: MXLEN description: Controls where traps jump. -definedBy: Sm +definedBy: + extension: + name: Sm fields: BASE: location_rv64: 63-2 diff --git a/spec/std/isa/csr/mvendorid.yaml b/spec/std/isa/csr/mvendorid.yaml index e0aa2e2b4..e6b36b2fd 100644 --- a/spec/std/isa/csr/mvendorid.yaml +++ b/spec/std/isa/csr/mvendorid.yaml @@ -23,4 +23,6 @@ fields: location: 6-0 type: RO reset_value(): return VENDOR_ID_OFFSET; -definedBy: Sm +definedBy: + extension: + name: Sm diff --git a/spec/std/isa/csr/satp.yaml b/spec/std/isa/csr/satp.yaml index 3da682f3c..532e1073c 100644 --- a/spec/std/isa/csr/satp.yaml +++ b/spec/std/isa/csr/satp.yaml @@ -14,7 +14,9 @@ description: current ASID and page table base pointer. priv_mode: S length: SXLEN -definedBy: S +definedBy: + extension: + name: S fields: MODE: location_rv64: 63-60 diff --git a/spec/std/isa/csr/scause.yaml b/spec/std/isa/csr/scause.yaml index 8e64dc0c1..b6f4890eb 100644 --- a/spec/std/isa/csr/scause.yaml +++ b/spec/std/isa/csr/scause.yaml @@ -12,7 +12,9 @@ writable: true priv_mode: S length: SXLEN description: Reports the cause of the latest exception. -definedBy: S +definedBy: + extension: + name: S fields: INT: location_rv32: 31 diff --git a/spec/std/isa/csr/senvcfg.yaml b/spec/std/isa/csr/senvcfg.yaml index 50239f2ba..f515f969d 100644 --- a/spec/std/isa/csr/senvcfg.yaml +++ b/spec/std/isa/csr/senvcfg.yaml @@ -14,10 +14,11 @@ description: | priv_mode: S length: 64 definedBy: - allOf: - - name: S - version: ">=1.12" - - name: U + extension: + allOf: + - name: S + version: ">=1.12" + - name: U fields: CBZE: location: 7 @@ -44,7 +45,9 @@ fields: See `cbo.zero` for a summary of the effect. - definedBy: Zicboz + definedBy: + extension: + name: Zicboz type: RW reset_value: UNDEFINED_LEGAL CBCFE: @@ -75,7 +78,9 @@ fields: See `cbo.clean` and/or `cbo.flush` for a summary of the effect. - definedBy: Zicbom + definedBy: + extension: + name: Zicbom type: RW reset_value: UNDEFINED_LEGAL CBIE: @@ -108,7 +113,9 @@ fields: * `11`: The instruction is executed and performs an invalidate operation See `cbo.inval` for more details. - definedBy: Zicbom + definedBy: + extension: + name: Zicbom type: RW-R sw_write(csr_value): | if (csr_value.CBIE == 0 || csr_value.CBIE == 1 || csr_value.CBIE == 3) { diff --git a/spec/std/isa/csr/sepc.yaml b/spec/std/isa/csr/sepc.yaml index 94617b786..039a258ee 100644 --- a/spec/std/isa/csr/sepc.yaml +++ b/spec/std/isa/csr/sepc.yaml @@ -15,7 +15,9 @@ description: | Written with the PC of an instruction on an exception or interrupt taken in (H)S-mode. Also controls where the hart jumps on an exception return from (H)S-mode. -definedBy: S +definedBy: + extension: + name: S fields: PC: location: 63-0 diff --git a/spec/std/isa/csr/sip.yaml b/spec/std/isa/csr/sip.yaml index a8c7edbc2..543f56219 100644 --- a/spec/std/isa/csr/sip.yaml +++ b/spec/std/isa/csr/sip.yaml @@ -16,7 +16,9 @@ description: | Hypervisor-related interrupts (VS-mode interrupts and Supervisor Guest interrupts) are not reflected in `sip` even though those interrupts can be taken in HS-mode. Instead, they are reported through `hip`. length: 64 -definedBy: S +definedBy: + extension: + name: S fields: SSIP: location: 1 @@ -59,7 +61,9 @@ fields: !=== type: RW reset_value: UNDEFINED_LEGAL - definedBy: S + definedBy: + extension: + name: S affectedBy: Smaia STIP: location: 5 @@ -92,7 +96,9 @@ fields: !=== type: RO-H reset_value: UNDEFINED_LEGAL - definedBy: S + definedBy: + extension: + name: S affectedBy: Sstc SEIP: location: 9 @@ -117,7 +123,9 @@ fields: !=== type: RO-H - definedBy: S + definedBy: + extension: + name: S affectedBy: Smaia reset_value: UNDEFINED_LEGAL LCOFIP: @@ -147,4 +155,6 @@ fields: !=== type: RW-H reset_value: UNDEFINED_LEGAL - definedBy: Sscofpmf + definedBy: + extension: + name: Sscofpmf diff --git a/spec/std/isa/csr/sscratch.yaml b/spec/std/isa/csr/sscratch.yaml index 898e88d3d..55aa041b9 100644 --- a/spec/std/isa/csr/sscratch.yaml +++ b/spec/std/isa/csr/sscratch.yaml @@ -12,7 +12,9 @@ writable: true priv_mode: S length: 64 description: Scratch register for software use. Bits are not interpreted by hardware. -definedBy: S # actually, defined by RV64, but must implement U-mode for this CSR to exist +definedBy: # actually, defined by RV64, but must implement U-mode for this CSR to exist + extension: + name: S fields: SCRATCH: location: 63-0 diff --git a/spec/std/isa/csr/sstateen0.yaml b/spec/std/isa/csr/sstateen0.yaml index f0d7b5e08..c1b613354 100644 --- a/spec/std/isa/csr/sstateen0.yaml +++ b/spec/std/isa/csr/sstateen0.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -68,14 +68,17 @@ description: only if the hypervisor extension is not implemented and the matching supervisor-level `sstateen` CSR is all read-only zeros. definedBy: - allOf: - - Smstateen - - Ssstateen + extension: + allOf: + - name: Smstateen + - name: Ssstateen fields: JVT: long_name: jvt access control location: 2 - definedBy: Zcmt + definedBy: + extension: + name: Zcmt description: | The JVT bit controls access to the `jvt` CSR provided by the Zcmt extension. type: RW diff --git a/spec/std/isa/csr/sstateen1.yaml b/spec/std/isa/csr/sstateen1.yaml index eebdd04a0..bad520c02 100644 --- a/spec/std/isa/csr/sstateen1.yaml +++ b/spec/std/isa/csr/sstateen1.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -68,9 +68,10 @@ description: only if the hypervisor extension is not implemented and the matching supervisor-level `sstateen` CSR is all read-only zeros. definedBy: - allOf: - - Smstateen - - Ssstateen + extension: + allOf: + - name: Smstateen + - name: Ssstateen fields: DATA: diff --git a/spec/std/isa/csr/sstateen2.yaml b/spec/std/isa/csr/sstateen2.yaml index fcaf3b195..157a39614 100644 --- a/spec/std/isa/csr/sstateen2.yaml +++ b/spec/std/isa/csr/sstateen2.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -68,9 +68,10 @@ description: only if the hypervisor extension is not implemented and the matching supervisor-level `sstateen` CSR is all read-only zeros. definedBy: - allOf: - - Smstateen - - Ssstateen + extension: + allOf: + - name: Smstateen + - name: Ssstateen fields: DATA: diff --git a/spec/std/isa/csr/sstateen3.yaml b/spec/std/isa/csr/sstateen3.yaml index d758c9781..2daa2f6a3 100644 --- a/spec/std/isa/csr/sstateen3.yaml +++ b/spec/std/isa/csr/sstateen3.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json $schema: "csr_schema.json#" kind: csr @@ -68,9 +68,10 @@ description: only if the hypervisor extension is not implemented and the matching supervisor-level `sstateen` CSR is all read-only zeros. definedBy: - allOf: - - Smstateen - - Ssstateen + extension: + allOf: + - name: Smstateen + - name: Ssstateen fields: DATA: diff --git a/spec/std/isa/csr/sstatus.yaml b/spec/std/isa/csr/sstatus.yaml index 58d255dd1..370a6d2da 100644 --- a/spec/std/isa/csr/sstatus.yaml +++ b/spec/std/isa/csr/sstatus.yaml @@ -15,7 +15,9 @@ description: | The sstatus register tracks and controls the hart's current operating state. All fields in sstatus are aliases of the same field in mstatus. -definedBy: S +definedBy: + extension: + name: S fields: SD: # The *position* of SD changes when SXLEN changes (yuck^[TM]) @@ -80,7 +82,9 @@ fields: Alias of `mstatus.FS`. type: RW-H - definedBy: F + definedBy: + extension: + name: F reset_value: UNDEFINED_LEGAL VS: alias: mstatus.VS @@ -92,7 +96,9 @@ fields: type: RW-H reset_value: UNDEFINED_LEGAL - definedBy: V + definedBy: + extension: + name: V SPP: alias: mstatus.SPP location: 8 @@ -101,7 +107,9 @@ fields: Alias of `mstatus.SPP`. type: RW-H - definedBy: S + definedBy: + extension: + name: S reset_value: UNDEFINED_LEGAL UBE: alias: mstatus.UBE @@ -111,7 +119,9 @@ fields: Alias of `mstatus.UBE`. type: RO - definedBy: S + definedBy: + extension: + name: S reset_value: UNDEFINED_LEGAL SPIE: alias: mstatus.SPIE @@ -122,7 +132,9 @@ fields: Alias of `mstatus.SPIE`. type: RW-H - definedBy: S + definedBy: + extension: + name: S reset_value: UNDEFINED_LEGAL SIE: alias: mstatus.SIE diff --git a/spec/std/isa/csr/stval.yaml b/spec/std/isa/csr/stval.yaml index 70111d8bc..c1125f538 100644 --- a/spec/std/isa/csr/stval.yaml +++ b/spec/std/isa/csr/stval.yaml @@ -12,7 +12,9 @@ writable: true description: Holds trap-specific information priv_mode: S length: 64 -definedBy: S +definedBy: + extension: + name: S fields: VALUE: location: 63-0 diff --git a/spec/std/isa/csr/stvec.yaml b/spec/std/isa/csr/stvec.yaml index 117e139ea..5047ebf4f 100644 --- a/spec/std/isa/csr/stvec.yaml +++ b/spec/std/isa/csr/stvec.yaml @@ -12,7 +12,9 @@ writable: true priv_mode: S length: 64 description: Controls where traps jump. -definedBy: S +definedBy: + extension: + name: S fields: BASE: location: 63-2 diff --git a/spec/std/isa/csr/time.yaml b/spec/std/isa/csr/time.yaml index cde440b8a..6f8838328 100644 --- a/spec/std/isa/csr/time.yaml +++ b/spec/std/isa/csr/time.yaml @@ -34,7 +34,9 @@ description: | -- priv_mode: U length: 64 -definedBy: Zicntr +definedBy: + extension: + name: Zicntr fields: COUNT: location: 63-0 diff --git a/spec/std/isa/csr/timeh.yaml b/spec/std/isa/csr/timeh.yaml index a777c8276..44b73064f 100644 --- a/spec/std/isa/csr/timeh.yaml +++ b/spec/std/isa/csr/timeh.yaml @@ -35,7 +35,9 @@ description: | -- priv_mode: U length: 32 -definedBy: Zicntr +definedBy: + extension: + name: Zicntr fields: COUNT: location: 31-0 diff --git a/spec/std/isa/csr/vscause.yaml b/spec/std/isa/csr/vscause.yaml index dd97ef1b3..0a854312b 100644 --- a/spec/std/isa/csr/vscause.yaml +++ b/spec/std/isa/csr/vscause.yaml @@ -13,7 +13,9 @@ virtual_address: 0x142 priv_mode: VS length: VSXLEN description: Reports the cause of the latest exception taken in VS-mode. -definedBy: H +definedBy: + extension: + name: H fields: INT: location_rv64: 63 diff --git a/spec/std/isa/csr/vsepc.yaml b/spec/std/isa/csr/vsepc.yaml index f45c38a9a..04b17524c 100644 --- a/spec/std/isa/csr/vsepc.yaml +++ b/spec/std/isa/csr/vsepc.yaml @@ -16,7 +16,9 @@ description: | Written with the PC of an instruction on an exception or interrupt taken in VS-mode. Also controls where the hart jumps on an exception return from VS-mode. -definedBy: H +definedBy: + extension: + name: H fields: PC: location: 63-0 diff --git a/spec/std/isa/csr/vsstatus.yaml b/spec/std/isa/csr/vsstatus.yaml index 6b915b34d..6b8d439c1 100644 --- a/spec/std/isa/csr/vsstatus.yaml +++ b/spec/std/isa/csr/vsstatus.yaml @@ -20,7 +20,9 @@ description: | Unlike the relationship between `sstatus` and `mstatus`, none of the bits in `vsstatus` are aliases of another field. -definedBy: H +definedBy: + extension: + name: H fields: SD: location_rv64: 63 @@ -80,7 +82,9 @@ fields: * Loads generated by one of the `hlv.*` instructions. type: RW - definedBy: S + definedBy: + extension: + name: S reset_value: UNDEFINED_LEGAL SUM: location: 18 @@ -101,7 +105,9 @@ fields: during VS-level translation. type: RW - definedBy: S + definedBy: + extension: + name: S reset_value: UNDEFINED_LEGAL XS: alias: mstatus.XS @@ -130,7 +136,9 @@ fields: Values 1 and 2 are valid write values for software, but are not interpreted by hardware other than to possibly enable a previously-disabled floating point unit. type: RW-H - definedBy: F + definedBy: + extension: + name: F reset_value: UNDEFINED_LEGAL VS: location: 10-9 @@ -143,7 +151,9 @@ fields: other than to possibly enable a previously-disabled vector unit. type: RW-H reset_value: UNDEFINED_LEGAL - definedBy: V + definedBy: + extension: + name: V SPP: location: 8 description: | @@ -171,7 +181,9 @@ fields: Since the CPU does not support big endian, this is hardwired to 1. type(): | return (VU_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; - definedBy: S + definedBy: + extension: + name: S reset_value(): | if (VU_MODE_ENDIANNESS == "little") { # little endian @@ -197,7 +209,9 @@ fields: Other than serving as a record of nested traps as described above, `vsstatus.SPIE` does not affect execution. type: RW-H - definedBy: S + definedBy: + extension: + name: S reset_value: UNDEFINED_LEGAL SIE: location: 1 diff --git a/spec/std/isa/csr/vstval.yaml b/spec/std/isa/csr/vstval.yaml index 2f018f09d..efac1b0f3 100644 --- a/spec/std/isa/csr/vstval.yaml +++ b/spec/std/isa/csr/vstval.yaml @@ -13,7 +13,9 @@ virtual_address: 0x143 description: Holds trap-specific information priv_mode: S length: VSXLEN -definedBy: H +definedBy: + extension: + name: H fields: VALUE: location_rv32: 31-0 diff --git a/spec/std/isa/csr/vstvec.yaml b/spec/std/isa/csr/vstvec.yaml index 2ca7fc9c9..61c9bfe3e 100644 --- a/spec/std/isa/csr/vstvec.yaml +++ b/spec/std/isa/csr/vstvec.yaml @@ -13,7 +13,9 @@ virtual_address: 0x105 priv_mode: S length: 64 description: Controls where traps jump. -definedBy: H +definedBy: + extension: + name: H fields: BASE: location: 63-2 diff --git a/spec/std/isa/ext/A.yaml b/spec/std/isa/ext/A.yaml index a93817648..44e88e765 100644 --- a/spec/std/isa/ext/A.yaml +++ b/spec/std/isa/ext/A.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -19,11 +19,13 @@ versions: - name: Unknown email: unknown@void.segfault company: Unknown - implies: - - name: Zaamo - version: "1.0.0" - - name: Zalrsc - version: "1.0.0" + requires: + extension: + allOf: + - name: Zaamo + version: "1.0.0" + - name: Zalrsc + version: "1.0.0" description: | The atomic-instruction extension, named `A`, contains @@ -81,6 +83,9 @@ params: whether or not the implementation supports misaligned atomics in main memory schema: type: boolean + definedBy: + extension: + name: Zaamo LRSC_RESERVATION_STRATEGY: description: | Strategy used to handle reservation sets. diff --git a/spec/std/isa/ext/B.yaml b/spec/std/isa/ext/B.yaml index 26f0a0935..c94bfb648 100644 --- a/spec/std/isa/ext/B.yaml +++ b/spec/std/isa/ext/B.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -23,13 +23,15 @@ versions: email: ved@rivosinc.com company: Rivos, Inc. url: https://drive.google.com/file/d/1SgLoasaBjs5WboQMaU3wpHkjUwV71UZn/view - implies: - - name: Zba - version: "1.0.0" - - name: Zbb - version: "1.0.0" - - name: Zbs - version: "1.0.0" + requires: + extension: + allOf: + - name: Zba + version: "= 1.0.0" + - name: Zbb + version: "= 1.0.0" + - name: Zbs + version: "= 1.0.0" description: | The B standard extension comprises instructions provided by the `Zba`, `Zbb`, and `Zbs` extensions. diff --git a/spec/std/isa/ext/C.yaml b/spec/std/isa/ext/C.yaml index f65cc3d91..e17dd1a90 100644 --- a/spec/std/isa/ext/C.yaml +++ b/spec/std/isa/ext/C.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -18,21 +18,25 @@ versions: - version: "2.0.0" state: ratified ratification_date: 2019-12 - implies: - - name: Zca - version: "1.0.0" - - if: - name: F - version: ~> 2.2 - then: - name: Zcf - version: "1.0.0" - - if: - name: D - version: ~> 2.2 - then: - name: Zcd - version: "1.0.0" + requires: + extension: + allOf: + - name: Zca + version: = 1.0.0 + - if: + extension: + name: F + version: ~> 2.2 + then: + name: Zcf + version: = 1.0.0 + - if: + extension: + name: D + version: ~> 2.2 + then: + name: Zcd + version: = 1.0.0 description: | The `C` extension reduces static and dynamic code size by adding short 16-bit instruction encodings for common operations. The C diff --git a/spec/std/isa/ext/D.yaml b/spec/std/isa/ext/D.yaml index 4221120d9..9a6cc08fb 100644 --- a/spec/std/isa/ext/D.yaml +++ b/spec/std/isa/ext/D.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -14,9 +14,10 @@ versions: ratification_date: 2019-12 changes: - Define NaN-boxing scheme, changed definition of FMAX and FMIN - implies: - name: F - version: "2.2.0" + requires: + extension: + name: F + version: "2.2.0" description: | The `D` extension adds double-precision floating-point computational instructions compliant diff --git a/spec/std/isa/ext/F.yaml b/spec/std/isa/ext/F.yaml index bec4bc478..f95ffc7d4 100644 --- a/spec/std/isa/ext/F.yaml +++ b/spec/std/isa/ext/F.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -260,17 +260,22 @@ params: enum: ["never", "precise", "imprecise"] MSTATUS_FS_LEGAL_VALUES: description: | - The set of values that mstatus.FS will accept from a software write. + The set of values that mstatus.FS supports. schema: type: array items: type: integer enum: [0, 1, 2, 3] maxItems: 4 + minItems: 1 uniqueItems: true + restrictions: + constraint(): | + implemented?(ExtensionName::F) && + (HW_MSTATUS_FS_DIRTY_UPDATE == "precise") || + HW_MSTATUS_FS_DIRTY_UPDATE == "imprecise") + -> + $ary_includes?(MSTATUS_FS_LEGAL_VALUES, 3); + reason: + If there is a hardware update to mstatus.FS, then the Dirty state must be supported also_defined_in: S - extra_validation: | - assert MSTATUS_FS_LEGAL_VALUES.include?(0) && MSTATUS_FS_LEGAL_VALUES.include?(3) if ext?(:F) - - # if HW is writing FS, then Dirty (3) better be a supported value - assert MSTATUS_FS_LEGAL_VALUES.include?(3) if ext?(:F) && (HW_MSTATUS_FS_DIRTY_UPDATE != "never") diff --git a/spec/std/isa/ext/H.yaml b/spec/std/isa/ext/H.yaml index 434f38223..700fd5b8c 100644 --- a/spec/std/isa/ext/H.yaml +++ b/spec/std/isa/ext/H.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -13,8 +13,9 @@ versions: state: ratified ratification_date: 2019-12 requires: - name: S - version: ">= 1.12.0" + extension: + name: S + version: ">= 1.12.0" interrupt_codes: - num: 2 name: Virtual supervisor software interrupt @@ -157,22 +158,26 @@ params: Indicates whether or not the `H` extension can be disabled with the `misa.H` bit. schema: type: boolean - extra_validation: | - # If S mode can be disabled, then H mode must also be disabled since you can't - # be in H mode without S mode - assert MUTABLE_MISA_H if MUTABLE_MISA_S + restrictions: + constraint(): | + MUTABLE_MISA_S -> MUTABLE_MISA_H; + reason: | + If S mode can be disabled, then H mode must also be disabled since you can't be in H mode + without S mode (and thus MUTABLE_MISA_H is not an option -- it's always true) NUM_EXTERNAL_GUEST_INTERRUPTS: description: | Number of supported virtualized guest interrupts Corresponds to the `GEILEN` parameter in the RVI specs schema: - type: integer - minimum: 1 - maximum: 63 - extra_validation: | - # GEILEN must be <= 31 for RV32 - assert NUM_EXTERNAL_GUEST_INTERRUPTS <= 31 if SXLEN == 32 + RV32: + type: integer + minimum: 1 + maximum: 63 + RV64: + type: integer + minimum: 1 + maximum: 31 VS_MODE_ENDIANNESS: description: | Endianness of data in VS-mode. Can be one of: @@ -197,18 +202,21 @@ params: enum: [little, big, dynamic] VUXLEN: description: | - Set of XLENs supported in VU-mode. Can be one of: - - * 32: VUXLEN is always 32 - * 64: VUXLEN is always 64 - * 3264: VUXLEN can be changed (via `vsstatus.UXL`) between 32 and 64 + Set of XLENs supported in VU-mode. When both 32 and 64 are supported, VUXLEN can be changed + via `vsstatus.UXL`. schema: - type: integer - enum: [32, 64, 3264] - extra_validation: | - assert VUXLEN == 32 if XLEN == 32 - assert (SXLEN != 32) if VUXLEN != 32 - assert (VSXLEN != 32) if VUXLEN != 32 + type: array + items: + enum: [32, 64] + minItems: 1 + maxItems: 2 + uniqueItems: true + restrictions: + constraint(): | + !$ary_includes?(VSXLEN, 64) -> !$ary_includes?(VUXLEN, 64) + reason: | + XLEN in VU-mode can never be larger than XLEN in VS-mode + (and, transitively, cannot be larger than XLEN in S-mode or M-mode). VSXLEN: description: | Set of XLENs supported in VS-mode. Can be one of: @@ -217,18 +225,25 @@ params: * 64: VSXLEN is always 64 * 3264: VSXLEN can be changed (via `hstatus.VSXL`) between 32 and 64 schema: - type: integer - enum: [32, 64, 3264] - extra_validation: | - assert VSXLEN == 32 if XLEN == 32 - assert (SXLEN != 32) if VSXLEN != 32 + type: array + items: + enum: [32, 64] + minItems: 1 + maxItems: 2 + uniqueItems: true + restrictions: + constraint(): | + !$ary_includes?(SXLEN, 64) -> !$ary_includes?(VSXLEN, 64) + reason: | + XLEN in VS-mode can never be larger than XLEN in S-mode + (and, transitively, cannot be larger than XLEN in M-mode). REPORT_VA_IN_VSTVAL_ON_BREAKPOINT: description: | When true, `vstval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`). When false, `vstval` is written with 0 on an EBREAK instruction. - Regardless, `vstval` is always written with a virtual PC when an external breakpoint is generated + Regardless, `vstval` is always written with a virtual PC when an external breakpoint is generated. schema: type: boolean REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED: @@ -322,7 +337,7 @@ params: When true, `htval` is written with the Guest Physical Address, shifted right by 2, that caused a `GuestPageFault` exception. - When false, `htval` is written with0 when a `GuestPageFault` exception occurs. + When false, `htval` is written with 0 when a `GuestPageFault` exception occurs. schema: type: boolean HCOUNTENABLE_EN: @@ -353,84 +368,88 @@ params: Whether or not writing mode=Bare is supported in the `hgatp` register. schema: type: boolean - SV32_VSMODE_TRANSLATION: - description: | - Whether or not Sv32 translation is supported in first-stage (VS-stage) - translation. - schema: - type: boolean - extra_validation: | - # Sv32 is only valid if VS-mode can get into XLEN=32 mode - assert (VSXLEN == 32 || VSXLEN == 3264) if SV32_VSMODE_TRANSLATION + SV39_VSMODE_TRANSLATION: description: | Whether or not Sv39 translation is supported in first-stage (VS-stage) translation. schema: type: boolean - extra_validation: | - # Sv39 is only valid if VS-mode can get into XLEN=64 mode - assert (VSXLEN == 64 || VSXLEN == 3264) if SV39_VSMODE_TRANSLATION + restrictions: + constraint(): | + !$ary_includes?(VSXLEN, 64) -> !SV39_VSMODE_TRANSLATION; + reason: + Sv39 in VS-mode is only valid if VS-mode can get into RV64 mode + SV48_VSMODE_TRANSLATION: description: | Whether or not Sv48 translation is supported in first-stage (VS-stage) translation. schema: type: boolean - extra_validation: | - # Sv48 is only valid if VS-mode can get into XLEN=64 mode - assert (VSXLEN == 64 || VSXLEN == 3264) if SV48_VSMODE_TRANSLATION + restrictions: + constraint(): | + !$ary_includes?(VSXLEN, 64) -> !SV48_VSMODE_TRANSLATION; + reason: + Sv48 in VS-mode is only valid if VS-mode can get into RV64 mode + SV57_VSMODE_TRANSLATION: description: | Whether or not Sv57 translation is supported in first-stage (VS-stage) translation. schema: type: boolean - extra_validation: | - # Sv57 is only valid if VS-mode can get into XLEN=64 mode - assert (VSXLEN == 64 || VSXLEN == 3264) if SV57_VSMODE_TRANSLATION - SV32X4_TRANSLATION: - description: | - Whether or not Sv32x4 translation mode is supported. - schema: - type: boolean - extra_validation: | - # Sv32x4 is only valid if S-mode can get into XLEN=32 mode - assert SXLEN == 32 || SXLEN == 3264 if SV32X4_TRANSLATION + restrictions: + constraint(): | + !$ary_includes?(VSXLEN, 64) -> !SV57_VSMODE_TRANSLATION; + reason: + Sv57 in VS-mode is only valid if VS-mode can get into RV64 mode + SV39X4_TRANSLATION: description: | Whether or not Sv39x4 translation mode is supported. schema: type: boolean - extra_validation: | - # Sv39x4 is only valid if S-mode can get into XLEN=64 mode - assert SXLEN == 64 || SXLEN == 3264 if SV39X4_TRANSLATION + restrictions: + constraint(): | + !$ary_includes?(SXLEN, 64) -> !SV39X4_VSMODE_TRANSLATION; + reason: + Sv39x4 is only valid if S-mode can get into RV64 mode + SV48X4_TRANSLATION: description: | Whether or not Sv48x4 translation mode is supported. schema: type: boolean - extra_validation: | - # Sv48x4 is only valid if S-mode can get into XLEN=64 mode - assert SXLEN == 64 || SXLEN == 3264 if SV48X4_TRANSLATION + restrictions: + constraint(): | + !$ary_includes?(SXLEN, 64) -> !SV48X4_VSMODE_TRANSLATION; + reason: + Sv48x4 is only valid if S-mode can get into RV64 mode + SV57X4_TRANSLATION: description: | Whether or not Sv57x4 translation mode is supported. schema: type: boolean - extra_validation: | - # Sv57x4 is only valid if S-mode can get into XLEN=64 mode - assert SXLEN == 64 || SXLEN == 3264 if SV57X4_TRANSLATION + restrictions: + constraint(): | + !$ary_includes?(SXLEN, 64) -> !SV57X4_VSMODE_TRANSLATION; + reason: + Sv48x4 is only valid if S-mode can get into RV64 mode + VMID_WIDTH: description: | Number of bits supported in `hgatp.VMID` (i.e., the supported width of a virtual machine ID). schema: - type: integer - minimum: 0 - maximum: 14 - extra_validation: | - # if XLEN = 32, then VMID MAX is actually 7 - assert VMID_WIDTH <= 7 if SXLEN == 32 + RV32: + type: integer + minimum: 0 + maximum: 7 + RV64: + type: integer + minimum: 0 + maximum: 14 REPORT_GPA_IN_TVAL_ON_LOAD_GUEST_PAGE_FAULT: description: | Whether or not GPA >> 2 is written into htval/mtval2 when a load guest page fault occurs. @@ -656,10 +675,16 @@ params: Whether or not `vstvec.MODE` supports Direct (0). schema: type: boolean - extra_validation: assert STVEC_MODE_DIRECT || STVEC_MODE_VECTORED + restrictions: + constraint(): | + !VSTVEC_MODE_VECTORED -> VSTVEC_MODE_DIRECT; + reason: At least one vstvec mode must be supported VSTVEC_MODE_VECTORED: description: | Whether or not `stvec.MODE` supports Vectored (1). schema: type: boolean - extra_validation: assert STVEC_MODE_DIRECT || STVEC_MODE_VECTORED + restrictions: + constraint(): | + !VSTVEC_MODE_DIRECT -> VSTVEC_MODE_VECTORED; + reason: At least one vstvec mode must be supported diff --git a/spec/std/isa/ext/I.yaml b/spec/std/isa/ext/I.yaml index d63f04b36..62a1e66f4 100644 --- a/spec/std/isa/ext/I.yaml +++ b/spec/std/isa/ext/I.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/M.yaml b/spec/std/isa/ext/M.yaml index 273d1681e..2791f4a46 100644 --- a/spec/std/isa/ext/M.yaml +++ b/spec/std/isa/ext/M.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Q.yaml b/spec/std/isa/ext/Q.yaml index 265f2a861..df0ab728c 100644 --- a/spec/std/isa/ext/Q.yaml +++ b/spec/std/isa/ext/Q.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -20,7 +20,9 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - requires: D + requires: + extension: + name: D params: MUTABLE_MISA_Q: description: | diff --git a/spec/std/isa/ext/S.yaml b/spec/std/isa/ext/S.yaml index 2fad2bdb1..af07f3415 100644 --- a/spec/std/isa/ext/S.yaml +++ b/spec/std/isa/ext/S.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -13,20 +13,23 @@ versions: state: ratified ratification_date: 2019-06 requires: - name: U - version: "= 1.0.0" + extension: + name: U + version: "= 1.0.0" - version: "1.12.0" state: ratified ratification_date: 2021-12 requires: - name: U - version: "= 1.0.0" + extension: + name: U + version: "= 1.0.0" - version: "1.13.0" state: ratified ratification_date: null requires: - name: U - version: "= 1.0.0" + extension: + name: U + version: "= 1.0.0" description: | This chapter describes the RISC-V supervisor-level architecture, which contains a common core that is used with various supervisor-level @@ -50,19 +53,26 @@ params: Indicates whether or not the `S` extension can be disabled with the `misa.S` bit. schema: type: boolean - extra_validation: | - # If U mode can be disabled, then S mode must also be disabled since you can't - # be in S mode without U mode - assert MUTABLE_MISA_S if MUTABLE_MISA_U + restrictions: + constraint(): | + MUTABLE_MISA_U -> MUTABLE_MISA_S; + reason: + If U-mode can be disabled, then S must also be disabled since S cannot exist + without U (and thus there is no option for MUTABLE_MISA_S). + ASID_WIDTH: description: | Number of implemented ASID bits. Maximum is 16 for XLEN==64, and 9 for XLEN==32 schema: - type: integer - minimum: 0 - maximum: 16 - extra_validation: | - assert ASID_WIDTH <= 9 if XLEN == 32 + RV32: + type: integer + minimum: 0 + maximum: 9 + RV64: + type: integer + minimum: 0 + maximum: 16 + S_MODE_ENDIANNESS: description: | Endianness of data in S-mode. Can be one of: @@ -74,6 +84,7 @@ params: schema: type: string enum: [little, big, dynamic] + SXLEN: description: | Set of XLENs supported in S-mode. Can be one of: @@ -82,11 +93,18 @@ params: * 64: SXLEN is always 64 * 3264: SXLEN can be changed (via mstatus.SXL) between 32 and 64 schema: - type: integer - enum: [32, 64, 3264] - extra_validation: | - assert SXLEN == 32 if XLEN == 32 - assert (SXLEN != 32) if UXLEN != 32 + type: array + items: + enum: [32, 64] + minItems: 1 + maxItems: 2 + uniqueItems: true + restrictions: + constraint(): | + !$ary_includes?(MXLEN, 64) -> !$ary_includes?(SXLEN, 64); + reason: | + XLEN in S-mode can never be larger than XLEN in M-mode + REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT: description: | When true, `mtval` is written with the virtual address of a load when it causes a @@ -95,6 +113,7 @@ params: WHen false, `mtval` is written with 0 when a load causes a `LoadPageFault`. schema: type: boolean + REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT: description: | When true, `mtval` is written with the virtual address of a store when it causes a @@ -103,6 +122,7 @@ params: WHen false, `mtval` is written with 0 when a store causes a `StoreAmoPageFault`. schema: type: boolean + REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT: description: | When true, `mtval` is written with the virtual PC of an instructino when fetch causes an @@ -112,6 +132,7 @@ params: `InstructionPageFault`. schema: type: boolean + REPORT_VA_IN_STVAL_ON_BREAKPOINT: description: | When true, `stval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`). @@ -121,6 +142,7 @@ params: Regardless, `stval` is always written with a virtual PC when an external breakpoint is generated schema: type: boolean + REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED: description: | When true, `stval` is written with the virtual address of a load instruction when the @@ -130,6 +152,7 @@ params: MISALIGNED_LDST is false. schema: type: boolean + REPORT_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED: description: | When true, `stval` is written with the virtual address of a store instruction when the @@ -139,6 +162,7 @@ params: MISALIGNED_LDST is false. schema: type: boolean + REPORT_VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED: description: | When true, `stval` is written with the virtual PC when an instruction fetch is misaligned. @@ -149,6 +173,7 @@ params: it is impossible to generate a misaligned fetch, and so this parameter has no effect. schema: type: boolean + REPORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT: description: | When true, `stval` is written with the virtual address of a load when it causes a @@ -157,6 +182,7 @@ params: WHen false, `stval` is written with 0 when a load causes a `LoadAccessFault`. schema: type: boolean + REPORT_VA_IN_STVAL_ON_STORE_AMO_ACCESS_FAULT: description: | When true, `stval` is written with the virtual address of a store when it causes a @@ -165,6 +191,7 @@ params: WHen false, `stval` is written with 0 when a store causes a `StoreAmoAccessFault`. schema: type: boolean + REPORT_VA_IN_STVAL_ON_INSTRUCTION_ACCESS_FAULT: description: | When true, `stval` is written with the virtual PC of an instructino when fetch causes an @@ -174,6 +201,7 @@ params: `InstructionAccessFault`. schema: type: boolean + REPORT_VA_IN_STVAL_ON_LOAD_PAGE_FAULT: description: | When true, `stval` is written with the virtual address of a load when it causes a @@ -182,6 +210,7 @@ params: WHen false, `stval` is written with 0 when a load causes a `LoadPageFault`. schema: type: boolean + REPORT_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT: description: | When true, `stval` is written with the virtual address of a store when it causes a @@ -190,6 +219,7 @@ params: WHen false, `stval` is written with 0 when a store causes a `StoreAmoPageFault`. schema: type: boolean + REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT: description: | When true, `stval` is written with the virtual PC of an instructino when fetch causes an @@ -199,6 +229,7 @@ params: `InstructionPageFault`. schema: type: boolean + REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION: description: | When true, `stval` is written with the encoding of an instruction that causes an @@ -207,6 +238,7 @@ params: When false `stval` is written with 0 when an `IllegalInstruction` exception occurs. schema: type: boolean + STVAL_WIDTH: description: | The number of implemented bits in `stval`. @@ -215,6 +247,7 @@ params: schema: type: integer maximum: 0xffffffffffffffff + SCOUNTENABLE_EN: description: | Indicates which counters can delegated via `scounteren` @@ -225,35 +258,66 @@ params: SCOUNTENABLE_EN[0:2] must all be false if `Zicntr` is not implemented. SCOUNTENABLE_EN[3:31] must all be false if `Zihpm` is not implemented. + definedBy: + extension: + anyOf: + - name: Zicntr + - name: Zihpm schema: type: array items: type: boolean maxItems: 32 minItems: 32 - extra_validation: | - SCOUNTENABLE_EN[0..2].all? { |en| !en } unless ext?(:Zicntr) - SCOUNTENABLE_EN[3..].all? { |en| !en } unless ext?(:Zihpm) + restrictions: + allOf: + - constraint(): | + for (U32 i = 0; i < 3; i++) { + !implemented?(ExtensionName::Zicntr) -> !SCOUNTENABLE_EN[i]; + } + reason: + Counters 0-2 are defined by Zicntr + - constraint(): | + for (U32 i = 3; i < 32; i++) { + !implemented?(ExtensionName::Zihpm) -> !SCOUNTENABLE_EN[i]; + } + reason: + Counters 3..31 are defined by Zihpm + - constraint(): | + for (U32 i = 3; i < 32; i++) { + !HPM_COUNTER_EN -> !SCOUNTENABLE_EN[i]; + } + reason: + When mhpmcounter[i] does not exist, it cannot be enabled. - # SCOUNTEN_EN can only be writable if the hpm counter exists - SCOUNTENABLE_EN.each_with_index { |scounten, idx| next if idx < 3; assert (!scounten || HPM_COUNTER_EN[idx]) } STVEC_MODE_DIRECT: description: | Whether or not `stvec.MODE` supports Direct (0). schema: type: boolean - extra_validation: assert STVEC_MODE_DIRECT || STVEC_MODE_VECTORED + restrictions: + constraint(): | + !STVEC_MODE_VECTORED -> STVEC_MODE_DIRECT; + reason: + stvec must support at least one mode + STVEC_MODE_VECTORED: description: | Whether or not `stvec.MODE` supports Vectored (1). schema: type: boolean - extra_validation: assert STVEC_MODE_DIRECT || STVEC_MODE_VECTORED + restrictions: + constraint(): | + !STVEC_MODE_DIRECT -> STVEC_MODE_VECTORED; + reason: + stvec must support at least one mode + SATP_MODE_BARE: description: | Whether or not satp.MODE == Bare is supported. schema: type: boolean + TRAP_ON_ECALL_FROM_S: description: | Whether or not an ECALL-from-S-mode causes a synchronous exception. @@ -263,6 +327,7 @@ params: schema: type: boolean default: true + TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY: description: | For implementations that make `satp`.MODE read-only zero @@ -277,37 +342,46 @@ params: some virtual translation mode is supported. schema: type: boolean - default: false - extra_validation: assert TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY == false if ext?(:Sv32) || ext?(:Sv39) || ext?(:Sv48) || ext?(:Sv57) - MSTATUS_FS_WRITABLE: - description: | - When `S` is enabled but `F` is not, mstatus.FS is optionally writable. - schema: - type: boolean - extra_validation: | - assert MSTATUS_FS_WRITABLE == true if ext?(:F) - assert MSTATUS_FS_WRITABLE == false if (!ext?(:S) && !ext?(:F)) + + definedBy: + extension: + # Parameter only applies when the only supported translation mode is Bare + noneOf: + - name: Sv32 + - name: Sv39 + - name: Sv48 + - name: Sv57 + MSTATUS_VS_WRITABLE: description: | When `S` is enabled but `V` is not, mstatus.VS is optionally writable. schema: type: boolean - extra_validation: | - assert MSTATUS_VS_WRITABLE == true if ext?(:V) - assert MSTATUS_VS_WRITABLE == false if (!ext?(:S) && !ext?(:V)) + restrictions: + constraint(): | + implemented?(ExtensionName::V) -> MSTATUS_VS_WRITABLE; + reason: + mstatus.VS must be writeable if V is present + MSTATUS_FS_LEGAL_VALUES: description: | - The set of values that mstatus.FS will accept from a software write. + The set of values that mstatus.FS supports. schema: type: array items: type: integer enum: [0, 1, 2, 3] maxItems: 4 + minItems: 1 uniqueItems: true - also_defined_in: F - extra_validation: | - assert MSTATUS_FS_LEGAL_VALUES.include?(0) && MSTATUS_FS_LEGAL_VALUES.include?(3) if ext?(:F) + restrictions: + constraint(): | + implemented?(ExtensionName::F) && HW_MSTATUS_FS_DIRTY_UPDATE == "never" + -> $ary_includes?(MSTATUS_FS_LEGAL_VALUES, 3); + reason: + If there is a hardware update to mstatus.FS, then the Dirty state must be supported + also_defined_in: S + MSTATUS_VS_LEGAL_VALUES: description: | The set of values that mstatus.VS will accept from a software write. @@ -316,14 +390,16 @@ params: items: type: integer enum: [0, 1, 2, 3] + minItems: 1 maxItems: 4 uniqueItems: true + restrictions: + constraint(): | + implemented?(ExtensionName::V) && HW_MSTATUS_VS_DIRTY_UPDATE == "never" + -> $ary_includes?(MSTATUS_VS_LEGAL_VALUES, 3); + reason: + If there is a hardware update to mstatus.VS, then the Dirty state must be supported also_defined_in: V - extra_validation: | - assert MSTATUS_VS_LEGAL_VALUES.include?(0) && MSTATUS_VS_LEGAL_VALUES.include?(3) if ext?(:V) - - # if HW is writing VS, then Dirty (3) better be a supported value - assert MSTATUS_VS_LEGAL_VALUES.include?(3) if ext?(:V) && (HW_MSTATUS_VS_DIRTY_UPDATE != "never") MSTATUS_TVM_IMPLEMENTED: description: | Whether or not mstatus.TVM is implemented. @@ -332,9 +408,10 @@ params: schema: type: boolean MSTATEEN_ENVCFG_TYPE: - when: - name: Smstateen - version: ~> 1.0 + definedBy: + extension: + name: Smstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] @@ -345,21 +422,30 @@ params: * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 HSTATEEN_ENVCFG_TYPE: - when: + definedBy: allOf: - - name: H - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 + - extension: + name: H + version: ~> 1.0 + - extension: + name: Ssstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] + restrictions: + allOf: + - constraint(): | + MSTATEEN_ENVCFG_TYPE == "read-only-0" -> HSTATEEN_ENVCFG_TYPE == "read-only-0"; + reason: + When mstateen0.ENVCFG is read-only-0, hstateen0.ENVCFG must also be read-only-0 + - constraint(): | + MSTATEEN_ENVCFG_TYPE == "read-only-1" -> HSTATEEN_ENVCFG_TYPE == "read-only-1"; + reason: + When mstateen1.ENVCFG is read-only-1, hstateen0.ENVCFG must also be read-only-1 description: | Behavior of the hstateen0.ENVCFG bit: * 'rw': read-write * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 - extra_validation: | - assert HSTATEEN_ENVCFG_TYPE == 'read-only-0' if MSTATEEN_ENVCFG_TYPE == 'read-only-0' - assert HSTATEEN_ENVCFG_TYPE == 'read-only-1' if MSTATEEN_ENVCFG_TYPE == 'read-only-1' diff --git a/spec/std/isa/ext/Sdext.yaml b/spec/std/isa/ext/Sdext.yaml index 0382b7321..7e8155342 100644 --- a/spec/std/isa/ext/Sdext.yaml +++ b/spec/std/isa/ext/Sdext.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Sdtrig.yaml b/spec/std/isa/ext/Sdtrig.yaml index 7174b6665..059ccf97d 100644 --- a/spec/std/isa/ext/Sdtrig.yaml +++ b/spec/std/isa/ext/Sdtrig.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -34,9 +34,10 @@ versions: params: MSTATEEN_CONTEXT_TYPE: - when: - name: Smstateen - version: ~> 1.0 + definedBy: + extension: + name: Smstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] @@ -47,12 +48,14 @@ params: * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 HSTATEEN_CONTEXT_TYPE: - when: + definedBy: allOf: - - name: H - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 + - extension: + name: H + version: ~> 1.0 + - extension: + name: Ssstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] @@ -62,6 +65,13 @@ params: * 'rw': read-write * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 - extra_validation: | - assert HSTATEEN_CONTEXT_TYPE == 'read-only-0' if MSTATEEN_CONTEXT_TYPE == 'read-only-0' - assert HSTATEEN_CONTEXT_TYPE == 'read-only-1' if MSTATEEN_CONTEXT_TYPE == 'read-only-1' + restrictions: + allOf: + - constraint(): | + MSTATEEN_CONTEXT_TYPE == "read-only-0" -> HSTATEEN_CONTEXT_TYPE == "read-only-0"; + reason: + When mstateen0.CONTEXT is read-only-0, hstateen0.CONTEXT must also be read-only-0 + - constraint(): | + MSTATEEN_CONTEXT_TYPE == "read-only-1" -> HSTATEEN_CONTEXT_TYPE == "read-only-1"; + reason: + When mstateen0.CONTEXT is read-only-1, hstateen0.CONTEXT must also be read-only-1 diff --git a/spec/std/isa/ext/Sha.yaml b/spec/std/isa/ext/Sha.yaml index 45e1da76f..99d26ec69 100644 --- a/spec/std/isa/ext/Sha.yaml +++ b/spec/std/isa/ext/Sha.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -48,20 +48,22 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - - name: H - version: "1.0.0" - - name: Ssstateen - version: "1.0.0" - - name: Shcounterenw - version: "1.0.0" - - name: Shvstvala - version: "1.0.0" - - name: Shtvala - version: "1.0.0" - - name: Shvstvecd - version: "1.0.0" - - name: Shvsatpa - version: "1.0.0" - - name: Shgatpa - version: "1.0.0" + requires: + extension: + allOf: + - name: H + version: "= 1.0.0" + - name: Ssstateen + version: "= 1.0.0" + - name: Shcounterenw + version: "= 1.0.0" + - name: Shvstvala + version: "= 1.0.0" + - name: Shtvala + version: "= 1.0.0" + - name: Shvstvecd + version: "= 1.0.0" + - name: Shvsatpa + version: "= 1.0.0" + - name: Shgatpa + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Shcounterenw.yaml b/spec/std/isa/ext/Shcounterenw.yaml index cd8635629..90fe81987 100644 --- a/spec/std/isa/ext/Shcounterenw.yaml +++ b/spec/std/isa/ext/Shcounterenw.yaml @@ -1,7 +1,8 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. -# SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# WARNING: This file is auto-generated from spec/std/isa/ext/Shcounterenw.layout# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -18,7 +19,14 @@ versions: state: ratified ratification_date: 2023-08 url: https://drive.google.com/file/d/1KcjgbLM5L1ZKY8934aJl8aQwGlMz6Cbo/view?usp=drive_link - param_constraints: - HCOUNTENABLE_EN: - extra_validation: | - HPM_COUNTER_EN.each_with_index { |hpm_exists, idx| assert(!hpm_exists || HCOUNTENABLE_EN[idx]) } + requires: + extension: + name: H + version: "= 1.0.0" + restrictions: + constraint(): | + for (U32 i = 3; i < 32; i++){ + HPM_COUNTER_EN[i] -> HCOUNTENABLE_EN[i]; + } + reason: + Shcounterenw requires that all non-read-only-0 counters can enabled with hcounteren. diff --git a/spec/std/isa/ext/Shgatpa.yaml b/spec/std/isa/ext/Shgatpa.yaml index a6656b16b..3ab662bc5 100644 --- a/spec/std/isa/ext/Shgatpa.yaml +++ b/spec/std/isa/ext/Shgatpa.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -19,19 +19,33 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - param_constraints: - SV32X4_TRANSLATION: - extra_validation: | - (SV32X4_TRANSLATION && ext?(:Sv32)) || (!SV32X4_TRANSLATION && !ext?(:Sv32)) - SV39X4_TRANSLATION: - extra_validation: | - (SV39X4_TRANSLATION && ext?(:Sv39)) || (!SV39X4_TRANSLATION && !ext?(:Sv39)) - SV48X4_TRANSLATION: - extra_validation: | - (SV48X4_TRANSLATION && ext?(:Sv48)) || (!SV48X4_TRANSLATION && !ext?(:Sv48)) - SV57X4_TRANSLATION: - extra_validation: | - (SV57X4_TRANSLATION && ext?(:Sv57)) || (!SV57X4_TRANSLATION && !ext?(:Sv57)) - GSTAGE_MODE_BARE: - schema: - const: true + requires: + extension: + name: H + version: "= 1.0.0" + restrictions: + allOf: + - constraint(): | + implemented?(ExtensionName:Sv32) -> SV32X4_TRANSLATION; + reason: + Shgatpa mandates that or each supported virtual memory scheme SvNN supported in + `satp`, the corresponding hgatp SvNNx4 mode must be supported. + - constraint(): | + implemented?(ExtensionName:Sv39) -> SV39X4_TRANSLATION; + reason: + Shgatpa mandates that or each supported virtual memory scheme SvNN supported in + `satp`, the corresponding hgatp SvNNx4 mode must be supported. + - constraint(): | + implemented?(ExtensionName:Sv48) -> SV48X4_TRANSLATION; + reason: + Shgatpa mandates that or each supported virtual memory scheme SvNN supported in + `satp`, the corresponding hgatp SvNNx4 mode must be supported. + - constraint(): | + implemented?(ExtensionName:Sv57) -> SV57X4_TRANSLATION; + reason: + Shgatpa mandates that or each supported virtual memory scheme SvNN supported in + `satp`, the corresponding hgatp SvNNx4 mode must be supported. + - constraint(): | + true -> GSTAGE_MODE_BARE; + reason: + Shgatpa mandates that `hgatp` mode Bare must also be supported. diff --git a/spec/std/isa/ext/Shtvala.yaml b/spec/std/isa/ext/Shtvala.yaml index 58981a039..26793aca8 100644 --- a/spec/std/isa/ext/Shtvala.yaml +++ b/spec/std/isa/ext/Shtvala.yaml @@ -1,19 +1,15 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension name: Shtvala long_name: htval profile requirements description: | - htval must be written with the faulting virtual address - for load, store, and instruction page-fault, access-fault, and - misaligned exceptions, and for breakpoint exceptions other than - those caused by execution of the `ebreak` or `c.ebreak` instructions. - For virtual-instruction and illegal-instruction exceptions, htval must be written with the - faulting instruction. + htval must be written with the faulting guest physical address in all circumstances permitted by + the ISA. [NOTE] This extension was ratified with the RVA22 profiles. @@ -21,8 +17,15 @@ type: privileged versions: - version: "1.0.0" state: ratified + requires: + extension: + name: H + version: "1.0.0" ratification_date: null - param_constraints: - REPORT_GPA_IN_HTVAL_ON_GUEST_PAGE_FAULT: - schema: - const: true + restrictions: + constraint(): | + implemented?(ExtensionName::Shtvala) -> + REPORT_GPA_IN_HTVAL_ON_GUEST_PAGE_FAULT; + reason: | + When Shtvala is implemented, htval must be written with the faulting guest physical address in all circumstances permitted by + the ISA. diff --git a/spec/std/isa/ext/Shvsatpa.yaml b/spec/std/isa/ext/Shvsatpa.yaml index 337f53f2e..9c7e428f9 100644 --- a/spec/std/isa/ext/Shvsatpa.yaml +++ b/spec/std/isa/ext/Shvsatpa.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Shvstvala.yaml b/spec/std/isa/ext/Shvstvala.yaml index 0e1f1b08b..dd95a9b96 100644 --- a/spec/std/isa/ext/Shvstvala.yaml +++ b/spec/std/isa/ext/Shvstvala.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -22,37 +22,30 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - param_constraints: - REPORT_VA_IN_VSTVAL_ON_BREAKPOINT: - schema: - const: true - REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED: - schema: - const: true - REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED: - schema: - const: true - REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_MISALIGNED: - schema: - const: true - REPORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT: - schema: - const: true - REPORT_VA_IN_VSTVAL_ON_STORE_AMO_ACCESS_FAULT: - schema: - const: true - REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_ACCESS_FAULT: - schema: - const: true - REPORT_VA_IN_VSTVAL_ON_LOAD_PAGE_FAULT: - schema: - const: true - REPORT_VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT: - schema: - const: true - REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT: - schema: - const: true - REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION: - schema: - const: true + requires: + extension: + name: H + version: "= 1.0.0" + restrictions: + constraint(): | + implemented?(ExtensionName::Shvstvala) -> + REPORT_VA_IN_VSTVAL_ON_BREAKPOINT && + REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED && + REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED && + REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED && + REPORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT && + REPORT_VA_IN_VSTVAL_ON_STORE_AMO_ACCESS_FAULT && + REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_ACCESS_FAULT && + REPORT_VA_IN_VSTVAL_ON_LOAD_PAGE_FAULT && + REPORT_VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT && + REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT && + REPORT_ENCODING_IN_VSTVAL_ON_VIRTUAL_INSTRUCTION && + REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION; + reason: | + Shvstvala mandates that vstval must be written with the faulting virtual address + for load, store, and instruction page-fault, access-fault, and + misaligned exceptions, and for breakpoint exceptions other than + those caused by execution of the `ebreak` or `c.ebreak` instructions. + + For virtual-instruction and illegal-instruction exceptions, + vstval must be written with the faulting instruction. diff --git a/spec/std/isa/ext/Shvstvecd.yaml b/spec/std/isa/ext/Shvstvecd.yaml index a181e4776..4a9da1579 100644 --- a/spec/std/isa/ext/Shvstvecd.yaml +++ b/spec/std/isa/ext/Shvstvecd.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -19,7 +19,8 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - param_constraints: - VSTVEC_MODE_DIRECT: - schema: - const: true + restrictions: + constraint(): | + implemented?(ExtensionName::Shvstvecd) -> VSTVEC_MODE_DIRECT; + reason: + Shvstvecd mandates that `vstvec.MODE` must be capable of holding the value 0 (Direct). diff --git a/spec/std/isa/ext/Sm.yaml b/spec/std/isa/ext/Sm.yaml index 27eab5596..432ed7979 100644 --- a/spec/std/isa/ext/Sm.yaml +++ b/spec/std/isa/ext/Sm.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -258,8 +258,13 @@ params: schema: type: string enum: ["low", "high"] - extra_validation: | - assert (MISALIGNED_LDST_EXCEPTION_PRIORITY == "low") if MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE.positive? + restrictions: + constraint(): | + MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE > 1 -> MISALIGNED_LDST_EXCEPTION_PRIORITY == "low"; + reason: + MISALIGNED_LDST_EXCEPTION_PRIORITY cannot be "high" when MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE + is non-zero, since the atomicity of an access cannot be determined in that case until after + address translation. MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE: description: | The maximum granule size, in bytes, that the hart can atomically perform a @@ -406,9 +411,10 @@ params: type: integer minimum: 0 maximum: 0xFFFFFFFFFFFFFFFF - when: - name: Sm - version: ">= 1.12.0" + definedBy: + extension: + name: Sm + version: ">= 1.12.0" PMA_GRANULARITY: description: | log2 of the smallest supported PMA region. @@ -472,22 +478,11 @@ params: Cannot be less than 4-byte alignment. schema: - type: integer - minimum: 4 - maximum: 64 - default: 4 - extra_validation: | - # must be a power of two - assert MTVEC_BASE_ALIGNMENT_DIRECT.to_s(2).count('1') == 1 + enum: [4, 8, 16, 32, 64] MTVEC_BASE_ALIGNMENT_VECTORED: description: | Byte alignment for `mtvec.BASE` when `mtvec.MODE` is Vectored. Cannot be less than 4-byte alignment. schema: - type: integer - minimum: 4 - default: 4 - extra_validation: | - # must be a power of two - assert MTVEC_BASE_ALIGNMENT_VECTORED.to_s(2).count('1') == 1 + enum: [4, 8, 16, 32, 64] diff --git a/spec/std/isa/ext/Smaia.yaml b/spec/std/isa/ext/Smaia.yaml index 0abb054f4..2607c70e2 100644 --- a/spec/std/isa/ext/Smaia.yaml +++ b/spec/std/isa/ext/Smaia.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Smcdeleg.yaml b/spec/std/isa/ext/Smcdeleg.yaml index 8b15cb559..9be9238c4 100644 --- a/spec/std/isa/ext/Smcdeleg.yaml +++ b/spec/std/isa/ext/Smcdeleg.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Smcntrpmf.yaml b/spec/std/isa/ext/Smcntrpmf.yaml index 8b9f34eba..876de72e7 100644 --- a/spec/std/isa/ext/Smcntrpmf.yaml +++ b/spec/std/isa/ext/Smcntrpmf.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Smcsrind.yaml b/spec/std/isa/ext/Smcsrind.yaml index e5ac5bee7..6b5729eb6 100644 --- a/spec/std/isa/ext/Smcsrind.yaml +++ b/spec/std/isa/ext/Smcsrind.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -41,4 +41,5 @@ versions: state: ratified ratification_date: "2024-11" url: "https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-482805d-2025-03-25" - requires: { name: S, version: "~> 1.13" } + requires: + extension: { name: S, version: "~> 1.13" } diff --git a/spec/std/isa/ext/Smhpm.yaml b/spec/std/isa/ext/Smhpm.yaml index 111098a69..fc4b5db13 100644 --- a/spec/std/isa/ext/Smhpm.yaml +++ b/spec/std/isa/ext/Smhpm.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Smmpm.yaml b/spec/std/isa/ext/Smmpm.yaml index 54ba512df..d8a5526c7 100644 --- a/spec/std/isa/ext/Smmpm.yaml +++ b/spec/std/isa/ext/Smmpm.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Smnpm.yaml b/spec/std/isa/ext/Smnpm.yaml index 0539a7664..883b389a7 100644 --- a/spec/std/isa/ext/Smnpm.yaml +++ b/spec/std/isa/ext/Smnpm.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Smpmp.yaml b/spec/std/isa/ext/Smpmp.yaml index 9e09196d2..5c168af13 100644 --- a/spec/std/isa/ext/Smpmp.yaml +++ b/spec/std/isa/ext/Smpmp.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Smrnmi.yaml b/spec/std/isa/ext/Smrnmi.yaml index 210f07cdd..78f6fb20d 100644 --- a/spec/std/isa/ext/Smrnmi.yaml +++ b/spec/std/isa/ext/Smrnmi.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Ssaia.yaml b/spec/std/isa/ext/Ssaia.yaml index 78fd10ce3..ca24758d6 100644 --- a/spec/std/isa/ext/Ssaia.yaml +++ b/spec/std/isa/ext/Ssaia.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -15,14 +15,16 @@ versions: ratification_date: 2023-06 url: https://github.com/riscv/riscv-aia/releases/download/1.0/riscv-interrupts-1.0.pdf requires: - name: S - version: ">= 1.12" + extension: + name: S + version: ">= 1.12" params: MSTATEEN_AIA_TYPE: - when: - name: Smstateen - version: ~> 1.0 + definedBy: + extension: + name: Smstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] @@ -33,28 +35,37 @@ params: * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 HSTATEEN_AIA_TYPE: - when: - allOf: - - name: H - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 + definedBy: + extension: + allOf: + - name: H + version: ~> 1.0 + - name: Ssstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] + restrictions: + allOf: + - constraint(): | + MSTATEEN_AIA_TYPE == "read-only-0" -> HSTATEEN_AIA_TYPE == "read-only-0"; + reason: + HSTATEEN cannot have more options that MSTATEEN + - constraint(): | + MSTATEEN_AIA_TYPE == "read-only-1" -> HSTATEEN_AIA_TYPE == "read-only-1"; + reason: + HSTATEEN cannot have more options that MSTATEEN description: | Behavior of the hstateen0.AIA bit: * 'rw': read-write * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 - extra_validation: | - assert HSTATEEN_AIA_TYPE == 'read-only-0' if MSTATEEN_AIA_TYPE == 'read-only-0' - assert HSTATEEN_AIA_TYPE == 'read-only-1' if MSTATEEN_AIA_TYPE == 'read-only-1' MSTATEEN_IMSIC_TYPE: - when: - name: Smstateen - version: ~> 1.0 + definedBy: + extension: + name: Smstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] @@ -65,21 +76,30 @@ params: * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 HSTATEEN_IMSIC_TYPE: - when: + definedBy: allOf: - - name: H - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 + - extension: + name: Ssaia + - extension: + name: H + - extension: + name: Ssstateen schema: type: string enum: [rw, read-only-0, read-only-1] + restrictions: + allOf: + - constraint(): | + MSTATEEN_IMSIC_TYPE == "read-only-0" -> HSTATEEN_IMSIC_TYPE == "read-only-0"; + reason: + HSTATEEN cannot have more options that MSTATEEN + - constraint(): | + MSTATEEN_IMSIC_TYPE == "read-only-1" -> HSTATEEN_IMSIC_TYPE == "read-only-1"; + reason: + HSTATEEN cannot have more options that MSTATEEN description: | Behavior of the hstateen0.IMSIC bit: * 'rw': read-write * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 - extra_validation: | - assert HSTATEEN_IMSIC_TYPE == 'read-only-0' if MSTATEEN_IMSIC_TYPE == 'read-only-0' - assert HSTATEEN_IMSIC_TYPE == 'read-only-1' if MSTATEEN_IMSIC_TYPE == 'read-only-1' diff --git a/spec/std/isa/ext/Ssccfg.yaml b/spec/std/isa/ext/Ssccfg.yaml index 467ea617a..e397336bb 100644 --- a/spec/std/isa/ext/Ssccfg.yaml +++ b/spec/std/isa/ext/Ssccfg.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Ssccptr.yaml b/spec/std/isa/ext/Ssccptr.yaml index 81d12b2de..6518876f5 100644 --- a/spec/std/isa/ext/Ssccptr.yaml +++ b/spec/std/isa/ext/Ssccptr.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Sscofpmf.yaml b/spec/std/isa/ext/Sscofpmf.yaml index b7cb1d376..5df06e92e 100644 --- a/spec/std/isa/ext/Sscofpmf.yaml +++ b/spec/std/isa/ext/Sscofpmf.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -15,7 +15,8 @@ versions: ratification_date: 2023-08 url: https://drive.google.com/file/d/1KcjgbLM5L1ZKY8934aJl8aQwGlMz6Cbo/view?usp=drive_link requires: - name: Smhpm + extension: + name: Smhpm interrupt_codes: - num: 13 name: Local counter overflow interrupt diff --git a/spec/std/isa/ext/Sscounterenw.yaml b/spec/std/isa/ext/Sscounterenw.yaml index 4b69091d8..cb08c5e23 100644 --- a/spec/std/isa/ext/Sscounterenw.yaml +++ b/spec/std/isa/ext/Sscounterenw.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -17,8 +17,17 @@ versions: - version: "1.0.0" state: ratified ratification_date: 2023-08 + requires: + extension: + allOf: + - name: Zihpm + - name: S url: https://drive.google.com/file/d/1KcjgbLM5L1ZKY8934aJl8aQwGlMz6Cbo/view?usp=drive_link - param_constraints: - SCOUNTENABLE_EN: - extra_validation: | - HPM_COUNTER_EN.each_with_index { |hpm_exists, idx| assert(!hpm_exists || SCOUNTENABLE_EN[idx]) } + restrictions: + constraint(): | + for (U32 i = 0; i < 32; i++) { + HPM_COUNTER_EN[i] -> SCOUNTENABLE_EN[i]; + } + reason: + Sscounterenw mandates that for any hpmcounter that is not read-only zero, the corresponding + bit in `scounteren` must be writable. diff --git a/spec/std/isa/ext/Sscsrind.yaml b/spec/std/isa/ext/Sscsrind.yaml index c5b7bd589..76a6214e6 100644 --- a/spec/std/isa/ext/Sscsrind.yaml +++ b/spec/std/isa/ext/Sscsrind.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -40,17 +40,21 @@ versions: ratification_date: "2024-11" url: "https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-482805d-2025-03-25" requires: - allOf: - - name: S - version: ~> 1.13 - - name: Smcsrind - version: ~> 1.0 + extension: + allOf: + - name: S + version: ~> 1.13 + - name: Smcsrind + version: ~> 1.0 params: MSTATEEN_CSRIND_TYPE: - when: - name: Smstateen - version: ~> 1.0 + definedBy: + allOf: + - extension: + name: Sscsrind + - extension: + name: Smstateen schema: type: string enum: [rw, read-only-0, read-only-1] @@ -61,12 +65,13 @@ params: * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 HSTATEEN_CSRIND_TYPE: - when: - allOf: - - name: H - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 + definedBy: + extension: + allOf: + - name: H + version: ~> 1.0 + - name: Ssstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] @@ -76,6 +81,13 @@ params: * 'rw': read-write * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 - extra_validation: | - assert HSTATEEN_CSRIND_TYPE == 'read-only-0' if MSTATEEN_CSRIND_TYPE == 'read-only-0' - assert HSTATEEN_CSRIND_TYPE == 'read-only-1' if MSTATEEN_CSRIND_TYPE == 'read-only-1' + restrictions: + allOf: + - constraint(): | + MSTATEEN_CSRIND_TYPE == "read-only-0" -> HSTATEEN_CSRIND_TYPE == "read-only-0" + reason: + HSTATEEN cannot have more options that MSTATEEN + - constraint(): | + MSTATEEN_CSRIND_TYPE == "read-only-1" -> HSTATEEN_CSRIND_TYPE == "read-only-1" + reason: + HSTATEEN cannot have more options that MSTATEEN diff --git a/spec/std/isa/ext/Ssnpm.yaml b/spec/std/isa/ext/Ssnpm.yaml index a020d6579..d42c99529 100644 --- a/spec/std/isa/ext/Ssnpm.yaml +++ b/spec/std/isa/ext/Ssnpm.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Sspm.yaml b/spec/std/isa/ext/Sspm.yaml index 8d28fdfae..506870732 100644 --- a/spec/std/isa/ext/Sspm.yaml +++ b/spec/std/isa/ext/Sspm.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Ssqosid.yaml b/spec/std/isa/ext/Ssqosid.yaml index 1ab1b6b95..8520542ce 100644 --- a/spec/std/isa/ext/Ssqosid.yaml +++ b/spec/std/isa/ext/Ssqosid.yaml @@ -1,7 +1,7 @@ # Copyright (c) Syed Owais Ali Shah # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -55,4 +55,5 @@ versions: state: ratified ratification_date: "2024-06" url: "https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-5308687-2025-04-22" - requires: { name: S, version: ~> 1.13 } + requires: + extension: { name: S, version: ~> 1.13 } diff --git a/spec/std/isa/ext/Ssstateen.yaml b/spec/std/isa/ext/Ssstateen.yaml index a66ad7d44..2bcaa777d 100644 --- a/spec/std/isa/ext/Ssstateen.yaml +++ b/spec/std/isa/ext/Ssstateen.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Ssstrict.yaml b/spec/std/isa/ext/Ssstrict.yaml index 6150606f7..717c452ff 100644 --- a/spec/std/isa/ext/Ssstrict.yaml +++ b/spec/std/isa/ext/Ssstrict.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Sstc.yaml b/spec/std/isa/ext/Sstc.yaml index 2837502d4..3ca5518fb 100644 --- a/spec/std/isa/ext/Sstc.yaml +++ b/spec/std/isa/ext/Sstc.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Sstvala.yaml b/spec/std/isa/ext/Sstvala.yaml index 05739197d..cddcd652b 100644 --- a/spec/std/isa/ext/Sstvala.yaml +++ b/spec/std/isa/ext/Sstvala.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Sstvecd.yaml b/spec/std/isa/ext/Sstvecd.yaml index c8a15ae76..09141903c 100644 --- a/spec/std/isa/ext/Sstvecd.yaml +++ b/spec/std/isa/ext/Sstvecd.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Ssu64xl.yaml b/spec/std/isa/ext/Ssu64xl.yaml index c3e692f6e..01a1713a1 100644 --- a/spec/std/isa/ext/Ssu64xl.yaml +++ b/spec/std/isa/ext/Ssu64xl.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Supm.yaml b/spec/std/isa/ext/Supm.yaml index c9865e28b..3da8f2449 100644 --- a/spec/std/isa/ext/Supm.yaml +++ b/spec/std/isa/ext/Supm.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Sv32.yaml b/spec/std/isa/ext/Sv32.yaml index 4edcdc00e..d2a477ae9 100644 --- a/spec/std/isa/ext/Sv32.yaml +++ b/spec/std/isa/ext/Sv32.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Sv48.yaml b/spec/std/isa/ext/Sv48.yaml index 10a3a5eed..3d52f0baa 100644 --- a/spec/std/isa/ext/Sv48.yaml +++ b/spec/std/isa/ext/Sv48.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -14,18 +14,21 @@ versions: state: ratified ratification_date: null requires: - name: Sv39 - version: ">= 1.11" + extension: + name: Sv39 + version: ">= 1.11" - version: "1.12.0" state: ratified ratification_date: null url: https://github.com/riscv/riscv-isa-manual/releases/download/Priv-v1.12/riscv-privileged-20211203.pdf requires: - name: Sv39 - version: ">= 1.12" + extension: + name: Sv39 + version: ">= 1.12" - version: "1.13.0" state: ratified ratification_date: null requires: - name: Sv39 - version: ">= 1.13" + extension: + name: Sv39 + version: ">= 1.13" diff --git a/spec/std/isa/ext/Sv57.yaml b/spec/std/isa/ext/Sv57.yaml index 079fc7f5c..357132ccd 100644 --- a/spec/std/isa/ext/Sv57.yaml +++ b/spec/std/isa/ext/Sv57.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -14,18 +14,21 @@ versions: state: ratified ratification_date: null requires: - name: Sv48 - version: ">= 1.11" + extension: + name: Sv48 + version: ">= 1.11" - version: "1.12.0" state: ratified ratification_date: null url: https://github.com/riscv/riscv-isa-manual/releases/download/Priv-v1.12/riscv-privileged-20211203.pdf requires: - name: Sv48 - version: ">= 1.12" + extension: + name: Sv48 + version: ">= 1.12" - version: "1.13.0" state: ratified ratification_date: null requires: - name: Sv48 - version: ">= 1.13" + extension: + name: Sv48 + version: ">= 1.13" diff --git a/spec/std/isa/ext/Svade.yaml b/spec/std/isa/ext/Svade.yaml index 5767effa5..339657514 100644 --- a/spec/std/isa/ext/Svade.yaml +++ b/spec/std/isa/ext/Svade.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Svadu.yaml b/spec/std/isa/ext/Svadu.yaml index 45121d03d..ede645fff 100644 --- a/spec/std/isa/ext/Svadu.yaml +++ b/spec/std/isa/ext/Svadu.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -121,7 +121,9 @@ versions: - name: Paul Donahue - name: Ved Shanbhogue company: Rivos, Inc. -conflicts: Svade +conflicts: + extension: + name: Svade doc_license: name: Creative Commons Attribution 4.0 International License (CC-BY 4.0) url: https://creativecommons.org/licenses/by/4.0/ diff --git a/spec/std/isa/ext/Svbare.yaml b/spec/std/isa/ext/Svbare.yaml index 4ddcd105b..3bd18c0d1 100644 --- a/spec/std/isa/ext/Svbare.yaml +++ b/spec/std/isa/ext/Svbare.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -19,7 +19,8 @@ versions: state: ratified ratification_date: null requires: - name: S + extension: + name: S param_constraints: SATP_MODE_BARE: schema: diff --git a/spec/std/isa/ext/Svinval.yaml b/spec/std/isa/ext/Svinval.yaml index bd8c91bd2..5829d207b 100644 --- a/spec/std/isa/ext/Svinval.yaml +++ b/spec/std/isa/ext/Svinval.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -81,4 +81,5 @@ versions: state: ratified ratification_date: 2021-11 requires: - name: S + extension: + name: S diff --git a/spec/std/isa/ext/Svnapot.yaml b/spec/std/isa/ext/Svnapot.yaml index e318ad8fc..39c7b93ac 100644 --- a/spec/std/isa/ext/Svnapot.yaml +++ b/spec/std/isa/ext/Svnapot.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -176,4 +176,5 @@ versions: state: ratified ratification_date: 2021-11 requires: - name: Sv39 + extension: + name: Sv39 diff --git a/spec/std/isa/ext/Svpbmt.yaml b/spec/std/isa/ext/Svpbmt.yaml index c33ec7941..9a0832aa5 100644 --- a/spec/std/isa/ext/Svpbmt.yaml +++ b/spec/std/isa/ext/Svpbmt.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -19,7 +19,8 @@ versions: state: ratified ratification_date: null requires: - name: Sv39 + extension: + name: Sv39 param_constraints: SATP_MODE_BARE: schema: diff --git a/spec/std/isa/ext/Svvptc.yaml b/spec/std/isa/ext/Svvptc.yaml index bf63aa3f7..a466720af 100644 --- a/spec/std/isa/ext/Svvptc.yaml +++ b/spec/std/isa/ext/Svvptc.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/U.yaml b/spec/std/isa/ext/U.yaml index 5fddf9beb..fac291a2b 100644 --- a/spec/std/isa/ext/U.yaml +++ b/spec/std/isa/ext/U.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -34,16 +34,26 @@ params: enum: [little, big, dynamic] UXLEN: description: | - Set of XLENs supported in U-mode. Can be one of: - - * 32: SXLEN is always 32 - * 64: SXLEN is always 64 - * 3264: SXLEN can be changed (via mstatus.UXL) between 32 and 64 + Set of XLENs supported in U-mode. When both 32 and 64 are supported, SXLEN can be changed, + via mstatus.UXL, between 32 and 64. schema: - type: integer - enum: [32, 64, 3264] - extra_validation: | - assert UXLEN == 32 if MXLEN == 32 + type: array + items: + enum: [32, 64] + minItems: 1 + maxItems: 2 + uniqueItems: true + restrictions: + allOf: + - constraint(): | + !$ary_includes?(MXLEN, 64) -> !$ary_includes?(UXLEN, 64); + reason: | + XLEN in U-mode can never be larger than XLEN in M-mode + - constraint(): | + $ary_includes?(SXLEN, 32) -> $ary_includes?(UXLEN, 32); + reason: | + If S-mode supports RV32, then U mode must also support it. + TRAP_ON_ECALL_FROM_U: description: | Whether or not an ECALL-from-U-mode causes a synchronous exception. diff --git a/spec/std/isa/ext/V.yaml b/spec/std/isa/ext/V.yaml index 1f9c8c674..292c2be7a 100644 --- a/spec/std/isa/ext/V.yaml +++ b/spec/std/isa/ext/V.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -42,11 +42,20 @@ params: items: type: integer enum: [0, 1, 2, 3] + minItems: 1 maxItems: 4 uniqueItems: true + restrictions: + allOf: + - constraint(): | + implemented?(ExtensionName::V) -> + ary_includes?(MSTATUS_VS_LEGAL_VALUES, 0) && + ary_includes?(MSTATUS_VS_LEGAL_VALUES, 1); + reason: + If V is supported, both Off (0) and Dirty (3) must be supported + - constraint(): | + HW_MSTATUS_VS_DIRTY_UPDATE == "precise" || HW_MSTATUS_VS_DIRTY_UPDATE == "imprecise" -> + ary_includes?(MSTATUS_VS_LEGAL_VALUES, 3) + reason: + If there is a hardware update to mstatus.VS, then the Dirty state must be supported also_defined_in: S - extra_validation: | - assert MSTATUS_VS_LEGAL_VALUES.include?(0) && MSTATUS_VS_LEGAL_VALUES.include?(3) if ext?(:V) - - # if HW is writing VS, then Dirty (3) better be a supported value - assert MSTATUS_VS_LEGAL_VALUES.include?(3) if ext?(:V) && (HW_MSTATUS_VS_DIRTY_UPDATE != "never") diff --git a/spec/std/isa/ext/Xmock.yaml b/spec/std/isa/ext/Xmock.yaml index 068fa86ba..dbd4be700 100644 --- a/spec/std/isa/ext/Xmock.yaml +++ b/spec/std/isa/ext/Xmock.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Za128rs.yaml b/spec/std/isa/ext/Za128rs.yaml index 2fe3c0f53..d7a8edbb6 100644 --- a/spec/std/isa/ext/Za128rs.yaml +++ b/spec/std/isa/ext/Za128rs.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Za64rs.yaml b/spec/std/isa/ext/Za64rs.yaml index d23a7589d..ce24a5980 100644 --- a/spec/std/isa/ext/Za64rs.yaml +++ b/spec/std/isa/ext/Za64rs.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zaamo.yaml b/spec/std/isa/ext/Zaamo.yaml index 7832000c9..bee820b7b 100644 --- a/spec/std/isa/ext/Zaamo.yaml +++ b/spec/std/isa/ext/Zaamo.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zabha.yaml b/spec/std/isa/ext/Zabha.yaml index 63d7c889e..0aac6a1cb 100644 --- a/spec/std/isa/ext/Zabha.yaml +++ b/spec/std/isa/ext/Zabha.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -14,4 +14,6 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - requires: Zaamo + requires: + extension: + name: Zaamo diff --git a/spec/std/isa/ext/Zacas.yaml b/spec/std/isa/ext/Zacas.yaml index 33c46f526..e51290bb6 100644 --- a/spec/std/isa/ext/Zacas.yaml +++ b/spec/std/isa/ext/Zacas.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -14,4 +14,6 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - requires: Zaamo + requires: + extension: + name: Zaamo diff --git a/spec/std/isa/ext/Zalasr.yaml b/spec/std/isa/ext/Zalasr.yaml index 75a8dddfb..72b94a2d3 100644 --- a/spec/std/isa/ext/Zalasr.yaml +++ b/spec/std/isa/ext/Zalasr.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zalrsc.yaml b/spec/std/isa/ext/Zalrsc.yaml index 4f1250741..ff7267535 100644 --- a/spec/std/isa/ext/Zalrsc.yaml +++ b/spec/std/isa/ext/Zalrsc.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zama16b.yaml b/spec/std/isa/ext/Zama16b.yaml index 0c2572642..9ee7e0b0d 100644 --- a/spec/std/isa/ext/Zama16b.yaml +++ b/spec/std/isa/ext/Zama16b.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zawrs.yaml b/spec/std/isa/ext/Zawrs.yaml index 6b0e14bfa..4ce17136c 100644 --- a/spec/std/isa/ext/Zawrs.yaml +++ b/spec/std/isa/ext/Zawrs.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zba.yaml b/spec/std/isa/ext/Zba.yaml index b1e0c1510..4489a5cdc 100644 --- a/spec/std/isa/ext/Zba.yaml +++ b/spec/std/isa/ext/Zba.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zbb.yaml b/spec/std/isa/ext/Zbb.yaml index 0ef41f238..73e98edbb 100644 --- a/spec/std/isa/ext/Zbb.yaml +++ b/spec/std/isa/ext/Zbb.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zbc.yaml b/spec/std/isa/ext/Zbc.yaml index 9b1e07abc..38d2b193b 100644 --- a/spec/std/isa/ext/Zbc.yaml +++ b/spec/std/isa/ext/Zbc.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zbkb.yaml b/spec/std/isa/ext/Zbkb.yaml index a6f6af93d..0d604fda0 100644 --- a/spec/std/isa/ext/Zbkb.yaml +++ b/spec/std/isa/ext/Zbkb.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zbkc.yaml b/spec/std/isa/ext/Zbkc.yaml index 9426ad314..36cdceeb0 100644 --- a/spec/std/isa/ext/Zbkc.yaml +++ b/spec/std/isa/ext/Zbkc.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zbkx.yaml b/spec/std/isa/ext/Zbkx.yaml index 919d0449b..71f5b7978 100644 --- a/spec/std/isa/ext/Zbkx.yaml +++ b/spec/std/isa/ext/Zbkx.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zbs.yaml b/spec/std/isa/ext/Zbs.yaml index ad1ef9810..72109b9ba 100644 --- a/spec/std/isa/ext/Zbs.yaml +++ b/spec/std/isa/ext/Zbs.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zca.yaml b/spec/std/isa/ext/Zca.yaml index 654b0cf7f..ebbd0c332 100644 --- a/spec/std/isa/ext/Zca.yaml +++ b/spec/std/isa/ext/Zca.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zcb.yaml b/spec/std/isa/ext/Zcb.yaml index 33e89f8c4..38a0e44cf 100644 --- a/spec/std/isa/ext/Zcb.yaml +++ b/spec/std/isa/ext/Zcb.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zcd.yaml b/spec/std/isa/ext/Zcd.yaml index 983eb5129..991da578e 100644 --- a/spec/std/isa/ext/Zcd.yaml +++ b/spec/std/isa/ext/Zcd.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -39,8 +39,9 @@ versions: - name: Nicolas Brunie - name: Jiawei requires: - allOf: - - anyOf: - - { name: Zca, version: "= 1.0.0" } - - { name: C, version: "~> 2.0.0" } - - { name: D, version: "~> 2.2.0" } + extension: + allOf: + - anyOf: + - { name: Zca, version: "= 1.0.0" } + - { name: C, version: "~> 2.0.0" } + - { name: D, version: "~> 2.2.0" } diff --git a/spec/std/isa/ext/Zce.yaml b/spec/std/isa/ext/Zce.yaml index 78a20f050..02883ea46 100644 --- a/spec/std/isa/ext/Zce.yaml +++ b/spec/std/isa/ext/Zce.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -48,15 +48,17 @@ versions: - name: Graeme Smecher - name: Nicolas Brunie - name: Jiawei - implies: - - name: Zca - version: "1.0.0" - - name: Zcb - version: "1.0.0" - - name: Zcmp - version: "1.0.0" - - name: Zcmt - version: "1.0.0" + requires: + extension: + allOf: + - name: Zca + version: "= 1.0.0" + - name: Zcb + version: "= 1.0.0" + - name: Zcmp + version: "= 1.0.0" + - name: Zcmt + version: "= 1.0.0" # TODO: this implication is conditional!!! (see description) # So it should look something like this: @@ -80,6 +82,9 @@ versions: # - [Zcmp, "1.0.0"] # - [Zcmt, "1.0.0"] conflicts: - anyOf: - - allOf: [C, D] - - Zcd + extension: + anyOf: + - allOf: + - name: C + - name: D + - name: Zcd diff --git a/spec/std/isa/ext/Zcf.yaml b/spec/std/isa/ext/Zcf.yaml index cf802a9b8..307f6aaf8 100644 --- a/spec/std/isa/ext/Zcf.yaml +++ b/spec/std/isa/ext/Zcf.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -39,8 +39,9 @@ versions: - name: Nicolas Brunie - name: Jiawei requires: - allOf: - - anyOf: - - { name: Zca, version: "= 1.0.0" } - - { name: C, version: "~> 2.0.0" } - - { name: F, version: "~> 2.2.0" } + extension: + allOf: + - anyOf: + - { name: Zca, version: "= 1.0.0" } + - { name: C, version: "~> 2.0.0" } + - { name: F, version: "~> 2.2.0" } diff --git a/spec/std/isa/ext/Zclsd.yaml b/spec/std/isa/ext/Zclsd.yaml index 744843578..b48027061 100644 --- a/spec/std/isa/ext/Zclsd.yaml +++ b/spec/std/isa/ext/Zclsd.yaml @@ -6,7 +6,9 @@ $schema: "ext_schema.json#" kind: extension name: Zclsd -conflicts: Zcf +conflicts: + extension: + name: Zcf long_name: Compressed Load/Store Pair for RV32 description: | This extension adds load and store instructions using register pairs. It does so by reusing existing instruction encodings which are RV64-only. The specification defines 16-bit encodings. @@ -18,4 +20,7 @@ versions: state: ratified ratification_date: "2025-02" requires: - allOf: [ Zilsd, Zca ] + extension: + allOf: + - name: Zilsd + - name: Zca diff --git a/spec/std/isa/ext/Zcmop.yaml b/spec/std/isa/ext/Zcmop.yaml index a6fcf4bb4..c1dd7bdc3 100644 --- a/spec/std/isa/ext/Zcmop.yaml +++ b/spec/std/isa/ext/Zcmop.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -53,4 +53,6 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - requires: C + requires: + extension: + name: C diff --git a/spec/std/isa/ext/Zcmp.yaml b/spec/std/isa/ext/Zcmp.yaml index 7f307e262..8483d12bf 100644 --- a/spec/std/isa/ext/Zcmp.yaml +++ b/spec/std/isa/ext/Zcmp.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -91,8 +91,12 @@ versions: - name: Graeme Smecher - name: Nicolas Brunie - name: Jiawei - requires: { name: Zca, version: ">= 1.0.0" } + requires: + extension: { name: Zca, version: ">= 1.0.0" } conflicts: - anyOf: - - allOf: [C, D] - - Zcd + extension: + anyOf: + - allOf: + - name: C + - name: D + - name: Zcd diff --git a/spec/std/isa/ext/Zcmt.yaml b/spec/std/isa/ext/Zcmt.yaml index 9696d3761..be78dc8b5 100644 --- a/spec/std/isa/ext/Zcmt.yaml +++ b/spec/std/isa/ext/Zcmt.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -41,6 +41,16 @@ type: unprivileged company: name: RISC-V International url: https://riscv.org +conflicts: + extension: + anyOf: + - name: Zcd + - allOf: + - name: C + - name: D + - allOf: + - name: Zca + - name: D versions: - version: "1.0.0" state: ratified @@ -64,41 +74,21 @@ versions: - name: Graeme Smecher - name: Nicolas Brunie - name: Jiawei - implies: - - name: Zca - version: "1.0.0" - - name: Zcb - version: "1.0.0" - - name: Zcmp - version: "1.0.0" - - # TODO: this implication is conditional!!! (see description) - # So it should look something like this: - - # if: - # allOf: - # param: - # XLEN: 32 - # extensions: - # - F - # then: - # - [Zca, "1.0.0"] - # - [Zcb, "1.0.0"] - # - [Zcmp, "1.0.0"] - # - [Zcmt, "1.0.0"] - # - [Zf, "1.0.0"] - # else: - # # TODO: this implication is conditional!!! (see description) - # - [Zca, "1.0.0"] - # - [Zcb, "1.0.0"] - # - [Zcmp, "1.0.0"] - # - [Zcmt, "1.0.0"] - + requires: + extension: + allOf: + - name: Zca + version: "1.0.0" + - name: Zicsr + version: "2.0.0" params: MSTATEEN_JVT_TYPE: - when: - name: Smstateen - version: ~> 1.0 + definedBy: + extension: + allOf: + - name: Zcmt + - name: Smstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] @@ -109,31 +99,41 @@ params: * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 HSTATEEN_JVT_TYPE: - when: - allOf: - - name: H - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 + definedBy: + extension: + allOf: + - name: Zcmt + - name: H + version: ~> 1.0 + - name: Ssstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] + restrictions: + allOf: + - constraint(): | + MSTATEEN_JVT_TYPE == "read-only-0" -> HSTATEEN_JVT_TYPE == "read-only-0"; + reason: + HSTATEEN cannot have more options that MSTATEEN + - constraint(): | + MSTATEEN_JVT_TYPE == "read-only-1" -> HSTATEEN_JVT_TYPE == "read-only-1"; + reason: + HSTATEEN cannot have more options that MSTATEEN description: | Behavior of the hstateen0.JVT bit: * 'rw': read-write * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 - extra_validation: | - assert HSTATEEN_JVT_TYPE == 'read-only-0' if MSTATEEN_JVT_TYPE == 'read-only-0' - assert HSTATEEN_JVT_TYPE == 'read-only-1' if MSTATEEN_JVT_TYPE == 'read-only-1' SSTATEEN_JVT_TYPE: - when: - allOf: - - name: S - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 + definedBy: + extension: + allOf: + - name: S + version: ~> 1.0 + - name: Ssstateen + version: ~> 1.0 schema: type: string enum: [rw, read-only-0, read-only-1] @@ -143,8 +143,21 @@ params: * 'rw': read-write * 'read-only-0': read-only, fixed to 0 * 'read-only-1': read-only, fixed to 1 - extra_validation: | - assert SSTATEEN_JVT_TYPE == 'read-only-0' if MSTATEEN_JVT_TYPE == 'read-only-0' - assert SSTATEEN_JVT_TYPE == 'read-only-0' if HSTATEEN_JVT_TYPE == 'read-only-0' - assert SSTATEEN_JVT_TYPE == 'read-only-1' if MSTATEEN_JVT_TYPE == 'read-only-1' - assert SSTATEEN_JVT_TYPE == 'read-only-1' if HSTATEEN_JVT_TYPE == 'read-only-1' + restrictions: + allOf: + - constraint(): | + MSTATEEN_JVT_TYPE == "read-only-0" -> SSTATEEN_JVT_TYPE == "read-only-0"; + reason: + SSTATEEN cannot have more options that MSTATEEN + - constraint(): | + MSTATEEN_JVT_TYPE == "read-only-1" -> SSTATEEN_JVT_TYPE == "read-only-1"; + reason: + SSTATEEN cannot have more options that MSTATEEN + - constraint(): | + HSTATEEN_JVT_TYPE == "read-only-0" -> SSTATEEN_JVT_TYPE == "read-only-0"; + reason: + SSTATEEN cannot have more options that HSTATEEN + - constraint(): | + HSTATEEN_JVT_TYPE == "read-only-1" -> SSTATEEN_JVT_TYPE == "read-only-1"; + reason: + SSTATEEN cannot have more options that HSTATEEN diff --git a/spec/std/isa/ext/Zfa.yaml b/spec/std/isa/ext/Zfa.yaml index edd776160..5f374a420 100644 --- a/spec/std/isa/ext/Zfa.yaml +++ b/spec/std/isa/ext/Zfa.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -19,4 +19,6 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - requires: F + requires: + extension: + name: F diff --git a/spec/std/isa/ext/Zfbfmin.yaml b/spec/std/isa/ext/Zfbfmin.yaml index a1446b541..ec01db96f 100644 --- a/spec/std/isa/ext/Zfbfmin.yaml +++ b/spec/std/isa/ext/Zfbfmin.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -21,6 +21,7 @@ versions: state: ratified ratification_date: null requires: - allOf: - - name: F - - name: Zfh + extension: + allOf: + - name: F + - name: Zfh diff --git a/spec/std/isa/ext/Zfh.yaml b/spec/std/isa/ext/Zfh.yaml index d69a0d5d2..7edcd7e45 100644 --- a/spec/std/isa/ext/Zfh.yaml +++ b/spec/std/isa/ext/Zfh.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zfhmin.yaml b/spec/std/isa/ext/Zfhmin.yaml index 9eec838dc..decad881f 100644 --- a/spec/std/isa/ext/Zfhmin.yaml +++ b/spec/std/isa/ext/Zfhmin.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -51,5 +51,6 @@ versions: state: ratified ratification_date: 2021-11 requires: - name: F - version: ">= 2.2" + extension: + name: F + version: ">= 2.2" diff --git a/spec/std/isa/ext/Zhinx.yaml b/spec/std/isa/ext/Zhinx.yaml index 614e54165..ab770bbe3 100644 --- a/spec/std/isa/ext/Zhinx.yaml +++ b/spec/std/isa/ext/Zhinx.yaml @@ -1,7 +1,7 @@ -# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. -# SPDX-License-Identifier: BSD-3-Clause-Clear - -# yaml-language-server: $schema=../../schemas/ext_schema.json +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zic64b.yaml b/spec/std/isa/ext/Zic64b.yaml index f79fef7b2..36e4d75e4 100644 --- a/spec/std/isa/ext/Zic64b.yaml +++ b/spec/std/isa/ext/Zic64b.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -25,10 +25,11 @@ versions: - name: Krste Asanovic company: SiFive, Inc. requires: - anyOf: - - name: Zicbom - - name: Zicboz - - name: Zicbop + extension: + anyOf: + - name: Zicbom + - name: Zicboz + - name: Zicbop param_constraints: CACHE_BLOCK_SIZE: schema: diff --git a/spec/std/isa/ext/Zicbom.yaml b/spec/std/isa/ext/Zicbom.yaml index 3d32ccbe8..a19d9fabb 100644 --- a/spec/std/isa/ext/Zicbom.yaml +++ b/spec/std/isa/ext/Zicbom.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zicbop.yaml b/spec/std/isa/ext/Zicbop.yaml index 56e304ece..dedeeb514 100644 --- a/spec/std/isa/ext/Zicbop.yaml +++ b/spec/std/isa/ext/Zicbop.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zicboz.yaml b/spec/std/isa/ext/Zicboz.yaml index 441c813f9..0cbeae3ae 100644 --- a/spec/std/isa/ext/Zicboz.yaml +++ b/spec/std/isa/ext/Zicboz.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Ziccamoa.yaml b/spec/std/isa/ext/Ziccamoa.yaml index 83af77191..2e777b802 100644 --- a/spec/std/isa/ext/Ziccamoa.yaml +++ b/spec/std/isa/ext/Ziccamoa.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Ziccamoc.yaml b/spec/std/isa/ext/Ziccamoc.yaml index ad6853496..efcc150f1 100644 --- a/spec/std/isa/ext/Ziccamoc.yaml +++ b/spec/std/isa/ext/Ziccamoc.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Ziccif.yaml b/spec/std/isa/ext/Ziccif.yaml index 04aef725c..cad8e2046 100644 --- a/spec/std/isa/ext/Ziccif.yaml +++ b/spec/std/isa/ext/Ziccif.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zicclsm.yaml b/spec/std/isa/ext/Zicclsm.yaml index bec846e9a..8dbce5385 100644 --- a/spec/std/isa/ext/Zicclsm.yaml +++ b/spec/std/isa/ext/Zicclsm.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Ziccrse.yaml b/spec/std/isa/ext/Ziccrse.yaml index b1773b7ba..5ff2d2907 100644 --- a/spec/std/isa/ext/Ziccrse.yaml +++ b/spec/std/isa/ext/Ziccrse.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zicfilp.yaml b/spec/std/isa/ext/Zicfilp.yaml index f8a339f4e..6be6f6d7d 100644 --- a/spec/std/isa/ext/Zicfilp.yaml +++ b/spec/std/isa/ext/Zicfilp.yaml @@ -1,6 +1,8 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear +# yaml-language-server: $schema=../../../schemas/ext_schema.json + $schema: "ext_schema.json#" kind: extension name: Zicfilp diff --git a/spec/std/isa/ext/Zicfiss.yaml b/spec/std/isa/ext/Zicfiss.yaml index 06a180c3f..10bd616e7 100644 --- a/spec/std/isa/ext/Zicfiss.yaml +++ b/spec/std/isa/ext/Zicfiss.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zicntr.yaml b/spec/std/isa/ext/Zicntr.yaml index a5a52c1f7..213b451dc 100644 --- a/spec/std/isa/ext/Zicntr.yaml +++ b/spec/std/isa/ext/Zicntr.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -14,8 +14,9 @@ versions: state: ratified ratification_date: 2019-12 requires: - name: Zicsr - version: ">= 2.0" + extension: + name: Zicsr + version: ">= 2.0" params: TIME_CSR_IMPLEMENTED: description: | diff --git a/spec/std/isa/ext/Zicond.yaml b/spec/std/isa/ext/Zicond.yaml index 5955a9470..8021be458 100644 --- a/spec/std/isa/ext/Zicond.yaml +++ b/spec/std/isa/ext/Zicond.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zicsr.yaml b/spec/std/isa/ext/Zicsr.yaml index 7a25ac7a0..9d375ea32 100644 --- a/spec/std/isa/ext/Zicsr.yaml +++ b/spec/std/isa/ext/Zicsr.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zifencei.yaml b/spec/std/isa/ext/Zifencei.yaml index e163adc73..d2a181efc 100644 --- a/spec/std/isa/ext/Zifencei.yaml +++ b/spec/std/isa/ext/Zifencei.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zihintntl.yaml b/spec/std/isa/ext/Zihintntl.yaml index 689f58b86..dd57172ed 100644 --- a/spec/std/isa/ext/Zihintntl.yaml +++ b/spec/std/isa/ext/Zihintntl.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zihintpause.yaml b/spec/std/isa/ext/Zihintpause.yaml index b05766183..df87e9193 100644 --- a/spec/std/isa/ext/Zihintpause.yaml +++ b/spec/std/isa/ext/Zihintpause.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zihpm.yaml b/spec/std/isa/ext/Zihpm.yaml index 2bff23121..cc21407b2 100644 --- a/spec/std/isa/ext/Zihpm.yaml +++ b/spec/std/isa/ext/Zihpm.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -14,4 +14,5 @@ versions: state: ratified ratification_date: null requires: - name: Smhpm + extension: + name: Smhpm diff --git a/spec/std/isa/ext/Zilsd.yaml b/spec/std/isa/ext/Zilsd.yaml index 05ce56d1e..2bdc642ac 100644 --- a/spec/std/isa/ext/Zilsd.yaml +++ b/spec/std/isa/ext/Zilsd.yaml @@ -1,6 +1,8 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear +# yaml-language-server: $schema=../../../schemas/ext_schema.json + $schema: "ext_schema.json#" kind: extension name: Zilsd diff --git a/spec/std/isa/ext/Zimop.yaml b/spec/std/isa/ext/Zimop.yaml index 838ad6867..25a0fe252 100644 --- a/spec/std/isa/ext/Zimop.yaml +++ b/spec/std/isa/ext/Zimop.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zk.yaml b/spec/std/isa/ext/Zk.yaml index b1b0effe2..683069b51 100644 --- a/spec/std/isa/ext/Zk.yaml +++ b/spec/std/isa/ext/Zk.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -19,10 +19,12 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - - name: "Zkn" - version: "1.0.0" - - name: "Zkr" - version: "1.0.0" - - name: "Zkt" - version: "1.0.0" + requires: + extension: + allOf: + - name: "Zkn" + version: "= 1.0.0" + - name: "Zkr" + version: "= 1.0.0" + - name: "Zkt" + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zkn.yaml b/spec/std/isa/ext/Zkn.yaml index 3976152f3..def1d165a 100644 --- a/spec/std/isa/ext/Zkn.yaml +++ b/spec/std/isa/ext/Zkn.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -22,16 +22,18 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - - name: "Zbkb" - version: "1.0.0" - - name: "Zbkc" - version: "1.0.0" - - name: "Zbkx" - version: "1.0.0" - - name: "Zkne" - version: "1.0.0" - - name: "Zknd" - version: "1.0.0" - - name: "Zknh" - version: "1.0.0" + requires: + extension: + allOf: + - name: "Zbkb" + version: "= 1.0.0" + - name: "Zbkc" + version: "= 1.0.0" + - name: "Zbkx" + version: "= 1.0.0" + - name: "Zkne" + version: "= 1.0.0" + - name: "Zknd" + version: "= 1.0.0" + - name: "Zknh" + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zknd.yaml b/spec/std/isa/ext/Zknd.yaml index c9adda921..74ff1e10b 100644 --- a/spec/std/isa/ext/Zknd.yaml +++ b/spec/std/isa/ext/Zknd.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zkne.yaml b/spec/std/isa/ext/Zkne.yaml index e43ee967a..71535ee9d 100644 --- a/spec/std/isa/ext/Zkne.yaml +++ b/spec/std/isa/ext/Zkne.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zknh.yaml b/spec/std/isa/ext/Zknh.yaml index d18b3b04b..709f91486 100644 --- a/spec/std/isa/ext/Zknh.yaml +++ b/spec/std/isa/ext/Zknh.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zkr.yaml b/spec/std/isa/ext/Zkr.yaml index c7ce40f08..0b20bbf27 100644 --- a/spec/std/isa/ext/Zkr.yaml +++ b/spec/std/isa/ext/Zkr.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zks.yaml b/spec/std/isa/ext/Zks.yaml index 44b2b1364..2fa0c7528 100644 --- a/spec/std/isa/ext/Zks.yaml +++ b/spec/std/isa/ext/Zks.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -21,16 +21,18 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - - name: Zbkb - version: "1.0.0" - - name: Zbkc - version: "1.0.0" - - name: Zbkx - version: "1.0.0" - - name: Zkne - version: "1.0.0" - - name: Zknd - version: "1.0.0" - - name: Zknh - version: "1.0.0" + requires: + extension: + allOf: + - name: Zbkb + version: "= 1.0.0" + - name: Zbkc + version: "= 1.0.0" + - name: Zbkx + version: "= 1.0.0" + - name: Zkne + version: "= 1.0.0" + - name: Zknd + version: "= 1.0.0" + - name: Zknh + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zksed.yaml b/spec/std/isa/ext/Zksed.yaml index 9520a2dc9..d5b10792c 100644 --- a/spec/std/isa/ext/Zksed.yaml +++ b/spec/std/isa/ext/Zksed.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zksh.yaml b/spec/std/isa/ext/Zksh.yaml index 97e8be97f..011069920 100644 --- a/spec/std/isa/ext/Zksh.yaml +++ b/spec/std/isa/ext/Zksh.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zkt.yaml b/spec/std/isa/ext/Zkt.yaml index 25921430e..ba37de269 100644 --- a/spec/std/isa/ext/Zkt.yaml +++ b/spec/std/isa/ext/Zkt.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zmmul.yaml b/spec/std/isa/ext/Zmmul.yaml index 0fec1f0ff..2b1b3a068 100644 --- a/spec/std/isa/ext/Zmmul.yaml +++ b/spec/std/isa/ext/Zmmul.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zvbb.yaml b/spec/std/isa/ext/Zvbb.yaml index ea59cbac8..bbfeb36c2 100644 --- a/spec/std/isa/ext/Zvbb.yaml +++ b/spec/std/isa/ext/Zvbb.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -14,6 +14,7 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - name: Zvkb - version: "1.0.0" + requires: + extension: + name: Zvkb + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zvbc.yaml b/spec/std/isa/ext/Zvbc.yaml index e17be6604..19599f360 100644 --- a/spec/std/isa/ext/Zvbc.yaml +++ b/spec/std/isa/ext/Zvbc.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zve32f.yaml b/spec/std/isa/ext/Zve32f.yaml index 7d7ab96ea..c7d8db34d 100644 --- a/spec/std/isa/ext/Zve32f.yaml +++ b/spec/std/isa/ext/Zve32f.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -14,4 +14,6 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - requires: F + requires: + extension: + name: F diff --git a/spec/std/isa/ext/Zvfbfmin.yaml b/spec/std/isa/ext/Zvfbfmin.yaml index b50f3c7d7..08699abaa 100644 --- a/spec/std/isa/ext/Zvfbfmin.yaml +++ b/spec/std/isa/ext/Zvfbfmin.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -19,6 +19,7 @@ versions: state: ratified ratification_date: null requires: - anyOf: - - V - - Zve32f + extension: + anyOf: + - name: V + - name: Zve32f diff --git a/spec/std/isa/ext/Zvfbfwma.yaml b/spec/std/isa/ext/Zvfbfwma.yaml index 9d59a77e1..f6aa5f155 100644 --- a/spec/std/isa/ext/Zvfbfwma.yaml +++ b/spec/std/isa/ext/Zvfbfwma.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -17,6 +17,7 @@ versions: state: ratified ratification_date: null requires: - allOf: - - Zvfbfmin - - Zfbfmin + extension: + allOf: + - name: Zvfbfmin + - name: Zfbfmin diff --git a/spec/std/isa/ext/Zvfh.yaml b/spec/std/isa/ext/Zvfh.yaml index 2481eacf4..f7df884e3 100644 --- a/spec/std/isa/ext/Zvfh.yaml +++ b/spec/std/isa/ext/Zvfh.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -37,6 +37,7 @@ versions: state: ratified ratification_date: null requires: - allOf: - - Zve32f - - Zfhmin + extension: + allOf: + - name: Zve32f + - name: Zfhmin diff --git a/spec/std/isa/ext/Zvfhmin.yaml b/spec/std/isa/ext/Zvfhmin.yaml index bd87da1d6..f0023d681 100644 --- a/spec/std/isa/ext/Zvfhmin.yaml +++ b/spec/std/isa/ext/Zvfhmin.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -21,4 +21,6 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - requires: Zve32f + requires: + extension: + name: Zve32f diff --git a/spec/std/isa/ext/Zvkb.yaml b/spec/std/isa/ext/Zvkb.yaml index ad230b700..b80ab6c23 100644 --- a/spec/std/isa/ext/Zvkb.yaml +++ b/spec/std/isa/ext/Zvkb.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zvkg.yaml b/spec/std/isa/ext/Zvkg.yaml index 727b13392..0c131d95b 100644 --- a/spec/std/isa/ext/Zvkg.yaml +++ b/spec/std/isa/ext/Zvkg.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zvkn.yaml b/spec/std/isa/ext/Zvkn.yaml index 989097a66..092493941 100644 --- a/spec/std/isa/ext/Zvkn.yaml +++ b/spec/std/isa/ext/Zvkn.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -19,12 +19,14 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - - name: Zvkned - version: "1.0.0" - - name: Zvknhb - version: "1.0.0" - - name: Zvkb - version: "1.0.0" - - name: Zvkt - version: "1.0.0" + requires: + extension: + allOf: + - name: Zvkned + version: "= 1.0.0" + - name: Zvknhb + version: "= 1.0.0" + - name: Zvkb + version: "= 1.0.0" + - name: Zvkt + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zvknc.yaml b/spec/std/isa/ext/Zvknc.yaml index a77d6a0f6..42e0693dd 100644 --- a/spec/std/isa/ext/Zvknc.yaml +++ b/spec/std/isa/ext/Zvknc.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -18,8 +18,10 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - - name: Zvkn - version: "1.0.0" - - name: Zvbc - version: "1.0.0" + requires: + extension: + allOf: + - name: Zvkn + version: "= 1.0.0" + - name: Zvbc + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zvkned.yaml b/spec/std/isa/ext/Zvkned.yaml index 1062a2659..a433d5a50 100644 --- a/spec/std/isa/ext/Zvkned.yaml +++ b/spec/std/isa/ext/Zvkned.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zvkng.yaml b/spec/std/isa/ext/Zvkng.yaml index 4f4eab66e..7f4b1dd5f 100644 --- a/spec/std/isa/ext/Zvkng.yaml +++ b/spec/std/isa/ext/Zvkng.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -18,8 +18,10 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - - name: Zvkn - version: "1.0.0" - - name: Zvkg - version: "1.0.0" + requires: + extension: + allOf: + - name: Zvkn + version: "= 1.0.0" + - name: Zvkg + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zvknha.yaml b/spec/std/isa/ext/Zvknha.yaml index 425b373af..c8e06ab59 100644 --- a/spec/std/isa/ext/Zvknha.yaml +++ b/spec/std/isa/ext/Zvknha.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zvknhb.yaml b/spec/std/isa/ext/Zvknhb.yaml index 567e88cab..f2e95de20 100644 --- a/spec/std/isa/ext/Zvknhb.yaml +++ b/spec/std/isa/ext/Zvknhb.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -15,6 +15,7 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - name: Zvknha - version: "1.0.0" + requires: + extension: + name: Zvknha + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zvks.yaml b/spec/std/isa/ext/Zvks.yaml index 0253bdb14..54993e2bc 100644 --- a/spec/std/isa/ext/Zvks.yaml +++ b/spec/std/isa/ext/Zvks.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -19,12 +19,14 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - - name: Zvksed - version: "1.0.0" - - name: Zvksh - version: "1.0.0" - - name: Zvkb - version: "1.0.0" - - name: Zvkt - version: "1.0.0" + requires: + extension: + allOf: + - name: Zvksed + version: "= 1.0.0" + - name: Zvksh + version: "= 1.0.0" + - name: Zvkb + version: "= 1.0.0" + - name: Zvkt + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zvksc.yaml b/spec/std/isa/ext/Zvksc.yaml index 84c3c024d..8a0bf5270 100644 --- a/spec/std/isa/ext/Zvksc.yaml +++ b/spec/std/isa/ext/Zvksc.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -18,8 +18,10 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - - name: Zvks - version: "1.0.0" - - name: Zvbc - version: "1.0.0" + requires: + extension: + allOf: + - name: Zvks + version: "= 1.0.0" + - name: Zvbc + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zvksed.yaml b/spec/std/isa/ext/Zvksed.yaml index 7aebe4ac1..88ff661be 100644 --- a/spec/std/isa/ext/Zvksed.yaml +++ b/spec/std/isa/ext/Zvksed.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zvksg.yaml b/spec/std/isa/ext/Zvksg.yaml index a074b0bbe..1b6b518b2 100644 --- a/spec/std/isa/ext/Zvksg.yaml +++ b/spec/std/isa/ext/Zvksg.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension @@ -18,8 +18,10 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - implies: - - name: Zvks - version: "1.0.0" - - name: Zvkg - version: "1.0.0" + requires: + extension: + allOf: + - name: Zvks + version: "= 1.0.0" + - name: Zvkg + version: "= 1.0.0" diff --git a/spec/std/isa/ext/Zvksh.yaml b/spec/std/isa/ext/Zvksh.yaml index df075fd2b..0cc8df5cb 100644 --- a/spec/std/isa/ext/Zvksh.yaml +++ b/spec/std/isa/ext/Zvksh.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/ext/Zvkt.yaml b/spec/std/isa/ext/Zvkt.yaml index 6183c1665..df98801a5 100644 --- a/spec/std/isa/ext/Zvkt.yaml +++ b/spec/std/isa/ext/Zvkt.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/ext_schema.json +# yaml-language-server: $schema=../../../schemas/ext_schema.json $schema: "ext_schema.json#" kind: extension diff --git a/spec/std/isa/inst/B/andn.yaml b/spec/std/isa/inst/B/andn.yaml index a2e493ca2..5b93d5685 100644 --- a/spec/std/isa/inst/B/andn.yaml +++ b/spec/std/isa/inst/B/andn.yaml @@ -11,7 +11,10 @@ description: | Performs the bitwise logical AND operation between `rs1` and the bitwise inversion of `rs2`. definedBy: - anyOf: [Zbb, Zbkb] + extension: + anyOf: + - name: Zbb + - name: Zbkb assembly: xd, xs1, xs2 encoding: match: 0100000----------111-----0110011 diff --git a/spec/std/isa/inst/B/clmul.yaml b/spec/std/isa/inst/B/clmul.yaml index 33a4b6e85..c1bd582b6 100644 --- a/spec/std/isa/inst/B/clmul.yaml +++ b/spec/std/isa/inst/B/clmul.yaml @@ -10,7 +10,10 @@ long_name: Carry-less multiply (low-part) description: | `clmul` produces the lower half of the 2*XLEN carry-less product definedBy: - anyOf: [Zbc, Zbkc] + extension: + anyOf: + - name: Zbc + - name: Zbkc assembly: xd, xs1, xs2 encoding: match: 0000101----------001-----0110011 diff --git a/spec/std/isa/inst/B/clmulh.yaml b/spec/std/isa/inst/B/clmulh.yaml index 65ece71fc..bb13a3dfc 100644 --- a/spec/std/isa/inst/B/clmulh.yaml +++ b/spec/std/isa/inst/B/clmulh.yaml @@ -10,7 +10,10 @@ long_name: Carry-less multiply (high-part) description: | `clmulh` produces the upper half of the 2*XLEN carry-less product definedBy: - anyOf: [Zbc, Zbkc] + extension: + anyOf: + - name: Zbc + - name: Zbkc assembly: xd, xs1, xs2 encoding: match: 0000101----------011-----0110011 diff --git a/spec/std/isa/inst/B/orn.yaml b/spec/std/isa/inst/B/orn.yaml index b53cc2442..37ae8311b 100644 --- a/spec/std/isa/inst/B/orn.yaml +++ b/spec/std/isa/inst/B/orn.yaml @@ -10,7 +10,10 @@ long_name: OR with inverted operand description: | Performs the bitwise logical OR operation between rs1 and the bitwise inversion of rs2. definedBy: - anyOf: [Zbb, Zbkb] + extension: + anyOf: + - name: Zbb + - name: Zbkb assembly: xd, xs1, xs2 encoding: match: 0100000----------110-----0110011 diff --git a/spec/std/isa/inst/B/rev8.yaml b/spec/std/isa/inst/B/rev8.yaml index 5fecfe360..c4fdaa18f 100644 --- a/spec/std/isa/inst/B/rev8.yaml +++ b/spec/std/isa/inst/B/rev8.yaml @@ -18,7 +18,10 @@ description: | and halfword-sized byte-reversal, perform a `rev8 rd,rs` followed by a `srai rd,rd,K`, where K is XLEN-32 and XLEN-16, respectively. definedBy: - anyOf: [Zbb, Zbkb] + extension: + anyOf: + - name: Zbb + - name: Zbkb assembly: xd, xs1 encoding: RV32: diff --git a/spec/std/isa/inst/B/rol.yaml b/spec/std/isa/inst/B/rol.yaml index cead3920f..c58f67a9c 100644 --- a/spec/std/isa/inst/B/rol.yaml +++ b/spec/std/isa/inst/B/rol.yaml @@ -10,7 +10,10 @@ long_name: Rotate left (Register) description: | Performs a rotate left of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2. definedBy: - anyOf: [Zbb, Zbkb] + extension: + anyOf: + - name: Zbb + - name: Zbkb assembly: xd, xs1, xs2 encoding: match: 0110000----------001-----0110011 diff --git a/spec/std/isa/inst/B/rolw.yaml b/spec/std/isa/inst/B/rolw.yaml index 1f6c2979c..a1076ef5e 100644 --- a/spec/std/isa/inst/B/rolw.yaml +++ b/spec/std/isa/inst/B/rolw.yaml @@ -11,7 +11,10 @@ description: | Performs a rotate left of the least-significant word of rs1 by the amount in least-significant 5 bits of rs2. The resulting word value is sign-extended by copying bit 31 to all of the more-significant bits. definedBy: - anyOf: [Zbb, Zbkb] + extension: + anyOf: + - name: Zbb + - name: Zbkb assembly: xd, xs1, xs2 base: 64 encoding: diff --git a/spec/std/isa/inst/B/ror.yaml b/spec/std/isa/inst/B/ror.yaml index 8749c2714..23eaa2e56 100644 --- a/spec/std/isa/inst/B/ror.yaml +++ b/spec/std/isa/inst/B/ror.yaml @@ -10,7 +10,10 @@ long_name: Rotate right (Register) description: | Performs a rotate right of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2. definedBy: - anyOf: [Zbb, Zbkb] + extension: + anyOf: + - name: Zbb + - name: Zbkb assembly: xd, xs1, xs2 encoding: match: 0110000----------101-----0110011 diff --git a/spec/std/isa/inst/B/rori.yaml b/spec/std/isa/inst/B/rori.yaml index c0c98491a..fd8caceb3 100644 --- a/spec/std/isa/inst/B/rori.yaml +++ b/spec/std/isa/inst/B/rori.yaml @@ -11,7 +11,10 @@ description: | Performs a rotate right of rs1 by the amount in the least-significant log2(XLEN) bits of shamt. For RV32, the encodings corresponding to shamt[5]=1 are reserved. definedBy: - anyOf: [Zbb, Zbkb] + extension: + anyOf: + - name: Zbb + - name: Zbkb assembly: xd, xs1, shamt encoding: RV32: diff --git a/spec/std/isa/inst/B/roriw.yaml b/spec/std/isa/inst/B/roriw.yaml index 4c3ed5dd6..8088d1772 100644 --- a/spec/std/isa/inst/B/roriw.yaml +++ b/spec/std/isa/inst/B/roriw.yaml @@ -12,7 +12,10 @@ description: | the least-significant log2(XLEN) bits of shamt. The resulting word value is sign-extended by copying bit 31 to all of the more-significant bits. definedBy: - anyOf: [Zbb, Zbkb] + extension: + anyOf: + - name: Zbb + - name: Zbkb assembly: xd, xs1, shamt base: 64 encoding: diff --git a/spec/std/isa/inst/B/rorw.yaml b/spec/std/isa/inst/B/rorw.yaml index ef81d90b6..de06641ff 100644 --- a/spec/std/isa/inst/B/rorw.yaml +++ b/spec/std/isa/inst/B/rorw.yaml @@ -12,7 +12,10 @@ description: | least-significant 5 bits of rs2. The resultant word is sign-extended by copying bit 31 to all of the more-significant bits. definedBy: - anyOf: [Zbb, Zbkb] + extension: + anyOf: + - name: Zbb + - name: Zbkb assembly: xd, xs1, xs2 base: 64 encoding: diff --git a/spec/std/isa/inst/B/xnor.yaml b/spec/std/isa/inst/B/xnor.yaml index 6394b3d50..7507c8e2f 100644 --- a/spec/std/isa/inst/B/xnor.yaml +++ b/spec/std/isa/inst/B/xnor.yaml @@ -10,7 +10,10 @@ long_name: Exclusive NOR description: | Performs the bit-wise exclusive-NOR operation on rs1 and rs2. definedBy: - anyOf: [Zbb, Zbkb] + extension: + anyOf: + - name: Zbb + - name: Zbkb assembly: xd, xs1, xs2 encoding: match: 0100000----------100-----0110011 diff --git a/spec/std/isa/inst/C/c.add.yaml b/spec/std/isa/inst/C/c.add.yaml index dc73eb646..10ce40c10 100644 --- a/spec/std/isa/inst/C/c.add.yaml +++ b/spec/std/isa/inst/C/c.add.yaml @@ -11,9 +11,10 @@ description: | Add the value in xs2 to xd, and store the result in xd. C.ADD expands into `add xd, xd, xs2`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, xs2 encoding: match: 1001----------10 diff --git a/spec/std/isa/inst/C/c.addi.yaml b/spec/std/isa/inst/C/c.addi.yaml index 2b34b46c2..329f57e89 100644 --- a/spec/std/isa/inst/C/c.addi.yaml +++ b/spec/std/isa/inst/C/c.addi.yaml @@ -13,9 +13,10 @@ description: | C.ADDI is only valid when rd ≠ x0 and imm ≠ 0. The code points with rd=x0 encode the C.NOP instruction; the remaining code points with imm=0 encode HINTs. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, imm encoding: match: 000-----------01 diff --git a/spec/std/isa/inst/C/c.addi16sp.yaml b/spec/std/isa/inst/C/c.addi16sp.yaml index b93fc1345..b8e2e257d 100644 --- a/spec/std/isa/inst/C/c.addi16sp.yaml +++ b/spec/std/isa/inst/C/c.addi16sp.yaml @@ -13,9 +13,10 @@ description: | It expands into `addi x2, x2, nzimm[9:4]`. C.ADDI16SP is only valid when nzimm ≠ 0; the code point with nzimm=0 is reserved. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: sp, imm encoding: match: 011-00010-----01 diff --git a/spec/std/isa/inst/C/c.addi4spn.yaml b/spec/std/isa/inst/C/c.addi4spn.yaml index 4d2193418..a06e167a2 100644 --- a/spec/std/isa/inst/C/c.addi4spn.yaml +++ b/spec/std/isa/inst/C/c.addi4spn.yaml @@ -13,9 +13,10 @@ description: | It expands to `addi rd', x2, nzuimm[9:2]`. C.ADDI4SPN is only valid when nzuimm ≠ 0; the code points with nzuimm=0 are reserved. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, sp, imm encoding: match: 000-----------00 diff --git a/spec/std/isa/inst/C/c.addiw.yaml b/spec/std/isa/inst/C/c.addiw.yaml index 19f2389e0..921acdf92 100644 --- a/spec/std/isa/inst/C/c.addiw.yaml +++ b/spec/std/isa/inst/C/c.addiw.yaml @@ -13,9 +13,10 @@ description: | The immediate can be zero for C.ADDIW, where this corresponds to `sext.w rd`. C.ADDIW is only valid when rd ≠ x0; the code points with rd=x0 are reserved. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca base: 64 assembly: xd, imm encoding: diff --git a/spec/std/isa/inst/C/c.addw.yaml b/spec/std/isa/inst/C/c.addw.yaml index 2a2bad9bb..8b467f939 100644 --- a/spec/std/isa/inst/C/c.addw.yaml +++ b/spec/std/isa/inst/C/c.addw.yaml @@ -12,9 +12,10 @@ description: | The xd and xs2 register indexes should be used as xd+8 and xs2+8 (registers x8-x15). C.ADDW expands into `addw xd, xd, xs2`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca base: 64 assembly: xd, xs2 encoding: diff --git a/spec/std/isa/inst/C/c.and.yaml b/spec/std/isa/inst/C/c.and.yaml index d36584060..c09b2ffa6 100644 --- a/spec/std/isa/inst/C/c.and.yaml +++ b/spec/std/isa/inst/C/c.and.yaml @@ -12,9 +12,10 @@ description: | The xd and xs2 register indexes should be used as xd+8 and xs2+8 (registers x8-x15). C.AND expands into `and xd, xd, xs2`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, xs2 encoding: match: 100011---11---01 diff --git a/spec/std/isa/inst/C/c.andi.yaml b/spec/std/isa/inst/C/c.andi.yaml index 379281b37..9f5cd6bea 100644 --- a/spec/std/isa/inst/C/c.andi.yaml +++ b/spec/std/isa/inst/C/c.andi.yaml @@ -12,9 +12,10 @@ description: | The rd register index should be used as rd+8 (registers x8-x15). C.ANDI expands into `andi rd, rd, imm`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, imm encoding: match: 100-10--------01 diff --git a/spec/std/isa/inst/C/c.beqz.yaml b/spec/std/isa/inst/C/c.beqz.yaml index 64f65c2ec..dfabb0c45 100644 --- a/spec/std/isa/inst/C/c.beqz.yaml +++ b/spec/std/isa/inst/C/c.beqz.yaml @@ -11,9 +11,10 @@ description: | C.BEQZ performs conditional control transfers. The offset is sign-extended and added to the pc to form the branch target address. It can therefore target a ±256 B range. C.BEQZ takes the branch if the value in register rs1' is zero. It expands to `beq` `rs1, x0, offset`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xs1, imm encoding: match: 110-----------01 diff --git a/spec/std/isa/inst/C/c.bnez.yaml b/spec/std/isa/inst/C/c.bnez.yaml index 3e424281a..88ce461bd 100644 --- a/spec/std/isa/inst/C/c.bnez.yaml +++ b/spec/std/isa/inst/C/c.bnez.yaml @@ -11,9 +11,10 @@ description: | C.BEQZ performs conditional control transfers. The offset is sign-extended and added to the pc to form the branch target address. It can therefore target a ±256 B range. C.BEQZ takes the branch if the value in register rs1' is NOT zero. It expands to `beq` `xs1, x0, offset`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xs1, imm encoding: match: 111-----------01 diff --git a/spec/std/isa/inst/C/c.ebreak.yaml b/spec/std/isa/inst/C/c.ebreak.yaml index 32d7a635a..d7ede20ed 100644 --- a/spec/std/isa/inst/C/c.ebreak.yaml +++ b/spec/std/isa/inst/C/c.ebreak.yaml @@ -21,9 +21,10 @@ description: | As EBREAK causes a synchronous exception, it is not considered to retire, and should not increment the `minstret` CSR. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: " " encoding: match: "1001000000000010" diff --git a/spec/std/isa/inst/C/c.j.yaml b/spec/std/isa/inst/C/c.j.yaml index 0da8c2903..8d49fd998 100644 --- a/spec/std/isa/inst/C/c.j.yaml +++ b/spec/std/isa/inst/C/c.j.yaml @@ -11,9 +11,10 @@ description: | C.J performs an unconditional control transfer. The offset is sign-extended and added to the pc to form the jump target address. C.J can therefore target a ±2 KiB range. It expands to `jal` `x0, offset`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: imm encoding: match: 101-----------01 diff --git a/spec/std/isa/inst/C/c.jal.yaml b/spec/std/isa/inst/C/c.jal.yaml index 6514b54b1..83e7a19f0 100644 --- a/spec/std/isa/inst/C/c.jal.yaml +++ b/spec/std/isa/inst/C/c.jal.yaml @@ -11,9 +11,10 @@ description: | C.JAL is an RV32C-only instruction that performs the same operation as C.J, but additionally writes the address of the instruction following the jump (pc+2) to the link register, x1. It expands to `jal` `x1, offset`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca base: 32 assembly: imm encoding: diff --git a/spec/std/isa/inst/C/c.jalr.yaml b/spec/std/isa/inst/C/c.jalr.yaml index 2d0f57683..2d1104469 100644 --- a/spec/std/isa/inst/C/c.jalr.yaml +++ b/spec/std/isa/inst/C/c.jalr.yaml @@ -11,9 +11,10 @@ description: | C.JALR (jump and link register) performs the same operation as C.JR, but additionally writes the address of the instruction following the jump (pc+2) to the link register, x1. C.JALR expands to jalr x1, 0(rs1). definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xs1 encoding: match: 1001-----0000010 diff --git a/spec/std/isa/inst/C/c.jr.yaml b/spec/std/isa/inst/C/c.jr.yaml index 8d76bf056..1925f322f 100644 --- a/spec/std/isa/inst/C/c.jr.yaml +++ b/spec/std/isa/inst/C/c.jr.yaml @@ -11,9 +11,10 @@ description: | C.JR (jump register) performs an unconditional control transfer to the address in register rs1. C.JR expands to jalr x0, 0(rs1). definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xs1 encoding: match: 1000-----0000010 diff --git a/spec/std/isa/inst/C/c.ld.yaml b/spec/std/isa/inst/C/c.ld.yaml index b8d67ebc8..888911908 100644 --- a/spec/std/isa/inst/C/c.ld.yaml +++ b/spec/std/isa/inst/C/c.ld.yaml @@ -14,10 +14,11 @@ description: | It expands to `ld` `xd, offset(xs1)`. For RV32, if the Zclsd extension is enabled, this instruction loads a 64-bit value into registers xd and xd+1. It computes an effective address by adding the zero-extended imm, scaled by 8, to the base address in register xs1. definedBy: - anyOf: - - C - - Zca - - Zclsd + extension: + anyOf: + - name: C + - name: Zca + - name: Zclsd assembly: xd, imm(xs1) encoding: RV32: diff --git a/spec/std/isa/inst/C/c.ldsp.yaml b/spec/std/isa/inst/C/c.ldsp.yaml index 237634fc1..53072c6b3 100644 --- a/spec/std/isa/inst/C/c.ldsp.yaml +++ b/spec/std/isa/inst/C/c.ldsp.yaml @@ -15,9 +15,10 @@ description: | It expands to `ld xd, offset(x2)`. C.LDSP is only valid when xd ≠ x0; code points with xd=x0 are reserved. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, imm(sp) encoding: RV32: diff --git a/spec/std/isa/inst/C/c.li.yaml b/spec/std/isa/inst/C/c.li.yaml index f536dfecb..4921236da 100644 --- a/spec/std/isa/inst/C/c.li.yaml +++ b/spec/std/isa/inst/C/c.li.yaml @@ -12,9 +12,10 @@ description: | C.LI expands into `addi rd, x0, imm`. C.LI is only valid when rd ≠ x0; the code points with rd=x0 encode HINTs. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, imm encoding: match: 010-----------01 diff --git a/spec/std/isa/inst/C/c.lui.yaml b/spec/std/isa/inst/C/c.lui.yaml index 7c77d1474..17e746530 100644 --- a/spec/std/isa/inst/C/c.lui.yaml +++ b/spec/std/isa/inst/C/c.lui.yaml @@ -6,16 +6,19 @@ $schema: "inst_schema.json#" kind: instruction name: c.lui -long_name: Load the non-zero 6-bit immediate field into bits 17-12 of the destination register +long_name: + Load the non-zero 6-bit immediate field into bits 17-12 of the destination + register description: | C.LUI loads the non-zero 6-bit immediate field into bits 17-12 of the destination register, clears the bottom 12 bits, and sign-extends bit 17 into all higher bits of the destination. C.LUI expands into `lui rd, imm`. C.LUI is only valid when rd≠x0 and rd≠x2, and when the immediate is not equal to zero. The code points with imm=0 are reserved; the remaining code points with rd=x0 are HINTs; and the remaining code points with rd=x2 correspond to the C.ADDI16SP instruction definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, imm encoding: match: 011-----------01 diff --git a/spec/std/isa/inst/C/c.lw.yaml b/spec/std/isa/inst/C/c.lw.yaml index 6bd6967d8..9d7033e59 100644 --- a/spec/std/isa/inst/C/c.lw.yaml +++ b/spec/std/isa/inst/C/c.lw.yaml @@ -13,9 +13,10 @@ description: | to the base address in register xs1. It expands to `lw` `xd, offset(xs1)`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, imm(xs1) encoding: match: 010-----------00 diff --git a/spec/std/isa/inst/C/c.lwsp.yaml b/spec/std/isa/inst/C/c.lwsp.yaml index 38bb55b8c..c2c6d5f51 100644 --- a/spec/std/isa/inst/C/c.lwsp.yaml +++ b/spec/std/isa/inst/C/c.lwsp.yaml @@ -14,9 +14,10 @@ description: | It expands to `lw` `rd, offset(x2)`. C.LWSP is only valid when rd ≠ x0. The code points with rd=x0 are reserved. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, imm(sp) encoding: match: 010-----------10 diff --git a/spec/std/isa/inst/C/c.mv.yaml b/spec/std/isa/inst/C/c.mv.yaml index dac6c1511..411432de0 100644 --- a/spec/std/isa/inst/C/c.mv.yaml +++ b/spec/std/isa/inst/C/c.mv.yaml @@ -11,9 +11,10 @@ description: | C.MV (move register) performs copy of the data in register xs2 to register xd C.MV expands to addi xd, x0, xs2. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, xs2 encoding: match: 1000----------10 diff --git a/spec/std/isa/inst/C/c.nop.yaml b/spec/std/isa/inst/C/c.nop.yaml index 6c87ce008..6b4a94ce4 100644 --- a/spec/std/isa/inst/C/c.nop.yaml +++ b/spec/std/isa/inst/C/c.nop.yaml @@ -10,9 +10,10 @@ long_name: Non-operation description: | C.NOP expands into `addi x0, x0, 0`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: "" encoding: match: "0000000000000001" diff --git a/spec/std/isa/inst/C/c.or.yaml b/spec/std/isa/inst/C/c.or.yaml index 2222d930e..9881ee050 100644 --- a/spec/std/isa/inst/C/c.or.yaml +++ b/spec/std/isa/inst/C/c.or.yaml @@ -12,9 +12,10 @@ description: | The xd and xs2 register indexes should be used as xd+8 and xs2+8 (registers x8-x15). C.OR expands into `or xd, xd, xs2`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, xs2 encoding: match: 100011---10---01 diff --git a/spec/std/isa/inst/C/c.sd.yaml b/spec/std/isa/inst/C/c.sd.yaml index 5a81fd5d4..3797399bc 100644 --- a/spec/std/isa/inst/C/c.sd.yaml +++ b/spec/std/isa/inst/C/c.sd.yaml @@ -13,10 +13,11 @@ description: | to the base address in register xs1. It expands to `sd` `xs2, offset(xs1)`. definedBy: - anyOf: - - C - - Zca - - Zclsd + extension: + anyOf: + - name: C + - name: Zca + - name: Zclsd assembly: xs2, imm(xs1) encoding: RV32: diff --git a/spec/std/isa/inst/C/c.sdsp.yaml b/spec/std/isa/inst/C/c.sdsp.yaml index e5109e8ab..3f145185b 100644 --- a/spec/std/isa/inst/C/c.sdsp.yaml +++ b/spec/std/isa/inst/C/c.sdsp.yaml @@ -13,10 +13,11 @@ description: | to the stack pointer, x2. It expands to `sd` `rs2, offset(x2)`. definedBy: - anyOf: - - C - - Zca - - Zclsd + extension: + anyOf: + - name: C + - name: Zca + - name: Zclsd assembly: xs2, imm(sp) encoding: RV32: diff --git a/spec/std/isa/inst/C/c.slli.yaml b/spec/std/isa/inst/C/c.slli.yaml index 6029ab376..328e7dd78 100644 --- a/spec/std/isa/inst/C/c.slli.yaml +++ b/spec/std/isa/inst/C/c.slli.yaml @@ -11,9 +11,10 @@ description: | Shift the value in rd left by shamt, and store the result back in rd. C.SLLI expands into `slli rd, rd, shamt`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, shamt encoding: RV32: diff --git a/spec/std/isa/inst/C/c.srai.yaml b/spec/std/isa/inst/C/c.srai.yaml index 46158e6e8..254d8cdf7 100644 --- a/spec/std/isa/inst/C/c.srai.yaml +++ b/spec/std/isa/inst/C/c.srai.yaml @@ -12,9 +12,10 @@ description: | The rd register index should be used as rd+8 (registers x8-x15). C.SRAI expands into `srai rd, rd, shamt`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, shamt encoding: RV32: diff --git a/spec/std/isa/inst/C/c.srli.yaml b/spec/std/isa/inst/C/c.srli.yaml index e6060a1ae..e4dd9b32c 100644 --- a/spec/std/isa/inst/C/c.srli.yaml +++ b/spec/std/isa/inst/C/c.srli.yaml @@ -12,9 +12,10 @@ description: | The rd register index should be used as rd+8 (registers x8-x15). C.SRLI expands into `srli rd, rd, shamt`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, shamt encoding: RV32: diff --git a/spec/std/isa/inst/C/c.sub.yaml b/spec/std/isa/inst/C/c.sub.yaml index 4fde41b41..72a247c26 100644 --- a/spec/std/isa/inst/C/c.sub.yaml +++ b/spec/std/isa/inst/C/c.sub.yaml @@ -12,9 +12,10 @@ description: | The xd and xs2 register indexes should be used as xd+8 and xs2+8 (registers x8-x15). C.SUB expands into `sub xd, xd, xs2`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, xs2 encoding: match: 100011---00---01 diff --git a/spec/std/isa/inst/C/c.subw.yaml b/spec/std/isa/inst/C/c.subw.yaml index d32df7fe4..90a3b1051 100644 --- a/spec/std/isa/inst/C/c.subw.yaml +++ b/spec/std/isa/inst/C/c.subw.yaml @@ -12,9 +12,10 @@ description: | The xd and xs2 register indexes should be used as xd+8 and xs2+8 (registers x8-x15). C.SUBW expands into `subw xd, xd, xs2`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca base: 64 assembly: xd, xs2 encoding: diff --git a/spec/std/isa/inst/C/c.sw.yaml b/spec/std/isa/inst/C/c.sw.yaml index 67e97245e..9c6bee02a 100644 --- a/spec/std/isa/inst/C/c.sw.yaml +++ b/spec/std/isa/inst/C/c.sw.yaml @@ -13,9 +13,10 @@ description: | to the base address in register rs1. It expands to `sw` `rs2, offset(rs1)`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xs2, imm(xs1) encoding: match: 110-----------00 diff --git a/spec/std/isa/inst/C/c.swsp.yaml b/spec/std/isa/inst/C/c.swsp.yaml index e218a3008..0bcea8676 100644 --- a/spec/std/isa/inst/C/c.swsp.yaml +++ b/spec/std/isa/inst/C/c.swsp.yaml @@ -13,9 +13,10 @@ description: | to the stack pointer, x2. It expands to `sw` `rs2, offset(x2)`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xs2, imm(sp) encoding: match: 110-----------10 diff --git a/spec/std/isa/inst/C/c.xor.yaml b/spec/std/isa/inst/C/c.xor.yaml index df82b0695..06c2725c2 100644 --- a/spec/std/isa/inst/C/c.xor.yaml +++ b/spec/std/isa/inst/C/c.xor.yaml @@ -12,9 +12,10 @@ description: | The xd and xs2 register indexes should be used as xd+8 and xs2+8 (registers x8-x15). C.XOR expands into `xor xd, xd, xs2`. definedBy: - anyOf: - - C - - Zca + extension: + anyOf: + - name: C + - name: Zca assembly: xd, xs2 encoding: match: 100011---01---01 diff --git a/spec/std/isa/inst/D/fadd.d.yaml b/spec/std/isa/inst/D/fadd.d.yaml index e79d48319..b26104592 100644 --- a/spec/std/isa/inst/D/fadd.d.yaml +++ b/spec/std/isa/inst/D/fadd.d.yaml @@ -13,7 +13,9 @@ description: text: | `fadd.d` is analogous to `fadd.s` and performs double-precision floating-point addition between `xs1` and `xs2` and writes the final result to `xd`. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2, rm encoding: match: 0000001------------------1010011 diff --git a/spec/std/isa/inst/D/fclass.d.yaml b/spec/std/isa/inst/D/fclass.d.yaml index b43201ed4..b92d2611e 100644 --- a/spec/std/isa/inst/D/fclass.d.yaml +++ b/spec/std/isa/inst/D/fclass.d.yaml @@ -9,7 +9,9 @@ name: fclass.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: xd, fs1 encoding: match: 111000100000-----001-----1010011 diff --git a/spec/std/isa/inst/D/fcvt.d.l.yaml b/spec/std/isa/inst/D/fcvt.d.l.yaml index 1f45fbcf3..57b8f1b35 100644 --- a/spec/std/isa/inst/D/fcvt.d.l.yaml +++ b/spec/std/isa/inst/D/fcvt.d.l.yaml @@ -13,7 +13,9 @@ description: text: | `fcvt.d.l` converts a 64-bit signed integer, in integer register `xs1` into a double-precision floating-point number in floating-point register `fd`. -definedBy: D +definedBy: + extension: + name: D assembly: fd, xs1, rm encoding: match: 110100100010-------------1010011 diff --git a/spec/std/isa/inst/D/fcvt.d.lu.yaml b/spec/std/isa/inst/D/fcvt.d.lu.yaml index 171c95a65..184692d44 100644 --- a/spec/std/isa/inst/D/fcvt.d.lu.yaml +++ b/spec/std/isa/inst/D/fcvt.d.lu.yaml @@ -13,7 +13,9 @@ description: text: | `fcvt.d.lu` converts to or from a 64-bit unsigned integer, `xs1` into a double-precision floating-point number in floating-point register `fd`. -definedBy: D +definedBy: + extension: + name: D assembly: fd, xs1, rm encoding: match: 110100100011-------------1010011 diff --git a/spec/std/isa/inst/D/fcvt.d.s.yaml b/spec/std/isa/inst/D/fcvt.d.s.yaml index 5e6b42667..10b7a7134 100644 --- a/spec/std/isa/inst/D/fcvt.d.s.yaml +++ b/spec/std/isa/inst/D/fcvt.d.s.yaml @@ -15,7 +15,9 @@ description: major opcode space and both the source and destination are floating-point registers. The `xs2` field encodes the datatype of the source, and the `fmt` field encodes the datatype of the destination. `fcvt.d.s` will never round. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, rm encoding: match: 010000100000-------------1010011 diff --git a/spec/std/isa/inst/D/fcvt.d.w.yaml b/spec/std/isa/inst/D/fcvt.d.w.yaml index 2cead1408..c438b5309 100644 --- a/spec/std/isa/inst/D/fcvt.d.w.yaml +++ b/spec/std/isa/inst/D/fcvt.d.w.yaml @@ -14,7 +14,9 @@ description: `fcvt.d.w` converts a 32-bit signed integer, in integer register `xs1` into a double-precision floating-point number in floating-point register `fd`. Note `fcvt.d.w` always produces an exact result and is unaffected by rounding mode. -definedBy: D +definedBy: + extension: + name: D assembly: fd, xs1, rm encoding: match: 110100100000-------------1010011 diff --git a/spec/std/isa/inst/D/fcvt.d.wu.yaml b/spec/std/isa/inst/D/fcvt.d.wu.yaml index d514c4550..9ca334c58 100644 --- a/spec/std/isa/inst/D/fcvt.d.wu.yaml +++ b/spec/std/isa/inst/D/fcvt.d.wu.yaml @@ -14,7 +14,9 @@ description: `fcvt.d.wu` converts a 32-bit unsigned integer in integer register `fs1` into a double-precision floating-point number in floating-point register `fd`. Note `fcvt.d.wu` always produces an exact result and is unaffected by rounding mode. -definedBy: D +definedBy: + extension: + name: D assembly: fd, xs1, rm encoding: match: 110100100001-------------1010011 diff --git a/spec/std/isa/inst/D/fcvt.l.d.yaml b/spec/std/isa/inst/D/fcvt.l.d.yaml index 1967dd24e..c6b2e1ce2 100644 --- a/spec/std/isa/inst/D/fcvt.l.d.yaml +++ b/spec/std/isa/inst/D/fcvt.l.d.yaml @@ -13,7 +13,9 @@ description: text: | `fcvt.l.d` converts a double-precision floating-point number in floating-point register `fs1` to a signed 64-bit integer, in integer register `xd`. -definedBy: D +definedBy: + extension: + name: D assembly: xd, fs1, rm encoding: match: 110000100010-------------1010011 diff --git a/spec/std/isa/inst/D/fcvt.lu.d.yaml b/spec/std/isa/inst/D/fcvt.lu.d.yaml index 24f20ab16..d7a3f8661 100644 --- a/spec/std/isa/inst/D/fcvt.lu.d.yaml +++ b/spec/std/isa/inst/D/fcvt.lu.d.yaml @@ -13,7 +13,9 @@ description: text: | `fcvt.lu.d` converts a double-precision floating-point number in floating-point register `xs1` to an unsigned 64-bit integer, in integer register `xd`. -definedBy: D +definedBy: + extension: + name: D assembly: xd, fs1, rm encoding: match: 110000100011-------------1010011 diff --git a/spec/std/isa/inst/D/fcvt.s.d.yaml b/spec/std/isa/inst/D/fcvt.s.d.yaml index 273d52349..41cc40499 100644 --- a/spec/std/isa/inst/D/fcvt.s.d.yaml +++ b/spec/std/isa/inst/D/fcvt.s.d.yaml @@ -15,7 +15,9 @@ description: This is encoded in the OP-FP major opcode space and both the source and destination are floating-point registers. The `rs2` field encodes the datatype of the source, and the `fmt` field encodes the datatype of the destination. `fcvt.s.d` rounds according to the RM field -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, rm encoding: match: 010000000001-------------1010011 diff --git a/spec/std/isa/inst/D/fcvt.w.d.yaml b/spec/std/isa/inst/D/fcvt.w.d.yaml index 0f9742070..e8985df10 100644 --- a/spec/std/isa/inst/D/fcvt.w.d.yaml +++ b/spec/std/isa/inst/D/fcvt.w.d.yaml @@ -13,7 +13,9 @@ description: text: | `fcvt.w.d` converts a double-precision floating-point number in floating-point register `xs1` to a signed 32-bit integer, in integer register `xd`. -definedBy: D +definedBy: + extension: + name: D assembly: xd, fs1, rm encoding: match: 110000100000-------------1010011 diff --git a/spec/std/isa/inst/D/fcvt.wu.d.yaml b/spec/std/isa/inst/D/fcvt.wu.d.yaml index db18a4375..e6820e104 100644 --- a/spec/std/isa/inst/D/fcvt.wu.d.yaml +++ b/spec/std/isa/inst/D/fcvt.wu.d.yaml @@ -13,7 +13,9 @@ description: text: | `fcvt.wu.d` converts a double-precision floating-point number in floating-point register `xs1` to an unsigned 32-bit integer, in integer register `fd`. -definedBy: D +definedBy: + extension: + name: D assembly: xd, fs1, rm encoding: match: 110000100001-------------1010011 diff --git a/spec/std/isa/inst/D/fcvtmod.w.d.yaml b/spec/std/isa/inst/D/fcvtmod.w.d.yaml index e1d58825b..3fd88f449 100644 --- a/spec/std/isa/inst/D/fcvtmod.w.d.yaml +++ b/spec/std/isa/inst/D/fcvtmod.w.d.yaml @@ -21,7 +21,10 @@ description: This instruction is only provided if the D extension is implemented. It is encoded like FCVT.W.D, but with the `xs2` field set to 8 and the `rm` field set to 1 (RTZ). Other `rm` values are reserved. definedBy: - allOf: [D, Zfa] + extension: + allOf: + - name: D + - name: Zfa assembly: xd, fs1, rm encoding: match: 110000101000-------------1010011 diff --git a/spec/std/isa/inst/D/fdiv.d.yaml b/spec/std/isa/inst/D/fdiv.d.yaml index 80b22de55..bdf049bb1 100644 --- a/spec/std/isa/inst/D/fdiv.d.yaml +++ b/spec/std/isa/inst/D/fdiv.d.yaml @@ -9,7 +9,9 @@ name: fdiv.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2, rm encoding: match: 0001101------------------1010011 diff --git a/spec/std/isa/inst/D/feq.d.yaml b/spec/std/isa/inst/D/feq.d.yaml index 737359c52..286f3fbdb 100644 --- a/spec/std/isa/inst/D/feq.d.yaml +++ b/spec/std/isa/inst/D/feq.d.yaml @@ -9,7 +9,9 @@ name: feq.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: xd, fs1, fs2 encoding: match: 1010001----------010-----1010011 diff --git a/spec/std/isa/inst/D/fld.yaml b/spec/std/isa/inst/D/fld.yaml index 1cb1721f1..a3eae9b85 100644 --- a/spec/std/isa/inst/D/fld.yaml +++ b/spec/std/isa/inst/D/fld.yaml @@ -9,10 +9,12 @@ name: fld long_name: Load Double-precision Floating-Point description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, imm(xs1) encoding: - match: -----------------011-----0000111 + match: "-----------------011-----0000111" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/D/fle.d.yaml b/spec/std/isa/inst/D/fle.d.yaml index c4f3d3b9a..93b921ad8 100644 --- a/spec/std/isa/inst/D/fle.d.yaml +++ b/spec/std/isa/inst/D/fle.d.yaml @@ -9,7 +9,9 @@ name: fle.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: xd, fs1, fs2 encoding: match: 1010001----------000-----1010011 diff --git a/spec/std/isa/inst/D/fleq.d.yaml b/spec/std/isa/inst/D/fleq.d.yaml index e5e0846eb..ab1993411 100644 --- a/spec/std/isa/inst/D/fleq.d.yaml +++ b/spec/std/isa/inst/D/fleq.d.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [D, Zfa] + extension: + allOf: + - name: D + - name: Zfa assembly: xd, fs1, fs2 encoding: match: 1010001----------100-----1010011 diff --git a/spec/std/isa/inst/D/fli.d.yaml b/spec/std/isa/inst/D/fli.d.yaml index bb7985cc4..a745095d4 100644 --- a/spec/std/isa/inst/D/fli.d.yaml +++ b/spec/std/isa/inst/D/fli.d.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [D, Zfa] + extension: + allOf: + - name: D + - name: Zfa assembly: fd, xs1 encoding: match: 111100100001-----000-----1010011 diff --git a/spec/std/isa/inst/D/flt.d.yaml b/spec/std/isa/inst/D/flt.d.yaml index e1d7bbffc..08ba236b4 100644 --- a/spec/std/isa/inst/D/flt.d.yaml +++ b/spec/std/isa/inst/D/flt.d.yaml @@ -9,7 +9,9 @@ name: flt.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: xd, fs1, fs2 encoding: match: 1010001----------001-----1010011 diff --git a/spec/std/isa/inst/D/fltq.d.yaml b/spec/std/isa/inst/D/fltq.d.yaml index 17c840910..4522136f1 100644 --- a/spec/std/isa/inst/D/fltq.d.yaml +++ b/spec/std/isa/inst/D/fltq.d.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [D, Zfa] + extension: + allOf: + - name: D + - name: Zfa assembly: xd, fs1, fs2 encoding: match: 1010001----------101-----1010011 diff --git a/spec/std/isa/inst/D/fmadd.d.yaml b/spec/std/isa/inst/D/fmadd.d.yaml index fbf737087..a2d42f9e3 100644 --- a/spec/std/isa/inst/D/fmadd.d.yaml +++ b/spec/std/isa/inst/D/fmadd.d.yaml @@ -9,10 +9,12 @@ name: fmadd.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----01------------------1000011 + match: "-----01------------------1000011" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/D/fmax.d.yaml b/spec/std/isa/inst/D/fmax.d.yaml index b33daf6f1..6751fcfb4 100644 --- a/spec/std/isa/inst/D/fmax.d.yaml +++ b/spec/std/isa/inst/D/fmax.d.yaml @@ -9,7 +9,9 @@ name: fmax.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2 encoding: match: 0010101----------001-----1010011 diff --git a/spec/std/isa/inst/D/fmaxm.d.yaml b/spec/std/isa/inst/D/fmaxm.d.yaml index 3e93cf0a3..985f8ba1a 100644 --- a/spec/std/isa/inst/D/fmaxm.d.yaml +++ b/spec/std/isa/inst/D/fmaxm.d.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [D, Zfa] + extension: + allOf: + - name: D + - name: Zfa assembly: fd, fs1, fs2 encoding: match: 0010101----------011-----1010011 diff --git a/spec/std/isa/inst/D/fmin.d.yaml b/spec/std/isa/inst/D/fmin.d.yaml index 9543e79ee..f52894359 100644 --- a/spec/std/isa/inst/D/fmin.d.yaml +++ b/spec/std/isa/inst/D/fmin.d.yaml @@ -9,7 +9,9 @@ name: fmin.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2 encoding: match: 0010101----------000-----1010011 diff --git a/spec/std/isa/inst/D/fminm.d.yaml b/spec/std/isa/inst/D/fminm.d.yaml index ecfcd46ba..f15507c67 100644 --- a/spec/std/isa/inst/D/fminm.d.yaml +++ b/spec/std/isa/inst/D/fminm.d.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [D, Zfa] + extension: + allOf: + - name: D + - name: Zfa assembly: fd, fs1, fs2 encoding: match: 0010101----------010-----1010011 diff --git a/spec/std/isa/inst/D/fmsub.d.yaml b/spec/std/isa/inst/D/fmsub.d.yaml index 8903afdf6..8093b73c4 100644 --- a/spec/std/isa/inst/D/fmsub.d.yaml +++ b/spec/std/isa/inst/D/fmsub.d.yaml @@ -9,10 +9,12 @@ name: fmsub.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----01------------------1000111 + match: "-----01------------------1000111" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/D/fmul.d.yaml b/spec/std/isa/inst/D/fmul.d.yaml index e1a6d3030..6d70f155a 100644 --- a/spec/std/isa/inst/D/fmul.d.yaml +++ b/spec/std/isa/inst/D/fmul.d.yaml @@ -9,7 +9,9 @@ name: fmul.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2, rm encoding: match: 0001001------------------1010011 diff --git a/spec/std/isa/inst/D/fmv.d.x.yaml b/spec/std/isa/inst/D/fmv.d.x.yaml index 4414a4961..064fa0f0b 100644 --- a/spec/std/isa/inst/D/fmv.d.x.yaml +++ b/spec/std/isa/inst/D/fmv.d.x.yaml @@ -9,7 +9,9 @@ name: fmv.d.x long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, xs1 encoding: match: 111100100000-----000-----1010011 diff --git a/spec/std/isa/inst/D/fmv.x.d.yaml b/spec/std/isa/inst/D/fmv.x.d.yaml index 11fecde8a..8535f16ce 100644 --- a/spec/std/isa/inst/D/fmv.x.d.yaml +++ b/spec/std/isa/inst/D/fmv.x.d.yaml @@ -9,7 +9,9 @@ name: fmv.x.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: xd, fs1 encoding: match: 111000100000-----000-----1010011 diff --git a/spec/std/isa/inst/D/fmvh.x.d.yaml b/spec/std/isa/inst/D/fmvh.x.d.yaml index 9f47ac597..7d434431e 100644 --- a/spec/std/isa/inst/D/fmvh.x.d.yaml +++ b/spec/std/isa/inst/D/fmvh.x.d.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [D, Zfa] + extension: + allOf: + - name: D + - name: Zfa assembly: xd, fs1 encoding: match: 111000100001-----000-----1010011 diff --git a/spec/std/isa/inst/D/fmvp.d.x.yaml b/spec/std/isa/inst/D/fmvp.d.x.yaml index 483b3c7d4..f6063ae3b 100644 --- a/spec/std/isa/inst/D/fmvp.d.x.yaml +++ b/spec/std/isa/inst/D/fmvp.d.x.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [D, Zfa] + extension: + allOf: + - name: D + - name: Zfa assembly: fd, xs1, xs2 encoding: match: 1011001----------000-----1010011 diff --git a/spec/std/isa/inst/D/fnmadd.d.yaml b/spec/std/isa/inst/D/fnmadd.d.yaml index 767c6bcdc..e2fb738ca 100644 --- a/spec/std/isa/inst/D/fnmadd.d.yaml +++ b/spec/std/isa/inst/D/fnmadd.d.yaml @@ -9,10 +9,12 @@ name: fnmadd.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----01------------------1001111 + match: "-----01------------------1001111" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/D/fnmsub.d.yaml b/spec/std/isa/inst/D/fnmsub.d.yaml index a59d54f0f..3c881091f 100644 --- a/spec/std/isa/inst/D/fnmsub.d.yaml +++ b/spec/std/isa/inst/D/fnmsub.d.yaml @@ -9,10 +9,12 @@ name: fnmsub.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----01------------------1001011 + match: "-----01------------------1001011" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/D/fround.d.yaml b/spec/std/isa/inst/D/fround.d.yaml index 805b12f02..9b4b8e36d 100644 --- a/spec/std/isa/inst/D/fround.d.yaml +++ b/spec/std/isa/inst/D/fround.d.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [D, Zfa] + extension: + allOf: + - name: D + - name: Zfa assembly: fd, fs1, rm encoding: match: 010000100100-------------1010011 diff --git a/spec/std/isa/inst/D/froundnx.d.yaml b/spec/std/isa/inst/D/froundnx.d.yaml index 7c4c53c7e..92ebea662 100644 --- a/spec/std/isa/inst/D/froundnx.d.yaml +++ b/spec/std/isa/inst/D/froundnx.d.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [D, Zfa] + extension: + allOf: + - name: D + - name: Zfa assembly: fd, fs1, rm encoding: match: 010000100101-------------1010011 diff --git a/spec/std/isa/inst/D/fsd.yaml b/spec/std/isa/inst/D/fsd.yaml index 761605e21..57de8f158 100644 --- a/spec/std/isa/inst/D/fsd.yaml +++ b/spec/std/isa/inst/D/fsd.yaml @@ -9,10 +9,12 @@ name: fsd long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fs2, imm(xs1) encoding: - match: -----------------011-----0100111 + match: "-----------------011-----0100111" variables: - name: imm location: 31-25|11-7 diff --git a/spec/std/isa/inst/D/fsgnj.d.yaml b/spec/std/isa/inst/D/fsgnj.d.yaml index 8d3a989e2..8e502c349 100644 --- a/spec/std/isa/inst/D/fsgnj.d.yaml +++ b/spec/std/isa/inst/D/fsgnj.d.yaml @@ -9,7 +9,9 @@ name: fsgnj.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2 encoding: match: 0010001----------000-----1010011 diff --git a/spec/std/isa/inst/D/fsgnjn.d.yaml b/spec/std/isa/inst/D/fsgnjn.d.yaml index 72b415899..4b40d979c 100644 --- a/spec/std/isa/inst/D/fsgnjn.d.yaml +++ b/spec/std/isa/inst/D/fsgnjn.d.yaml @@ -9,7 +9,9 @@ name: fsgnjn.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2 encoding: match: 0010001----------001-----1010011 diff --git a/spec/std/isa/inst/D/fsgnjx.d.yaml b/spec/std/isa/inst/D/fsgnjx.d.yaml index 501e7566e..b4110a5a5 100644 --- a/spec/std/isa/inst/D/fsgnjx.d.yaml +++ b/spec/std/isa/inst/D/fsgnjx.d.yaml @@ -9,7 +9,9 @@ name: fsgnjx.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2 encoding: match: 0010001----------010-----1010011 diff --git a/spec/std/isa/inst/D/fsqrt.d.yaml b/spec/std/isa/inst/D/fsqrt.d.yaml index 359548196..e85dca8a6 100644 --- a/spec/std/isa/inst/D/fsqrt.d.yaml +++ b/spec/std/isa/inst/D/fsqrt.d.yaml @@ -9,7 +9,9 @@ name: fsqrt.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, rm encoding: match: 010110100000-------------1010011 diff --git a/spec/std/isa/inst/D/fsub.d.yaml b/spec/std/isa/inst/D/fsub.d.yaml index 47fac9c25..1ca2953f1 100644 --- a/spec/std/isa/inst/D/fsub.d.yaml +++ b/spec/std/isa/inst/D/fsub.d.yaml @@ -9,7 +9,9 @@ name: fsub.d long_name: No synopsis available description: | No description available. -definedBy: D +definedBy: + extension: + name: D assembly: fd, fs1, fs2, rm encoding: match: 0000101------------------1010011 diff --git a/spec/std/isa/inst/F/fadd.s.yaml b/spec/std/isa/inst/F/fadd.s.yaml index 21ba37bb8..6225f7dbf 100644 --- a/spec/std/isa/inst/F/fadd.s.yaml +++ b/spec/std/isa/inst/F/fadd.s.yaml @@ -10,7 +10,9 @@ long_name: Single-precision floating-point addition description: | Do the single-precision floating-point addition of fs1 and fs2 and store the result in fd. rm is the dynamic Rounding Mode. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2, rm encoding: match: 0000000------------------1010011 diff --git a/spec/std/isa/inst/F/fclass.s.yaml b/spec/std/isa/inst/F/fclass.s.yaml index b0076bdae..6395caf47 100644 --- a/spec/std/isa/inst/F/fclass.s.yaml +++ b/spec/std/isa/inst/F/fclass.s.yaml @@ -34,7 +34,9 @@ description: | |9 |_fs1_ is a quiet NaN. |=== -definedBy: F +definedBy: + extension: + name: F assembly: xd, fs1 encoding: match: 111000000000-----001-----1010011 diff --git a/spec/std/isa/inst/F/fcvt.l.s.yaml b/spec/std/isa/inst/F/fcvt.l.s.yaml index 623781ea3..c56d6bb1c 100644 --- a/spec/std/isa/inst/F/fcvt.l.s.yaml +++ b/spec/std/isa/inst/F/fcvt.l.s.yaml @@ -13,7 +13,9 @@ description: text: | `fcvt.l.s` converts a floating-point number in floating-point register `fs1` to a signed 64-bit integer, in integer register `xd`. -definedBy: F +definedBy: + extension: + name: F base: 64 assembly: xd, fs1, rm encoding: diff --git a/spec/std/isa/inst/F/fcvt.lu.s.yaml b/spec/std/isa/inst/F/fcvt.lu.s.yaml index fa00f9921..7488766a4 100644 --- a/spec/std/isa/inst/F/fcvt.lu.s.yaml +++ b/spec/std/isa/inst/F/fcvt.lu.s.yaml @@ -13,7 +13,9 @@ description: text: | `fcvt.l.s` converts a floating-point number in floating-point register `fs1` to a unsigned 64-bit integer, in integer register `xd`. -definedBy: F +definedBy: + extension: + name: F base: 64 assembly: xd, fs1, rm encoding: diff --git a/spec/std/isa/inst/F/fcvt.s.l.yaml b/spec/std/isa/inst/F/fcvt.s.l.yaml index 6ea0e78ba..a7ddac84d 100644 --- a/spec/std/isa/inst/F/fcvt.s.l.yaml +++ b/spec/std/isa/inst/F/fcvt.s.l.yaml @@ -13,7 +13,9 @@ description: text: | `fcvt.s.l` converts a 64-bit signed integer in integer register `rs1` into a floating-point number in floating-point register `rd`. -definedBy: F +definedBy: + extension: + name: F base: 64 assembly: fd, xs1, rm encoding: diff --git a/spec/std/isa/inst/F/fcvt.s.lu.yaml b/spec/std/isa/inst/F/fcvt.s.lu.yaml index 6897c2e9a..b77b5c3e9 100644 --- a/spec/std/isa/inst/F/fcvt.s.lu.yaml +++ b/spec/std/isa/inst/F/fcvt.s.lu.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.s.lu` converts a 64-bit unsigned integer into a single-precision floating-point number. -definedBy: F +definedBy: + extension: + name: F base: 64 assembly: fd, xs1, rm encoding: diff --git a/spec/std/isa/inst/F/fcvt.s.w.yaml b/spec/std/isa/inst/F/fcvt.s.w.yaml index da90604ac..e19b261df 100644 --- a/spec/std/isa/inst/F/fcvt.s.w.yaml +++ b/spec/std/isa/inst/F/fcvt.s.w.yaml @@ -18,7 +18,9 @@ description: | All floating-point conversion instructions set the Inexact exception flag if the rounded result differs from the operand value and the Invalid exception flag is not set. -definedBy: F +definedBy: + extension: + name: F assembly: fd, xs1, rm encoding: match: 110100000000-------------1010011 diff --git a/spec/std/isa/inst/F/fcvt.s.wu.yaml b/spec/std/isa/inst/F/fcvt.s.wu.yaml index fc9d0ea93..0a74489cb 100644 --- a/spec/std/isa/inst/F/fcvt.s.wu.yaml +++ b/spec/std/isa/inst/F/fcvt.s.wu.yaml @@ -18,7 +18,9 @@ description: | All floating-point conversion instructions set the Inexact exception flag if the rounded result differs from the operand value and the Invalid exception flag is not set. -definedBy: F +definedBy: + extension: + name: F assembly: fd, xs1, rm encoding: match: 110100000001-------------1010011 diff --git a/spec/std/isa/inst/F/fcvt.w.s.yaml b/spec/std/isa/inst/F/fcvt.w.s.yaml index 597e5506c..c6c01a2cc 100644 --- a/spec/std/isa/inst/F/fcvt.w.s.yaml +++ b/spec/std/isa/inst/F/fcvt.w.s.yaml @@ -38,7 +38,9 @@ description: | All floating-point conversion instructions set the Inexact exception flag if the rounded result differs from the operand value and the Invalid exception flag is not set. -definedBy: F +definedBy: + extension: + name: F assembly: xd, fs1, rm encoding: match: 110000000000-------------1010011 diff --git a/spec/std/isa/inst/F/fcvt.wu.s.yaml b/spec/std/isa/inst/F/fcvt.wu.s.yaml index 06bfdad62..2b4bd12e6 100644 --- a/spec/std/isa/inst/F/fcvt.wu.s.yaml +++ b/spec/std/isa/inst/F/fcvt.wu.s.yaml @@ -36,7 +36,9 @@ description: | All floating-point conversion instructions set the Inexact exception flag if the rounded result differs from the operand value and the Invalid exception flag is not set. -definedBy: F +definedBy: + extension: + name: F assembly: xd, fs1, rm encoding: match: 110000000001-------------1010011 diff --git a/spec/std/isa/inst/F/fdiv.s.yaml b/spec/std/isa/inst/F/fdiv.s.yaml index 59dd67598..535e348d1 100644 --- a/spec/std/isa/inst/F/fdiv.s.yaml +++ b/spec/std/isa/inst/F/fdiv.s.yaml @@ -9,7 +9,9 @@ name: fdiv.s long_name: No synopsis available description: | No description available. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2, rm encoding: match: 0001100------------------1010011 diff --git a/spec/std/isa/inst/F/feq.s.yaml b/spec/std/isa/inst/F/feq.s.yaml index 2a8e1f090..da84c51e8 100644 --- a/spec/std/isa/inst/F/feq.s.yaml +++ b/spec/std/isa/inst/F/feq.s.yaml @@ -14,7 +14,9 @@ description: | Positive zero is considered equal to negative zero. -definedBy: F +definedBy: + extension: + name: F assembly: xd, fs1, fs2 encoding: match: 1010000----------010-----1010011 diff --git a/spec/std/isa/inst/F/fle.s.yaml b/spec/std/isa/inst/F/fle.s.yaml index e99753838..14c4824ad 100644 --- a/spec/std/isa/inst/F/fle.s.yaml +++ b/spec/std/isa/inst/F/fle.s.yaml @@ -15,7 +15,9 @@ description: | Positive zero and negative zero are considered equal. -definedBy: F +definedBy: + extension: + name: F assembly: xd, fs1, fs2 encoding: match: 1010000----------000-----1010011 diff --git a/spec/std/isa/inst/F/fleq.s.yaml b/spec/std/isa/inst/F/fleq.s.yaml index d2ebf8953..1f58212e6 100644 --- a/spec/std/isa/inst/F/fleq.s.yaml +++ b/spec/std/isa/inst/F/fleq.s.yaml @@ -9,7 +9,9 @@ name: fleq.s long_name: No synopsis available description: | No description available. -definedBy: Zfa +definedBy: + extension: + name: Zfa assembly: xd, fs1, fs2 encoding: match: 1010000----------100-----1010011 diff --git a/spec/std/isa/inst/F/fli.s.yaml b/spec/std/isa/inst/F/fli.s.yaml index b4e920aeb..c6045e5af 100644 --- a/spec/std/isa/inst/F/fli.s.yaml +++ b/spec/std/isa/inst/F/fli.s.yaml @@ -9,7 +9,9 @@ name: fli.s long_name: No synopsis available description: | No description available. -definedBy: Zfa +definedBy: + extension: + name: Zfa assembly: fd, xs1 encoding: match: 111100000001-----000-----1010011 diff --git a/spec/std/isa/inst/F/flt.s.yaml b/spec/std/isa/inst/F/flt.s.yaml index fb61b877b..cd41d50ad 100644 --- a/spec/std/isa/inst/F/flt.s.yaml +++ b/spec/std/isa/inst/F/flt.s.yaml @@ -13,7 +13,9 @@ description: | If either operand is NaN, the result is 0 (not equal). If either operand is a NaN (signaling or quiet), the invalid flag is set. -definedBy: F +definedBy: + extension: + name: F assembly: xd, fs1, fs2 encoding: match: 1010000----------001-----1010011 diff --git a/spec/std/isa/inst/F/fltq.s.yaml b/spec/std/isa/inst/F/fltq.s.yaml index c670320da..891f93160 100644 --- a/spec/std/isa/inst/F/fltq.s.yaml +++ b/spec/std/isa/inst/F/fltq.s.yaml @@ -9,7 +9,9 @@ name: fltq.s long_name: No synopsis available description: | No description available. -definedBy: Zfa +definedBy: + extension: + name: Zfa assembly: xd, fs1, fs2 encoding: match: 1010000----------101-----1010011 diff --git a/spec/std/isa/inst/F/flw.yaml b/spec/std/isa/inst/F/flw.yaml index 2641a9106..fc2f92241 100644 --- a/spec/std/isa/inst/F/flw.yaml +++ b/spec/std/isa/inst/F/flw.yaml @@ -12,10 +12,12 @@ description: | `flw` does not modify the bits being transferred; in particular, the payloads of non-canonical NaNs are preserved. -definedBy: F +definedBy: + extension: + name: F assembly: fd, imm(xs1) encoding: - match: -----------------010-----0000111 + match: "-----------------010-----0000111" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/F/fmadd.s.yaml b/spec/std/isa/inst/F/fmadd.s.yaml index ce170250c..053d1ea16 100644 --- a/spec/std/isa/inst/F/fmadd.s.yaml +++ b/spec/std/isa/inst/F/fmadd.s.yaml @@ -9,10 +9,12 @@ name: fmadd.s long_name: No synopsis available description: | No description available. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----00------------------1000011 + match: "-----00------------------1000011" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/F/fmax.s.yaml b/spec/std/isa/inst/F/fmax.s.yaml index 1878e4b26..3d19a454f 100644 --- a/spec/std/isa/inst/F/fmax.s.yaml +++ b/spec/std/isa/inst/F/fmax.s.yaml @@ -9,7 +9,9 @@ name: fmax.s long_name: No synopsis available description: | No description available. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2 encoding: match: 0010100----------001-----1010011 diff --git a/spec/std/isa/inst/F/fmaxm.s.yaml b/spec/std/isa/inst/F/fmaxm.s.yaml index bc10efcca..c58b13011 100644 --- a/spec/std/isa/inst/F/fmaxm.s.yaml +++ b/spec/std/isa/inst/F/fmaxm.s.yaml @@ -9,7 +9,9 @@ name: fmaxm.s long_name: No synopsis available description: | No description available. -definedBy: Zfa +definedBy: + extension: + name: Zfa assembly: fd, fs1, fs2 encoding: match: 0010100----------011-----1010011 diff --git a/spec/std/isa/inst/F/fmin.s.yaml b/spec/std/isa/inst/F/fmin.s.yaml index c6c510eff..2d0c31bb4 100644 --- a/spec/std/isa/inst/F/fmin.s.yaml +++ b/spec/std/isa/inst/F/fmin.s.yaml @@ -9,7 +9,9 @@ name: fmin.s long_name: No synopsis available description: | No description available. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2 encoding: match: 0010100----------000-----1010011 diff --git a/spec/std/isa/inst/F/fminm.s.yaml b/spec/std/isa/inst/F/fminm.s.yaml index 22bfe0276..e2f9ded94 100644 --- a/spec/std/isa/inst/F/fminm.s.yaml +++ b/spec/std/isa/inst/F/fminm.s.yaml @@ -9,7 +9,9 @@ name: fminm.s long_name: No synopsis available description: | No description available. -definedBy: Zfa +definedBy: + extension: + name: Zfa assembly: fd, fs1, fs2 encoding: match: 0010100----------010-----1010011 diff --git a/spec/std/isa/inst/F/fmsub.s.yaml b/spec/std/isa/inst/F/fmsub.s.yaml index a4097fcdd..f7836f5dd 100644 --- a/spec/std/isa/inst/F/fmsub.s.yaml +++ b/spec/std/isa/inst/F/fmsub.s.yaml @@ -9,10 +9,12 @@ name: fmsub.s long_name: No synopsis available description: | No description available. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----00------------------1000111 + match: "-----00------------------1000111" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/F/fmul.s.yaml b/spec/std/isa/inst/F/fmul.s.yaml index c5fce16b7..b7bf3432e 100644 --- a/spec/std/isa/inst/F/fmul.s.yaml +++ b/spec/std/isa/inst/F/fmul.s.yaml @@ -9,7 +9,9 @@ name: fmul.s long_name: No synopsis available description: | No description available. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2, rm encoding: match: 0001000------------------1010011 diff --git a/spec/std/isa/inst/F/fmv.w.x.yaml b/spec/std/isa/inst/F/fmv.w.x.yaml index 79ff78297..a76be8a6d 100644 --- a/spec/std/isa/inst/F/fmv.w.x.yaml +++ b/spec/std/isa/inst/F/fmv.w.x.yaml @@ -12,7 +12,9 @@ description: | from the lower 32 bits of integer register `xs1` to the floating-point register `fd`. The bits are not modified in the transfer, and in particular, the payloads of non-canonical NaNs are preserved. -definedBy: F +definedBy: + extension: + name: F assembly: fd, xs1 encoding: match: 111100000000-----000-----1010011 diff --git a/spec/std/isa/inst/F/fmv.x.w.yaml b/spec/std/isa/inst/F/fmv.x.w.yaml index aca44550e..0b6c2b8e6 100644 --- a/spec/std/isa/inst/F/fmv.x.w.yaml +++ b/spec/std/isa/inst/F/fmv.x.w.yaml @@ -14,7 +14,9 @@ description: | NaNs are preserved. For RV64, the higher 32 bits of the destination register are filled with copies of the floating-point number's sign bit. -definedBy: F +definedBy: + extension: + name: F assembly: xd, fs1 encoding: match: 111000000000-----000-----1010011 diff --git a/spec/std/isa/inst/F/fnmadd.s.yaml b/spec/std/isa/inst/F/fnmadd.s.yaml index c26ff6cbc..c5f515deb 100644 --- a/spec/std/isa/inst/F/fnmadd.s.yaml +++ b/spec/std/isa/inst/F/fnmadd.s.yaml @@ -9,10 +9,12 @@ name: fnmadd.s long_name: No synopsis available description: | No description available. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----00------------------1001111 + match: "-----00------------------1001111" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/F/fnmsub.s.yaml b/spec/std/isa/inst/F/fnmsub.s.yaml index 45861aa67..c9a0453d3 100644 --- a/spec/std/isa/inst/F/fnmsub.s.yaml +++ b/spec/std/isa/inst/F/fnmsub.s.yaml @@ -9,10 +9,12 @@ name: fnmsub.s long_name: No synopsis available description: | No description available. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----00------------------1001011 + match: "-----00------------------1001011" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/F/fround.s.yaml b/spec/std/isa/inst/F/fround.s.yaml index c1ea46105..9c28cb27e 100644 --- a/spec/std/isa/inst/F/fround.s.yaml +++ b/spec/std/isa/inst/F/fround.s.yaml @@ -9,7 +9,9 @@ name: fround.s long_name: No synopsis available description: | No description available. -definedBy: Zfa +definedBy: + extension: + name: Zfa assembly: fd, fs1, rm encoding: match: 010000000100-------------1010011 diff --git a/spec/std/isa/inst/F/froundnx.s.yaml b/spec/std/isa/inst/F/froundnx.s.yaml index 5e6ae3880..bba1ac031 100644 --- a/spec/std/isa/inst/F/froundnx.s.yaml +++ b/spec/std/isa/inst/F/froundnx.s.yaml @@ -9,7 +9,9 @@ name: froundnx.s long_name: Floating-point Round Single-precision to Integer with Inexact description: | No description available. -definedBy: Zfa +definedBy: + extension: + name: Zfa assembly: fd, fs1, rm encoding: match: 010000000101-------------1010011 diff --git a/spec/std/isa/inst/F/fsgnj.s.yaml b/spec/std/isa/inst/F/fsgnj.s.yaml index 8cbb63728..c6117950d 100644 --- a/spec/std/isa/inst/F/fsgnj.s.yaml +++ b/spec/std/isa/inst/F/fsgnj.s.yaml @@ -12,7 +12,9 @@ description: | Sign-injection instructions do not set floating-point exception flags, nor do they canonicalize NaNs. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2 encoding: match: 0010000----------000-----1010011 diff --git a/spec/std/isa/inst/F/fsgnjn.s.yaml b/spec/std/isa/inst/F/fsgnjn.s.yaml index 337963037..2f5fcc6a6 100644 --- a/spec/std/isa/inst/F/fsgnjn.s.yaml +++ b/spec/std/isa/inst/F/fsgnjn.s.yaml @@ -11,7 +11,9 @@ description: | Writes _fd_ with the opposite of the sign bit of _fs2_ and the exponent and mantissa of _fs1_. Sign-injection instructions do not set floating-point exception flags, nor do they canonicalize NaNs. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2 encoding: match: 0010000----------001-----1010011 diff --git a/spec/std/isa/inst/F/fsgnjx.s.yaml b/spec/std/isa/inst/F/fsgnjx.s.yaml index 7ac83fffc..238c0638c 100644 --- a/spec/std/isa/inst/F/fsgnjx.s.yaml +++ b/spec/std/isa/inst/F/fsgnjx.s.yaml @@ -11,7 +11,9 @@ description: | Writes _fd_ with the xor of the sign bits of _fs2_ and _fs1_ and the exponent and mantissa of _fs1_. Sign-injection instructions do not set floating-point exception flags, nor do they canonicalize NaNs. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2 encoding: match: 0010000----------010-----1010011 diff --git a/spec/std/isa/inst/F/fsqrt.s.yaml b/spec/std/isa/inst/F/fsqrt.s.yaml index 068ff5400..5b25cae64 100644 --- a/spec/std/isa/inst/F/fsqrt.s.yaml +++ b/spec/std/isa/inst/F/fsqrt.s.yaml @@ -9,7 +9,9 @@ name: fsqrt.s long_name: No synopsis available description: | No description available. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, rm encoding: match: 010110000000-------------1010011 diff --git a/spec/std/isa/inst/F/fsub.s.yaml b/spec/std/isa/inst/F/fsub.s.yaml index c42c4cc4c..bbe95505e 100644 --- a/spec/std/isa/inst/F/fsub.s.yaml +++ b/spec/std/isa/inst/F/fsub.s.yaml @@ -10,7 +10,9 @@ long_name: Single-precision floating-point subtraction description: | Do the single-precision floating-point subtraction of fs2 from fs1 and store the result in fd. rm is the dynamic Rounding Mode. -definedBy: F +definedBy: + extension: + name: F assembly: fd, fs1, fs2, rm encoding: match: 0000100------------------1010011 diff --git a/spec/std/isa/inst/F/fsw.yaml b/spec/std/isa/inst/F/fsw.yaml index 37e24b0a6..574aae590 100644 --- a/spec/std/isa/inst/F/fsw.yaml +++ b/spec/std/isa/inst/F/fsw.yaml @@ -12,10 +12,12 @@ description: | `fsw` does not modify the bits being transferred; in particular, the payloads of non-canonical NaNs are preserved. -definedBy: F +definedBy: + extension: + name: F assembly: fs2, imm(xs1) encoding: - match: -----------------010-----0100111 + match: "-----------------010-----0100111" variables: - name: imm location: 31-25|11-7 diff --git a/spec/std/isa/inst/H/hfence.gvma.yaml b/spec/std/isa/inst/H/hfence.gvma.yaml index 6a7373bfa..4855bcacf 100644 --- a/spec/std/isa/inst/H/hfence.gvma.yaml +++ b/spec/std/isa/inst/H/hfence.gvma.yaml @@ -9,7 +9,9 @@ name: hfence.gvma long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xs1, xs2 encoding: match: 0110001----------000000001110011 diff --git a/spec/std/isa/inst/H/hfence.vvma.yaml b/spec/std/isa/inst/H/hfence.vvma.yaml index 5c900bdaf..5a3b34d56 100644 --- a/spec/std/isa/inst/H/hfence.vvma.yaml +++ b/spec/std/isa/inst/H/hfence.vvma.yaml @@ -9,7 +9,9 @@ name: hfence.vvma long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xs1, xs2 encoding: match: 0010001----------000000001110011 diff --git a/spec/std/isa/inst/H/hlv.b.yaml b/spec/std/isa/inst/H/hlv.b.yaml index 8907bf3ff..817529d3e 100644 --- a/spec/std/isa/inst/H/hlv.b.yaml +++ b/spec/std/isa/inst/H/hlv.b.yaml @@ -9,7 +9,9 @@ name: hlv.b long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xd, xs1 encoding: match: 011000000000-----100-----1110011 diff --git a/spec/std/isa/inst/H/hlv.bu.yaml b/spec/std/isa/inst/H/hlv.bu.yaml index ce2927bea..c561f38a0 100644 --- a/spec/std/isa/inst/H/hlv.bu.yaml +++ b/spec/std/isa/inst/H/hlv.bu.yaml @@ -9,7 +9,9 @@ name: hlv.bu long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xd, xs1 encoding: match: 011000000001-----100-----1110011 diff --git a/spec/std/isa/inst/H/hlv.d.yaml b/spec/std/isa/inst/H/hlv.d.yaml index db957dd5f..974bb2d0c 100644 --- a/spec/std/isa/inst/H/hlv.d.yaml +++ b/spec/std/isa/inst/H/hlv.d.yaml @@ -9,7 +9,9 @@ name: hlv.d long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xd, xs1 encoding: match: 011011000000-----100-----1110011 diff --git a/spec/std/isa/inst/H/hlv.h.yaml b/spec/std/isa/inst/H/hlv.h.yaml index 91d9b441c..e7d3e4ca7 100644 --- a/spec/std/isa/inst/H/hlv.h.yaml +++ b/spec/std/isa/inst/H/hlv.h.yaml @@ -9,7 +9,9 @@ name: hlv.h long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xd, xs1 encoding: match: 011001000000-----100-----1110011 diff --git a/spec/std/isa/inst/H/hlv.hu.yaml b/spec/std/isa/inst/H/hlv.hu.yaml index 887d93da5..9f6e112fc 100644 --- a/spec/std/isa/inst/H/hlv.hu.yaml +++ b/spec/std/isa/inst/H/hlv.hu.yaml @@ -9,7 +9,9 @@ name: hlv.hu long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xd, xs1 encoding: match: 011001000001-----100-----1110011 diff --git a/spec/std/isa/inst/H/hlv.w.yaml b/spec/std/isa/inst/H/hlv.w.yaml index fb93e291b..e24abe2e3 100644 --- a/spec/std/isa/inst/H/hlv.w.yaml +++ b/spec/std/isa/inst/H/hlv.w.yaml @@ -9,7 +9,9 @@ name: hlv.w long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xd, xs1 encoding: match: 011010000000-----100-----1110011 diff --git a/spec/std/isa/inst/H/hlv.wu.yaml b/spec/std/isa/inst/H/hlv.wu.yaml index 50d1f541b..730f6c798 100644 --- a/spec/std/isa/inst/H/hlv.wu.yaml +++ b/spec/std/isa/inst/H/hlv.wu.yaml @@ -9,7 +9,9 @@ name: hlv.wu long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xd, xs1 encoding: match: 011010000001-----100-----1110011 diff --git a/spec/std/isa/inst/H/hlvx.hu.yaml b/spec/std/isa/inst/H/hlvx.hu.yaml index a36894f33..76c5dd6cd 100644 --- a/spec/std/isa/inst/H/hlvx.hu.yaml +++ b/spec/std/isa/inst/H/hlvx.hu.yaml @@ -9,7 +9,9 @@ name: hlvx.hu long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xd, xs1 encoding: match: 011001000011-----100-----1110011 diff --git a/spec/std/isa/inst/H/hlvx.wu.yaml b/spec/std/isa/inst/H/hlvx.wu.yaml index 2cb86b073..b5c83bfb1 100644 --- a/spec/std/isa/inst/H/hlvx.wu.yaml +++ b/spec/std/isa/inst/H/hlvx.wu.yaml @@ -9,7 +9,9 @@ name: hlvx.wu long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xd, xs1 encoding: match: 011010000011-----100-----1110011 diff --git a/spec/std/isa/inst/H/hsv.b.yaml b/spec/std/isa/inst/H/hsv.b.yaml index 4a9710e3d..adcf99f60 100644 --- a/spec/std/isa/inst/H/hsv.b.yaml +++ b/spec/std/isa/inst/H/hsv.b.yaml @@ -9,7 +9,9 @@ name: hsv.b long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xs1, xs2 encoding: match: 0110001----------100000001110011 diff --git a/spec/std/isa/inst/H/hsv.d.yaml b/spec/std/isa/inst/H/hsv.d.yaml index d76dd8e6e..0c518645f 100644 --- a/spec/std/isa/inst/H/hsv.d.yaml +++ b/spec/std/isa/inst/H/hsv.d.yaml @@ -9,7 +9,9 @@ name: hsv.d long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xs1, xs2 encoding: match: 0110111----------100000001110011 diff --git a/spec/std/isa/inst/H/hsv.h.yaml b/spec/std/isa/inst/H/hsv.h.yaml index 0f5977b3b..778322e75 100644 --- a/spec/std/isa/inst/H/hsv.h.yaml +++ b/spec/std/isa/inst/H/hsv.h.yaml @@ -9,7 +9,9 @@ name: hsv.h long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xs1, xs2 encoding: match: 0110011----------100000001110011 diff --git a/spec/std/isa/inst/H/hsv.w.yaml b/spec/std/isa/inst/H/hsv.w.yaml index 85a41c3a1..657d10bd0 100644 --- a/spec/std/isa/inst/H/hsv.w.yaml +++ b/spec/std/isa/inst/H/hsv.w.yaml @@ -9,7 +9,9 @@ name: hsv.w long_name: No synopsis available description: | No description available. -definedBy: H +definedBy: + extension: + name: H assembly: xs1, xs2 encoding: match: 0110101----------100000001110011 diff --git a/spec/std/isa/inst/I/add.yaml b/spec/std/isa/inst/I/add.yaml index 12bbd5ab9..53b105a43 100644 --- a/spec/std/isa/inst/I/add.yaml +++ b/spec/std/isa/inst/I/add.yaml @@ -10,7 +10,9 @@ long_name: Integer add description: | Add the value in xs1 to xs2, and store the result in xd. Any overflow is thrown away. -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, xs2 encoding: match: 0000000----------000-----0110011 diff --git a/spec/std/isa/inst/I/addi.yaml b/spec/std/isa/inst/I/addi.yaml index bb6e5ea3c..b584fb201 100644 --- a/spec/std/isa/inst/I/addi.yaml +++ b/spec/std/isa/inst/I/addi.yaml @@ -7,11 +7,15 @@ $schema: "inst_schema.json#" kind: instruction name: addi long_name: Add immediate -description: Adds an immediate value to the value in xs1, and store the result in xd -definedBy: I +description: + Adds an immediate value to the value in xs1, and store the result in + xd +definedBy: + extension: + name: I assembly: xd, xs1, imm encoding: - match: -----------------000-----0010011 + match: "-----------------000-----0010011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/addiw.yaml b/spec/std/isa/inst/I/addiw.yaml index 574af8e77..68fa214e2 100644 --- a/spec/std/isa/inst/I/addiw.yaml +++ b/spec/std/isa/inst/I/addiw.yaml @@ -7,12 +7,16 @@ $schema: "inst_schema.json#" kind: instruction name: addiw long_name: Add immediate word -description: Add an immediate to the 32-bit value in xs1, and store the sign extended result in xd -definedBy: I +description: + Add an immediate to the 32-bit value in xs1, and store the sign extended + result in xd +definedBy: + extension: + name: I base: 64 assembly: xd, xs1, imm encoding: - match: -----------------000-----0011011 + match: "-----------------000-----0011011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/addw.yaml b/spec/std/isa/inst/I/addw.yaml index d5511ac15..23bd2e279 100644 --- a/spec/std/isa/inst/I/addw.yaml +++ b/spec/std/isa/inst/I/addw.yaml @@ -10,7 +10,9 @@ long_name: Add word description: | Add the 32-bit values in xs1 to xs2, and store the sign-extended result in xd. Any overflow is thrown away. -definedBy: I +definedBy: + extension: + name: I base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/I/and.yaml b/spec/std/isa/inst/I/and.yaml index c165aa9b6..f4e39f127 100644 --- a/spec/std/isa/inst/I/and.yaml +++ b/spec/std/isa/inst/I/and.yaml @@ -8,7 +8,9 @@ kind: instruction name: and long_name: And description: And xs1 with xs2, and store the result in xd -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, xs2 encoding: match: 0000000----------111-----0110011 diff --git a/spec/std/isa/inst/I/andi.yaml b/spec/std/isa/inst/I/andi.yaml index 5a4ea0e94..d9a342ec4 100644 --- a/spec/std/isa/inst/I/andi.yaml +++ b/spec/std/isa/inst/I/andi.yaml @@ -8,10 +8,12 @@ kind: instruction name: andi long_name: And immediate description: And an immediate to the value in xs1, and store the result in xd -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, imm encoding: - match: -----------------111-----0010011 + match: "-----------------111-----0010011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/auipc.yaml b/spec/std/isa/inst/I/auipc.yaml index 038978b92..ca167678e 100644 --- a/spec/std/isa/inst/I/auipc.yaml +++ b/spec/std/isa/inst/I/auipc.yaml @@ -8,10 +8,12 @@ kind: instruction name: auipc long_name: Add upper immediate to pc description: Add an immediate to the current PC. -definedBy: I +definedBy: + extension: + name: I assembly: xd, imm encoding: - match: -------------------------0010111 + match: "-------------------------0010111" variables: - name: imm location: 31-12 diff --git a/spec/std/isa/inst/I/beq.yaml b/spec/std/isa/inst/I/beq.yaml index 14529f1a6..0c0e1f02f 100644 --- a/spec/std/isa/inst/I/beq.yaml +++ b/spec/std/isa/inst/I/beq.yaml @@ -12,10 +12,12 @@ description: | the value in register xs1 is equal to the value in register xs2. Raise a `MisalignedAddress` exception if PC + imm is misaligned. -definedBy: I +definedBy: + extension: + name: I assembly: xs1, xs2, imm encoding: - match: -----------------000-----1100011 + match: "-----------------000-----1100011" variables: - name: imm location: 31|7|30-25|11-8 diff --git a/spec/std/isa/inst/I/bge.yaml b/spec/std/isa/inst/I/bge.yaml index e8aa0328e..9b760ce41 100644 --- a/spec/std/isa/inst/I/bge.yaml +++ b/spec/std/isa/inst/I/bge.yaml @@ -12,10 +12,12 @@ description: | the signed value in register xs1 is greater than or equal to the signed value in register xs2. Raise a `MisalignedAddress` exception if PC + imm is misaligned. -definedBy: I +definedBy: + extension: + name: I assembly: xs1, xs2, imm encoding: - match: -----------------101-----1100011 + match: "-----------------101-----1100011" variables: - name: imm location: 31|7|30-25|11-8 diff --git a/spec/std/isa/inst/I/bgeu.yaml b/spec/std/isa/inst/I/bgeu.yaml index 7b32302c5..0e7a1d7a7 100644 --- a/spec/std/isa/inst/I/bgeu.yaml +++ b/spec/std/isa/inst/I/bgeu.yaml @@ -12,10 +12,12 @@ description: | the unsigned value in register xs1 is greater than or equal to the unsigned value in register xs2. Raise a `MisalignedAddress` exception if PC + imm is misaligned. -definedBy: I +definedBy: + extension: + name: I assembly: xs1, xs2, imm encoding: - match: -----------------111-----1100011 + match: "-----------------111-----1100011" variables: - name: imm location: 31|7|30-25|11-8 diff --git a/spec/std/isa/inst/I/blt.yaml b/spec/std/isa/inst/I/blt.yaml index 2c08f1cf2..691fb0dd9 100644 --- a/spec/std/isa/inst/I/blt.yaml +++ b/spec/std/isa/inst/I/blt.yaml @@ -12,10 +12,12 @@ description: | the signed value in register xs1 is less than the signed value in register xs2. Raise a `MisalignedAddress` exception if PC + imm is misaligned. -definedBy: I +definedBy: + extension: + name: I assembly: xs1, xs2, imm encoding: - match: -----------------100-----1100011 + match: "-----------------100-----1100011" variables: - name: imm location: 31|7|30-25|11-8 diff --git a/spec/std/isa/inst/I/bltu.yaml b/spec/std/isa/inst/I/bltu.yaml index 612bf5c12..b3300bc60 100644 --- a/spec/std/isa/inst/I/bltu.yaml +++ b/spec/std/isa/inst/I/bltu.yaml @@ -12,10 +12,12 @@ description: | the unsigned value in register xs1 is less than the unsigned value in register xs2. Raise a `MisalignedAddress` exception if PC + imm is misaligned. -definedBy: I +definedBy: + extension: + name: I assembly: xs1, xs2, imm encoding: - match: -----------------110-----1100011 + match: "-----------------110-----1100011" variables: - name: imm location: 31|7|30-25|11-8 diff --git a/spec/std/isa/inst/I/bne.yaml b/spec/std/isa/inst/I/bne.yaml index b61ea847e..0a5e0de16 100644 --- a/spec/std/isa/inst/I/bne.yaml +++ b/spec/std/isa/inst/I/bne.yaml @@ -12,10 +12,12 @@ description: | the value in register xs1 is not equal to the value in register xs2. Raise a `MisalignedAddress` exception if PC + imm is misaligned. -definedBy: I +definedBy: + extension: + name: I assembly: xs1, xs2, imm encoding: - match: -----------------001-----1100011 + match: "-----------------001-----1100011" variables: - name: imm location: 31|7|30-25|11-8 diff --git a/spec/std/isa/inst/I/ebreak.yaml b/spec/std/isa/inst/I/ebreak.yaml index 8e9f9bcb9..327bc3c93 100644 --- a/spec/std/isa/inst/I/ebreak.yaml +++ b/spec/std/isa/inst/I/ebreak.yaml @@ -20,7 +20,9 @@ description: | the EBREAK instruction itself, not the address of the following instruction. As EBREAK causes a synchronous exception, it is not considered to retire, and should not increment the `minstret` CSR. -definedBy: I +definedBy: + extension: + name: I assembly: "" encoding: match: "00000000000100000000000001110011" diff --git a/spec/std/isa/inst/I/ecall.yaml b/spec/std/isa/inst/I/ecall.yaml index 557934884..be5e78689 100644 --- a/spec/std/isa/inst/I/ecall.yaml +++ b/spec/std/isa/inst/I/ecall.yaml @@ -23,7 +23,9 @@ description: | the ECALL instruction itself, not the address of the following instruction. As ECALL causes a synchronous exception, it is not considered to retire, and should not increment the `minstret` CSR. -definedBy: I +definedBy: + extension: + name: I assembly: "" encoding: match: "00000000000000000000000001110011" diff --git a/spec/std/isa/inst/I/fence.tso.yaml b/spec/std/isa/inst/I/fence.tso.yaml index 13c4aa65b..400e98deb 100644 --- a/spec/std/isa/inst/I/fence.tso.yaml +++ b/spec/std/isa/inst/I/fence.tso.yaml @@ -20,7 +20,9 @@ description: | In modes other than M-mode, `fence.tso` is further affected by `menvcfg.FIOM`, `senvcfg.FIOM`<% if ext?(:H) %>, and/or `henvcfg.FIOM`<% end %>. -definedBy: I +definedBy: + extension: + name: I assembly: "" encoding: match: 100000110011-----000-----0001111 diff --git a/spec/std/isa/inst/I/fence.yaml b/spec/std/isa/inst/I/fence.yaml index d6f6f42f5..75045c5d7 100644 --- a/spec/std/isa/inst/I/fence.yaml +++ b/spec/std/isa/inst/I/fence.yaml @@ -123,10 +123,12 @@ description: | !=== <%- end -%> -definedBy: I +definedBy: + extension: + name: I assembly: pred, succ encoding: - match: -----------------000-----0001111 + match: "-----------------000-----0001111" variables: - name: fm location: 31-28 diff --git a/spec/std/isa/inst/I/jal.yaml b/spec/std/isa/inst/I/jal.yaml index b65c1aaba..cd808d284 100644 --- a/spec/std/isa/inst/I/jal.yaml +++ b/spec/std/isa/inst/I/jal.yaml @@ -10,10 +10,12 @@ long_name: Jump and link description: | Jump to a PC-relative offset and store the return address in xd. -definedBy: I +definedBy: + extension: + name: I assembly: xd, imm encoding: - match: -------------------------1101111 + match: "-------------------------1101111" variables: - name: imm location: 31|19-12|20|30-21 diff --git a/spec/std/isa/inst/I/jalr.yaml b/spec/std/isa/inst/I/jalr.yaml index 0ba022efb..35a569864 100644 --- a/spec/std/isa/inst/I/jalr.yaml +++ b/spec/std/isa/inst/I/jalr.yaml @@ -12,10 +12,12 @@ description: | to a signed offset then clearing the least significant bit, and store the return address in xd. -definedBy: I +definedBy: + extension: + name: I assembly: xd, imm(xs1) encoding: - match: -----------------000-----1100111 + match: "-----------------000-----1100111" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/lb.yaml b/spec/std/isa/inst/I/lb.yaml index 7a5bb2b46..8e7f7532c 100644 --- a/spec/std/isa/inst/I/lb.yaml +++ b/spec/std/isa/inst/I/lb.yaml @@ -11,10 +11,12 @@ description: | Load 8 bits of data into register `xd` from an address formed by adding `xs1` to a signed offset. Sign extend the result. -definedBy: I +definedBy: + extension: + name: I assembly: xd, imm(xs1) encoding: - match: -----------------000-----0000011 + match: "-----------------000-----0000011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/lbu.yaml b/spec/std/isa/inst/I/lbu.yaml index 5dcd5e097..0f643e62d 100644 --- a/spec/std/isa/inst/I/lbu.yaml +++ b/spec/std/isa/inst/I/lbu.yaml @@ -11,10 +11,12 @@ description: | Load 8 bits of data into register `xd` from an address formed by adding `xs1` to a signed offset. Zero extend the result. -definedBy: I +definedBy: + extension: + name: I assembly: xd, imm(xs1) encoding: - match: -----------------100-----0000011 + match: "-----------------100-----0000011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/ld.yaml b/spec/std/isa/inst/I/ld.yaml index 745ce0370..711f0bf99 100644 --- a/spec/std/isa/inst/I/ld.yaml +++ b/spec/std/isa/inst/I/ld.yaml @@ -10,11 +10,13 @@ long_name: Load doubleword description: | Load 64 bits of data into register `xd` from an address formed by adding `xs1` to a signed offset. -definedBy: I +definedBy: + extension: + name: I base: 64 assembly: xd, imm(xs1) encoding: - match: -----------------011-----0000011 + match: "-----------------011-----0000011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/lh.yaml b/spec/std/isa/inst/I/lh.yaml index 84688d767..3c8c54809 100644 --- a/spec/std/isa/inst/I/lh.yaml +++ b/spec/std/isa/inst/I/lh.yaml @@ -11,10 +11,12 @@ description: | Load 16 bits of data into register `xd` from an address formed by adding `xs1` to a signed offset. Sign extend the result. -definedBy: I +definedBy: + extension: + name: I assembly: xd, imm(xs1) encoding: - match: -----------------001-----0000011 + match: "-----------------001-----0000011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/lhu.yaml b/spec/std/isa/inst/I/lhu.yaml index ab020866b..fe47bdaaf 100644 --- a/spec/std/isa/inst/I/lhu.yaml +++ b/spec/std/isa/inst/I/lhu.yaml @@ -11,10 +11,12 @@ description: | Load 16 bits of data into register `xd` from an address formed by adding `xs1` to a signed offset. Zero extend the result. -definedBy: I +definedBy: + extension: + name: I assembly: xd, imm(xs1) encoding: - match: -----------------101-----0000011 + match: "-----------------101-----0000011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/lui.yaml b/spec/std/isa/inst/I/lui.yaml index a5c90e057..a56a181c7 100644 --- a/spec/std/isa/inst/I/lui.yaml +++ b/spec/std/isa/inst/I/lui.yaml @@ -8,10 +8,12 @@ kind: instruction name: lui long_name: Load upper immediate description: Load the zero-extended imm into xd. -definedBy: I +definedBy: + extension: + name: I assembly: xd, imm encoding: - match: -------------------------0110111 + match: "-------------------------0110111" variables: - name: imm location: 31-12 diff --git a/spec/std/isa/inst/I/lw.yaml b/spec/std/isa/inst/I/lw.yaml index a53f09d9b..409d73144 100644 --- a/spec/std/isa/inst/I/lw.yaml +++ b/spec/std/isa/inst/I/lw.yaml @@ -11,10 +11,12 @@ description: | Load 32 bits of data into register `xd` from an address formed by adding `xs1` to a signed offset. Sign extend the result. -definedBy: I +definedBy: + extension: + name: I assembly: xd, imm(xs1) encoding: - match: -----------------010-----0000011 + match: "-----------------010-----0000011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/lwu.yaml b/spec/std/isa/inst/I/lwu.yaml index cc5d8cc14..143cd64d9 100644 --- a/spec/std/isa/inst/I/lwu.yaml +++ b/spec/std/isa/inst/I/lwu.yaml @@ -11,11 +11,13 @@ description: | Load 64 bits of data into register `xd` from an address formed by adding `xs1` to a signed offset. Zero extend the result. -definedBy: I +definedBy: + extension: + name: I base: 64 assembly: xd, imm(xs1) encoding: - match: -----------------110-----0000011 + match: "-----------------110-----0000011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/mret.yaml b/spec/std/isa/inst/I/mret.yaml index f7a7ba44e..f0978c094 100644 --- a/spec/std/isa/inst/I/mret.yaml +++ b/spec/std/isa/inst/I/mret.yaml @@ -8,7 +8,9 @@ long_name: Machine Exception Return description: | Returns from an exception in M-mode. assembly: "" -definedBy: Sm +definedBy: + extension: + name: Sm access: s: never u: never diff --git a/spec/std/isa/inst/I/or.yaml b/spec/std/isa/inst/I/or.yaml index 9c008d053..056228d3d 100644 --- a/spec/std/isa/inst/I/or.yaml +++ b/spec/std/isa/inst/I/or.yaml @@ -8,7 +8,9 @@ kind: instruction name: or long_name: Or description: Or xs1 with xs2, and store the result in xd -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, xs2 encoding: match: 0000000----------110-----0110011 diff --git a/spec/std/isa/inst/I/ori.yaml b/spec/std/isa/inst/I/ori.yaml index 46ff34e8b..74d0a5c68 100644 --- a/spec/std/isa/inst/I/ori.yaml +++ b/spec/std/isa/inst/I/ori.yaml @@ -8,10 +8,12 @@ kind: instruction name: ori long_name: Or immediate description: Or an immediate to the value in xs1, and store the result in xd -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, imm encoding: - match: -----------------110-----0010011 + match: "-----------------110-----0010011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/sb.yaml b/spec/std/isa/inst/I/sb.yaml index e76e59d55..5da1f2339 100644 --- a/spec/std/isa/inst/I/sb.yaml +++ b/spec/std/isa/inst/I/sb.yaml @@ -10,10 +10,12 @@ long_name: Store byte description: | Store 8 bits of data from register `xs2` to an address formed by adding `xs1` to a signed offset. -definedBy: I +definedBy: + extension: + name: I assembly: xs2, imm(xs1) encoding: - match: -----------------000-----0100011 + match: "-----------------000-----0100011" variables: - name: imm location: 31-25|11-7 diff --git a/spec/std/isa/inst/I/sd.yaml b/spec/std/isa/inst/I/sd.yaml index c22030e39..fd6661eb5 100644 --- a/spec/std/isa/inst/I/sd.yaml +++ b/spec/std/isa/inst/I/sd.yaml @@ -10,11 +10,13 @@ long_name: Store doubleword description: | Store 64 bits of data from register `xs2` to an address formed by adding `xs1` to a signed offset. -definedBy: I +definedBy: + extension: + name: I base: 64 assembly: xs2, imm(xs1) encoding: - match: -----------------011-----0100011 + match: "-----------------011-----0100011" variables: - name: imm location: 31-25|11-7 diff --git a/spec/std/isa/inst/I/sh.yaml b/spec/std/isa/inst/I/sh.yaml index ccec09d40..fc4c9e099 100644 --- a/spec/std/isa/inst/I/sh.yaml +++ b/spec/std/isa/inst/I/sh.yaml @@ -10,10 +10,12 @@ long_name: Store halfword description: | Store 16 bits of data from register `xs2` to an address formed by adding `xs1` to a signed offset. -definedBy: I +definedBy: + extension: + name: I assembly: xs2, imm(xs1) encoding: - match: -----------------001-----0100011 + match: "-----------------001-----0100011" variables: - name: imm location: 31-25|11-7 diff --git a/spec/std/isa/inst/I/sll.yaml b/spec/std/isa/inst/I/sll.yaml index e45f012cd..d45e9aebc 100644 --- a/spec/std/isa/inst/I/sll.yaml +++ b/spec/std/isa/inst/I/sll.yaml @@ -9,7 +9,9 @@ name: sll long_name: Shift left logical description: | Shift the value in `xs1` left by the value in the lower 6 bits of `xs2`, and store the result in `xd`. -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, xs2 encoding: match: 0000000----------001-----0110011 diff --git a/spec/std/isa/inst/I/slli.yaml b/spec/std/isa/inst/I/slli.yaml index 0ef6c3044..035e5c9aa 100644 --- a/spec/std/isa/inst/I/slli.yaml +++ b/spec/std/isa/inst/I/slli.yaml @@ -8,7 +8,9 @@ kind: instruction name: slli long_name: Shift left logical immediate description: Shift the value in xs1 left by shamt, and store the result in xd -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, shamt encoding: RV32: diff --git a/spec/std/isa/inst/I/slliw.yaml b/spec/std/isa/inst/I/slliw.yaml index cea263865..f83e4d636 100644 --- a/spec/std/isa/inst/I/slliw.yaml +++ b/spec/std/isa/inst/I/slliw.yaml @@ -7,8 +7,12 @@ $schema: "inst_schema.json#" kind: instruction name: slliw long_name: Shift left logical immediate word -description: Shift the 32-bit value in xs1 left by shamt, and store the sign-extended result in xd -definedBy: I +description: + Shift the 32-bit value in xs1 left by shamt, and store the sign-extended + result in xd +definedBy: + extension: + name: I base: 64 assembly: xd, xs1, shamt encoding: diff --git a/spec/std/isa/inst/I/sllw.yaml b/spec/std/isa/inst/I/sllw.yaml index 9624ae694..d7fcb755d 100644 --- a/spec/std/isa/inst/I/sllw.yaml +++ b/spec/std/isa/inst/I/sllw.yaml @@ -9,7 +9,9 @@ name: sllw long_name: Shift left logical word description: | Shift the 32-bit value in `xs1` left by the value in the lower 5 bits of `xs2`, and store the sign-extended result in `xd`. -definedBy: I +definedBy: + extension: + name: I base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/I/slt.yaml b/spec/std/isa/inst/I/slt.yaml index c747d3071..a37c8e43e 100644 --- a/spec/std/isa/inst/I/slt.yaml +++ b/spec/std/isa/inst/I/slt.yaml @@ -10,7 +10,9 @@ long_name: Set on less than description: | Places the value 1 in register `xd` if register `xs1` is less than the value in register `xs2`, where both sources are treated as signed numbers, else 0 is written to `xd`. -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, xs2 encoding: match: 0000000----------010-----0110011 diff --git a/spec/std/isa/inst/I/slti.yaml b/spec/std/isa/inst/I/slti.yaml index b88f2c712..4ba41b352 100644 --- a/spec/std/isa/inst/I/slti.yaml +++ b/spec/std/isa/inst/I/slti.yaml @@ -10,10 +10,12 @@ long_name: Set on less than immediate description: | Places the value 1 in register `xd` if register `xs1` is less than the sign-extended immediate when both are treated as signed numbers, else 0 is written to `xd`. -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, imm encoding: - match: -----------------010-----0010011 + match: "-----------------010-----0010011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/sltiu.yaml b/spec/std/isa/inst/I/sltiu.yaml index 95bc29be6..15140038c 100644 --- a/spec/std/isa/inst/I/sltiu.yaml +++ b/spec/std/isa/inst/I/sltiu.yaml @@ -14,10 +14,12 @@ description: | NOTE: `sltiu xd, xs1, 1` sets `xd` to 1 if `xs1` equals zero, otherwise sets `xd` to 0 (assembler pseudoinstruction `SEQZ xd, rs`). -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, imm encoding: - match: -----------------011-----0010011 + match: "-----------------011-----0010011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/I/sltu.yaml b/spec/std/isa/inst/I/sltu.yaml index 14f32cb46..faa088725 100644 --- a/spec/std/isa/inst/I/sltu.yaml +++ b/spec/std/isa/inst/I/sltu.yaml @@ -10,7 +10,9 @@ long_name: Set on less than unsigned description: | Places the value 1 in register `xd` if register `xs1` is less than the value in register `xs2`, where both sources are treated as unsigned numbers, else 0 is written to `xd`. -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, xs2 encoding: match: 0000000----------011-----0110011 diff --git a/spec/std/isa/inst/I/sra.yaml b/spec/std/isa/inst/I/sra.yaml index 9175003c1..7c1dabeae 100644 --- a/spec/std/isa/inst/I/sra.yaml +++ b/spec/std/isa/inst/I/sra.yaml @@ -9,7 +9,9 @@ name: sra long_name: Shift right arithmetic description: | Arithmetic shift the value in `xs1` right by the value in the lower 5 bits of `xs2`, and store the result in `xd`. -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, xs2 encoding: match: 0100000----------101-----0110011 diff --git a/spec/std/isa/inst/I/srai.yaml b/spec/std/isa/inst/I/srai.yaml index 2e7c515b8..0a1970f69 100644 --- a/spec/std/isa/inst/I/srai.yaml +++ b/spec/std/isa/inst/I/srai.yaml @@ -10,7 +10,9 @@ long_name: Shift right arithmetic immediate description: | Arithmetic shift (the original sign bit is copied into the vacated upper bits) the value in xs1 right by shamt, and store the result in xd. -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, shamt encoding: RV32: diff --git a/spec/std/isa/inst/I/sraiw.yaml b/spec/std/isa/inst/I/sraiw.yaml index 5ad0b76be..028ca5a0b 100644 --- a/spec/std/isa/inst/I/sraiw.yaml +++ b/spec/std/isa/inst/I/sraiw.yaml @@ -10,7 +10,9 @@ long_name: Shift right arithmetic immediate word description: | Arithmetic shift (the original sign bit is copied into the vacated upper bits) the 32-bit value in xs1 right by shamt, and store the sign-extended result in xd. -definedBy: I +definedBy: + extension: + name: I base: 64 assembly: xd, xs1, shamt encoding: diff --git a/spec/std/isa/inst/I/sraw.yaml b/spec/std/isa/inst/I/sraw.yaml index fad49d844..9d2a40cd8 100644 --- a/spec/std/isa/inst/I/sraw.yaml +++ b/spec/std/isa/inst/I/sraw.yaml @@ -9,7 +9,9 @@ name: sraw long_name: Shift right arithmetic word description: | Arithmetic shift the 32-bit value in `xs1` right by the value in the lower 5 bits of `xs2`, and store the sign-extended result in `xd`. -definedBy: I +definedBy: + extension: + name: I base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/I/srl.yaml b/spec/std/isa/inst/I/srl.yaml index 9d738ee77..e6fda1774 100644 --- a/spec/std/isa/inst/I/srl.yaml +++ b/spec/std/isa/inst/I/srl.yaml @@ -9,7 +9,9 @@ name: srl long_name: Shift right logical description: | Logical shift the value in `xs1` right by the value in the lower bits of `xs2`, and store the result in `xd`. -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, xs2 encoding: match: 0000000----------101-----0110011 diff --git a/spec/std/isa/inst/I/srli.yaml b/spec/std/isa/inst/I/srli.yaml index ea9626549..9c3fd2f19 100644 --- a/spec/std/isa/inst/I/srli.yaml +++ b/spec/std/isa/inst/I/srli.yaml @@ -7,7 +7,9 @@ kind: instruction name: srli long_name: Shift right logical immediate description: Shift the value in xs1 right by shamt, and store the result in xd -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, shamt encoding: RV32: diff --git a/spec/std/isa/inst/I/srliw.yaml b/spec/std/isa/inst/I/srliw.yaml index 48ea69ce3..520c6e6b0 100644 --- a/spec/std/isa/inst/I/srliw.yaml +++ b/spec/std/isa/inst/I/srliw.yaml @@ -7,8 +7,12 @@ $schema: "inst_schema.json#" kind: instruction name: srliw long_name: Shift right logical immediate word -description: Shift the 32-bit value in xs1 right by shamt, and store the sign-extended result in xd -definedBy: I +description: + Shift the 32-bit value in xs1 right by shamt, and store the sign-extended + result in xd +definedBy: + extension: + name: I base: 64 assembly: xd, xs1, shamt encoding: diff --git a/spec/std/isa/inst/I/srlw.yaml b/spec/std/isa/inst/I/srlw.yaml index 471066bb7..9dd539c2e 100644 --- a/spec/std/isa/inst/I/srlw.yaml +++ b/spec/std/isa/inst/I/srlw.yaml @@ -9,7 +9,9 @@ name: srlw long_name: Shift right logical word description: | Logical shift the 32-bit value in `xs1` right by the value in the lower 5 bits of `xs2`, and store the sign-extended result in `xd`. -definedBy: I +definedBy: + extension: + name: I base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/I/sub.yaml b/spec/std/isa/inst/I/sub.yaml index de38aec12..35eea26c3 100644 --- a/spec/std/isa/inst/I/sub.yaml +++ b/spec/std/isa/inst/I/sub.yaml @@ -8,7 +8,9 @@ kind: instruction name: sub long_name: Subtract description: Subtract the value in xs2 from xs1, and store the result in xd -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, xs2 encoding: match: 0100000----------000-----0110011 diff --git a/spec/std/isa/inst/I/subw.yaml b/spec/std/isa/inst/I/subw.yaml index d9de0207a..10342755c 100644 --- a/spec/std/isa/inst/I/subw.yaml +++ b/spec/std/isa/inst/I/subw.yaml @@ -7,8 +7,12 @@ $schema: "inst_schema.json#" kind: instruction name: subw long_name: Subtract word -description: Subtract the 32-bit values in xs2 from xs1, and store the sign-extended result in xd -definedBy: I +description: + Subtract the 32-bit values in xs2 from xs1, and store the sign-extended + result in xd +definedBy: + extension: + name: I base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/I/sw.yaml b/spec/std/isa/inst/I/sw.yaml index 2e773033d..3d3e0064e 100644 --- a/spec/std/isa/inst/I/sw.yaml +++ b/spec/std/isa/inst/I/sw.yaml @@ -10,10 +10,12 @@ long_name: Store word description: | Store 32 bits of data from register `xs2` to an address formed by adding `xs1` to a signed offset. -definedBy: I +definedBy: + extension: + name: I assembly: xs2, imm(xs1) encoding: - match: -----------------010-----0100011 + match: "-----------------010-----0100011" variables: - name: imm location: 31-25|11-7 diff --git a/spec/std/isa/inst/I/wfi.yaml b/spec/std/isa/inst/I/wfi.yaml index f2021dd4f..c91d11512 100644 --- a/spec/std/isa/inst/I/wfi.yaml +++ b/spec/std/isa/inst/I/wfi.yaml @@ -47,7 +47,9 @@ description: | for an unspecified period of time to see if an interrupt occurs before raising the trap. That period of time can be zero (_i.e._, `wfi` always causes a trap in the cases identified above). -definedBy: Sm +definedBy: + extension: + name: Sm assembly: "" encoding: match: "00010000010100000000000001110011" diff --git a/spec/std/isa/inst/I/xor.yaml b/spec/std/isa/inst/I/xor.yaml index 6ace03a6a..2a2abd986 100644 --- a/spec/std/isa/inst/I/xor.yaml +++ b/spec/std/isa/inst/I/xor.yaml @@ -8,7 +8,9 @@ kind: instruction name: xor long_name: Exclusive Or description: Exclusive or xs1 with xs2, and store the result in xd -definedBy: I +definedBy: + extension: + name: I assembly: xd, xs1, xs2 encoding: match: 0000000----------100-----0110011 diff --git a/spec/std/isa/inst/I/xori.yaml b/spec/std/isa/inst/I/xori.yaml index f04491dcf..29f0d3ddd 100644 --- a/spec/std/isa/inst/I/xori.yaml +++ b/spec/std/isa/inst/I/xori.yaml @@ -7,11 +7,15 @@ $schema: "inst_schema.json#" kind: instruction name: xori long_name: Exclusive Or immediate -description: Exclusive or an immediate to the value in xs1, and store the result in xd -definedBy: I +description: + Exclusive or an immediate to the value in xs1, and store the result in + xd +definedBy: + extension: + name: I assembly: xd, xs1, imm encoding: - match: -----------------100-----0010011 + match: "-----------------100-----0010011" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/M/div.yaml b/spec/std/isa/inst/M/div.yaml index b55921ef0..7483d7c7d 100644 --- a/spec/std/isa/inst/M/div.yaml +++ b/spec/std/isa/inst/M/div.yaml @@ -14,7 +14,9 @@ description: | Division resulting in signed overflow (when most negative number is divided by -1) will put the most negative number into rd; -definedBy: M +definedBy: + extension: + name: M assembly: xd, xs1, xs2 encoding: match: 0000001----------100-----0110011 diff --git a/spec/std/isa/inst/M/divu.yaml b/spec/std/isa/inst/M/divu.yaml index b7911509d..6f8aa3d01 100644 --- a/spec/std/isa/inst/M/divu.yaml +++ b/spec/std/isa/inst/M/divu.yaml @@ -13,7 +13,9 @@ description: | The remainder is discarded. If the value in rs2 is zero, rd gets the largest unsigned value. -definedBy: M +definedBy: + extension: + name: M assembly: xd, xs1, xs2 encoding: match: 0000001----------101-----0110011 diff --git a/spec/std/isa/inst/M/divuw.yaml b/spec/std/isa/inst/M/divuw.yaml index 8dca5babb..70f4fa9b0 100644 --- a/spec/std/isa/inst/M/divuw.yaml +++ b/spec/std/isa/inst/M/divuw.yaml @@ -13,7 +13,9 @@ description: | The remainder is discarded. If the value in rs2 is zero, rd is written with all 1s. -definedBy: M +definedBy: + extension: + name: M base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/M/divw.yaml b/spec/std/isa/inst/M/divw.yaml index ee7d19683..073447c85 100644 --- a/spec/std/isa/inst/M/divw.yaml +++ b/spec/std/isa/inst/M/divw.yaml @@ -17,7 +17,9 @@ description: | Division resulting in signed overflow (when most negative number is divided by -1) will put the most negative number into rd; -definedBy: M +definedBy: + extension: + name: M base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/M/mul.yaml b/spec/std/isa/inst/M/mul.yaml index 5187d1823..bd9b75eda 100644 --- a/spec/std/isa/inst/M/mul.yaml +++ b/spec/std/isa/inst/M/mul.yaml @@ -21,7 +21,10 @@ description: | performing two separate multiplies. definedBy: - anyOf: [M, Zmmul] + extension: + anyOf: + - name: M + - name: Zmmul assembly: xd, xs1, xs2 encoding: match: 0000001----------000-----0110011 diff --git a/spec/std/isa/inst/M/mulh.yaml b/spec/std/isa/inst/M/mulh.yaml index ae059a933..d1f9adc55 100644 --- a/spec/std/isa/inst/M/mulh.yaml +++ b/spec/std/isa/inst/M/mulh.yaml @@ -20,7 +20,10 @@ description: | Microarchitectures may look for that sequence and fuse the operations. definedBy: - anyOf: [M, Zmmul] + extension: + anyOf: + - name: M + - name: Zmmul assembly: xd, xs1, xs2 encoding: match: 0000001----------001-----0110011 diff --git a/spec/std/isa/inst/M/mulhsu.yaml b/spec/std/isa/inst/M/mulhsu.yaml index 093547b6a..d90e45bab 100644 --- a/spec/std/isa/inst/M/mulhsu.yaml +++ b/spec/std/isa/inst/M/mulhsu.yaml @@ -20,7 +20,10 @@ description: | Microarchitectures may look for that sequence and fuse the operations. definedBy: - anyOf: [M, Zmmul] + extension: + anyOf: + - name: M + - name: Zmmul assembly: xd, xs1, xs2 encoding: match: 0000001----------010-----0110011 diff --git a/spec/std/isa/inst/M/mulhu.yaml b/spec/std/isa/inst/M/mulhu.yaml index 8280bbafe..11ca9afa8 100644 --- a/spec/std/isa/inst/M/mulhu.yaml +++ b/spec/std/isa/inst/M/mulhu.yaml @@ -20,7 +20,10 @@ description: | Microarchitectures may look for that sequence and fuse the operations. definedBy: - anyOf: [M, Zmmul] + extension: + anyOf: + - name: M + - name: Zmmul assembly: xd, xs1, xs2 encoding: match: 0000001----------011-----0110011 diff --git a/spec/std/isa/inst/M/mulw.yaml b/spec/std/isa/inst/M/mulw.yaml index 87670042c..20a5ee14b 100644 --- a/spec/std/isa/inst/M/mulw.yaml +++ b/spec/std/isa/inst/M/mulw.yaml @@ -19,7 +19,10 @@ description: | must have their upper 32 bits clear. If the arguments are not known to be sign- or zero-extended, an alternative is to shift both arguments left by 32 bits, then use MULH[[S]U]. definedBy: - anyOf: [M, Zmmul] + extension: + anyOf: + - name: M + - name: Zmmul base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/M/rem.yaml b/spec/std/isa/inst/M/rem.yaml index 659a6f534..31d63fdba 100644 --- a/spec/std/isa/inst/M/rem.yaml +++ b/spec/std/isa/inst/M/rem.yaml @@ -13,7 +13,9 @@ description: | If the value in register rs2 is zero, write the value in rs1 into rd; If the result of the division overflows, write zero into rd; -definedBy: M +definedBy: + extension: + name: M assembly: xd, xs1, xs2 encoding: match: 0000001----------110-----0110011 diff --git a/spec/std/isa/inst/M/remu.yaml b/spec/std/isa/inst/M/remu.yaml index 615128cb6..b2f3bae1b 100644 --- a/spec/std/isa/inst/M/remu.yaml +++ b/spec/std/isa/inst/M/remu.yaml @@ -9,7 +9,9 @@ name: remu long_name: Unsigned remainder description: | Calculate the remainder of unsigned division of rs1 by rs2, and store the result in rd. -definedBy: M +definedBy: + extension: + name: M assembly: xd, xs1, xs2 encoding: match: 0000001----------111-----0110011 diff --git a/spec/std/isa/inst/M/remuw.yaml b/spec/std/isa/inst/M/remuw.yaml index 2e58b852d..88cfdd073 100644 --- a/spec/std/isa/inst/M/remuw.yaml +++ b/spec/std/isa/inst/M/remuw.yaml @@ -12,7 +12,9 @@ description: | and store the sign-extended result in rd. If the value in rs2 is zero, rd gets the sign-extended value in rs1. -definedBy: M +definedBy: + extension: + name: M base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/M/remw.yaml b/spec/std/isa/inst/M/remw.yaml index 5dee61e64..729619c70 100644 --- a/spec/std/isa/inst/M/remw.yaml +++ b/spec/std/isa/inst/M/remw.yaml @@ -14,7 +14,9 @@ description: | If the value in register rs2 is zero, write the sign-extended 32-bit value in rs1 into rd; If the result of the division overflows, write zero into rd; -definedBy: M +definedBy: + extension: + name: M base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Q/fadd.q.yaml b/spec/std/isa/inst/Q/fadd.q.yaml index 543669d01..f970c8c11 100644 --- a/spec/std/isa/inst/Q/fadd.q.yaml +++ b/spec/std/isa/inst/Q/fadd.q.yaml @@ -13,7 +13,9 @@ description: text: | `fadd.q` is analogous to `fadd.d` and performs double-precision floating-point addition between `qs1` and `qs2` and writes the final result to `qd`. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2, rm encoding: match: 0000011------------------1010011 diff --git a/spec/std/isa/inst/Q/fclass.q.yaml b/spec/std/isa/inst/Q/fclass.q.yaml index 5834f060b..0e53477be 100644 --- a/spec/std/isa/inst/Q/fclass.q.yaml +++ b/spec/std/isa/inst/Q/fclass.q.yaml @@ -9,7 +9,9 @@ name: fclass.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: xd, fs1 encoding: match: 111001100000-----001-----1010011 diff --git a/spec/std/isa/inst/Q/fcvt.d.q.yaml b/spec/std/isa/inst/Q/fcvt.d.q.yaml index 3367bc87b..c98a33e0c 100644 --- a/spec/std/isa/inst/Q/fcvt.d.q.yaml +++ b/spec/std/isa/inst/Q/fcvt.d.q.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.d.q` converts a quad-precision floating-point number to a double-precision floating-point number. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, rm encoding: match: 010000100011-------------1010011 diff --git a/spec/std/isa/inst/Q/fcvt.h.q.yaml b/spec/std/isa/inst/Q/fcvt.h.q.yaml index 4db084310..9405569b7 100644 --- a/spec/std/isa/inst/Q/fcvt.h.q.yaml +++ b/spec/std/isa/inst/Q/fcvt.h.q.yaml @@ -13,7 +13,10 @@ description: text: | `fcvt.h.q` converts a Quad-precision Floating-point number to a Half-precision Floating-point number. definedBy: - allOf: [Q, Zfh] + extension: + allOf: + - name: Q + - name: Zfh assembly: fd, fs1, rm encoding: match: 010001000011-------------1010011 diff --git a/spec/std/isa/inst/Q/fcvt.l.q.yaml b/spec/std/isa/inst/Q/fcvt.l.q.yaml index d1be1de5b..755eca5df 100644 --- a/spec/std/isa/inst/Q/fcvt.l.q.yaml +++ b/spec/std/isa/inst/Q/fcvt.l.q.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.l.q` converts a quad-precision floating-point number to a signed 64-bit integer. -definedBy: Q +definedBy: + extension: + name: Q base: 64 assembly: xd, fs1, rm encoding: diff --git a/spec/std/isa/inst/Q/fcvt.lu.q.yaml b/spec/std/isa/inst/Q/fcvt.lu.q.yaml index 028c89028..e6062613b 100644 --- a/spec/std/isa/inst/Q/fcvt.lu.q.yaml +++ b/spec/std/isa/inst/Q/fcvt.lu.q.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.lu.q` converts a quad-precision floating-point number to an unsigned 64-bit integer. -definedBy: Q +definedBy: + extension: + name: Q base: 64 assembly: xd, fs1, rm encoding: diff --git a/spec/std/isa/inst/Q/fcvt.q.d.yaml b/spec/std/isa/inst/Q/fcvt.q.d.yaml index 4120afae5..b92f491bc 100644 --- a/spec/std/isa/inst/Q/fcvt.q.d.yaml +++ b/spec/std/isa/inst/Q/fcvt.q.d.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.d.q` converts a double-precision floating-point number to a quad-precision floating-point number. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, rm encoding: match: 010001100001-------------1010011 diff --git a/spec/std/isa/inst/Q/fcvt.q.h.yaml b/spec/std/isa/inst/Q/fcvt.q.h.yaml index 9f13280fa..236271a91 100644 --- a/spec/std/isa/inst/Q/fcvt.q.h.yaml +++ b/spec/std/isa/inst/Q/fcvt.q.h.yaml @@ -13,7 +13,10 @@ description: text: | `fcvt.q.h` converts a half-precision floating-point number to a quad-precision floating-point number. definedBy: - allOf: [Q, Zfh] + extension: + allOf: + - name: Q + - name: Zfh assembly: fd, fs1, rm encoding: match: 010001100010-------------1010011 diff --git a/spec/std/isa/inst/Q/fcvt.q.l.yaml b/spec/std/isa/inst/Q/fcvt.q.l.yaml index dc6058a16..386e1eabb 100644 --- a/spec/std/isa/inst/Q/fcvt.q.l.yaml +++ b/spec/std/isa/inst/Q/fcvt.q.l.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.q.l` converts a 64-bit signed integer, into a quad-precision floating-point number. -definedBy: Q +definedBy: + extension: + name: Q base: 64 assembly: fd, xs1, rm encoding: diff --git a/spec/std/isa/inst/Q/fcvt.q.lu.yaml b/spec/std/isa/inst/Q/fcvt.q.lu.yaml index 87ad6af67..0263bb4b0 100644 --- a/spec/std/isa/inst/Q/fcvt.q.lu.yaml +++ b/spec/std/isa/inst/Q/fcvt.q.lu.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.q.lu` converts a 64-bit unsigned integer, into a quad-precision floating-point number. -definedBy: Q +definedBy: + extension: + name: Q base: 64 assembly: fd, xs1, rm encoding: diff --git a/spec/std/isa/inst/Q/fcvt.q.s.yaml b/spec/std/isa/inst/Q/fcvt.q.s.yaml index 2b506850d..5b5205a81 100644 --- a/spec/std/isa/inst/Q/fcvt.q.s.yaml +++ b/spec/std/isa/inst/Q/fcvt.q.s.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.q.s` converts a single-precision floating-point number to a quad-precision floating-point number. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, rm encoding: match: 010001100000-------------1010011 diff --git a/spec/std/isa/inst/Q/fcvt.q.w.yaml b/spec/std/isa/inst/Q/fcvt.q.w.yaml index b47c5d25e..5b11a22f0 100644 --- a/spec/std/isa/inst/Q/fcvt.q.w.yaml +++ b/spec/std/isa/inst/Q/fcvt.q.w.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.q.w` converts a 32-bit signed integer into a quad-precision floating-point number. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, xs1, rm encoding: match: 110101100000-------------1010011 diff --git a/spec/std/isa/inst/Q/fcvt.q.wu.yaml b/spec/std/isa/inst/Q/fcvt.q.wu.yaml index f1473760b..ff49a9f90 100644 --- a/spec/std/isa/inst/Q/fcvt.q.wu.yaml +++ b/spec/std/isa/inst/Q/fcvt.q.wu.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.q.wu` converts a 32-bit unsigned integer into a quad-precision floating-point number. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, xs1, rm encoding: match: 110101100001-------------1010011 diff --git a/spec/std/isa/inst/Q/fcvt.s.q.yaml b/spec/std/isa/inst/Q/fcvt.s.q.yaml index cad4628d5..df958377e 100644 --- a/spec/std/isa/inst/Q/fcvt.s.q.yaml +++ b/spec/std/isa/inst/Q/fcvt.s.q.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.s.q` converts a quad-precision floating-point number to a single-precision floating-point number. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, rm encoding: match: 010000000011-------------1010011 diff --git a/spec/std/isa/inst/Q/fcvt.w.q.yaml b/spec/std/isa/inst/Q/fcvt.w.q.yaml index 6d93deef8..c85690d75 100644 --- a/spec/std/isa/inst/Q/fcvt.w.q.yaml +++ b/spec/std/isa/inst/Q/fcvt.w.q.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.w.q` converts a quad-precision floating-point number to a 32-bit signed integer. -definedBy: Q +definedBy: + extension: + name: Q assembly: xd, fs1, rm encoding: match: 110001100000-------------1010011 diff --git a/spec/std/isa/inst/Q/fcvt.wu.q.yaml b/spec/std/isa/inst/Q/fcvt.wu.q.yaml index 75e53430f..4a8b24d6b 100644 --- a/spec/std/isa/inst/Q/fcvt.wu.q.yaml +++ b/spec/std/isa/inst/Q/fcvt.wu.q.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.wu.q` converts a quad-precision floating-point number to a 32-bit unsigned integer. -definedBy: Q +definedBy: + extension: + name: Q assembly: xd, fs1, rm encoding: match: 110001100001-------------1010011 diff --git a/spec/std/isa/inst/Q/fdiv.q.yaml b/spec/std/isa/inst/Q/fdiv.q.yaml index 0083fd01f..f96759366 100644 --- a/spec/std/isa/inst/Q/fdiv.q.yaml +++ b/spec/std/isa/inst/Q/fdiv.q.yaml @@ -9,7 +9,9 @@ name: fdiv.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2, rm encoding: match: 0001111------------------1010011 diff --git a/spec/std/isa/inst/Q/feq.q.yaml b/spec/std/isa/inst/Q/feq.q.yaml index 475794eec..2edd12710 100644 --- a/spec/std/isa/inst/Q/feq.q.yaml +++ b/spec/std/isa/inst/Q/feq.q.yaml @@ -9,7 +9,9 @@ name: feq.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: xd, fs1, fs2 encoding: match: 1010011----------010-----1010011 diff --git a/spec/std/isa/inst/Q/fle.q.yaml b/spec/std/isa/inst/Q/fle.q.yaml index 13d62c714..6aa284317 100644 --- a/spec/std/isa/inst/Q/fle.q.yaml +++ b/spec/std/isa/inst/Q/fle.q.yaml @@ -9,7 +9,9 @@ name: fle.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: xd, fs1, fs2 encoding: match: 1010011----------000-----1010011 diff --git a/spec/std/isa/inst/Q/fleq.q.yaml b/spec/std/isa/inst/Q/fleq.q.yaml index 54d002d77..9c9696c8d 100644 --- a/spec/std/isa/inst/Q/fleq.q.yaml +++ b/spec/std/isa/inst/Q/fleq.q.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Q, Zfa] + extension: + allOf: + - name: Q + - name: Zfa assembly: xd, fs1, fs2 encoding: match: 1010011----------100-----1010011 diff --git a/spec/std/isa/inst/Q/fli.q.yaml b/spec/std/isa/inst/Q/fli.q.yaml index c76d9b663..5323b07a4 100644 --- a/spec/std/isa/inst/Q/fli.q.yaml +++ b/spec/std/isa/inst/Q/fli.q.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Q, Zfa] + extension: + allOf: + - name: Q + - name: Zfa assembly: fd, xs1 encoding: match: 111101100001-----000-----1010011 diff --git a/spec/std/isa/inst/Q/flq.yaml b/spec/std/isa/inst/Q/flq.yaml index 35dd839b7..26fd957cc 100644 --- a/spec/std/isa/inst/Q/flq.yaml +++ b/spec/std/isa/inst/Q/flq.yaml @@ -9,10 +9,12 @@ name: flq long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, xs1, imm encoding: - match: -----------------100-----0000111 + match: "-----------------100-----0000111" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/Q/flt.q.yaml b/spec/std/isa/inst/Q/flt.q.yaml index 3c55ab6bd..4a804ba77 100644 --- a/spec/std/isa/inst/Q/flt.q.yaml +++ b/spec/std/isa/inst/Q/flt.q.yaml @@ -9,7 +9,9 @@ name: flt.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: xd, fs1, fs2 encoding: match: 1010011----------001-----1010011 diff --git a/spec/std/isa/inst/Q/fltq.q.yaml b/spec/std/isa/inst/Q/fltq.q.yaml index 5f4822299..c19d43d33 100644 --- a/spec/std/isa/inst/Q/fltq.q.yaml +++ b/spec/std/isa/inst/Q/fltq.q.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Q, Zfa] + extension: + allOf: + - name: Q + - name: Zfa assembly: fd, fs1, fs2 encoding: match: 1010011----------101-----1010011 diff --git a/spec/std/isa/inst/Q/fmadd.q.yaml b/spec/std/isa/inst/Q/fmadd.q.yaml index bab845d11..972751964 100644 --- a/spec/std/isa/inst/Q/fmadd.q.yaml +++ b/spec/std/isa/inst/Q/fmadd.q.yaml @@ -9,10 +9,12 @@ name: fmadd.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----11------------------1000011 + match: "-----11------------------1000011" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/Q/fmax.q.yaml b/spec/std/isa/inst/Q/fmax.q.yaml index c204f5d28..2829e92fc 100644 --- a/spec/std/isa/inst/Q/fmax.q.yaml +++ b/spec/std/isa/inst/Q/fmax.q.yaml @@ -9,7 +9,9 @@ name: fmax.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2 encoding: match: 0010111----------001-----1010011 diff --git a/spec/std/isa/inst/Q/fmaxm.q.yaml b/spec/std/isa/inst/Q/fmaxm.q.yaml index 30d7be537..1a8314250 100644 --- a/spec/std/isa/inst/Q/fmaxm.q.yaml +++ b/spec/std/isa/inst/Q/fmaxm.q.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Q, Zfa] + extension: + allOf: + - name: Q + - name: Zfa assembly: fd, fs1, fs2 encoding: match: 0010111----------011-----1010011 diff --git a/spec/std/isa/inst/Q/fmin.q.yaml b/spec/std/isa/inst/Q/fmin.q.yaml index f9ca56105..6321fb076 100644 --- a/spec/std/isa/inst/Q/fmin.q.yaml +++ b/spec/std/isa/inst/Q/fmin.q.yaml @@ -9,7 +9,9 @@ name: fmin.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2 encoding: match: 0010111----------000-----1010011 diff --git a/spec/std/isa/inst/Q/fminm.q.yaml b/spec/std/isa/inst/Q/fminm.q.yaml index f313ca761..ea8202a0b 100644 --- a/spec/std/isa/inst/Q/fminm.q.yaml +++ b/spec/std/isa/inst/Q/fminm.q.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Q, Zfa] + extension: + allOf: + - name: Q + - name: Zfa assembly: fd, fs1, fs2 encoding: match: 0010111----------010-----1010011 diff --git a/spec/std/isa/inst/Q/fmsub.q.yaml b/spec/std/isa/inst/Q/fmsub.q.yaml index 260db0ba1..a7f2463a0 100644 --- a/spec/std/isa/inst/Q/fmsub.q.yaml +++ b/spec/std/isa/inst/Q/fmsub.q.yaml @@ -9,10 +9,12 @@ name: fmsub.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----11------------------1000111 + match: "-----11------------------1000111" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/Q/fmul.q.yaml b/spec/std/isa/inst/Q/fmul.q.yaml index cc3f689ac..7a7a58198 100644 --- a/spec/std/isa/inst/Q/fmul.q.yaml +++ b/spec/std/isa/inst/Q/fmul.q.yaml @@ -9,7 +9,9 @@ name: fmul.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2, rm encoding: match: 0001011------------------1010011 diff --git a/spec/std/isa/inst/Q/fmvh.x.q.yaml b/spec/std/isa/inst/Q/fmvh.x.q.yaml index 01a6ab5d0..5d44b2f66 100644 --- a/spec/std/isa/inst/Q/fmvh.x.q.yaml +++ b/spec/std/isa/inst/Q/fmvh.x.q.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Q, Zfa] + extension: + allOf: + - name: Q + - name: Zfa base: 64 assembly: xd, fs1 encoding: diff --git a/spec/std/isa/inst/Q/fmvp.q.x.yaml b/spec/std/isa/inst/Q/fmvp.q.x.yaml index 6fbf87619..a6feb6559 100644 --- a/spec/std/isa/inst/Q/fmvp.q.x.yaml +++ b/spec/std/isa/inst/Q/fmvp.q.x.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Q, Zfa] + extension: + allOf: + - name: Q + - name: Zfa base: 64 assembly: fd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Q/fnmadd.q.yaml b/spec/std/isa/inst/Q/fnmadd.q.yaml index 376220463..e956c98b7 100644 --- a/spec/std/isa/inst/Q/fnmadd.q.yaml +++ b/spec/std/isa/inst/Q/fnmadd.q.yaml @@ -9,10 +9,12 @@ name: fnmadd.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----11------------------1001111 + match: "-----11------------------1001111" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/Q/fnmsub.q.yaml b/spec/std/isa/inst/Q/fnmsub.q.yaml index 902532e34..6cf0d2a9a 100644 --- a/spec/std/isa/inst/Q/fnmsub.q.yaml +++ b/spec/std/isa/inst/Q/fnmsub.q.yaml @@ -9,10 +9,12 @@ name: fnmsub.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----11------------------1001011 + match: "-----11------------------1001011" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/Q/fround.q.yaml b/spec/std/isa/inst/Q/fround.q.yaml index d57b8882c..a9b4711c0 100644 --- a/spec/std/isa/inst/Q/fround.q.yaml +++ b/spec/std/isa/inst/Q/fround.q.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Q, Zfa] + extension: + allOf: + - name: Q + - name: Zfa assembly: fd, fs1, rm encoding: match: 010001100100-------------1010011 diff --git a/spec/std/isa/inst/Q/froundnx.q.yaml b/spec/std/isa/inst/Q/froundnx.q.yaml index f6586f246..ca299d8f5 100644 --- a/spec/std/isa/inst/Q/froundnx.q.yaml +++ b/spec/std/isa/inst/Q/froundnx.q.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Q, Zfa] + extension: + allOf: + - name: Q + - name: Zfa assembly: fd, fs1, rm encoding: match: 010001100101-------------1010011 diff --git a/spec/std/isa/inst/Q/fsgnj.q.yaml b/spec/std/isa/inst/Q/fsgnj.q.yaml index 8f6057fe5..ddd8afc29 100644 --- a/spec/std/isa/inst/Q/fsgnj.q.yaml +++ b/spec/std/isa/inst/Q/fsgnj.q.yaml @@ -9,7 +9,9 @@ name: fsgnj.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2 encoding: match: 0010011----------000-----1010011 diff --git a/spec/std/isa/inst/Q/fsgnjn.q.yaml b/spec/std/isa/inst/Q/fsgnjn.q.yaml index 098738ce0..42e8255fa 100644 --- a/spec/std/isa/inst/Q/fsgnjn.q.yaml +++ b/spec/std/isa/inst/Q/fsgnjn.q.yaml @@ -9,7 +9,9 @@ name: fsgnjn.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2 encoding: match: 0010011----------001-----1010011 diff --git a/spec/std/isa/inst/Q/fsgnjx.q.yaml b/spec/std/isa/inst/Q/fsgnjx.q.yaml index 3a98826f9..c17b9bf5d 100644 --- a/spec/std/isa/inst/Q/fsgnjx.q.yaml +++ b/spec/std/isa/inst/Q/fsgnjx.q.yaml @@ -9,7 +9,9 @@ name: fsgnjx.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2 encoding: match: 0010011----------010-----1010011 diff --git a/spec/std/isa/inst/Q/fsq.yaml b/spec/std/isa/inst/Q/fsq.yaml index c5ac626a8..935fe96c2 100644 --- a/spec/std/isa/inst/Q/fsq.yaml +++ b/spec/std/isa/inst/Q/fsq.yaml @@ -9,10 +9,12 @@ name: fsq long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fs2, imm(xs1) encoding: - match: -----------------100-----0100111 + match: "-----------------100-----0100111" variables: - name: imm location: 31-25|11-7 diff --git a/spec/std/isa/inst/Q/fsqrt.q.yaml b/spec/std/isa/inst/Q/fsqrt.q.yaml index 52a2aadce..0b7c38b4e 100644 --- a/spec/std/isa/inst/Q/fsqrt.q.yaml +++ b/spec/std/isa/inst/Q/fsqrt.q.yaml @@ -9,7 +9,9 @@ name: fsqrt.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, rm encoding: match: 010111100000-------------1010011 diff --git a/spec/std/isa/inst/Q/fsub.q.yaml b/spec/std/isa/inst/Q/fsub.q.yaml index 065dd76f7..f8eeec498 100644 --- a/spec/std/isa/inst/Q/fsub.q.yaml +++ b/spec/std/isa/inst/Q/fsub.q.yaml @@ -9,7 +9,9 @@ name: fsub.q long_name: No synopsis available description: | No description available. -definedBy: Q +definedBy: + extension: + name: Q assembly: fd, fs1, fs2, rm encoding: match: 0000111------------------1010011 diff --git a/spec/std/isa/inst/S/sfence.vma.yaml b/spec/std/isa/inst/S/sfence.vma.yaml index aec8b9fef..86df8e8fd 100644 --- a/spec/std/isa/inst/S/sfence.vma.yaml +++ b/spec/std/isa/inst/S/sfence.vma.yaml @@ -7,7 +7,9 @@ $schema: "inst_schema.json#" kind: instruction name: sfence.vma long_name: Supervisor memory-management fence -definedBy: S +definedBy: + extension: + name: S description: | The supervisor memory-management fence instruction `SFENCE.VMA` is used to synchronize updates to in-memory memory-management data structures with diff --git a/spec/std/isa/inst/S/sret.yaml b/spec/std/isa/inst/S/sret.yaml index b6e115103..a3cc4fb63 100644 --- a/spec/std/isa/inst/S/sret.yaml +++ b/spec/std/isa/inst/S/sret.yaml @@ -47,7 +47,9 @@ description: | | 1 | VS-mode |=== -definedBy: S +definedBy: + extension: + name: S assembly: "" encoding: match: "00010000001000000000000001110011" diff --git a/spec/std/isa/inst/Sdext/dret.yaml b/spec/std/isa/inst/Sdext/dret.yaml index 36958bb35..9334d327f 100644 --- a/spec/std/isa/inst/Sdext/dret.yaml +++ b/spec/std/isa/inst/Sdext/dret.yaml @@ -9,7 +9,9 @@ name: dret long_name: No synopsis available description: | No description available. -definedBy: Sdext +definedBy: + extension: + name: Sdext assembly: dret encoding: match: "01111011001000000000000001110011" diff --git a/spec/std/isa/inst/Smdbltrp/sctrclr.yaml b/spec/std/isa/inst/Smdbltrp/sctrclr.yaml index 2230eead0..b8f98f59d 100644 --- a/spec/std/isa/inst/Smdbltrp/sctrclr.yaml +++ b/spec/std/isa/inst/Smdbltrp/sctrclr.yaml @@ -9,7 +9,9 @@ name: sctrclr long_name: No synopsis available description: | No description available. -definedBy: Smdbltrp +definedBy: + extension: + name: Smdbltrp assembly: sctrclr encoding: match: "00010000010000000000000001110011" diff --git a/spec/std/isa/inst/Smrnmi/mnret.yaml b/spec/std/isa/inst/Smrnmi/mnret.yaml index 6e3898b52..a807954e5 100644 --- a/spec/std/isa/inst/Smrnmi/mnret.yaml +++ b/spec/std/isa/inst/Smrnmi/mnret.yaml @@ -13,7 +13,9 @@ description: | also sets mnstatus.NMIE. If MNRET changes the privilege mode to a mode less privileged than M, it also sets mstatus.MPRV to 0. If the Zicfilp extension is implemented, then if the new privileged mode is y, MNRET sets ELP to the logical AND of yLPE (see Section 22.1.1) and mnstatus.MNPELP. -definedBy: Smrnmi +definedBy: + extension: + name: Smrnmi assembly: mnret encoding: match: "01110000001000000000000001110011" diff --git a/spec/std/isa/inst/Svinval/hinval.gvma.yaml b/spec/std/isa/inst/Svinval/hinval.gvma.yaml index 7bfb9729e..2c87b7344 100644 --- a/spec/std/isa/inst/Svinval/hinval.gvma.yaml +++ b/spec/std/isa/inst/Svinval/hinval.gvma.yaml @@ -8,9 +8,10 @@ kind: instruction name: hinval.gvma long_name: Invalidate cached address translations definedBy: - allOf: - - Svinval - - H + extension: + allOf: + - name: Svinval + - name: H encoding: match: 0110011----------000000001110011 variables: diff --git a/spec/std/isa/inst/Svinval/hinval.vvma.yaml b/spec/std/isa/inst/Svinval/hinval.vvma.yaml index 49fd470b7..335ddd109 100644 --- a/spec/std/isa/inst/Svinval/hinval.vvma.yaml +++ b/spec/std/isa/inst/Svinval/hinval.vvma.yaml @@ -8,9 +8,10 @@ kind: instruction name: hinval.vvma long_name: Invalidate cached address translations definedBy: - allOf: - - Svinval - - H + extension: + allOf: + - name: Svinval + - name: H encoding: match: 0010011----------000000001110011 variables: diff --git a/spec/std/isa/inst/Svinval/sfence.inval.ir.yaml b/spec/std/isa/inst/Svinval/sfence.inval.ir.yaml index b1005cbd6..a2f76807d 100644 --- a/spec/std/isa/inst/Svinval/sfence.inval.ir.yaml +++ b/spec/std/isa/inst/Svinval/sfence.inval.ir.yaml @@ -7,7 +7,9 @@ $schema: "inst_schema.json#" kind: instruction name: sfence.inval.ir long_name: Order implicit page table reads after invalidation -definedBy: Svinval +definedBy: + extension: + name: Svinval encoding: match: "00011000000100000000000001110011" description: | diff --git a/spec/std/isa/inst/Svinval/sfence.w.inval.yaml b/spec/std/isa/inst/Svinval/sfence.w.inval.yaml index c1a0e7550..7b6bf12ce 100644 --- a/spec/std/isa/inst/Svinval/sfence.w.inval.yaml +++ b/spec/std/isa/inst/Svinval/sfence.w.inval.yaml @@ -7,7 +7,9 @@ $schema: "inst_schema.json#" kind: instruction name: sfence.w.inval long_name: Order writes before sfence -definedBy: Svinval +definedBy: + extension: + name: Svinval encoding: match: "00011000000000000000000001110011" description: | diff --git a/spec/std/isa/inst/Svinval/sinval.vma.yaml b/spec/std/isa/inst/Svinval/sinval.vma.yaml index 79dbc6664..3d8affa13 100644 --- a/spec/std/isa/inst/Svinval/sinval.vma.yaml +++ b/spec/std/isa/inst/Svinval/sinval.vma.yaml @@ -7,7 +7,9 @@ $schema: "inst_schema.json#" kind: instruction name: sinval.vma long_name: Invalidate cached address translations -definedBy: Svinval +definedBy: + extension: + name: Svinval encoding: match: 0001011----------000000001110011 variables: @@ -16,10 +18,11 @@ encoding: - name: rs1 location: 19-15 description: - The `sinval.vma` instruction invalidates any address-translation cache entries that an - `sfence.vma` instruction with the same values of rs1 and rs2 would invalidate. - However, unlike `sfence.vma`, `sinval.vma` instructions are only ordered with respect to - `sfence.vma`, `sfence.w.inval`, and `sfence.inval.ir` instructions as defined below. + The `sinval.vma` instruction invalidates any address-translation cache + entries that an `sfence.vma` instruction with the same values of rs1 and rs2 would + invalidate. However, unlike `sfence.vma`, `sinval.vma` instructions are only ordered + with respect to `sfence.vma`, `sfence.w.inval`, and `sfence.inval.ir` instructions + as defined below. access: s: sometimes u: never diff --git a/spec/std/isa/inst/V/vaadd.vv.yaml b/spec/std/isa/inst/V/vaadd.vv.yaml index 17d16e336..4cd90fab3 100644 --- a/spec/std/isa/inst/V/vaadd.vv.yaml +++ b/spec/std/isa/inst/V/vaadd.vv.yaml @@ -9,7 +9,9 @@ name: vaadd.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001001-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vaadd.vx.yaml b/spec/std/isa/inst/V/vaadd.vx.yaml index c012c9146..92fa7a023 100644 --- a/spec/std/isa/inst/V/vaadd.vx.yaml +++ b/spec/std/isa/inst/V/vaadd.vx.yaml @@ -9,7 +9,9 @@ name: vaadd.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001001-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vaaddu.vv.yaml b/spec/std/isa/inst/V/vaaddu.vv.yaml index a992673bb..2eef69914 100644 --- a/spec/std/isa/inst/V/vaaddu.vv.yaml +++ b/spec/std/isa/inst/V/vaaddu.vv.yaml @@ -9,7 +9,9 @@ name: vaaddu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001000-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vaaddu.vx.yaml b/spec/std/isa/inst/V/vaaddu.vx.yaml index cfcc7716d..2c5810942 100644 --- a/spec/std/isa/inst/V/vaaddu.vx.yaml +++ b/spec/std/isa/inst/V/vaaddu.vx.yaml @@ -9,7 +9,9 @@ name: vaaddu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001000-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vadc.vim.yaml b/spec/std/isa/inst/V/vadc.vim.yaml index f54868c03..1e39d611a 100644 --- a/spec/std/isa/inst/V/vadc.vim.yaml +++ b/spec/std/isa/inst/V/vadc.vim.yaml @@ -9,7 +9,9 @@ name: vadc.vim long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, v0 encoding: match: 0100000----------011-----1010111 diff --git a/spec/std/isa/inst/V/vadc.vvm.yaml b/spec/std/isa/inst/V/vadc.vvm.yaml index 88af72d2b..8d36df795 100644 --- a/spec/std/isa/inst/V/vadc.vvm.yaml +++ b/spec/std/isa/inst/V/vadc.vvm.yaml @@ -9,7 +9,9 @@ name: vadc.vvm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, v0 encoding: match: 0100000----------000-----1010111 diff --git a/spec/std/isa/inst/V/vadc.vxm.yaml b/spec/std/isa/inst/V/vadc.vxm.yaml index d3967cef6..be0490b44 100644 --- a/spec/std/isa/inst/V/vadc.vxm.yaml +++ b/spec/std/isa/inst/V/vadc.vxm.yaml @@ -9,7 +9,9 @@ name: vadc.vxm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, v0 encoding: match: 0100000----------100-----1010111 diff --git a/spec/std/isa/inst/V/vadd.vi.yaml b/spec/std/isa/inst/V/vadd.vi.yaml index c7d3bf943..abe8fb380 100644 --- a/spec/std/isa/inst/V/vadd.vi.yaml +++ b/spec/std/isa/inst/V/vadd.vi.yaml @@ -9,7 +9,9 @@ name: vadd.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 000000-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vadd.vv.yaml b/spec/std/isa/inst/V/vadd.vv.yaml index 723260e47..019816829 100644 --- a/spec/std/isa/inst/V/vadd.vv.yaml +++ b/spec/std/isa/inst/V/vadd.vv.yaml @@ -9,7 +9,9 @@ name: vadd.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000000-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vadd.vx.yaml b/spec/std/isa/inst/V/vadd.vx.yaml index 8d5b29c04..b38229500 100644 --- a/spec/std/isa/inst/V/vadd.vx.yaml +++ b/spec/std/isa/inst/V/vadd.vx.yaml @@ -9,7 +9,9 @@ name: vadd.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 000000-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vand.vi.yaml b/spec/std/isa/inst/V/vand.vi.yaml index 9e2c571fb..15fe9d162 100644 --- a/spec/std/isa/inst/V/vand.vi.yaml +++ b/spec/std/isa/inst/V/vand.vi.yaml @@ -9,7 +9,9 @@ name: vand.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 001001-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vand.vv.yaml b/spec/std/isa/inst/V/vand.vv.yaml index de6bbd036..34637351c 100644 --- a/spec/std/isa/inst/V/vand.vv.yaml +++ b/spec/std/isa/inst/V/vand.vv.yaml @@ -9,7 +9,9 @@ name: vand.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001001-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vand.vx.yaml b/spec/std/isa/inst/V/vand.vx.yaml index b8f98b284..93532b42a 100644 --- a/spec/std/isa/inst/V/vand.vx.yaml +++ b/spec/std/isa/inst/V/vand.vx.yaml @@ -9,7 +9,9 @@ name: vand.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001001-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vasub.vv.yaml b/spec/std/isa/inst/V/vasub.vv.yaml index d8b7c49ee..727b2cd10 100644 --- a/spec/std/isa/inst/V/vasub.vv.yaml +++ b/spec/std/isa/inst/V/vasub.vv.yaml @@ -9,7 +9,9 @@ name: vasub.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001011-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vasub.vx.yaml b/spec/std/isa/inst/V/vasub.vx.yaml index 0784a2591..0b3d687f4 100644 --- a/spec/std/isa/inst/V/vasub.vx.yaml +++ b/spec/std/isa/inst/V/vasub.vx.yaml @@ -9,7 +9,9 @@ name: vasub.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001011-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vasubu.vv.yaml b/spec/std/isa/inst/V/vasubu.vv.yaml index 732fa3ead..f698427c2 100644 --- a/spec/std/isa/inst/V/vasubu.vv.yaml +++ b/spec/std/isa/inst/V/vasubu.vv.yaml @@ -9,7 +9,9 @@ name: vasubu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001010-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vasubu.vx.yaml b/spec/std/isa/inst/V/vasubu.vx.yaml index f39bdf4de..58a306db1 100644 --- a/spec/std/isa/inst/V/vasubu.vx.yaml +++ b/spec/std/isa/inst/V/vasubu.vx.yaml @@ -9,7 +9,9 @@ name: vasubu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001010-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vcompress.vm.yaml b/spec/std/isa/inst/V/vcompress.vm.yaml index 38a436d65..b595b87a6 100644 --- a/spec/std/isa/inst/V/vcompress.vm.yaml +++ b/spec/std/isa/inst/V/vcompress.vm.yaml @@ -9,7 +9,9 @@ name: vcompress.vm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0101111----------010-----1010111 diff --git a/spec/std/isa/inst/V/vcpop.m.yaml b/spec/std/isa/inst/V/vcpop.m.yaml index ff98cafd2..a1b83e147 100644 --- a/spec/std/isa/inst/V/vcpop.m.yaml +++ b/spec/std/isa/inst/V/vcpop.m.yaml @@ -9,7 +9,9 @@ name: vcpop.m long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010000------10000010-----1010111 diff --git a/spec/std/isa/inst/V/vdiv.vv.yaml b/spec/std/isa/inst/V/vdiv.vv.yaml index 014aa493f..6e09653b7 100644 --- a/spec/std/isa/inst/V/vdiv.vv.yaml +++ b/spec/std/isa/inst/V/vdiv.vv.yaml @@ -9,7 +9,9 @@ name: vdiv.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100001-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vdiv.vx.yaml b/spec/std/isa/inst/V/vdiv.vx.yaml index a58a92328..b254c61cd 100644 --- a/spec/std/isa/inst/V/vdiv.vx.yaml +++ b/spec/std/isa/inst/V/vdiv.vx.yaml @@ -9,7 +9,9 @@ name: vdiv.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100001-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vdivu.vv.yaml b/spec/std/isa/inst/V/vdivu.vv.yaml index 4030371b4..68d99ced3 100644 --- a/spec/std/isa/inst/V/vdivu.vv.yaml +++ b/spec/std/isa/inst/V/vdivu.vv.yaml @@ -9,7 +9,9 @@ name: vdivu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100000-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vdivu.vx.yaml b/spec/std/isa/inst/V/vdivu.vx.yaml index 2960b267a..9c523ea94 100644 --- a/spec/std/isa/inst/V/vdivu.vx.yaml +++ b/spec/std/isa/inst/V/vdivu.vx.yaml @@ -9,7 +9,9 @@ name: vdivu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100000-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vfadd.vf.yaml b/spec/std/isa/inst/V/vfadd.vf.yaml index 8edbd0d64..18ac9c5cb 100644 --- a/spec/std/isa/inst/V/vfadd.vf.yaml +++ b/spec/std/isa/inst/V/vfadd.vf.yaml @@ -9,7 +9,9 @@ name: vfadd.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 000000-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfadd.vv.yaml b/spec/std/isa/inst/V/vfadd.vv.yaml index a7214e6d1..fe873cc83 100644 --- a/spec/std/isa/inst/V/vfadd.vv.yaml +++ b/spec/std/isa/inst/V/vfadd.vv.yaml @@ -9,7 +9,9 @@ name: vfadd.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000000-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfclass.v.yaml b/spec/std/isa/inst/V/vfclass.v.yaml index 90bd46300..51e9bfeac 100644 --- a/spec/std/isa/inst/V/vfclass.v.yaml +++ b/spec/std/isa/inst/V/vfclass.v.yaml @@ -9,7 +9,9 @@ name: vfclass.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010011------10000001-----1010111 diff --git a/spec/std/isa/inst/V/vfcvt.f.x.v.yaml b/spec/std/isa/inst/V/vfcvt.f.x.v.yaml index 9927cd037..411b49661 100644 --- a/spec/std/isa/inst/V/vfcvt.f.x.v.yaml +++ b/spec/std/isa/inst/V/vfcvt.f.x.v.yaml @@ -9,7 +9,9 @@ name: vfcvt.f.x.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00011001-----1010111 diff --git a/spec/std/isa/inst/V/vfcvt.f.xu.v.yaml b/spec/std/isa/inst/V/vfcvt.f.xu.v.yaml index 1be5a11fa..6641d15db 100644 --- a/spec/std/isa/inst/V/vfcvt.f.xu.v.yaml +++ b/spec/std/isa/inst/V/vfcvt.f.xu.v.yaml @@ -9,7 +9,9 @@ name: vfcvt.f.xu.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00010001-----1010111 diff --git a/spec/std/isa/inst/V/vfcvt.rtz.x.f.v.yaml b/spec/std/isa/inst/V/vfcvt.rtz.x.f.v.yaml index 48a48321a..b2406a081 100644 --- a/spec/std/isa/inst/V/vfcvt.rtz.x.f.v.yaml +++ b/spec/std/isa/inst/V/vfcvt.rtz.x.f.v.yaml @@ -9,7 +9,9 @@ name: vfcvt.rtz.x.f.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00111001-----1010111 diff --git a/spec/std/isa/inst/V/vfcvt.rtz.xu.f.v.yaml b/spec/std/isa/inst/V/vfcvt.rtz.xu.f.v.yaml index 19712c6a0..c1357af66 100644 --- a/spec/std/isa/inst/V/vfcvt.rtz.xu.f.v.yaml +++ b/spec/std/isa/inst/V/vfcvt.rtz.xu.f.v.yaml @@ -9,7 +9,9 @@ name: vfcvt.rtz.xu.f.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00110001-----1010111 diff --git a/spec/std/isa/inst/V/vfcvt.x.f.v.yaml b/spec/std/isa/inst/V/vfcvt.x.f.v.yaml index 2b5ef4743..0e3c2635c 100644 --- a/spec/std/isa/inst/V/vfcvt.x.f.v.yaml +++ b/spec/std/isa/inst/V/vfcvt.x.f.v.yaml @@ -9,7 +9,9 @@ name: vfcvt.x.f.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00001001-----1010111 diff --git a/spec/std/isa/inst/V/vfcvt.xu.f.v.yaml b/spec/std/isa/inst/V/vfcvt.xu.f.v.yaml index ea4f9c6ba..f3414bde2 100644 --- a/spec/std/isa/inst/V/vfcvt.xu.f.v.yaml +++ b/spec/std/isa/inst/V/vfcvt.xu.f.v.yaml @@ -9,7 +9,9 @@ name: vfcvt.xu.f.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00000001-----1010111 diff --git a/spec/std/isa/inst/V/vfdiv.vf.yaml b/spec/std/isa/inst/V/vfdiv.vf.yaml index d743c19ae..e3704be51 100644 --- a/spec/std/isa/inst/V/vfdiv.vf.yaml +++ b/spec/std/isa/inst/V/vfdiv.vf.yaml @@ -9,7 +9,9 @@ name: vfdiv.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 100000-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfdiv.vv.yaml b/spec/std/isa/inst/V/vfdiv.vv.yaml index b3ac09f70..5da10233c 100644 --- a/spec/std/isa/inst/V/vfdiv.vv.yaml +++ b/spec/std/isa/inst/V/vfdiv.vv.yaml @@ -9,7 +9,9 @@ name: vfdiv.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100000-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfirst.m.yaml b/spec/std/isa/inst/V/vfirst.m.yaml index f801d9dbd..c93eae0cd 100644 --- a/spec/std/isa/inst/V/vfirst.m.yaml +++ b/spec/std/isa/inst/V/vfirst.m.yaml @@ -9,7 +9,9 @@ name: vfirst.m long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: xd, vs2, vm encoding: match: 010000------10001010-----1010111 diff --git a/spec/std/isa/inst/V/vfmacc.vf.yaml b/spec/std/isa/inst/V/vfmacc.vf.yaml index 6ced45403..2f0ba8677 100644 --- a/spec/std/isa/inst/V/vfmacc.vf.yaml +++ b/spec/std/isa/inst/V/vfmacc.vf.yaml @@ -9,7 +9,9 @@ name: vfmacc.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 101100-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfmacc.vv.yaml b/spec/std/isa/inst/V/vfmacc.vv.yaml index e8b7e87ff..3e958e484 100644 --- a/spec/std/isa/inst/V/vfmacc.vv.yaml +++ b/spec/std/isa/inst/V/vfmacc.vv.yaml @@ -9,7 +9,9 @@ name: vfmacc.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101100-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfmadd.vf.yaml b/spec/std/isa/inst/V/vfmadd.vf.yaml index 1721b37da..dff262615 100644 --- a/spec/std/isa/inst/V/vfmadd.vf.yaml +++ b/spec/std/isa/inst/V/vfmadd.vf.yaml @@ -9,7 +9,9 @@ name: vfmadd.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 101000-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfmadd.vv.yaml b/spec/std/isa/inst/V/vfmadd.vv.yaml index 1b4402d47..298bbfe46 100644 --- a/spec/std/isa/inst/V/vfmadd.vv.yaml +++ b/spec/std/isa/inst/V/vfmadd.vv.yaml @@ -9,7 +9,9 @@ name: vfmadd.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101000-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfmax.vf.yaml b/spec/std/isa/inst/V/vfmax.vf.yaml index 7af9e8470..475925961 100644 --- a/spec/std/isa/inst/V/vfmax.vf.yaml +++ b/spec/std/isa/inst/V/vfmax.vf.yaml @@ -9,7 +9,9 @@ name: vfmax.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 000110-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfmax.vv.yaml b/spec/std/isa/inst/V/vfmax.vv.yaml index 9ff2fbf84..e2e34d8f2 100644 --- a/spec/std/isa/inst/V/vfmax.vv.yaml +++ b/spec/std/isa/inst/V/vfmax.vv.yaml @@ -9,7 +9,9 @@ name: vfmax.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000110-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfmerge.vfm.yaml b/spec/std/isa/inst/V/vfmerge.vfm.yaml index cef2d29e8..5ccec9a2e 100644 --- a/spec/std/isa/inst/V/vfmerge.vfm.yaml +++ b/spec/std/isa/inst/V/vfmerge.vfm.yaml @@ -9,7 +9,9 @@ name: vfmerge.vfm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, v0 encoding: match: 0101110----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfmin.vf.yaml b/spec/std/isa/inst/V/vfmin.vf.yaml index 7cb1edbc4..69e0801cc 100644 --- a/spec/std/isa/inst/V/vfmin.vf.yaml +++ b/spec/std/isa/inst/V/vfmin.vf.yaml @@ -9,7 +9,9 @@ name: vfmin.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 000100-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfmin.vv.yaml b/spec/std/isa/inst/V/vfmin.vv.yaml index 3c0963434..1b7927956 100644 --- a/spec/std/isa/inst/V/vfmin.vv.yaml +++ b/spec/std/isa/inst/V/vfmin.vv.yaml @@ -9,7 +9,9 @@ name: vfmin.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000100-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfmsac.vf.yaml b/spec/std/isa/inst/V/vfmsac.vf.yaml index 16e72ddbe..b1b43e995 100644 --- a/spec/std/isa/inst/V/vfmsac.vf.yaml +++ b/spec/std/isa/inst/V/vfmsac.vf.yaml @@ -9,7 +9,9 @@ name: vfmsac.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 101110-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfmsac.vv.yaml b/spec/std/isa/inst/V/vfmsac.vv.yaml index 3f5e29d00..95b4206e8 100644 --- a/spec/std/isa/inst/V/vfmsac.vv.yaml +++ b/spec/std/isa/inst/V/vfmsac.vv.yaml @@ -9,7 +9,9 @@ name: vfmsac.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101110-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfmsub.vf.yaml b/spec/std/isa/inst/V/vfmsub.vf.yaml index edcfb833b..b550cf8f1 100644 --- a/spec/std/isa/inst/V/vfmsub.vf.yaml +++ b/spec/std/isa/inst/V/vfmsub.vf.yaml @@ -9,7 +9,9 @@ name: vfmsub.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 101010-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfmsub.vv.yaml b/spec/std/isa/inst/V/vfmsub.vv.yaml index 0242eeb3b..cb7b68595 100644 --- a/spec/std/isa/inst/V/vfmsub.vv.yaml +++ b/spec/std/isa/inst/V/vfmsub.vv.yaml @@ -9,7 +9,9 @@ name: vfmsub.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101010-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfmul.vf.yaml b/spec/std/isa/inst/V/vfmul.vf.yaml index 4cdb05fd4..89ef10329 100644 --- a/spec/std/isa/inst/V/vfmul.vf.yaml +++ b/spec/std/isa/inst/V/vfmul.vf.yaml @@ -9,7 +9,9 @@ name: vfmul.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 100100-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfmul.vv.yaml b/spec/std/isa/inst/V/vfmul.vv.yaml index 62325a422..75c23f622 100644 --- a/spec/std/isa/inst/V/vfmul.vv.yaml +++ b/spec/std/isa/inst/V/vfmul.vv.yaml @@ -9,7 +9,9 @@ name: vfmul.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100100-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfmv.f.s.yaml b/spec/std/isa/inst/V/vfmv.f.s.yaml index 574f2ee92..a7210c9e0 100644 --- a/spec/std/isa/inst/V/vfmv.f.s.yaml +++ b/spec/std/isa/inst/V/vfmv.f.s.yaml @@ -9,7 +9,9 @@ name: vfmv.f.s long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: fd, vs2 encoding: match: 0100001-----00000001-----1010111 diff --git a/spec/std/isa/inst/V/vfmv.s.f.yaml b/spec/std/isa/inst/V/vfmv.s.f.yaml index ad204044b..e5db5eec5 100644 --- a/spec/std/isa/inst/V/vfmv.s.f.yaml +++ b/spec/std/isa/inst/V/vfmv.s.f.yaml @@ -9,7 +9,9 @@ name: vfmv.s.f long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1 encoding: match: 010000100000-----101-----1010111 diff --git a/spec/std/isa/inst/V/vfmv.v.f.yaml b/spec/std/isa/inst/V/vfmv.v.f.yaml index 810236a57..32c24992a 100644 --- a/spec/std/isa/inst/V/vfmv.v.f.yaml +++ b/spec/std/isa/inst/V/vfmv.v.f.yaml @@ -9,7 +9,9 @@ name: vfmv.v.f long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1 encoding: match: 010111100000-----101-----1010111 diff --git a/spec/std/isa/inst/V/vfncvt.f.f.w.yaml b/spec/std/isa/inst/V/vfncvt.f.f.w.yaml index 4247a2b97..85befc7da 100644 --- a/spec/std/isa/inst/V/vfncvt.f.f.w.yaml +++ b/spec/std/isa/inst/V/vfncvt.f.f.w.yaml @@ -9,7 +9,9 @@ name: vfncvt.f.f.w long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------10100001-----1010111 diff --git a/spec/std/isa/inst/V/vfncvt.f.x.w.yaml b/spec/std/isa/inst/V/vfncvt.f.x.w.yaml index aa7938e76..f54ebc2e1 100644 --- a/spec/std/isa/inst/V/vfncvt.f.x.w.yaml +++ b/spec/std/isa/inst/V/vfncvt.f.x.w.yaml @@ -9,7 +9,9 @@ name: vfncvt.f.x.w long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------10011001-----1010111 diff --git a/spec/std/isa/inst/V/vfncvt.f.xu.w.yaml b/spec/std/isa/inst/V/vfncvt.f.xu.w.yaml index ed43a39e5..31e3b36a4 100644 --- a/spec/std/isa/inst/V/vfncvt.f.xu.w.yaml +++ b/spec/std/isa/inst/V/vfncvt.f.xu.w.yaml @@ -9,7 +9,9 @@ name: vfncvt.f.xu.w long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------10010001-----1010111 diff --git a/spec/std/isa/inst/V/vfncvt.rod.f.f.w.yaml b/spec/std/isa/inst/V/vfncvt.rod.f.f.w.yaml index 50e0c2b82..237751eff 100644 --- a/spec/std/isa/inst/V/vfncvt.rod.f.f.w.yaml +++ b/spec/std/isa/inst/V/vfncvt.rod.f.f.w.yaml @@ -9,7 +9,9 @@ name: vfncvt.rod.f.f.w long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------10101001-----1010111 diff --git a/spec/std/isa/inst/V/vfncvt.rtz.x.f.w.yaml b/spec/std/isa/inst/V/vfncvt.rtz.x.f.w.yaml index 6e8316311..fb0ed7cde 100644 --- a/spec/std/isa/inst/V/vfncvt.rtz.x.f.w.yaml +++ b/spec/std/isa/inst/V/vfncvt.rtz.x.f.w.yaml @@ -9,7 +9,9 @@ name: vfncvt.rtz.x.f.w long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------10111001-----1010111 diff --git a/spec/std/isa/inst/V/vfncvt.rtz.xu.f.w.yaml b/spec/std/isa/inst/V/vfncvt.rtz.xu.f.w.yaml index ed5ffcbcd..1aa5a08ee 100644 --- a/spec/std/isa/inst/V/vfncvt.rtz.xu.f.w.yaml +++ b/spec/std/isa/inst/V/vfncvt.rtz.xu.f.w.yaml @@ -9,7 +9,9 @@ name: vfncvt.rtz.xu.f.w long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------10110001-----1010111 diff --git a/spec/std/isa/inst/V/vfncvt.x.f.w.yaml b/spec/std/isa/inst/V/vfncvt.x.f.w.yaml index e9d219c80..cd4941b16 100644 --- a/spec/std/isa/inst/V/vfncvt.x.f.w.yaml +++ b/spec/std/isa/inst/V/vfncvt.x.f.w.yaml @@ -9,7 +9,9 @@ name: vfncvt.x.f.w long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------10001001-----1010111 diff --git a/spec/std/isa/inst/V/vfncvt.xu.f.w.yaml b/spec/std/isa/inst/V/vfncvt.xu.f.w.yaml index 8143506cc..447e81084 100644 --- a/spec/std/isa/inst/V/vfncvt.xu.f.w.yaml +++ b/spec/std/isa/inst/V/vfncvt.xu.f.w.yaml @@ -9,7 +9,9 @@ name: vfncvt.xu.f.w long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------10000001-----1010111 diff --git a/spec/std/isa/inst/V/vfnmacc.vf.yaml b/spec/std/isa/inst/V/vfnmacc.vf.yaml index 25add8608..9d280cf49 100644 --- a/spec/std/isa/inst/V/vfnmacc.vf.yaml +++ b/spec/std/isa/inst/V/vfnmacc.vf.yaml @@ -9,7 +9,9 @@ name: vfnmacc.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 101101-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfnmacc.vv.yaml b/spec/std/isa/inst/V/vfnmacc.vv.yaml index d94a722df..103f932ed 100644 --- a/spec/std/isa/inst/V/vfnmacc.vv.yaml +++ b/spec/std/isa/inst/V/vfnmacc.vv.yaml @@ -9,7 +9,9 @@ name: vfnmacc.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101101-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfnmadd.vf.yaml b/spec/std/isa/inst/V/vfnmadd.vf.yaml index 5cf88c321..710840f64 100644 --- a/spec/std/isa/inst/V/vfnmadd.vf.yaml +++ b/spec/std/isa/inst/V/vfnmadd.vf.yaml @@ -9,7 +9,9 @@ name: vfnmadd.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 101001-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfnmadd.vv.yaml b/spec/std/isa/inst/V/vfnmadd.vv.yaml index 3f13fd1df..37ff3fc23 100644 --- a/spec/std/isa/inst/V/vfnmadd.vv.yaml +++ b/spec/std/isa/inst/V/vfnmadd.vv.yaml @@ -9,7 +9,9 @@ name: vfnmadd.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101001-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfnmsac.vf.yaml b/spec/std/isa/inst/V/vfnmsac.vf.yaml index ec7f89908..c00b1e4f8 100644 --- a/spec/std/isa/inst/V/vfnmsac.vf.yaml +++ b/spec/std/isa/inst/V/vfnmsac.vf.yaml @@ -9,7 +9,9 @@ name: vfnmsac.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 101111-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfnmsac.vv.yaml b/spec/std/isa/inst/V/vfnmsac.vv.yaml index 92beb9ceb..4a2dfbb2d 100644 --- a/spec/std/isa/inst/V/vfnmsac.vv.yaml +++ b/spec/std/isa/inst/V/vfnmsac.vv.yaml @@ -9,7 +9,9 @@ name: vfnmsac.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101111-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfnmsub.vf.yaml b/spec/std/isa/inst/V/vfnmsub.vf.yaml index 213b92b1d..8fbdc0c79 100644 --- a/spec/std/isa/inst/V/vfnmsub.vf.yaml +++ b/spec/std/isa/inst/V/vfnmsub.vf.yaml @@ -9,7 +9,9 @@ name: vfnmsub.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 101011-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfnmsub.vv.yaml b/spec/std/isa/inst/V/vfnmsub.vv.yaml index 397144f47..e62e646df 100644 --- a/spec/std/isa/inst/V/vfnmsub.vv.yaml +++ b/spec/std/isa/inst/V/vfnmsub.vv.yaml @@ -9,7 +9,9 @@ name: vfnmsub.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101011-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfrdiv.vf.yaml b/spec/std/isa/inst/V/vfrdiv.vf.yaml index 793ec47f2..f2b25fb19 100644 --- a/spec/std/isa/inst/V/vfrdiv.vf.yaml +++ b/spec/std/isa/inst/V/vfrdiv.vf.yaml @@ -9,7 +9,9 @@ name: vfrdiv.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 100001-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfrec7.v.yaml b/spec/std/isa/inst/V/vfrec7.v.yaml index bf3defe7e..1c3024626 100644 --- a/spec/std/isa/inst/V/vfrec7.v.yaml +++ b/spec/std/isa/inst/V/vfrec7.v.yaml @@ -9,7 +9,9 @@ name: vfrec7.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010011------00101001-----1010111 diff --git a/spec/std/isa/inst/V/vfredmax.vs.yaml b/spec/std/isa/inst/V/vfredmax.vs.yaml index 2e497a75b..4068453dd 100644 --- a/spec/std/isa/inst/V/vfredmax.vs.yaml +++ b/spec/std/isa/inst/V/vfredmax.vs.yaml @@ -9,7 +9,9 @@ name: vfredmax.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000111-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfredmin.vs.yaml b/spec/std/isa/inst/V/vfredmin.vs.yaml index 07ef80a74..9c0669ed5 100644 --- a/spec/std/isa/inst/V/vfredmin.vs.yaml +++ b/spec/std/isa/inst/V/vfredmin.vs.yaml @@ -9,7 +9,9 @@ name: vfredmin.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000101-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfredosum.vs.yaml b/spec/std/isa/inst/V/vfredosum.vs.yaml index 3cb495c0c..880978777 100644 --- a/spec/std/isa/inst/V/vfredosum.vs.yaml +++ b/spec/std/isa/inst/V/vfredosum.vs.yaml @@ -9,7 +9,9 @@ name: vfredosum.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000011-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfredusum.vs.yaml b/spec/std/isa/inst/V/vfredusum.vs.yaml index ba2c84f00..b4c0ae032 100644 --- a/spec/std/isa/inst/V/vfredusum.vs.yaml +++ b/spec/std/isa/inst/V/vfredusum.vs.yaml @@ -9,7 +9,9 @@ name: vfredusum.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000001-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfrsqrt7.v.yaml b/spec/std/isa/inst/V/vfrsqrt7.v.yaml index 939930585..aa191fcaf 100644 --- a/spec/std/isa/inst/V/vfrsqrt7.v.yaml +++ b/spec/std/isa/inst/V/vfrsqrt7.v.yaml @@ -9,7 +9,9 @@ name: vfrsqrt7.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010011------00100001-----1010111 diff --git a/spec/std/isa/inst/V/vfrsub.vf.yaml b/spec/std/isa/inst/V/vfrsub.vf.yaml index 262f02f01..509252e46 100644 --- a/spec/std/isa/inst/V/vfrsub.vf.yaml +++ b/spec/std/isa/inst/V/vfrsub.vf.yaml @@ -9,7 +9,9 @@ name: vfrsub.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 100111-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfsgnj.vf.yaml b/spec/std/isa/inst/V/vfsgnj.vf.yaml index 8747bcf13..33bf00cc6 100644 --- a/spec/std/isa/inst/V/vfsgnj.vf.yaml +++ b/spec/std/isa/inst/V/vfsgnj.vf.yaml @@ -9,7 +9,9 @@ name: vfsgnj.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 001000-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfsgnj.vv.yaml b/spec/std/isa/inst/V/vfsgnj.vv.yaml index e48aea4fe..426f92bdf 100644 --- a/spec/std/isa/inst/V/vfsgnj.vv.yaml +++ b/spec/std/isa/inst/V/vfsgnj.vv.yaml @@ -9,7 +9,9 @@ name: vfsgnj.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001000-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfsgnjn.vf.yaml b/spec/std/isa/inst/V/vfsgnjn.vf.yaml index d34a69cba..d3f767613 100644 --- a/spec/std/isa/inst/V/vfsgnjn.vf.yaml +++ b/spec/std/isa/inst/V/vfsgnjn.vf.yaml @@ -9,7 +9,9 @@ name: vfsgnjn.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 001001-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfsgnjn.vv.yaml b/spec/std/isa/inst/V/vfsgnjn.vv.yaml index ecf47244d..179028b8c 100644 --- a/spec/std/isa/inst/V/vfsgnjn.vv.yaml +++ b/spec/std/isa/inst/V/vfsgnjn.vv.yaml @@ -9,7 +9,9 @@ name: vfsgnjn.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001001-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfsgnjx.vf.yaml b/spec/std/isa/inst/V/vfsgnjx.vf.yaml index e4f7b8481..46d4e7523 100644 --- a/spec/std/isa/inst/V/vfsgnjx.vf.yaml +++ b/spec/std/isa/inst/V/vfsgnjx.vf.yaml @@ -9,7 +9,9 @@ name: vfsgnjx.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 001010-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfsgnjx.vv.yaml b/spec/std/isa/inst/V/vfsgnjx.vv.yaml index 8c4f54b9e..2b7221c1a 100644 --- a/spec/std/isa/inst/V/vfsgnjx.vv.yaml +++ b/spec/std/isa/inst/V/vfsgnjx.vv.yaml @@ -9,7 +9,9 @@ name: vfsgnjx.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001010-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfslide1down.vf.yaml b/spec/std/isa/inst/V/vfslide1down.vf.yaml index ba29a0c86..df621ea0a 100644 --- a/spec/std/isa/inst/V/vfslide1down.vf.yaml +++ b/spec/std/isa/inst/V/vfslide1down.vf.yaml @@ -9,7 +9,9 @@ name: vfslide1down.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 001111-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfslide1up.vf.yaml b/spec/std/isa/inst/V/vfslide1up.vf.yaml index 99a2681ad..30f50fa3f 100644 --- a/spec/std/isa/inst/V/vfslide1up.vf.yaml +++ b/spec/std/isa/inst/V/vfslide1up.vf.yaml @@ -9,7 +9,9 @@ name: vfslide1up.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 001110-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfsqrt.v.yaml b/spec/std/isa/inst/V/vfsqrt.v.yaml index 2428f9c34..b59940c48 100644 --- a/spec/std/isa/inst/V/vfsqrt.v.yaml +++ b/spec/std/isa/inst/V/vfsqrt.v.yaml @@ -9,7 +9,9 @@ name: vfsqrt.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010011------00000001-----1010111 diff --git a/spec/std/isa/inst/V/vfsub.vf.yaml b/spec/std/isa/inst/V/vfsub.vf.yaml index d6aa859f4..63d3bb902 100644 --- a/spec/std/isa/inst/V/vfsub.vf.yaml +++ b/spec/std/isa/inst/V/vfsub.vf.yaml @@ -9,7 +9,9 @@ name: vfsub.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 000010-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfsub.vv.yaml b/spec/std/isa/inst/V/vfsub.vv.yaml index 2c0fb4335..bf99fdf71 100644 --- a/spec/std/isa/inst/V/vfsub.vv.yaml +++ b/spec/std/isa/inst/V/vfsub.vv.yaml @@ -9,7 +9,9 @@ name: vfsub.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000010-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwadd.vf.yaml b/spec/std/isa/inst/V/vfwadd.vf.yaml index 10aaee9ae..89ec5b87a 100644 --- a/spec/std/isa/inst/V/vfwadd.vf.yaml +++ b/spec/std/isa/inst/V/vfwadd.vf.yaml @@ -9,7 +9,9 @@ name: vfwadd.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 110000-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfwadd.vv.yaml b/spec/std/isa/inst/V/vfwadd.vv.yaml index a380aaa26..541ace2b3 100644 --- a/spec/std/isa/inst/V/vfwadd.vv.yaml +++ b/spec/std/isa/inst/V/vfwadd.vv.yaml @@ -9,7 +9,9 @@ name: vfwadd.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110000-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwadd.wf.yaml b/spec/std/isa/inst/V/vfwadd.wf.yaml index 762ec145a..6e48e1162 100644 --- a/spec/std/isa/inst/V/vfwadd.wf.yaml +++ b/spec/std/isa/inst/V/vfwadd.wf.yaml @@ -9,7 +9,9 @@ name: vfwadd.wf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 110100-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfwadd.wv.yaml b/spec/std/isa/inst/V/vfwadd.wv.yaml index a53944352..5d37ce7d7 100644 --- a/spec/std/isa/inst/V/vfwadd.wv.yaml +++ b/spec/std/isa/inst/V/vfwadd.wv.yaml @@ -9,7 +9,9 @@ name: vfwadd.wv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110100-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwcvt.f.f.v.yaml b/spec/std/isa/inst/V/vfwcvt.f.f.v.yaml index 301ec4f4c..8934a4509 100644 --- a/spec/std/isa/inst/V/vfwcvt.f.f.v.yaml +++ b/spec/std/isa/inst/V/vfwcvt.f.f.v.yaml @@ -9,7 +9,9 @@ name: vfwcvt.f.f.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------01100001-----1010111 diff --git a/spec/std/isa/inst/V/vfwcvt.f.x.v.yaml b/spec/std/isa/inst/V/vfwcvt.f.x.v.yaml index 2f6fafc54..043528362 100644 --- a/spec/std/isa/inst/V/vfwcvt.f.x.v.yaml +++ b/spec/std/isa/inst/V/vfwcvt.f.x.v.yaml @@ -9,7 +9,9 @@ name: vfwcvt.f.x.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------01011001-----1010111 diff --git a/spec/std/isa/inst/V/vfwcvt.f.xu.v.yaml b/spec/std/isa/inst/V/vfwcvt.f.xu.v.yaml index b17acdb1e..8972e6888 100644 --- a/spec/std/isa/inst/V/vfwcvt.f.xu.v.yaml +++ b/spec/std/isa/inst/V/vfwcvt.f.xu.v.yaml @@ -9,7 +9,9 @@ name: vfwcvt.f.xu.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------01010001-----1010111 diff --git a/spec/std/isa/inst/V/vfwcvt.rtz.x.f.v.yaml b/spec/std/isa/inst/V/vfwcvt.rtz.x.f.v.yaml index da3a35c0d..169886975 100644 --- a/spec/std/isa/inst/V/vfwcvt.rtz.x.f.v.yaml +++ b/spec/std/isa/inst/V/vfwcvt.rtz.x.f.v.yaml @@ -9,7 +9,9 @@ name: vfwcvt.rtz.x.f.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------01111001-----1010111 diff --git a/spec/std/isa/inst/V/vfwcvt.rtz.xu.f.v.yaml b/spec/std/isa/inst/V/vfwcvt.rtz.xu.f.v.yaml index 22058a42d..d58c0a6c2 100644 --- a/spec/std/isa/inst/V/vfwcvt.rtz.xu.f.v.yaml +++ b/spec/std/isa/inst/V/vfwcvt.rtz.xu.f.v.yaml @@ -9,7 +9,9 @@ name: vfwcvt.rtz.xu.f.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------01110001-----1010111 diff --git a/spec/std/isa/inst/V/vfwcvt.x.f.v.yaml b/spec/std/isa/inst/V/vfwcvt.x.f.v.yaml index 87531f2ca..a25ca7d97 100644 --- a/spec/std/isa/inst/V/vfwcvt.x.f.v.yaml +++ b/spec/std/isa/inst/V/vfwcvt.x.f.v.yaml @@ -9,7 +9,9 @@ name: vfwcvt.x.f.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------01001001-----1010111 diff --git a/spec/std/isa/inst/V/vfwcvt.xu.f.v.yaml b/spec/std/isa/inst/V/vfwcvt.xu.f.v.yaml index 74f0d020c..edb8a94fe 100644 --- a/spec/std/isa/inst/V/vfwcvt.xu.f.v.yaml +++ b/spec/std/isa/inst/V/vfwcvt.xu.f.v.yaml @@ -9,7 +9,9 @@ name: vfwcvt.xu.f.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------01000001-----1010111 diff --git a/spec/std/isa/inst/V/vfwmacc.vf.yaml b/spec/std/isa/inst/V/vfwmacc.vf.yaml index 4d325217c..d30c8551d 100644 --- a/spec/std/isa/inst/V/vfwmacc.vf.yaml +++ b/spec/std/isa/inst/V/vfwmacc.vf.yaml @@ -9,7 +9,9 @@ name: vfwmacc.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 111100-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfwmacc.vv.yaml b/spec/std/isa/inst/V/vfwmacc.vv.yaml index bc3c053d7..092beadc1 100644 --- a/spec/std/isa/inst/V/vfwmacc.vv.yaml +++ b/spec/std/isa/inst/V/vfwmacc.vv.yaml @@ -9,7 +9,9 @@ name: vfwmacc.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 111100-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwmsac.vf.yaml b/spec/std/isa/inst/V/vfwmsac.vf.yaml index 40410274f..4f0a47eb1 100644 --- a/spec/std/isa/inst/V/vfwmsac.vf.yaml +++ b/spec/std/isa/inst/V/vfwmsac.vf.yaml @@ -9,7 +9,9 @@ name: vfwmsac.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 111110-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfwmsac.vv.yaml b/spec/std/isa/inst/V/vfwmsac.vv.yaml index cfc778e6a..c2eb04d53 100644 --- a/spec/std/isa/inst/V/vfwmsac.vv.yaml +++ b/spec/std/isa/inst/V/vfwmsac.vv.yaml @@ -9,7 +9,9 @@ name: vfwmsac.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 111110-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwmul.vf.yaml b/spec/std/isa/inst/V/vfwmul.vf.yaml index bd41c8a64..c562458c3 100644 --- a/spec/std/isa/inst/V/vfwmul.vf.yaml +++ b/spec/std/isa/inst/V/vfwmul.vf.yaml @@ -9,7 +9,9 @@ name: vfwmul.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 111000-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfwmul.vv.yaml b/spec/std/isa/inst/V/vfwmul.vv.yaml index 7a98a9d34..6f96075a5 100644 --- a/spec/std/isa/inst/V/vfwmul.vv.yaml +++ b/spec/std/isa/inst/V/vfwmul.vv.yaml @@ -9,7 +9,9 @@ name: vfwmul.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 111000-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwnmacc.vf.yaml b/spec/std/isa/inst/V/vfwnmacc.vf.yaml index d39bec31c..dd3e02887 100644 --- a/spec/std/isa/inst/V/vfwnmacc.vf.yaml +++ b/spec/std/isa/inst/V/vfwnmacc.vf.yaml @@ -9,7 +9,9 @@ name: vfwnmacc.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 111101-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfwnmacc.vv.yaml b/spec/std/isa/inst/V/vfwnmacc.vv.yaml index d85a95eda..e2113f82f 100644 --- a/spec/std/isa/inst/V/vfwnmacc.vv.yaml +++ b/spec/std/isa/inst/V/vfwnmacc.vv.yaml @@ -9,7 +9,9 @@ name: vfwnmacc.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 111101-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwnmsac.vf.yaml b/spec/std/isa/inst/V/vfwnmsac.vf.yaml index c9195d8fa..707e5b499 100644 --- a/spec/std/isa/inst/V/vfwnmsac.vf.yaml +++ b/spec/std/isa/inst/V/vfwnmsac.vf.yaml @@ -9,7 +9,9 @@ name: vfwnmsac.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, fs1, vs2, vm encoding: match: 111111-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfwnmsac.vv.yaml b/spec/std/isa/inst/V/vfwnmsac.vv.yaml index df7b09584..713bca589 100644 --- a/spec/std/isa/inst/V/vfwnmsac.vv.yaml +++ b/spec/std/isa/inst/V/vfwnmsac.vv.yaml @@ -9,7 +9,9 @@ name: vfwnmsac.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 111111-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwredosum.vs.yaml b/spec/std/isa/inst/V/vfwredosum.vs.yaml index 857b64743..0a7423d92 100644 --- a/spec/std/isa/inst/V/vfwredosum.vs.yaml +++ b/spec/std/isa/inst/V/vfwredosum.vs.yaml @@ -9,7 +9,9 @@ name: vfwredosum.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110011-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwredusum.vs.yaml b/spec/std/isa/inst/V/vfwredusum.vs.yaml index ea2c365cd..db22c74c3 100644 --- a/spec/std/isa/inst/V/vfwredusum.vs.yaml +++ b/spec/std/isa/inst/V/vfwredusum.vs.yaml @@ -9,7 +9,9 @@ name: vfwredusum.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110001-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwsub.vf.yaml b/spec/std/isa/inst/V/vfwsub.vf.yaml index 20f16937d..e394f140a 100644 --- a/spec/std/isa/inst/V/vfwsub.vf.yaml +++ b/spec/std/isa/inst/V/vfwsub.vf.yaml @@ -9,7 +9,9 @@ name: vfwsub.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 110010-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfwsub.vv.yaml b/spec/std/isa/inst/V/vfwsub.vv.yaml index c0afbabf4..d3e353632 100644 --- a/spec/std/isa/inst/V/vfwsub.vv.yaml +++ b/spec/std/isa/inst/V/vfwsub.vv.yaml @@ -9,7 +9,9 @@ name: vfwsub.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110010-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vfwsub.wf.yaml b/spec/std/isa/inst/V/vfwsub.wf.yaml index cb10a1eb1..82f686b87 100644 --- a/spec/std/isa/inst/V/vfwsub.wf.yaml +++ b/spec/std/isa/inst/V/vfwsub.wf.yaml @@ -9,7 +9,9 @@ name: vfwsub.wf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 110110-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vfwsub.wv.yaml b/spec/std/isa/inst/V/vfwsub.wv.yaml index b91786c94..bbb638054 100644 --- a/spec/std/isa/inst/V/vfwsub.wv.yaml +++ b/spec/std/isa/inst/V/vfwsub.wv.yaml @@ -9,7 +9,9 @@ name: vfwsub.wv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110110-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vid.v.yaml b/spec/std/isa/inst/V/vid.v.yaml index 8abdd1b3a..42f606f62 100644 --- a/spec/std/isa/inst/V/vid.v.yaml +++ b/spec/std/isa/inst/V/vid.v.yaml @@ -9,7 +9,9 @@ name: vid.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vm encoding: match: 010100-0000010001010-----1010111 diff --git a/spec/std/isa/inst/V/viota.m.yaml b/spec/std/isa/inst/V/viota.m.yaml index 3969426a3..69695e0b4 100644 --- a/spec/std/isa/inst/V/viota.m.yaml +++ b/spec/std/isa/inst/V/viota.m.yaml @@ -9,7 +9,9 @@ name: viota.m long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010100------10000010-----1010111 diff --git a/spec/std/isa/inst/V/vl1re16.v.yaml b/spec/std/isa/inst/V/vl1re16.v.yaml index 81140639c..96d00cc21 100644 --- a/spec/std/isa/inst/V/vl1re16.v.yaml +++ b/spec/std/isa/inst/V/vl1re16.v.yaml @@ -9,7 +9,9 @@ name: vl1re16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 000000101000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vl1re32.v.yaml b/spec/std/isa/inst/V/vl1re32.v.yaml index bef1377e5..fc7b160ee 100644 --- a/spec/std/isa/inst/V/vl1re32.v.yaml +++ b/spec/std/isa/inst/V/vl1re32.v.yaml @@ -9,7 +9,9 @@ name: vl1re32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 000000101000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vl1re64.v.yaml b/spec/std/isa/inst/V/vl1re64.v.yaml index fb666fe53..21761558f 100644 --- a/spec/std/isa/inst/V/vl1re64.v.yaml +++ b/spec/std/isa/inst/V/vl1re64.v.yaml @@ -9,7 +9,9 @@ name: vl1re64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 000000101000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vl1re8.v.yaml b/spec/std/isa/inst/V/vl1re8.v.yaml index 6d89bf8a0..a2286db70 100644 --- a/spec/std/isa/inst/V/vl1re8.v.yaml +++ b/spec/std/isa/inst/V/vl1re8.v.yaml @@ -9,7 +9,9 @@ name: vl1re8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 000000101000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vl2re16.v.yaml b/spec/std/isa/inst/V/vl2re16.v.yaml index fd1f04a2d..0e719f3f5 100644 --- a/spec/std/isa/inst/V/vl2re16.v.yaml +++ b/spec/std/isa/inst/V/vl2re16.v.yaml @@ -9,7 +9,9 @@ name: vl2re16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 001000101000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vl2re32.v.yaml b/spec/std/isa/inst/V/vl2re32.v.yaml index 83aa9b31d..c20729dd8 100644 --- a/spec/std/isa/inst/V/vl2re32.v.yaml +++ b/spec/std/isa/inst/V/vl2re32.v.yaml @@ -9,7 +9,9 @@ name: vl2re32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 001000101000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vl2re64.v.yaml b/spec/std/isa/inst/V/vl2re64.v.yaml index 93fb7a9b1..6b7857336 100644 --- a/spec/std/isa/inst/V/vl2re64.v.yaml +++ b/spec/std/isa/inst/V/vl2re64.v.yaml @@ -9,7 +9,9 @@ name: vl2re64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 001000101000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vl2re8.v.yaml b/spec/std/isa/inst/V/vl2re8.v.yaml index 74b0f5b06..0131d3a37 100644 --- a/spec/std/isa/inst/V/vl2re8.v.yaml +++ b/spec/std/isa/inst/V/vl2re8.v.yaml @@ -9,7 +9,9 @@ name: vl2re8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 001000101000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vl4re16.v.yaml b/spec/std/isa/inst/V/vl4re16.v.yaml index 92923745f..89dec8cf6 100644 --- a/spec/std/isa/inst/V/vl4re16.v.yaml +++ b/spec/std/isa/inst/V/vl4re16.v.yaml @@ -9,7 +9,9 @@ name: vl4re16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 011000101000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vl4re32.v.yaml b/spec/std/isa/inst/V/vl4re32.v.yaml index a1e692ed8..d9492ec88 100644 --- a/spec/std/isa/inst/V/vl4re32.v.yaml +++ b/spec/std/isa/inst/V/vl4re32.v.yaml @@ -9,7 +9,9 @@ name: vl4re32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 011000101000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vl4re64.v.yaml b/spec/std/isa/inst/V/vl4re64.v.yaml index 784659ec1..e3bc0b801 100644 --- a/spec/std/isa/inst/V/vl4re64.v.yaml +++ b/spec/std/isa/inst/V/vl4re64.v.yaml @@ -9,7 +9,9 @@ name: vl4re64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 011000101000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vl4re8.v.yaml b/spec/std/isa/inst/V/vl4re8.v.yaml index 4f72cfaff..cf1646114 100644 --- a/spec/std/isa/inst/V/vl4re8.v.yaml +++ b/spec/std/isa/inst/V/vl4re8.v.yaml @@ -9,7 +9,9 @@ name: vl4re8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 011000101000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vl8re16.v.yaml b/spec/std/isa/inst/V/vl8re16.v.yaml index 18e152101..fe7e89c2f 100644 --- a/spec/std/isa/inst/V/vl8re16.v.yaml +++ b/spec/std/isa/inst/V/vl8re16.v.yaml @@ -9,7 +9,9 @@ name: vl8re16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 111000101000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vl8re32.v.yaml b/spec/std/isa/inst/V/vl8re32.v.yaml index d6bf8d9aa..414a4125f 100644 --- a/spec/std/isa/inst/V/vl8re32.v.yaml +++ b/spec/std/isa/inst/V/vl8re32.v.yaml @@ -9,7 +9,9 @@ name: vl8re32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 111000101000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vl8re64.v.yaml b/spec/std/isa/inst/V/vl8re64.v.yaml index 337412721..bd469a868 100644 --- a/spec/std/isa/inst/V/vl8re64.v.yaml +++ b/spec/std/isa/inst/V/vl8re64.v.yaml @@ -9,7 +9,9 @@ name: vl8re64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 111000101000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vl8re8.v.yaml b/spec/std/isa/inst/V/vl8re8.v.yaml index 5a4c9b4be..ba6e87d24 100644 --- a/spec/std/isa/inst/V/vl8re8.v.yaml +++ b/spec/std/isa/inst/V/vl8re8.v.yaml @@ -9,7 +9,9 @@ name: vl8re8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 111000101000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vle16.v.yaml b/spec/std/isa/inst/V/vle16.v.yaml index 73b3c638a..029611d50 100644 --- a/spec/std/isa/inst/V/vle16.v.yaml +++ b/spec/std/isa/inst/V/vle16.v.yaml @@ -9,7 +9,9 @@ name: vle16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 000000-00000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vle16ff.v.yaml b/spec/std/isa/inst/V/vle16ff.v.yaml index fb07614ec..8b5c20b2c 100644 --- a/spec/std/isa/inst/V/vle16ff.v.yaml +++ b/spec/std/isa/inst/V/vle16ff.v.yaml @@ -9,7 +9,9 @@ name: vle16ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 000000-10000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vle32.v.yaml b/spec/std/isa/inst/V/vle32.v.yaml index 9ad7dff87..42e613452 100644 --- a/spec/std/isa/inst/V/vle32.v.yaml +++ b/spec/std/isa/inst/V/vle32.v.yaml @@ -9,7 +9,9 @@ name: vle32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 000000-00000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vle32ff.v.yaml b/spec/std/isa/inst/V/vle32ff.v.yaml index e58d7fc5c..5a64b83da 100644 --- a/spec/std/isa/inst/V/vle32ff.v.yaml +++ b/spec/std/isa/inst/V/vle32ff.v.yaml @@ -9,7 +9,9 @@ name: vle32ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 000000-10000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vle64.v.yaml b/spec/std/isa/inst/V/vle64.v.yaml index 4a8aa2c69..7349a3c49 100644 --- a/spec/std/isa/inst/V/vle64.v.yaml +++ b/spec/std/isa/inst/V/vle64.v.yaml @@ -9,7 +9,9 @@ name: vle64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 000000-00000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vle64ff.v.yaml b/spec/std/isa/inst/V/vle64ff.v.yaml index 8d849aafd..37ba1b21a 100644 --- a/spec/std/isa/inst/V/vle64ff.v.yaml +++ b/spec/std/isa/inst/V/vle64ff.v.yaml @@ -9,7 +9,9 @@ name: vle64ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 000000-10000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vle8.v.yaml b/spec/std/isa/inst/V/vle8.v.yaml index 4141b16bd..c89381665 100644 --- a/spec/std/isa/inst/V/vle8.v.yaml +++ b/spec/std/isa/inst/V/vle8.v.yaml @@ -9,7 +9,9 @@ name: vle8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 000000-00000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vle8ff.v.yaml b/spec/std/isa/inst/V/vle8ff.v.yaml index f823df509..a4bf19a70 100644 --- a/spec/std/isa/inst/V/vle8ff.v.yaml +++ b/spec/std/isa/inst/V/vle8ff.v.yaml @@ -9,7 +9,9 @@ name: vle8ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 000000-10000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlm.v.yaml b/spec/std/isa/inst/V/vlm.v.yaml index 3a60ca5cf..a99e396c7 100644 --- a/spec/std/isa/inst/V/vlm.v.yaml +++ b/spec/std/isa/inst/V/vlm.v.yaml @@ -9,7 +9,9 @@ name: vlm.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1) encoding: match: 000000101011-----000-----0000111 diff --git a/spec/std/isa/inst/V/vloxei16.v.yaml b/spec/std/isa/inst/V/vloxei16.v.yaml index 264191d98..0a3593ccc 100644 --- a/spec/std/isa/inst/V/vloxei16.v.yaml +++ b/spec/std/isa/inst/V/vloxei16.v.yaml @@ -9,7 +9,9 @@ name: vloxei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 000011-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vloxei32.v.yaml b/spec/std/isa/inst/V/vloxei32.v.yaml index 57b4e076d..c01b4e521 100644 --- a/spec/std/isa/inst/V/vloxei32.v.yaml +++ b/spec/std/isa/inst/V/vloxei32.v.yaml @@ -9,7 +9,9 @@ name: vloxei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 000011-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vloxei64.v.yaml b/spec/std/isa/inst/V/vloxei64.v.yaml index 33bae70cd..d13d987cc 100644 --- a/spec/std/isa/inst/V/vloxei64.v.yaml +++ b/spec/std/isa/inst/V/vloxei64.v.yaml @@ -9,7 +9,9 @@ name: vloxei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 000011-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vloxei8.v.yaml b/spec/std/isa/inst/V/vloxei8.v.yaml index 4ce618ea2..3f0f1a8f2 100644 --- a/spec/std/isa/inst/V/vloxei8.v.yaml +++ b/spec/std/isa/inst/V/vloxei8.v.yaml @@ -9,7 +9,9 @@ name: vloxei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 000011-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg2ei16.v.yaml b/spec/std/isa/inst/V/vloxseg2ei16.v.yaml index c625ccc39..2b476300f 100644 --- a/spec/std/isa/inst/V/vloxseg2ei16.v.yaml +++ b/spec/std/isa/inst/V/vloxseg2ei16.v.yaml @@ -9,7 +9,9 @@ name: vloxseg2ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 001011-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg2ei32.v.yaml b/spec/std/isa/inst/V/vloxseg2ei32.v.yaml index 50eb1a65f..6c71fd72b 100644 --- a/spec/std/isa/inst/V/vloxseg2ei32.v.yaml +++ b/spec/std/isa/inst/V/vloxseg2ei32.v.yaml @@ -9,7 +9,9 @@ name: vloxseg2ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 001011-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg2ei64.v.yaml b/spec/std/isa/inst/V/vloxseg2ei64.v.yaml index ce0c8dfc2..d9d229d60 100644 --- a/spec/std/isa/inst/V/vloxseg2ei64.v.yaml +++ b/spec/std/isa/inst/V/vloxseg2ei64.v.yaml @@ -9,7 +9,9 @@ name: vloxseg2ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 001011-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg2ei8.v.yaml b/spec/std/isa/inst/V/vloxseg2ei8.v.yaml index c08a22165..785ddffed 100644 --- a/spec/std/isa/inst/V/vloxseg2ei8.v.yaml +++ b/spec/std/isa/inst/V/vloxseg2ei8.v.yaml @@ -9,7 +9,9 @@ name: vloxseg2ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 001011-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg3ei16.v.yaml b/spec/std/isa/inst/V/vloxseg3ei16.v.yaml index 1aa8f1254..ec919edb6 100644 --- a/spec/std/isa/inst/V/vloxseg3ei16.v.yaml +++ b/spec/std/isa/inst/V/vloxseg3ei16.v.yaml @@ -9,7 +9,9 @@ name: vloxseg3ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 010011-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg3ei32.v.yaml b/spec/std/isa/inst/V/vloxseg3ei32.v.yaml index c9eda816f..038291a87 100644 --- a/spec/std/isa/inst/V/vloxseg3ei32.v.yaml +++ b/spec/std/isa/inst/V/vloxseg3ei32.v.yaml @@ -9,7 +9,9 @@ name: vloxseg3ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 010011-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg3ei64.v.yaml b/spec/std/isa/inst/V/vloxseg3ei64.v.yaml index 3594621e7..d3074d8b5 100644 --- a/spec/std/isa/inst/V/vloxseg3ei64.v.yaml +++ b/spec/std/isa/inst/V/vloxseg3ei64.v.yaml @@ -9,7 +9,9 @@ name: vloxseg3ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 010011-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg3ei8.v.yaml b/spec/std/isa/inst/V/vloxseg3ei8.v.yaml index c0dd57639..5d0e262fc 100644 --- a/spec/std/isa/inst/V/vloxseg3ei8.v.yaml +++ b/spec/std/isa/inst/V/vloxseg3ei8.v.yaml @@ -9,7 +9,9 @@ name: vloxseg3ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 010011-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg4ei16.v.yaml b/spec/std/isa/inst/V/vloxseg4ei16.v.yaml index a6ba352e9..e8377ae56 100644 --- a/spec/std/isa/inst/V/vloxseg4ei16.v.yaml +++ b/spec/std/isa/inst/V/vloxseg4ei16.v.yaml @@ -9,7 +9,9 @@ name: vloxseg4ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 011011-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg4ei32.v.yaml b/spec/std/isa/inst/V/vloxseg4ei32.v.yaml index cb56e44e7..d2b782c1d 100644 --- a/spec/std/isa/inst/V/vloxseg4ei32.v.yaml +++ b/spec/std/isa/inst/V/vloxseg4ei32.v.yaml @@ -9,7 +9,9 @@ name: vloxseg4ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 011011-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg4ei64.v.yaml b/spec/std/isa/inst/V/vloxseg4ei64.v.yaml index cedbcdf2f..99d0571e8 100644 --- a/spec/std/isa/inst/V/vloxseg4ei64.v.yaml +++ b/spec/std/isa/inst/V/vloxseg4ei64.v.yaml @@ -9,7 +9,9 @@ name: vloxseg4ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 011011-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg4ei8.v.yaml b/spec/std/isa/inst/V/vloxseg4ei8.v.yaml index 59fe340cf..c4f6f6b97 100644 --- a/spec/std/isa/inst/V/vloxseg4ei8.v.yaml +++ b/spec/std/isa/inst/V/vloxseg4ei8.v.yaml @@ -9,7 +9,9 @@ name: vloxseg4ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 011011-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg5ei16.v.yaml b/spec/std/isa/inst/V/vloxseg5ei16.v.yaml index 63bc94050..7710f10af 100644 --- a/spec/std/isa/inst/V/vloxseg5ei16.v.yaml +++ b/spec/std/isa/inst/V/vloxseg5ei16.v.yaml @@ -9,7 +9,9 @@ name: vloxseg5ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 100011-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg5ei32.v.yaml b/spec/std/isa/inst/V/vloxseg5ei32.v.yaml index 15f3a3f24..3e328187c 100644 --- a/spec/std/isa/inst/V/vloxseg5ei32.v.yaml +++ b/spec/std/isa/inst/V/vloxseg5ei32.v.yaml @@ -9,7 +9,9 @@ name: vloxseg5ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 100011-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg5ei64.v.yaml b/spec/std/isa/inst/V/vloxseg5ei64.v.yaml index a894caf88..ffbe55653 100644 --- a/spec/std/isa/inst/V/vloxseg5ei64.v.yaml +++ b/spec/std/isa/inst/V/vloxseg5ei64.v.yaml @@ -9,7 +9,9 @@ name: vloxseg5ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 100011-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg5ei8.v.yaml b/spec/std/isa/inst/V/vloxseg5ei8.v.yaml index 69a2776af..3e9b10c74 100644 --- a/spec/std/isa/inst/V/vloxseg5ei8.v.yaml +++ b/spec/std/isa/inst/V/vloxseg5ei8.v.yaml @@ -9,7 +9,9 @@ name: vloxseg5ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 100011-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg6ei16.v.yaml b/spec/std/isa/inst/V/vloxseg6ei16.v.yaml index da35ac552..47e0629ba 100644 --- a/spec/std/isa/inst/V/vloxseg6ei16.v.yaml +++ b/spec/std/isa/inst/V/vloxseg6ei16.v.yaml @@ -9,7 +9,9 @@ name: vloxseg6ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 101011-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg6ei32.v.yaml b/spec/std/isa/inst/V/vloxseg6ei32.v.yaml index ea8503523..bea17c571 100644 --- a/spec/std/isa/inst/V/vloxseg6ei32.v.yaml +++ b/spec/std/isa/inst/V/vloxseg6ei32.v.yaml @@ -9,7 +9,9 @@ name: vloxseg6ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 101011-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg6ei64.v.yaml b/spec/std/isa/inst/V/vloxseg6ei64.v.yaml index 58524cc16..961f8cb03 100644 --- a/spec/std/isa/inst/V/vloxseg6ei64.v.yaml +++ b/spec/std/isa/inst/V/vloxseg6ei64.v.yaml @@ -9,7 +9,9 @@ name: vloxseg6ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 101011-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg6ei8.v.yaml b/spec/std/isa/inst/V/vloxseg6ei8.v.yaml index 25c9301f8..d763a68eb 100644 --- a/spec/std/isa/inst/V/vloxseg6ei8.v.yaml +++ b/spec/std/isa/inst/V/vloxseg6ei8.v.yaml @@ -9,7 +9,9 @@ name: vloxseg6ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 101011-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg7ei16.v.yaml b/spec/std/isa/inst/V/vloxseg7ei16.v.yaml index 69ee3046c..30b5ef988 100644 --- a/spec/std/isa/inst/V/vloxseg7ei16.v.yaml +++ b/spec/std/isa/inst/V/vloxseg7ei16.v.yaml @@ -9,7 +9,9 @@ name: vloxseg7ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 110011-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg7ei32.v.yaml b/spec/std/isa/inst/V/vloxseg7ei32.v.yaml index 1bb1354f5..8c6dc7537 100644 --- a/spec/std/isa/inst/V/vloxseg7ei32.v.yaml +++ b/spec/std/isa/inst/V/vloxseg7ei32.v.yaml @@ -9,7 +9,9 @@ name: vloxseg7ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 110011-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg7ei64.v.yaml b/spec/std/isa/inst/V/vloxseg7ei64.v.yaml index fd6cdfdca..e7cc7552d 100644 --- a/spec/std/isa/inst/V/vloxseg7ei64.v.yaml +++ b/spec/std/isa/inst/V/vloxseg7ei64.v.yaml @@ -9,7 +9,9 @@ name: vloxseg7ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 110011-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg7ei8.v.yaml b/spec/std/isa/inst/V/vloxseg7ei8.v.yaml index 7cb3cbea1..44a74dadc 100644 --- a/spec/std/isa/inst/V/vloxseg7ei8.v.yaml +++ b/spec/std/isa/inst/V/vloxseg7ei8.v.yaml @@ -9,7 +9,9 @@ name: vloxseg7ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 110011-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg8ei16.v.yaml b/spec/std/isa/inst/V/vloxseg8ei16.v.yaml index 9325622f3..278912047 100644 --- a/spec/std/isa/inst/V/vloxseg8ei16.v.yaml +++ b/spec/std/isa/inst/V/vloxseg8ei16.v.yaml @@ -9,7 +9,9 @@ name: vloxseg8ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 111011-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg8ei32.v.yaml b/spec/std/isa/inst/V/vloxseg8ei32.v.yaml index cabc87b21..0c03d6592 100644 --- a/spec/std/isa/inst/V/vloxseg8ei32.v.yaml +++ b/spec/std/isa/inst/V/vloxseg8ei32.v.yaml @@ -9,7 +9,9 @@ name: vloxseg8ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 111011-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg8ei64.v.yaml b/spec/std/isa/inst/V/vloxseg8ei64.v.yaml index 97dfe30b5..2edaee6c5 100644 --- a/spec/std/isa/inst/V/vloxseg8ei64.v.yaml +++ b/spec/std/isa/inst/V/vloxseg8ei64.v.yaml @@ -9,7 +9,9 @@ name: vloxseg8ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 111011-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vloxseg8ei8.v.yaml b/spec/std/isa/inst/V/vloxseg8ei8.v.yaml index d28e01767..3bbe4fdec 100644 --- a/spec/std/isa/inst/V/vloxseg8ei8.v.yaml +++ b/spec/std/isa/inst/V/vloxseg8ei8.v.yaml @@ -9,7 +9,9 @@ name: vloxseg8ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 111011-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vlse16.v.yaml b/spec/std/isa/inst/V/vlse16.v.yaml index 2b7452a5f..bf356868c 100644 --- a/spec/std/isa/inst/V/vlse16.v.yaml +++ b/spec/std/isa/inst/V/vlse16.v.yaml @@ -9,7 +9,9 @@ name: vlse16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 000010-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vlse32.v.yaml b/spec/std/isa/inst/V/vlse32.v.yaml index cb034c40d..aae67946a 100644 --- a/spec/std/isa/inst/V/vlse32.v.yaml +++ b/spec/std/isa/inst/V/vlse32.v.yaml @@ -9,7 +9,9 @@ name: vlse32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 000010-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vlse64.v.yaml b/spec/std/isa/inst/V/vlse64.v.yaml index 8ac936880..5fe71ba7d 100644 --- a/spec/std/isa/inst/V/vlse64.v.yaml +++ b/spec/std/isa/inst/V/vlse64.v.yaml @@ -9,7 +9,9 @@ name: vlse64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 000010-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vlse8.v.yaml b/spec/std/isa/inst/V/vlse8.v.yaml index 20abd30f0..7af170ffd 100644 --- a/spec/std/isa/inst/V/vlse8.v.yaml +++ b/spec/std/isa/inst/V/vlse8.v.yaml @@ -9,7 +9,9 @@ name: vlse8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 000010-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg2e16.v.yaml b/spec/std/isa/inst/V/vlseg2e16.v.yaml index 7c3097c3d..d310b4937 100644 --- a/spec/std/isa/inst/V/vlseg2e16.v.yaml +++ b/spec/std/isa/inst/V/vlseg2e16.v.yaml @@ -9,7 +9,9 @@ name: vlseg2e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 001000-00000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg2e16ff.v.yaml b/spec/std/isa/inst/V/vlseg2e16ff.v.yaml index ff6fe8f64..0657f7a22 100644 --- a/spec/std/isa/inst/V/vlseg2e16ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg2e16ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg2e16ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 001000-10000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg2e32.v.yaml b/spec/std/isa/inst/V/vlseg2e32.v.yaml index ffff64e4d..cfe75093e 100644 --- a/spec/std/isa/inst/V/vlseg2e32.v.yaml +++ b/spec/std/isa/inst/V/vlseg2e32.v.yaml @@ -9,7 +9,9 @@ name: vlseg2e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 001000-00000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg2e32ff.v.yaml b/spec/std/isa/inst/V/vlseg2e32ff.v.yaml index ba0b7a5a9..2cbb52f2f 100644 --- a/spec/std/isa/inst/V/vlseg2e32ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg2e32ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg2e32ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 001000-10000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg2e64.v.yaml b/spec/std/isa/inst/V/vlseg2e64.v.yaml index f64de99e1..1e5745961 100644 --- a/spec/std/isa/inst/V/vlseg2e64.v.yaml +++ b/spec/std/isa/inst/V/vlseg2e64.v.yaml @@ -9,7 +9,9 @@ name: vlseg2e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 001000-00000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg2e64ff.v.yaml b/spec/std/isa/inst/V/vlseg2e64ff.v.yaml index 7c7a9b10c..aa8054455 100644 --- a/spec/std/isa/inst/V/vlseg2e64ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg2e64ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg2e64ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 001000-10000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg2e8.v.yaml b/spec/std/isa/inst/V/vlseg2e8.v.yaml index 66c1dc832..33eee00ae 100644 --- a/spec/std/isa/inst/V/vlseg2e8.v.yaml +++ b/spec/std/isa/inst/V/vlseg2e8.v.yaml @@ -9,7 +9,9 @@ name: vlseg2e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 001000-00000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg2e8ff.v.yaml b/spec/std/isa/inst/V/vlseg2e8ff.v.yaml index 3795ba87c..69c2621f8 100644 --- a/spec/std/isa/inst/V/vlseg2e8ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg2e8ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg2e8ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 001000-10000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg3e16.v.yaml b/spec/std/isa/inst/V/vlseg3e16.v.yaml index ec9cb33f6..60818aa0b 100644 --- a/spec/std/isa/inst/V/vlseg3e16.v.yaml +++ b/spec/std/isa/inst/V/vlseg3e16.v.yaml @@ -9,7 +9,9 @@ name: vlseg3e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 010000-00000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg3e16ff.v.yaml b/spec/std/isa/inst/V/vlseg3e16ff.v.yaml index 803f566f5..381f5e11c 100644 --- a/spec/std/isa/inst/V/vlseg3e16ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg3e16ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg3e16ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 010000-10000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg3e32.v.yaml b/spec/std/isa/inst/V/vlseg3e32.v.yaml index 191c3cabe..6885cc106 100644 --- a/spec/std/isa/inst/V/vlseg3e32.v.yaml +++ b/spec/std/isa/inst/V/vlseg3e32.v.yaml @@ -9,7 +9,9 @@ name: vlseg3e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 010000-00000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg3e32ff.v.yaml b/spec/std/isa/inst/V/vlseg3e32ff.v.yaml index 55ca1c766..db09bd059 100644 --- a/spec/std/isa/inst/V/vlseg3e32ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg3e32ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg3e32ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 010000-10000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg3e64.v.yaml b/spec/std/isa/inst/V/vlseg3e64.v.yaml index b687d49ea..a09f410c6 100644 --- a/spec/std/isa/inst/V/vlseg3e64.v.yaml +++ b/spec/std/isa/inst/V/vlseg3e64.v.yaml @@ -9,7 +9,9 @@ name: vlseg3e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 010000-00000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg3e64ff.v.yaml b/spec/std/isa/inst/V/vlseg3e64ff.v.yaml index d5588652f..2de52f7da 100644 --- a/spec/std/isa/inst/V/vlseg3e64ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg3e64ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg3e64ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 010000-10000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg3e8.v.yaml b/spec/std/isa/inst/V/vlseg3e8.v.yaml index dd555ff98..019946822 100644 --- a/spec/std/isa/inst/V/vlseg3e8.v.yaml +++ b/spec/std/isa/inst/V/vlseg3e8.v.yaml @@ -9,7 +9,9 @@ name: vlseg3e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 010000-00000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg3e8ff.v.yaml b/spec/std/isa/inst/V/vlseg3e8ff.v.yaml index 6a21f78d1..1e14babca 100644 --- a/spec/std/isa/inst/V/vlseg3e8ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg3e8ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg3e8ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 010000-10000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg4e16.v.yaml b/spec/std/isa/inst/V/vlseg4e16.v.yaml index 08ff1bafc..ee5d26876 100644 --- a/spec/std/isa/inst/V/vlseg4e16.v.yaml +++ b/spec/std/isa/inst/V/vlseg4e16.v.yaml @@ -9,7 +9,9 @@ name: vlseg4e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 011000-00000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg4e16ff.v.yaml b/spec/std/isa/inst/V/vlseg4e16ff.v.yaml index f909307ad..9d0297cac 100644 --- a/spec/std/isa/inst/V/vlseg4e16ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg4e16ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg4e16ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 011000-10000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg4e32.v.yaml b/spec/std/isa/inst/V/vlseg4e32.v.yaml index 6d3a10273..84b15d4cc 100644 --- a/spec/std/isa/inst/V/vlseg4e32.v.yaml +++ b/spec/std/isa/inst/V/vlseg4e32.v.yaml @@ -9,7 +9,9 @@ name: vlseg4e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 011000-00000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg4e32ff.v.yaml b/spec/std/isa/inst/V/vlseg4e32ff.v.yaml index 64c5d41f0..645f55361 100644 --- a/spec/std/isa/inst/V/vlseg4e32ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg4e32ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg4e32ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 011000-10000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg4e64.v.yaml b/spec/std/isa/inst/V/vlseg4e64.v.yaml index 88194cdd6..907bf4799 100644 --- a/spec/std/isa/inst/V/vlseg4e64.v.yaml +++ b/spec/std/isa/inst/V/vlseg4e64.v.yaml @@ -9,7 +9,9 @@ name: vlseg4e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 011000-00000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg4e64ff.v.yaml b/spec/std/isa/inst/V/vlseg4e64ff.v.yaml index b52fc8e2f..5803a12e7 100644 --- a/spec/std/isa/inst/V/vlseg4e64ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg4e64ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg4e64ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 011000-10000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg4e8.v.yaml b/spec/std/isa/inst/V/vlseg4e8.v.yaml index 75c01d97b..f29f7259f 100644 --- a/spec/std/isa/inst/V/vlseg4e8.v.yaml +++ b/spec/std/isa/inst/V/vlseg4e8.v.yaml @@ -9,7 +9,9 @@ name: vlseg4e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 011000-00000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg4e8ff.v.yaml b/spec/std/isa/inst/V/vlseg4e8ff.v.yaml index ec83f3747..93e85b585 100644 --- a/spec/std/isa/inst/V/vlseg4e8ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg4e8ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg4e8ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 011000-10000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg5e16.v.yaml b/spec/std/isa/inst/V/vlseg5e16.v.yaml index 417dd00ff..fa3826ea1 100644 --- a/spec/std/isa/inst/V/vlseg5e16.v.yaml +++ b/spec/std/isa/inst/V/vlseg5e16.v.yaml @@ -9,7 +9,9 @@ name: vlseg5e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 100000-00000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg5e16ff.v.yaml b/spec/std/isa/inst/V/vlseg5e16ff.v.yaml index 5d3e7de5c..53759cce2 100644 --- a/spec/std/isa/inst/V/vlseg5e16ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg5e16ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg5e16ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 100000-10000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg5e32.v.yaml b/spec/std/isa/inst/V/vlseg5e32.v.yaml index 7278fa697..eb3e0b4d4 100644 --- a/spec/std/isa/inst/V/vlseg5e32.v.yaml +++ b/spec/std/isa/inst/V/vlseg5e32.v.yaml @@ -9,7 +9,9 @@ name: vlseg5e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 100000-00000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg5e32ff.v.yaml b/spec/std/isa/inst/V/vlseg5e32ff.v.yaml index a6b1ffef4..6bb33fe1a 100644 --- a/spec/std/isa/inst/V/vlseg5e32ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg5e32ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg5e32ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 100000-10000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg5e64.v.yaml b/spec/std/isa/inst/V/vlseg5e64.v.yaml index 70dc002c9..8d2b9175a 100644 --- a/spec/std/isa/inst/V/vlseg5e64.v.yaml +++ b/spec/std/isa/inst/V/vlseg5e64.v.yaml @@ -9,7 +9,9 @@ name: vlseg5e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 100000-00000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg5e64ff.v.yaml b/spec/std/isa/inst/V/vlseg5e64ff.v.yaml index 944e22af0..dea413b06 100644 --- a/spec/std/isa/inst/V/vlseg5e64ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg5e64ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg5e64ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 100000-10000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg5e8.v.yaml b/spec/std/isa/inst/V/vlseg5e8.v.yaml index 6225b5918..5d0173fcc 100644 --- a/spec/std/isa/inst/V/vlseg5e8.v.yaml +++ b/spec/std/isa/inst/V/vlseg5e8.v.yaml @@ -9,7 +9,9 @@ name: vlseg5e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 100000-00000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg5e8ff.v.yaml b/spec/std/isa/inst/V/vlseg5e8ff.v.yaml index 23fa9ebd1..5ca75c73d 100644 --- a/spec/std/isa/inst/V/vlseg5e8ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg5e8ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg5e8ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 100000-10000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg6e16.v.yaml b/spec/std/isa/inst/V/vlseg6e16.v.yaml index 2170e8826..a1d59d10b 100644 --- a/spec/std/isa/inst/V/vlseg6e16.v.yaml +++ b/spec/std/isa/inst/V/vlseg6e16.v.yaml @@ -9,7 +9,9 @@ name: vlseg6e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 101000-00000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg6e16ff.v.yaml b/spec/std/isa/inst/V/vlseg6e16ff.v.yaml index f7bc60106..78cd500f7 100644 --- a/spec/std/isa/inst/V/vlseg6e16ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg6e16ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg6e16ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 101000-10000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg6e32.v.yaml b/spec/std/isa/inst/V/vlseg6e32.v.yaml index 8929121a2..6ba4fbdb5 100644 --- a/spec/std/isa/inst/V/vlseg6e32.v.yaml +++ b/spec/std/isa/inst/V/vlseg6e32.v.yaml @@ -9,7 +9,9 @@ name: vlseg6e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 101000-00000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg6e32ff.v.yaml b/spec/std/isa/inst/V/vlseg6e32ff.v.yaml index ad233612d..865c200a7 100644 --- a/spec/std/isa/inst/V/vlseg6e32ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg6e32ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg6e32ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 101000-10000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg6e64.v.yaml b/spec/std/isa/inst/V/vlseg6e64.v.yaml index 489fe953d..44f50f3ae 100644 --- a/spec/std/isa/inst/V/vlseg6e64.v.yaml +++ b/spec/std/isa/inst/V/vlseg6e64.v.yaml @@ -9,7 +9,9 @@ name: vlseg6e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 101000-00000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg6e64ff.v.yaml b/spec/std/isa/inst/V/vlseg6e64ff.v.yaml index d9afcbf8a..c340b7ea3 100644 --- a/spec/std/isa/inst/V/vlseg6e64ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg6e64ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg6e64ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 101000-10000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg6e8.v.yaml b/spec/std/isa/inst/V/vlseg6e8.v.yaml index 412ca6f23..ce97b6366 100644 --- a/spec/std/isa/inst/V/vlseg6e8.v.yaml +++ b/spec/std/isa/inst/V/vlseg6e8.v.yaml @@ -9,7 +9,9 @@ name: vlseg6e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 101000-00000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg6e8ff.v.yaml b/spec/std/isa/inst/V/vlseg6e8ff.v.yaml index cad4ee64f..6f6217cf8 100644 --- a/spec/std/isa/inst/V/vlseg6e8ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg6e8ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg6e8ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 101000-10000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg7e16.v.yaml b/spec/std/isa/inst/V/vlseg7e16.v.yaml index 6c46b3c24..ce6ca238b 100644 --- a/spec/std/isa/inst/V/vlseg7e16.v.yaml +++ b/spec/std/isa/inst/V/vlseg7e16.v.yaml @@ -9,7 +9,9 @@ name: vlseg7e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 110000-00000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg7e16ff.v.yaml b/spec/std/isa/inst/V/vlseg7e16ff.v.yaml index 161f16c85..3a986107e 100644 --- a/spec/std/isa/inst/V/vlseg7e16ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg7e16ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg7e16ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 110000-10000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg7e32.v.yaml b/spec/std/isa/inst/V/vlseg7e32.v.yaml index 65acf010d..2d0f78f30 100644 --- a/spec/std/isa/inst/V/vlseg7e32.v.yaml +++ b/spec/std/isa/inst/V/vlseg7e32.v.yaml @@ -9,7 +9,9 @@ name: vlseg7e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 110000-00000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg7e32ff.v.yaml b/spec/std/isa/inst/V/vlseg7e32ff.v.yaml index 503e1d6ef..79b8e6931 100644 --- a/spec/std/isa/inst/V/vlseg7e32ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg7e32ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg7e32ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 110000-10000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg7e64.v.yaml b/spec/std/isa/inst/V/vlseg7e64.v.yaml index d53af177a..dec9d06a7 100644 --- a/spec/std/isa/inst/V/vlseg7e64.v.yaml +++ b/spec/std/isa/inst/V/vlseg7e64.v.yaml @@ -9,7 +9,9 @@ name: vlseg7e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 110000-00000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg7e64ff.v.yaml b/spec/std/isa/inst/V/vlseg7e64ff.v.yaml index 52667b408..b986afece 100644 --- a/spec/std/isa/inst/V/vlseg7e64ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg7e64ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg7e64ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 110000-10000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg7e8.v.yaml b/spec/std/isa/inst/V/vlseg7e8.v.yaml index dcc86aa5b..14f23094a 100644 --- a/spec/std/isa/inst/V/vlseg7e8.v.yaml +++ b/spec/std/isa/inst/V/vlseg7e8.v.yaml @@ -9,7 +9,9 @@ name: vlseg7e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 110000-00000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg7e8ff.v.yaml b/spec/std/isa/inst/V/vlseg7e8ff.v.yaml index 8c93b18ce..b5c581ff5 100644 --- a/spec/std/isa/inst/V/vlseg7e8ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg7e8ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg7e8ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 110000-10000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg8e16.v.yaml b/spec/std/isa/inst/V/vlseg8e16.v.yaml index 0c85fb504..c19b2acfc 100644 --- a/spec/std/isa/inst/V/vlseg8e16.v.yaml +++ b/spec/std/isa/inst/V/vlseg8e16.v.yaml @@ -9,7 +9,9 @@ name: vlseg8e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 111000-00000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg8e16ff.v.yaml b/spec/std/isa/inst/V/vlseg8e16ff.v.yaml index f04830422..0b60634a7 100644 --- a/spec/std/isa/inst/V/vlseg8e16ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg8e16ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg8e16ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 111000-10000-----101-----0000111 diff --git a/spec/std/isa/inst/V/vlseg8e32.v.yaml b/spec/std/isa/inst/V/vlseg8e32.v.yaml index 9d946fb25..6c15f740b 100644 --- a/spec/std/isa/inst/V/vlseg8e32.v.yaml +++ b/spec/std/isa/inst/V/vlseg8e32.v.yaml @@ -9,7 +9,9 @@ name: vlseg8e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 111000-00000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg8e32ff.v.yaml b/spec/std/isa/inst/V/vlseg8e32ff.v.yaml index 472a3ca96..b4f336cd6 100644 --- a/spec/std/isa/inst/V/vlseg8e32ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg8e32ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg8e32ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 111000-10000-----110-----0000111 diff --git a/spec/std/isa/inst/V/vlseg8e64.v.yaml b/spec/std/isa/inst/V/vlseg8e64.v.yaml index 1c3843b8e..87d8a62cd 100644 --- a/spec/std/isa/inst/V/vlseg8e64.v.yaml +++ b/spec/std/isa/inst/V/vlseg8e64.v.yaml @@ -9,7 +9,9 @@ name: vlseg8e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 111000-00000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg8e64ff.v.yaml b/spec/std/isa/inst/V/vlseg8e64ff.v.yaml index c19f5a881..7b83d6a2d 100644 --- a/spec/std/isa/inst/V/vlseg8e64ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg8e64ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg8e64ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 111000-10000-----111-----0000111 diff --git a/spec/std/isa/inst/V/vlseg8e8.v.yaml b/spec/std/isa/inst/V/vlseg8e8.v.yaml index 95057dc47..a02bcf310 100644 --- a/spec/std/isa/inst/V/vlseg8e8.v.yaml +++ b/spec/std/isa/inst/V/vlseg8e8.v.yaml @@ -9,7 +9,9 @@ name: vlseg8e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 111000-00000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlseg8e8ff.v.yaml b/spec/std/isa/inst/V/vlseg8e8ff.v.yaml index 3e6fa88d4..bbd059e9e 100644 --- a/spec/std/isa/inst/V/vlseg8e8ff.v.yaml +++ b/spec/std/isa/inst/V/vlseg8e8ff.v.yaml @@ -9,7 +9,9 @@ name: vlseg8e8ff.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vm encoding: match: 111000-10000-----000-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg2e16.v.yaml b/spec/std/isa/inst/V/vlsseg2e16.v.yaml index 5ee3f4f91..7a4cc2451 100644 --- a/spec/std/isa/inst/V/vlsseg2e16.v.yaml +++ b/spec/std/isa/inst/V/vlsseg2e16.v.yaml @@ -9,7 +9,9 @@ name: vlsseg2e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 001010-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg2e32.v.yaml b/spec/std/isa/inst/V/vlsseg2e32.v.yaml index 02ce06c2c..3a00aba60 100644 --- a/spec/std/isa/inst/V/vlsseg2e32.v.yaml +++ b/spec/std/isa/inst/V/vlsseg2e32.v.yaml @@ -9,7 +9,9 @@ name: vlsseg2e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 001010-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg2e64.v.yaml b/spec/std/isa/inst/V/vlsseg2e64.v.yaml index b1d9838d1..ab14de130 100644 --- a/spec/std/isa/inst/V/vlsseg2e64.v.yaml +++ b/spec/std/isa/inst/V/vlsseg2e64.v.yaml @@ -9,7 +9,9 @@ name: vlsseg2e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 001010-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg2e8.v.yaml b/spec/std/isa/inst/V/vlsseg2e8.v.yaml index e6b133d78..0d8a0e399 100644 --- a/spec/std/isa/inst/V/vlsseg2e8.v.yaml +++ b/spec/std/isa/inst/V/vlsseg2e8.v.yaml @@ -9,7 +9,9 @@ name: vlsseg2e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 001010-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg3e16.v.yaml b/spec/std/isa/inst/V/vlsseg3e16.v.yaml index 6bdefc0cf..149edd0d7 100644 --- a/spec/std/isa/inst/V/vlsseg3e16.v.yaml +++ b/spec/std/isa/inst/V/vlsseg3e16.v.yaml @@ -9,7 +9,9 @@ name: vlsseg3e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 010010-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg3e32.v.yaml b/spec/std/isa/inst/V/vlsseg3e32.v.yaml index 5005d9f84..19c70900c 100644 --- a/spec/std/isa/inst/V/vlsseg3e32.v.yaml +++ b/spec/std/isa/inst/V/vlsseg3e32.v.yaml @@ -9,7 +9,9 @@ name: vlsseg3e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 010010-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg3e64.v.yaml b/spec/std/isa/inst/V/vlsseg3e64.v.yaml index 5d3d8e7a4..d8c8e0fd3 100644 --- a/spec/std/isa/inst/V/vlsseg3e64.v.yaml +++ b/spec/std/isa/inst/V/vlsseg3e64.v.yaml @@ -9,7 +9,9 @@ name: vlsseg3e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 010010-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg3e8.v.yaml b/spec/std/isa/inst/V/vlsseg3e8.v.yaml index 060ee7b15..8da7c76db 100644 --- a/spec/std/isa/inst/V/vlsseg3e8.v.yaml +++ b/spec/std/isa/inst/V/vlsseg3e8.v.yaml @@ -9,7 +9,9 @@ name: vlsseg3e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 010010-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg4e16.v.yaml b/spec/std/isa/inst/V/vlsseg4e16.v.yaml index c1dcef0ff..d0fb232c2 100644 --- a/spec/std/isa/inst/V/vlsseg4e16.v.yaml +++ b/spec/std/isa/inst/V/vlsseg4e16.v.yaml @@ -9,7 +9,9 @@ name: vlsseg4e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 011010-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg4e32.v.yaml b/spec/std/isa/inst/V/vlsseg4e32.v.yaml index 34933d941..b72056a43 100644 --- a/spec/std/isa/inst/V/vlsseg4e32.v.yaml +++ b/spec/std/isa/inst/V/vlsseg4e32.v.yaml @@ -9,7 +9,9 @@ name: vlsseg4e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 011010-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg4e64.v.yaml b/spec/std/isa/inst/V/vlsseg4e64.v.yaml index f79c684e2..5960084a0 100644 --- a/spec/std/isa/inst/V/vlsseg4e64.v.yaml +++ b/spec/std/isa/inst/V/vlsseg4e64.v.yaml @@ -9,7 +9,9 @@ name: vlsseg4e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 011010-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg4e8.v.yaml b/spec/std/isa/inst/V/vlsseg4e8.v.yaml index 6a43569fb..1b1c3d362 100644 --- a/spec/std/isa/inst/V/vlsseg4e8.v.yaml +++ b/spec/std/isa/inst/V/vlsseg4e8.v.yaml @@ -9,7 +9,9 @@ name: vlsseg4e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 011010-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg5e16.v.yaml b/spec/std/isa/inst/V/vlsseg5e16.v.yaml index 03a622625..ccf8a2388 100644 --- a/spec/std/isa/inst/V/vlsseg5e16.v.yaml +++ b/spec/std/isa/inst/V/vlsseg5e16.v.yaml @@ -9,7 +9,9 @@ name: vlsseg5e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 100010-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg5e32.v.yaml b/spec/std/isa/inst/V/vlsseg5e32.v.yaml index 4bbe7bdff..1605dd5d5 100644 --- a/spec/std/isa/inst/V/vlsseg5e32.v.yaml +++ b/spec/std/isa/inst/V/vlsseg5e32.v.yaml @@ -9,7 +9,9 @@ name: vlsseg5e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 100010-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg5e64.v.yaml b/spec/std/isa/inst/V/vlsseg5e64.v.yaml index 2f07ce167..c896adbd6 100644 --- a/spec/std/isa/inst/V/vlsseg5e64.v.yaml +++ b/spec/std/isa/inst/V/vlsseg5e64.v.yaml @@ -9,7 +9,9 @@ name: vlsseg5e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 100010-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg5e8.v.yaml b/spec/std/isa/inst/V/vlsseg5e8.v.yaml index d84406b83..6c18a1014 100644 --- a/spec/std/isa/inst/V/vlsseg5e8.v.yaml +++ b/spec/std/isa/inst/V/vlsseg5e8.v.yaml @@ -9,7 +9,9 @@ name: vlsseg5e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 100010-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg6e16.v.yaml b/spec/std/isa/inst/V/vlsseg6e16.v.yaml index a1e6b9aef..2b3de7231 100644 --- a/spec/std/isa/inst/V/vlsseg6e16.v.yaml +++ b/spec/std/isa/inst/V/vlsseg6e16.v.yaml @@ -9,7 +9,9 @@ name: vlsseg6e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 101010-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg6e32.v.yaml b/spec/std/isa/inst/V/vlsseg6e32.v.yaml index d69c0b59f..4b0a69e90 100644 --- a/spec/std/isa/inst/V/vlsseg6e32.v.yaml +++ b/spec/std/isa/inst/V/vlsseg6e32.v.yaml @@ -9,7 +9,9 @@ name: vlsseg6e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 101010-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg6e64.v.yaml b/spec/std/isa/inst/V/vlsseg6e64.v.yaml index 8329db50b..8d12ac318 100644 --- a/spec/std/isa/inst/V/vlsseg6e64.v.yaml +++ b/spec/std/isa/inst/V/vlsseg6e64.v.yaml @@ -9,7 +9,9 @@ name: vlsseg6e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 101010-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg6e8.v.yaml b/spec/std/isa/inst/V/vlsseg6e8.v.yaml index d5faeebd2..a573912f8 100644 --- a/spec/std/isa/inst/V/vlsseg6e8.v.yaml +++ b/spec/std/isa/inst/V/vlsseg6e8.v.yaml @@ -9,7 +9,9 @@ name: vlsseg6e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 101010-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg7e16.v.yaml b/spec/std/isa/inst/V/vlsseg7e16.v.yaml index 056c623a9..6de6d2033 100644 --- a/spec/std/isa/inst/V/vlsseg7e16.v.yaml +++ b/spec/std/isa/inst/V/vlsseg7e16.v.yaml @@ -9,7 +9,9 @@ name: vlsseg7e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 110010-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg7e32.v.yaml b/spec/std/isa/inst/V/vlsseg7e32.v.yaml index 2354c254d..1c45d9d48 100644 --- a/spec/std/isa/inst/V/vlsseg7e32.v.yaml +++ b/spec/std/isa/inst/V/vlsseg7e32.v.yaml @@ -9,7 +9,9 @@ name: vlsseg7e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 110010-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg7e64.v.yaml b/spec/std/isa/inst/V/vlsseg7e64.v.yaml index 97c422cb7..12f56b2aa 100644 --- a/spec/std/isa/inst/V/vlsseg7e64.v.yaml +++ b/spec/std/isa/inst/V/vlsseg7e64.v.yaml @@ -9,7 +9,9 @@ name: vlsseg7e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 110010-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg7e8.v.yaml b/spec/std/isa/inst/V/vlsseg7e8.v.yaml index e30ac4163..a68266a01 100644 --- a/spec/std/isa/inst/V/vlsseg7e8.v.yaml +++ b/spec/std/isa/inst/V/vlsseg7e8.v.yaml @@ -9,7 +9,9 @@ name: vlsseg7e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 110010-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg8e16.v.yaml b/spec/std/isa/inst/V/vlsseg8e16.v.yaml index c8f38fd5c..2e9491116 100644 --- a/spec/std/isa/inst/V/vlsseg8e16.v.yaml +++ b/spec/std/isa/inst/V/vlsseg8e16.v.yaml @@ -9,7 +9,9 @@ name: vlsseg8e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 111010-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg8e32.v.yaml b/spec/std/isa/inst/V/vlsseg8e32.v.yaml index 124609237..5bd855c12 100644 --- a/spec/std/isa/inst/V/vlsseg8e32.v.yaml +++ b/spec/std/isa/inst/V/vlsseg8e32.v.yaml @@ -9,7 +9,9 @@ name: vlsseg8e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 111010-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg8e64.v.yaml b/spec/std/isa/inst/V/vlsseg8e64.v.yaml index bc3bb5456..35ccc9804 100644 --- a/spec/std/isa/inst/V/vlsseg8e64.v.yaml +++ b/spec/std/isa/inst/V/vlsseg8e64.v.yaml @@ -9,7 +9,9 @@ name: vlsseg8e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 111010-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vlsseg8e8.v.yaml b/spec/std/isa/inst/V/vlsseg8e8.v.yaml index e3ca1b686..6a762a92c 100644 --- a/spec/std/isa/inst/V/vlsseg8e8.v.yaml +++ b/spec/std/isa/inst/V/vlsseg8e8.v.yaml @@ -9,7 +9,9 @@ name: vlsseg8e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), xs2, vm encoding: match: 111010-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vluxei16.v.yaml b/spec/std/isa/inst/V/vluxei16.v.yaml index 6f22e7aba..0a35b69d2 100644 --- a/spec/std/isa/inst/V/vluxei16.v.yaml +++ b/spec/std/isa/inst/V/vluxei16.v.yaml @@ -9,7 +9,9 @@ name: vluxei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 000001-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vluxei32.v.yaml b/spec/std/isa/inst/V/vluxei32.v.yaml index b7298205b..362b1f550 100644 --- a/spec/std/isa/inst/V/vluxei32.v.yaml +++ b/spec/std/isa/inst/V/vluxei32.v.yaml @@ -9,7 +9,9 @@ name: vluxei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 000001-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vluxei64.v.yaml b/spec/std/isa/inst/V/vluxei64.v.yaml index 2c5d2c52d..8e562446b 100644 --- a/spec/std/isa/inst/V/vluxei64.v.yaml +++ b/spec/std/isa/inst/V/vluxei64.v.yaml @@ -9,7 +9,9 @@ name: vluxei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 000001-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vluxei8.v.yaml b/spec/std/isa/inst/V/vluxei8.v.yaml index f333d39d2..b49bbd357 100644 --- a/spec/std/isa/inst/V/vluxei8.v.yaml +++ b/spec/std/isa/inst/V/vluxei8.v.yaml @@ -9,7 +9,9 @@ name: vluxei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 000001-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg2ei16.v.yaml b/spec/std/isa/inst/V/vluxseg2ei16.v.yaml index 8adafb154..caa2c6fae 100644 --- a/spec/std/isa/inst/V/vluxseg2ei16.v.yaml +++ b/spec/std/isa/inst/V/vluxseg2ei16.v.yaml @@ -9,7 +9,9 @@ name: vluxseg2ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 001001-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg2ei32.v.yaml b/spec/std/isa/inst/V/vluxseg2ei32.v.yaml index 0d31bc76a..56238c550 100644 --- a/spec/std/isa/inst/V/vluxseg2ei32.v.yaml +++ b/spec/std/isa/inst/V/vluxseg2ei32.v.yaml @@ -9,7 +9,9 @@ name: vluxseg2ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 001001-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg2ei64.v.yaml b/spec/std/isa/inst/V/vluxseg2ei64.v.yaml index cd6899a57..da05330d9 100644 --- a/spec/std/isa/inst/V/vluxseg2ei64.v.yaml +++ b/spec/std/isa/inst/V/vluxseg2ei64.v.yaml @@ -9,7 +9,9 @@ name: vluxseg2ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 001001-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg2ei8.v.yaml b/spec/std/isa/inst/V/vluxseg2ei8.v.yaml index 767cbdee2..9ec87469a 100644 --- a/spec/std/isa/inst/V/vluxseg2ei8.v.yaml +++ b/spec/std/isa/inst/V/vluxseg2ei8.v.yaml @@ -9,7 +9,9 @@ name: vluxseg2ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 001001-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg3ei16.v.yaml b/spec/std/isa/inst/V/vluxseg3ei16.v.yaml index 9cdd3d9b3..bae8a80fd 100644 --- a/spec/std/isa/inst/V/vluxseg3ei16.v.yaml +++ b/spec/std/isa/inst/V/vluxseg3ei16.v.yaml @@ -9,7 +9,9 @@ name: vluxseg3ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 010001-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg3ei32.v.yaml b/spec/std/isa/inst/V/vluxseg3ei32.v.yaml index 3c71219c0..cbaef53f2 100644 --- a/spec/std/isa/inst/V/vluxseg3ei32.v.yaml +++ b/spec/std/isa/inst/V/vluxseg3ei32.v.yaml @@ -9,7 +9,9 @@ name: vluxseg3ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 010001-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg3ei64.v.yaml b/spec/std/isa/inst/V/vluxseg3ei64.v.yaml index c5eee8f3a..c7d76eeb7 100644 --- a/spec/std/isa/inst/V/vluxseg3ei64.v.yaml +++ b/spec/std/isa/inst/V/vluxseg3ei64.v.yaml @@ -9,7 +9,9 @@ name: vluxseg3ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 010001-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg3ei8.v.yaml b/spec/std/isa/inst/V/vluxseg3ei8.v.yaml index 62a31e859..34b7bfdec 100644 --- a/spec/std/isa/inst/V/vluxseg3ei8.v.yaml +++ b/spec/std/isa/inst/V/vluxseg3ei8.v.yaml @@ -9,7 +9,9 @@ name: vluxseg3ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 010001-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg4ei16.v.yaml b/spec/std/isa/inst/V/vluxseg4ei16.v.yaml index 97ee35a95..2043a4812 100644 --- a/spec/std/isa/inst/V/vluxseg4ei16.v.yaml +++ b/spec/std/isa/inst/V/vluxseg4ei16.v.yaml @@ -9,7 +9,9 @@ name: vluxseg4ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 011001-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg4ei32.v.yaml b/spec/std/isa/inst/V/vluxseg4ei32.v.yaml index 4b746b83f..af545d85f 100644 --- a/spec/std/isa/inst/V/vluxseg4ei32.v.yaml +++ b/spec/std/isa/inst/V/vluxseg4ei32.v.yaml @@ -9,7 +9,9 @@ name: vluxseg4ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 011001-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg4ei64.v.yaml b/spec/std/isa/inst/V/vluxseg4ei64.v.yaml index fab41d72f..cf5c8cf68 100644 --- a/spec/std/isa/inst/V/vluxseg4ei64.v.yaml +++ b/spec/std/isa/inst/V/vluxseg4ei64.v.yaml @@ -9,7 +9,9 @@ name: vluxseg4ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 011001-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg4ei8.v.yaml b/spec/std/isa/inst/V/vluxseg4ei8.v.yaml index ecf93fd87..f13713f23 100644 --- a/spec/std/isa/inst/V/vluxseg4ei8.v.yaml +++ b/spec/std/isa/inst/V/vluxseg4ei8.v.yaml @@ -9,7 +9,9 @@ name: vluxseg4ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 011001-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg5ei16.v.yaml b/spec/std/isa/inst/V/vluxseg5ei16.v.yaml index b25e4c66e..48d6a449c 100644 --- a/spec/std/isa/inst/V/vluxseg5ei16.v.yaml +++ b/spec/std/isa/inst/V/vluxseg5ei16.v.yaml @@ -9,7 +9,9 @@ name: vluxseg5ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 100001-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg5ei32.v.yaml b/spec/std/isa/inst/V/vluxseg5ei32.v.yaml index 18cd418f3..836aa8960 100644 --- a/spec/std/isa/inst/V/vluxseg5ei32.v.yaml +++ b/spec/std/isa/inst/V/vluxseg5ei32.v.yaml @@ -9,7 +9,9 @@ name: vluxseg5ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 100001-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg5ei64.v.yaml b/spec/std/isa/inst/V/vluxseg5ei64.v.yaml index c01941b89..675f38f44 100644 --- a/spec/std/isa/inst/V/vluxseg5ei64.v.yaml +++ b/spec/std/isa/inst/V/vluxseg5ei64.v.yaml @@ -9,7 +9,9 @@ name: vluxseg5ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 100001-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg5ei8.v.yaml b/spec/std/isa/inst/V/vluxseg5ei8.v.yaml index ec99cd846..a1ae0a97e 100644 --- a/spec/std/isa/inst/V/vluxseg5ei8.v.yaml +++ b/spec/std/isa/inst/V/vluxseg5ei8.v.yaml @@ -9,7 +9,9 @@ name: vluxseg5ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 100001-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg6ei16.v.yaml b/spec/std/isa/inst/V/vluxseg6ei16.v.yaml index 0846526ec..8d01adf10 100644 --- a/spec/std/isa/inst/V/vluxseg6ei16.v.yaml +++ b/spec/std/isa/inst/V/vluxseg6ei16.v.yaml @@ -9,7 +9,9 @@ name: vluxseg6ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 101001-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg6ei32.v.yaml b/spec/std/isa/inst/V/vluxseg6ei32.v.yaml index 8e2f55db5..f3a8fd717 100644 --- a/spec/std/isa/inst/V/vluxseg6ei32.v.yaml +++ b/spec/std/isa/inst/V/vluxseg6ei32.v.yaml @@ -9,7 +9,9 @@ name: vluxseg6ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 101001-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg6ei64.v.yaml b/spec/std/isa/inst/V/vluxseg6ei64.v.yaml index aba1702b7..2661bbef1 100644 --- a/spec/std/isa/inst/V/vluxseg6ei64.v.yaml +++ b/spec/std/isa/inst/V/vluxseg6ei64.v.yaml @@ -9,7 +9,9 @@ name: vluxseg6ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 101001-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg6ei8.v.yaml b/spec/std/isa/inst/V/vluxseg6ei8.v.yaml index 2a72113e3..3b9e85876 100644 --- a/spec/std/isa/inst/V/vluxseg6ei8.v.yaml +++ b/spec/std/isa/inst/V/vluxseg6ei8.v.yaml @@ -9,7 +9,9 @@ name: vluxseg6ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 101001-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg7ei16.v.yaml b/spec/std/isa/inst/V/vluxseg7ei16.v.yaml index 06b0f098d..ccc6e8e73 100644 --- a/spec/std/isa/inst/V/vluxseg7ei16.v.yaml +++ b/spec/std/isa/inst/V/vluxseg7ei16.v.yaml @@ -9,7 +9,9 @@ name: vluxseg7ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 110001-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg7ei32.v.yaml b/spec/std/isa/inst/V/vluxseg7ei32.v.yaml index d207d5b42..940d1dd7e 100644 --- a/spec/std/isa/inst/V/vluxseg7ei32.v.yaml +++ b/spec/std/isa/inst/V/vluxseg7ei32.v.yaml @@ -9,7 +9,9 @@ name: vluxseg7ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 110001-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg7ei64.v.yaml b/spec/std/isa/inst/V/vluxseg7ei64.v.yaml index 3019c28ac..039dc0523 100644 --- a/spec/std/isa/inst/V/vluxseg7ei64.v.yaml +++ b/spec/std/isa/inst/V/vluxseg7ei64.v.yaml @@ -9,7 +9,9 @@ name: vluxseg7ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 110001-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg7ei8.v.yaml b/spec/std/isa/inst/V/vluxseg7ei8.v.yaml index 30e287abc..62a5cc231 100644 --- a/spec/std/isa/inst/V/vluxseg7ei8.v.yaml +++ b/spec/std/isa/inst/V/vluxseg7ei8.v.yaml @@ -9,7 +9,9 @@ name: vluxseg7ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 110001-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg8ei16.v.yaml b/spec/std/isa/inst/V/vluxseg8ei16.v.yaml index c2e8e2664..ff211d56d 100644 --- a/spec/std/isa/inst/V/vluxseg8ei16.v.yaml +++ b/spec/std/isa/inst/V/vluxseg8ei16.v.yaml @@ -9,7 +9,9 @@ name: vluxseg8ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 111001-----------101-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg8ei32.v.yaml b/spec/std/isa/inst/V/vluxseg8ei32.v.yaml index d833535e6..c56e421ec 100644 --- a/spec/std/isa/inst/V/vluxseg8ei32.v.yaml +++ b/spec/std/isa/inst/V/vluxseg8ei32.v.yaml @@ -9,7 +9,9 @@ name: vluxseg8ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 111001-----------110-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg8ei64.v.yaml b/spec/std/isa/inst/V/vluxseg8ei64.v.yaml index 56b4c0f86..6f453a044 100644 --- a/spec/std/isa/inst/V/vluxseg8ei64.v.yaml +++ b/spec/std/isa/inst/V/vluxseg8ei64.v.yaml @@ -9,7 +9,9 @@ name: vluxseg8ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 111001-----------111-----0000111 diff --git a/spec/std/isa/inst/V/vluxseg8ei8.v.yaml b/spec/std/isa/inst/V/vluxseg8ei8.v.yaml index f22d515d1..a4ac8ad5b 100644 --- a/spec/std/isa/inst/V/vluxseg8ei8.v.yaml +++ b/spec/std/isa/inst/V/vluxseg8ei8.v.yaml @@ -9,7 +9,9 @@ name: vluxseg8ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, (xs1), vs2, vm encoding: match: 111001-----------000-----0000111 diff --git a/spec/std/isa/inst/V/vmacc.vv.yaml b/spec/std/isa/inst/V/vmacc.vv.yaml index 34d5d60f5..88b5ce439 100644 --- a/spec/std/isa/inst/V/vmacc.vv.yaml +++ b/spec/std/isa/inst/V/vmacc.vv.yaml @@ -9,7 +9,9 @@ name: vmacc.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101101-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmacc.vx.yaml b/spec/std/isa/inst/V/vmacc.vx.yaml index d260fca8c..b4291054a 100644 --- a/spec/std/isa/inst/V/vmacc.vx.yaml +++ b/spec/std/isa/inst/V/vmacc.vx.yaml @@ -9,7 +9,9 @@ name: vmacc.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, xs1, vs2, vm encoding: match: 101101-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vmadc.vi.yaml b/spec/std/isa/inst/V/vmadc.vi.yaml index 28a43761e..e9c8877f6 100644 --- a/spec/std/isa/inst/V/vmadc.vi.yaml +++ b/spec/std/isa/inst/V/vmadc.vi.yaml @@ -9,7 +9,9 @@ name: vmadc.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm encoding: match: 0100011----------011-----1010111 diff --git a/spec/std/isa/inst/V/vmadc.vim.yaml b/spec/std/isa/inst/V/vmadc.vim.yaml index 29827b3d1..d3c899059 100644 --- a/spec/std/isa/inst/V/vmadc.vim.yaml +++ b/spec/std/isa/inst/V/vmadc.vim.yaml @@ -9,7 +9,9 @@ name: vmadc.vim long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, v0 encoding: match: 0100010----------011-----1010111 diff --git a/spec/std/isa/inst/V/vmadc.vv.yaml b/spec/std/isa/inst/V/vmadc.vv.yaml index 2862dbc68..8484a878a 100644 --- a/spec/std/isa/inst/V/vmadc.vv.yaml +++ b/spec/std/isa/inst/V/vmadc.vv.yaml @@ -9,7 +9,9 @@ name: vmadc.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0100011----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmadc.vvm.yaml b/spec/std/isa/inst/V/vmadc.vvm.yaml index 4bee2b92a..9357c7a9f 100644 --- a/spec/std/isa/inst/V/vmadc.vvm.yaml +++ b/spec/std/isa/inst/V/vmadc.vvm.yaml @@ -9,7 +9,9 @@ name: vmadc.vvm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, v0 encoding: match: 0100010----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmadc.vx.yaml b/spec/std/isa/inst/V/vmadc.vx.yaml index df79f5e45..c2074b2ff 100644 --- a/spec/std/isa/inst/V/vmadc.vx.yaml +++ b/spec/std/isa/inst/V/vmadc.vx.yaml @@ -9,7 +9,9 @@ name: vmadc.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1 encoding: match: 0100011----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmadc.vxm.yaml b/spec/std/isa/inst/V/vmadc.vxm.yaml index 2485c5b7e..a1a9ab9dd 100644 --- a/spec/std/isa/inst/V/vmadc.vxm.yaml +++ b/spec/std/isa/inst/V/vmadc.vxm.yaml @@ -9,7 +9,9 @@ name: vmadc.vxm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, v0 encoding: match: 0100010----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmadd.vv.yaml b/spec/std/isa/inst/V/vmadd.vv.yaml index b2f4282e0..9279393af 100644 --- a/spec/std/isa/inst/V/vmadd.vv.yaml +++ b/spec/std/isa/inst/V/vmadd.vv.yaml @@ -9,7 +9,9 @@ name: vmadd.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101001-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmadd.vx.yaml b/spec/std/isa/inst/V/vmadd.vx.yaml index 8ff985939..e3346d33b 100644 --- a/spec/std/isa/inst/V/vmadd.vx.yaml +++ b/spec/std/isa/inst/V/vmadd.vx.yaml @@ -9,7 +9,9 @@ name: vmadd.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, xs1, vs2, vm encoding: match: 101001-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vmand.mm.yaml b/spec/std/isa/inst/V/vmand.mm.yaml index a568bfbd8..57b397add 100644 --- a/spec/std/isa/inst/V/vmand.mm.yaml +++ b/spec/std/isa/inst/V/vmand.mm.yaml @@ -9,7 +9,9 @@ name: vmand.mm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0110011----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmandn.mm.yaml b/spec/std/isa/inst/V/vmandn.mm.yaml index d03a9cf93..8e338e2ec 100644 --- a/spec/std/isa/inst/V/vmandn.mm.yaml +++ b/spec/std/isa/inst/V/vmandn.mm.yaml @@ -9,7 +9,9 @@ name: vmandn.mm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0110001----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmax.vv.yaml b/spec/std/isa/inst/V/vmax.vv.yaml index 7b4cfe5e7..c74e60014 100644 --- a/spec/std/isa/inst/V/vmax.vv.yaml +++ b/spec/std/isa/inst/V/vmax.vv.yaml @@ -9,7 +9,9 @@ name: vmax.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000111-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmax.vx.yaml b/spec/std/isa/inst/V/vmax.vx.yaml index 24d2c4459..62768d4d6 100644 --- a/spec/std/isa/inst/V/vmax.vx.yaml +++ b/spec/std/isa/inst/V/vmax.vx.yaml @@ -9,7 +9,9 @@ name: vmax.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 000111-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmaxu.vv.yaml b/spec/std/isa/inst/V/vmaxu.vv.yaml index fe3999f22..ba52439e8 100644 --- a/spec/std/isa/inst/V/vmaxu.vv.yaml +++ b/spec/std/isa/inst/V/vmaxu.vv.yaml @@ -9,7 +9,9 @@ name: vmaxu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000110-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmaxu.vx.yaml b/spec/std/isa/inst/V/vmaxu.vx.yaml index 0124c3788..f800a36da 100644 --- a/spec/std/isa/inst/V/vmaxu.vx.yaml +++ b/spec/std/isa/inst/V/vmaxu.vx.yaml @@ -9,7 +9,9 @@ name: vmaxu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 000110-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmerge.vim.yaml b/spec/std/isa/inst/V/vmerge.vim.yaml index cc52e2484..886e703b2 100644 --- a/spec/std/isa/inst/V/vmerge.vim.yaml +++ b/spec/std/isa/inst/V/vmerge.vim.yaml @@ -9,7 +9,9 @@ name: vmerge.vim long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, v0 encoding: match: 0101110----------011-----1010111 diff --git a/spec/std/isa/inst/V/vmerge.vvm.yaml b/spec/std/isa/inst/V/vmerge.vvm.yaml index a8ca31a13..c057e8447 100644 --- a/spec/std/isa/inst/V/vmerge.vvm.yaml +++ b/spec/std/isa/inst/V/vmerge.vvm.yaml @@ -9,7 +9,9 @@ name: vmerge.vvm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, v0 encoding: match: 0101110----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmerge.vxm.yaml b/spec/std/isa/inst/V/vmerge.vxm.yaml index 5c7025e25..f97e4d046 100644 --- a/spec/std/isa/inst/V/vmerge.vxm.yaml +++ b/spec/std/isa/inst/V/vmerge.vxm.yaml @@ -9,7 +9,9 @@ name: vmerge.vxm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, v0 encoding: match: 0101110----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmfeq.vf.yaml b/spec/std/isa/inst/V/vmfeq.vf.yaml index 6b5c61c4b..122c964c2 100644 --- a/spec/std/isa/inst/V/vmfeq.vf.yaml +++ b/spec/std/isa/inst/V/vmfeq.vf.yaml @@ -9,7 +9,9 @@ name: vmfeq.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 011000-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vmfeq.vv.yaml b/spec/std/isa/inst/V/vmfeq.vv.yaml index 93456a34c..09001e3c8 100644 --- a/spec/std/isa/inst/V/vmfeq.vv.yaml +++ b/spec/std/isa/inst/V/vmfeq.vv.yaml @@ -9,7 +9,9 @@ name: vmfeq.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 011000-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vmfge.vf.yaml b/spec/std/isa/inst/V/vmfge.vf.yaml index 88c64dcc6..ff24ef498 100644 --- a/spec/std/isa/inst/V/vmfge.vf.yaml +++ b/spec/std/isa/inst/V/vmfge.vf.yaml @@ -9,7 +9,9 @@ name: vmfge.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 011111-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vmfgt.vf.yaml b/spec/std/isa/inst/V/vmfgt.vf.yaml index 1b475bcbb..b3faebc1c 100644 --- a/spec/std/isa/inst/V/vmfgt.vf.yaml +++ b/spec/std/isa/inst/V/vmfgt.vf.yaml @@ -9,7 +9,9 @@ name: vmfgt.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 011101-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vmfle.vf.yaml b/spec/std/isa/inst/V/vmfle.vf.yaml index 869fcc1e0..1cb1fb3b5 100644 --- a/spec/std/isa/inst/V/vmfle.vf.yaml +++ b/spec/std/isa/inst/V/vmfle.vf.yaml @@ -9,7 +9,9 @@ name: vmfle.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 011001-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vmfle.vv.yaml b/spec/std/isa/inst/V/vmfle.vv.yaml index 764befcf9..db6f014e2 100644 --- a/spec/std/isa/inst/V/vmfle.vv.yaml +++ b/spec/std/isa/inst/V/vmfle.vv.yaml @@ -9,7 +9,9 @@ name: vmfle.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 011001-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vmflt.vf.yaml b/spec/std/isa/inst/V/vmflt.vf.yaml index f7c49ab17..8dae5ece1 100644 --- a/spec/std/isa/inst/V/vmflt.vf.yaml +++ b/spec/std/isa/inst/V/vmflt.vf.yaml @@ -9,7 +9,9 @@ name: vmflt.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 011011-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vmflt.vv.yaml b/spec/std/isa/inst/V/vmflt.vv.yaml index 36c0bf623..ebc23a47b 100644 --- a/spec/std/isa/inst/V/vmflt.vv.yaml +++ b/spec/std/isa/inst/V/vmflt.vv.yaml @@ -9,7 +9,9 @@ name: vmflt.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 011011-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vmfne.vf.yaml b/spec/std/isa/inst/V/vmfne.vf.yaml index e1800b52f..e8bdf20f4 100644 --- a/spec/std/isa/inst/V/vmfne.vf.yaml +++ b/spec/std/isa/inst/V/vmfne.vf.yaml @@ -9,7 +9,9 @@ name: vmfne.vf long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, fs1, vm encoding: match: 011100-----------101-----1010111 diff --git a/spec/std/isa/inst/V/vmfne.vv.yaml b/spec/std/isa/inst/V/vmfne.vv.yaml index 0cdd33da8..97a21aed9 100644 --- a/spec/std/isa/inst/V/vmfne.vv.yaml +++ b/spec/std/isa/inst/V/vmfne.vv.yaml @@ -9,7 +9,9 @@ name: vmfne.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 011100-----------001-----1010111 diff --git a/spec/std/isa/inst/V/vmin.vv.yaml b/spec/std/isa/inst/V/vmin.vv.yaml index 6794bfa15..5c5cd7216 100644 --- a/spec/std/isa/inst/V/vmin.vv.yaml +++ b/spec/std/isa/inst/V/vmin.vv.yaml @@ -9,7 +9,9 @@ name: vmin.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000101-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmin.vx.yaml b/spec/std/isa/inst/V/vmin.vx.yaml index 516bdbf1c..12e528bf1 100644 --- a/spec/std/isa/inst/V/vmin.vx.yaml +++ b/spec/std/isa/inst/V/vmin.vx.yaml @@ -9,7 +9,9 @@ name: vmin.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 000101-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vminu.vv.yaml b/spec/std/isa/inst/V/vminu.vv.yaml index b0d702999..d4e0cfae1 100644 --- a/spec/std/isa/inst/V/vminu.vv.yaml +++ b/spec/std/isa/inst/V/vminu.vv.yaml @@ -9,7 +9,9 @@ name: vminu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000100-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vminu.vx.yaml b/spec/std/isa/inst/V/vminu.vx.yaml index c54fbaf51..e4145670e 100644 --- a/spec/std/isa/inst/V/vminu.vx.yaml +++ b/spec/std/isa/inst/V/vminu.vx.yaml @@ -9,7 +9,9 @@ name: vminu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 000100-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmnand.mm.yaml b/spec/std/isa/inst/V/vmnand.mm.yaml index 2b283abf8..6bf7c42c7 100644 --- a/spec/std/isa/inst/V/vmnand.mm.yaml +++ b/spec/std/isa/inst/V/vmnand.mm.yaml @@ -9,7 +9,9 @@ name: vmnand.mm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0111011----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmnor.mm.yaml b/spec/std/isa/inst/V/vmnor.mm.yaml index 2e6168772..83634004f 100644 --- a/spec/std/isa/inst/V/vmnor.mm.yaml +++ b/spec/std/isa/inst/V/vmnor.mm.yaml @@ -9,7 +9,9 @@ name: vmnor.mm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0111101----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmor.mm.yaml b/spec/std/isa/inst/V/vmor.mm.yaml index 8e499827b..c94cd7f83 100644 --- a/spec/std/isa/inst/V/vmor.mm.yaml +++ b/spec/std/isa/inst/V/vmor.mm.yaml @@ -9,7 +9,9 @@ name: vmor.mm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0110101----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmorn.mm.yaml b/spec/std/isa/inst/V/vmorn.mm.yaml index 3e27ba40c..42050aea7 100644 --- a/spec/std/isa/inst/V/vmorn.mm.yaml +++ b/spec/std/isa/inst/V/vmorn.mm.yaml @@ -9,7 +9,9 @@ name: vmorn.mm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0111001----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmsbc.vv.yaml b/spec/std/isa/inst/V/vmsbc.vv.yaml index c329b3c5d..e2c5466b5 100644 --- a/spec/std/isa/inst/V/vmsbc.vv.yaml +++ b/spec/std/isa/inst/V/vmsbc.vv.yaml @@ -9,7 +9,9 @@ name: vmsbc.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0100111----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmsbc.vvm.yaml b/spec/std/isa/inst/V/vmsbc.vvm.yaml index f3fe8d069..ed5c4abac 100644 --- a/spec/std/isa/inst/V/vmsbc.vvm.yaml +++ b/spec/std/isa/inst/V/vmsbc.vvm.yaml @@ -9,7 +9,9 @@ name: vmsbc.vvm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, v0 encoding: match: 0100110----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmsbc.vx.yaml b/spec/std/isa/inst/V/vmsbc.vx.yaml index b8bc0b7a8..e03cec896 100644 --- a/spec/std/isa/inst/V/vmsbc.vx.yaml +++ b/spec/std/isa/inst/V/vmsbc.vx.yaml @@ -9,7 +9,9 @@ name: vmsbc.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1 encoding: match: 0100111----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmsbc.vxm.yaml b/spec/std/isa/inst/V/vmsbc.vxm.yaml index 0055a7650..467ba270b 100644 --- a/spec/std/isa/inst/V/vmsbc.vxm.yaml +++ b/spec/std/isa/inst/V/vmsbc.vxm.yaml @@ -9,7 +9,9 @@ name: vmsbc.vxm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, v0 encoding: match: 0100110----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmsbf.m.yaml b/spec/std/isa/inst/V/vmsbf.m.yaml index a33ecea16..4e2191276 100644 --- a/spec/std/isa/inst/V/vmsbf.m.yaml +++ b/spec/std/isa/inst/V/vmsbf.m.yaml @@ -9,7 +9,9 @@ name: vmsbf.m long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010100------00001010-----1010111 diff --git a/spec/std/isa/inst/V/vmseq.vi.yaml b/spec/std/isa/inst/V/vmseq.vi.yaml index b5e87b5d1..bc6a77dbf 100644 --- a/spec/std/isa/inst/V/vmseq.vi.yaml +++ b/spec/std/isa/inst/V/vmseq.vi.yaml @@ -9,7 +9,9 @@ name: vmseq.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 011000-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vmseq.vv.yaml b/spec/std/isa/inst/V/vmseq.vv.yaml index 60e7f2919..199b36676 100644 --- a/spec/std/isa/inst/V/vmseq.vv.yaml +++ b/spec/std/isa/inst/V/vmseq.vv.yaml @@ -9,7 +9,9 @@ name: vmseq.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 011000-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmseq.vx.yaml b/spec/std/isa/inst/V/vmseq.vx.yaml index bff96cf93..1e9de9742 100644 --- a/spec/std/isa/inst/V/vmseq.vx.yaml +++ b/spec/std/isa/inst/V/vmseq.vx.yaml @@ -9,7 +9,9 @@ name: vmseq.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 011000-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmsgt.vi.yaml b/spec/std/isa/inst/V/vmsgt.vi.yaml index 201245d35..bc9a8a31e 100644 --- a/spec/std/isa/inst/V/vmsgt.vi.yaml +++ b/spec/std/isa/inst/V/vmsgt.vi.yaml @@ -9,7 +9,9 @@ name: vmsgt.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 011111-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vmsgt.vx.yaml b/spec/std/isa/inst/V/vmsgt.vx.yaml index 85be3e2eb..005648518 100644 --- a/spec/std/isa/inst/V/vmsgt.vx.yaml +++ b/spec/std/isa/inst/V/vmsgt.vx.yaml @@ -9,7 +9,9 @@ name: vmsgt.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 011111-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmsgtu.vi.yaml b/spec/std/isa/inst/V/vmsgtu.vi.yaml index bdcddb3c8..fd7c8e949 100644 --- a/spec/std/isa/inst/V/vmsgtu.vi.yaml +++ b/spec/std/isa/inst/V/vmsgtu.vi.yaml @@ -9,7 +9,9 @@ name: vmsgtu.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 011110-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vmsgtu.vx.yaml b/spec/std/isa/inst/V/vmsgtu.vx.yaml index 1c8542e15..238ae044b 100644 --- a/spec/std/isa/inst/V/vmsgtu.vx.yaml +++ b/spec/std/isa/inst/V/vmsgtu.vx.yaml @@ -9,7 +9,9 @@ name: vmsgtu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 011110-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmsif.m.yaml b/spec/std/isa/inst/V/vmsif.m.yaml index 02f8cf487..a122f970a 100644 --- a/spec/std/isa/inst/V/vmsif.m.yaml +++ b/spec/std/isa/inst/V/vmsif.m.yaml @@ -9,7 +9,9 @@ name: vmsif.m long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010100------00011010-----1010111 diff --git a/spec/std/isa/inst/V/vmsle.vi.yaml b/spec/std/isa/inst/V/vmsle.vi.yaml index 6de62232b..7a797d21a 100644 --- a/spec/std/isa/inst/V/vmsle.vi.yaml +++ b/spec/std/isa/inst/V/vmsle.vi.yaml @@ -9,7 +9,9 @@ name: vmsle.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 011101-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vmsle.vv.yaml b/spec/std/isa/inst/V/vmsle.vv.yaml index 9245a201f..ab03adc5a 100644 --- a/spec/std/isa/inst/V/vmsle.vv.yaml +++ b/spec/std/isa/inst/V/vmsle.vv.yaml @@ -9,7 +9,9 @@ name: vmsle.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 011101-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmsle.vx.yaml b/spec/std/isa/inst/V/vmsle.vx.yaml index fb6490e02..fe2f4ccb6 100644 --- a/spec/std/isa/inst/V/vmsle.vx.yaml +++ b/spec/std/isa/inst/V/vmsle.vx.yaml @@ -9,7 +9,9 @@ name: vmsle.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 011101-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmsleu.vi.yaml b/spec/std/isa/inst/V/vmsleu.vi.yaml index c3717adf2..475e7d23c 100644 --- a/spec/std/isa/inst/V/vmsleu.vi.yaml +++ b/spec/std/isa/inst/V/vmsleu.vi.yaml @@ -9,7 +9,9 @@ name: vmsleu.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 011100-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vmsleu.vv.yaml b/spec/std/isa/inst/V/vmsleu.vv.yaml index a366edaf1..ad30a1c9d 100644 --- a/spec/std/isa/inst/V/vmsleu.vv.yaml +++ b/spec/std/isa/inst/V/vmsleu.vv.yaml @@ -9,7 +9,9 @@ name: vmsleu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 011100-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmsleu.vx.yaml b/spec/std/isa/inst/V/vmsleu.vx.yaml index 96ccbb29f..619ae698b 100644 --- a/spec/std/isa/inst/V/vmsleu.vx.yaml +++ b/spec/std/isa/inst/V/vmsleu.vx.yaml @@ -9,7 +9,9 @@ name: vmsleu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 011100-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmslt.vv.yaml b/spec/std/isa/inst/V/vmslt.vv.yaml index b0fc42485..96111c9dc 100644 --- a/spec/std/isa/inst/V/vmslt.vv.yaml +++ b/spec/std/isa/inst/V/vmslt.vv.yaml @@ -9,7 +9,9 @@ name: vmslt.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 011011-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmslt.vx.yaml b/spec/std/isa/inst/V/vmslt.vx.yaml index 1eac8161c..57276a151 100644 --- a/spec/std/isa/inst/V/vmslt.vx.yaml +++ b/spec/std/isa/inst/V/vmslt.vx.yaml @@ -9,7 +9,9 @@ name: vmslt.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 011011-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmsltu.vv.yaml b/spec/std/isa/inst/V/vmsltu.vv.yaml index 53e1c6ae7..bcf14681b 100644 --- a/spec/std/isa/inst/V/vmsltu.vv.yaml +++ b/spec/std/isa/inst/V/vmsltu.vv.yaml @@ -9,7 +9,9 @@ name: vmsltu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 011010-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmsltu.vx.yaml b/spec/std/isa/inst/V/vmsltu.vx.yaml index 510376101..223521d57 100644 --- a/spec/std/isa/inst/V/vmsltu.vx.yaml +++ b/spec/std/isa/inst/V/vmsltu.vx.yaml @@ -9,7 +9,9 @@ name: vmsltu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 011010-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmsne.vi.yaml b/spec/std/isa/inst/V/vmsne.vi.yaml index 2cd678f7f..daf0c3efd 100644 --- a/spec/std/isa/inst/V/vmsne.vi.yaml +++ b/spec/std/isa/inst/V/vmsne.vi.yaml @@ -9,7 +9,9 @@ name: vmsne.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 011001-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vmsne.vv.yaml b/spec/std/isa/inst/V/vmsne.vv.yaml index f256edf97..7d8ea9051 100644 --- a/spec/std/isa/inst/V/vmsne.vv.yaml +++ b/spec/std/isa/inst/V/vmsne.vv.yaml @@ -9,7 +9,9 @@ name: vmsne.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 011001-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vmsne.vx.yaml b/spec/std/isa/inst/V/vmsne.vx.yaml index 66d2a9f12..3ac01df91 100644 --- a/spec/std/isa/inst/V/vmsne.vx.yaml +++ b/spec/std/isa/inst/V/vmsne.vx.yaml @@ -9,7 +9,9 @@ name: vmsne.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 011001-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vmsof.m.yaml b/spec/std/isa/inst/V/vmsof.m.yaml index 64c1a0a6c..33c4e724f 100644 --- a/spec/std/isa/inst/V/vmsof.m.yaml +++ b/spec/std/isa/inst/V/vmsof.m.yaml @@ -9,7 +9,9 @@ name: vmsof.m long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010100------00010010-----1010111 diff --git a/spec/std/isa/inst/V/vmul.vv.yaml b/spec/std/isa/inst/V/vmul.vv.yaml index 9752fd9c2..a302db571 100644 --- a/spec/std/isa/inst/V/vmul.vv.yaml +++ b/spec/std/isa/inst/V/vmul.vv.yaml @@ -9,7 +9,9 @@ name: vmul.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100101-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmul.vx.yaml b/spec/std/isa/inst/V/vmul.vx.yaml index 6293b1ba5..517ce0712 100644 --- a/spec/std/isa/inst/V/vmul.vx.yaml +++ b/spec/std/isa/inst/V/vmul.vx.yaml @@ -9,7 +9,9 @@ name: vmul.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100101-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vmulh.vv.yaml b/spec/std/isa/inst/V/vmulh.vv.yaml index e51fa957e..4acd89169 100644 --- a/spec/std/isa/inst/V/vmulh.vv.yaml +++ b/spec/std/isa/inst/V/vmulh.vv.yaml @@ -9,7 +9,9 @@ name: vmulh.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100111-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmulh.vx.yaml b/spec/std/isa/inst/V/vmulh.vx.yaml index 1135c0591..60d4572c8 100644 --- a/spec/std/isa/inst/V/vmulh.vx.yaml +++ b/spec/std/isa/inst/V/vmulh.vx.yaml @@ -9,7 +9,9 @@ name: vmulh.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100111-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vmulhsu.vv.yaml b/spec/std/isa/inst/V/vmulhsu.vv.yaml index 15f701ac4..a4d480da1 100644 --- a/spec/std/isa/inst/V/vmulhsu.vv.yaml +++ b/spec/std/isa/inst/V/vmulhsu.vv.yaml @@ -9,7 +9,9 @@ name: vmulhsu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100110-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmulhsu.vx.yaml b/spec/std/isa/inst/V/vmulhsu.vx.yaml index 2a725d42b..16bb241d1 100644 --- a/spec/std/isa/inst/V/vmulhsu.vx.yaml +++ b/spec/std/isa/inst/V/vmulhsu.vx.yaml @@ -9,7 +9,9 @@ name: vmulhsu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100110-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vmulhu.vv.yaml b/spec/std/isa/inst/V/vmulhu.vv.yaml index d5d03a1f9..8da5f426d 100644 --- a/spec/std/isa/inst/V/vmulhu.vv.yaml +++ b/spec/std/isa/inst/V/vmulhu.vv.yaml @@ -9,7 +9,9 @@ name: vmulhu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100100-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmulhu.vx.yaml b/spec/std/isa/inst/V/vmulhu.vx.yaml index 7e4282f88..b45f69533 100644 --- a/spec/std/isa/inst/V/vmulhu.vx.yaml +++ b/spec/std/isa/inst/V/vmulhu.vx.yaml @@ -9,7 +9,9 @@ name: vmulhu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100100-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vmv.s.x.yaml b/spec/std/isa/inst/V/vmv.s.x.yaml index 64884994a..d4ee59a1e 100644 --- a/spec/std/isa/inst/V/vmv.s.x.yaml +++ b/spec/std/isa/inst/V/vmv.s.x.yaml @@ -9,7 +9,9 @@ name: vmv.s.x long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, xs1 encoding: match: 010000100000-----110-----1010111 diff --git a/spec/std/isa/inst/V/vmv.v.i.yaml b/spec/std/isa/inst/V/vmv.v.i.yaml index 7e1529b38..51f799f66 100644 --- a/spec/std/isa/inst/V/vmv.v.i.yaml +++ b/spec/std/isa/inst/V/vmv.v.i.yaml @@ -9,7 +9,9 @@ name: vmv.v.i long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, imm encoding: match: 010111100000-----011-----1010111 diff --git a/spec/std/isa/inst/V/vmv.v.v.yaml b/spec/std/isa/inst/V/vmv.v.v.yaml index f69ffb4e8..99cc3c4a6 100644 --- a/spec/std/isa/inst/V/vmv.v.v.yaml +++ b/spec/std/isa/inst/V/vmv.v.v.yaml @@ -9,7 +9,9 @@ name: vmv.v.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1 encoding: match: 010111100000-----000-----1010111 diff --git a/spec/std/isa/inst/V/vmv.v.x.yaml b/spec/std/isa/inst/V/vmv.v.x.yaml index a541d1a0a..1a66e8e0c 100644 --- a/spec/std/isa/inst/V/vmv.v.x.yaml +++ b/spec/std/isa/inst/V/vmv.v.x.yaml @@ -9,7 +9,9 @@ name: vmv.v.x long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, xs1 encoding: match: 010111100000-----100-----1010111 diff --git a/spec/std/isa/inst/V/vmv.x.s.yaml b/spec/std/isa/inst/V/vmv.x.s.yaml index 91c249bfe..23bfc9aac 100644 --- a/spec/std/isa/inst/V/vmv.x.s.yaml +++ b/spec/std/isa/inst/V/vmv.x.s.yaml @@ -9,7 +9,9 @@ name: vmv.x.s long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: xd, vs2 encoding: match: 0100001-----00000010-----1010111 diff --git a/spec/std/isa/inst/V/vmv1r.v.yaml b/spec/std/isa/inst/V/vmv1r.v.yaml index b8f226582..ba2e04ef5 100644 --- a/spec/std/isa/inst/V/vmv1r.v.yaml +++ b/spec/std/isa/inst/V/vmv1r.v.yaml @@ -9,7 +9,9 @@ name: vmv1r.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2 encoding: match: 1001111-----00000011-----1010111 diff --git a/spec/std/isa/inst/V/vmv2r.v.yaml b/spec/std/isa/inst/V/vmv2r.v.yaml index d6c737b26..1f3ad2b9d 100644 --- a/spec/std/isa/inst/V/vmv2r.v.yaml +++ b/spec/std/isa/inst/V/vmv2r.v.yaml @@ -9,7 +9,9 @@ name: vmv2r.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2 encoding: match: 1001111-----00001011-----1010111 diff --git a/spec/std/isa/inst/V/vmv4r.v.yaml b/spec/std/isa/inst/V/vmv4r.v.yaml index f81989a88..01e331685 100644 --- a/spec/std/isa/inst/V/vmv4r.v.yaml +++ b/spec/std/isa/inst/V/vmv4r.v.yaml @@ -9,7 +9,9 @@ name: vmv4r.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2 encoding: match: 1001111-----00011011-----1010111 diff --git a/spec/std/isa/inst/V/vmv8r.v.yaml b/spec/std/isa/inst/V/vmv8r.v.yaml index a6aa8781e..04131f65c 100644 --- a/spec/std/isa/inst/V/vmv8r.v.yaml +++ b/spec/std/isa/inst/V/vmv8r.v.yaml @@ -9,7 +9,9 @@ name: vmv8r.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2 encoding: match: 1001111-----00111011-----1010111 diff --git a/spec/std/isa/inst/V/vmxnor.mm.yaml b/spec/std/isa/inst/V/vmxnor.mm.yaml index ee7411d87..deb865827 100644 --- a/spec/std/isa/inst/V/vmxnor.mm.yaml +++ b/spec/std/isa/inst/V/vmxnor.mm.yaml @@ -9,7 +9,9 @@ name: vmxnor.mm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0111111----------010-----1010111 diff --git a/spec/std/isa/inst/V/vmxor.mm.yaml b/spec/std/isa/inst/V/vmxor.mm.yaml index b5a766809..d2a3ace2e 100644 --- a/spec/std/isa/inst/V/vmxor.mm.yaml +++ b/spec/std/isa/inst/V/vmxor.mm.yaml @@ -9,7 +9,9 @@ name: vmxor.mm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1 encoding: match: 0110111----------010-----1010111 diff --git a/spec/std/isa/inst/V/vnclip.wi.yaml b/spec/std/isa/inst/V/vnclip.wi.yaml index d0e775464..2a95b0917 100644 --- a/spec/std/isa/inst/V/vnclip.wi.yaml +++ b/spec/std/isa/inst/V/vnclip.wi.yaml @@ -9,7 +9,9 @@ name: vnclip.wi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 101111-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vnclip.wv.yaml b/spec/std/isa/inst/V/vnclip.wv.yaml index 4c89e577e..d3ad53d6e 100644 --- a/spec/std/isa/inst/V/vnclip.wv.yaml +++ b/spec/std/isa/inst/V/vnclip.wv.yaml @@ -9,7 +9,9 @@ name: vnclip.wv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 101111-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vnclip.wx.yaml b/spec/std/isa/inst/V/vnclip.wx.yaml index 6361945bb..db64b746c 100644 --- a/spec/std/isa/inst/V/vnclip.wx.yaml +++ b/spec/std/isa/inst/V/vnclip.wx.yaml @@ -9,7 +9,9 @@ name: vnclip.wx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 101111-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vnclipu.wi.yaml b/spec/std/isa/inst/V/vnclipu.wi.yaml index a6e0c84fe..c2616b301 100644 --- a/spec/std/isa/inst/V/vnclipu.wi.yaml +++ b/spec/std/isa/inst/V/vnclipu.wi.yaml @@ -9,7 +9,9 @@ name: vnclipu.wi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 101110-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vnclipu.wv.yaml b/spec/std/isa/inst/V/vnclipu.wv.yaml index 6d96d0839..2d674722e 100644 --- a/spec/std/isa/inst/V/vnclipu.wv.yaml +++ b/spec/std/isa/inst/V/vnclipu.wv.yaml @@ -9,7 +9,9 @@ name: vnclipu.wv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 101110-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vnclipu.wx.yaml b/spec/std/isa/inst/V/vnclipu.wx.yaml index ddbaa45b6..95521674a 100644 --- a/spec/std/isa/inst/V/vnclipu.wx.yaml +++ b/spec/std/isa/inst/V/vnclipu.wx.yaml @@ -9,7 +9,9 @@ name: vnclipu.wx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 101110-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vnmsac.vv.yaml b/spec/std/isa/inst/V/vnmsac.vv.yaml index 26fcbca27..32cab884a 100644 --- a/spec/std/isa/inst/V/vnmsac.vv.yaml +++ b/spec/std/isa/inst/V/vnmsac.vv.yaml @@ -9,7 +9,9 @@ name: vnmsac.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101111-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vnmsac.vx.yaml b/spec/std/isa/inst/V/vnmsac.vx.yaml index 0535aef0a..388c8d8c5 100644 --- a/spec/std/isa/inst/V/vnmsac.vx.yaml +++ b/spec/std/isa/inst/V/vnmsac.vx.yaml @@ -9,7 +9,9 @@ name: vnmsac.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, xs1, vs2, vm encoding: match: 101111-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vnmsub.vv.yaml b/spec/std/isa/inst/V/vnmsub.vv.yaml index d4d9b5973..3d6d446d9 100644 --- a/spec/std/isa/inst/V/vnmsub.vv.yaml +++ b/spec/std/isa/inst/V/vnmsub.vv.yaml @@ -9,7 +9,9 @@ name: vnmsub.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 101011-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vnmsub.vx.yaml b/spec/std/isa/inst/V/vnmsub.vx.yaml index 4c476e392..2a09c2caa 100644 --- a/spec/std/isa/inst/V/vnmsub.vx.yaml +++ b/spec/std/isa/inst/V/vnmsub.vx.yaml @@ -9,7 +9,9 @@ name: vnmsub.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, xs1, vs2, vm encoding: match: 101011-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vnsra.wi.yaml b/spec/std/isa/inst/V/vnsra.wi.yaml index a164056d8..f5ef2e01b 100644 --- a/spec/std/isa/inst/V/vnsra.wi.yaml +++ b/spec/std/isa/inst/V/vnsra.wi.yaml @@ -9,7 +9,9 @@ name: vnsra.wi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 101101-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vnsra.wv.yaml b/spec/std/isa/inst/V/vnsra.wv.yaml index 093ddda46..77ef0a419 100644 --- a/spec/std/isa/inst/V/vnsra.wv.yaml +++ b/spec/std/isa/inst/V/vnsra.wv.yaml @@ -9,7 +9,9 @@ name: vnsra.wv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 101101-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vnsra.wx.yaml b/spec/std/isa/inst/V/vnsra.wx.yaml index cfe77d5dc..0fe44155f 100644 --- a/spec/std/isa/inst/V/vnsra.wx.yaml +++ b/spec/std/isa/inst/V/vnsra.wx.yaml @@ -9,7 +9,9 @@ name: vnsra.wx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 101101-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vnsrl.wi.yaml b/spec/std/isa/inst/V/vnsrl.wi.yaml index ef31edd1c..e5e5ad66d 100644 --- a/spec/std/isa/inst/V/vnsrl.wi.yaml +++ b/spec/std/isa/inst/V/vnsrl.wi.yaml @@ -9,7 +9,9 @@ name: vnsrl.wi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 101100-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vnsrl.wv.yaml b/spec/std/isa/inst/V/vnsrl.wv.yaml index 83f6ff3e2..12d3d2b0a 100644 --- a/spec/std/isa/inst/V/vnsrl.wv.yaml +++ b/spec/std/isa/inst/V/vnsrl.wv.yaml @@ -9,7 +9,9 @@ name: vnsrl.wv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 101100-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vnsrl.wx.yaml b/spec/std/isa/inst/V/vnsrl.wx.yaml index 6f4b42868..421b42503 100644 --- a/spec/std/isa/inst/V/vnsrl.wx.yaml +++ b/spec/std/isa/inst/V/vnsrl.wx.yaml @@ -9,7 +9,9 @@ name: vnsrl.wx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 101100-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vor.vi.yaml b/spec/std/isa/inst/V/vor.vi.yaml index e7322df33..65f1b0946 100644 --- a/spec/std/isa/inst/V/vor.vi.yaml +++ b/spec/std/isa/inst/V/vor.vi.yaml @@ -9,7 +9,9 @@ name: vor.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 001010-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vor.vv.yaml b/spec/std/isa/inst/V/vor.vv.yaml index 6f55fc7f9..73dfb60ee 100644 --- a/spec/std/isa/inst/V/vor.vv.yaml +++ b/spec/std/isa/inst/V/vor.vv.yaml @@ -9,7 +9,9 @@ name: vor.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001010-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vor.vx.yaml b/spec/std/isa/inst/V/vor.vx.yaml index 29b357bc3..254334fa4 100644 --- a/spec/std/isa/inst/V/vor.vx.yaml +++ b/spec/std/isa/inst/V/vor.vx.yaml @@ -9,7 +9,9 @@ name: vor.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001010-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vredand.vs.yaml b/spec/std/isa/inst/V/vredand.vs.yaml index bbd2a7b0e..2e073109b 100644 --- a/spec/std/isa/inst/V/vredand.vs.yaml +++ b/spec/std/isa/inst/V/vredand.vs.yaml @@ -9,7 +9,9 @@ name: vredand.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000001-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vredmax.vs.yaml b/spec/std/isa/inst/V/vredmax.vs.yaml index ce5a612ec..d62b4943d 100644 --- a/spec/std/isa/inst/V/vredmax.vs.yaml +++ b/spec/std/isa/inst/V/vredmax.vs.yaml @@ -9,7 +9,9 @@ name: vredmax.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000111-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vredmaxu.vs.yaml b/spec/std/isa/inst/V/vredmaxu.vs.yaml index 3153d25de..7af4e2aa6 100644 --- a/spec/std/isa/inst/V/vredmaxu.vs.yaml +++ b/spec/std/isa/inst/V/vredmaxu.vs.yaml @@ -9,7 +9,9 @@ name: vredmaxu.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000110-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vredmin.vs.yaml b/spec/std/isa/inst/V/vredmin.vs.yaml index 5559402c2..2e7c3e3d1 100644 --- a/spec/std/isa/inst/V/vredmin.vs.yaml +++ b/spec/std/isa/inst/V/vredmin.vs.yaml @@ -9,7 +9,9 @@ name: vredmin.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000101-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vredminu.vs.yaml b/spec/std/isa/inst/V/vredminu.vs.yaml index 248ad886f..e037ab34e 100644 --- a/spec/std/isa/inst/V/vredminu.vs.yaml +++ b/spec/std/isa/inst/V/vredminu.vs.yaml @@ -9,7 +9,9 @@ name: vredminu.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000100-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vredor.vs.yaml b/spec/std/isa/inst/V/vredor.vs.yaml index 72eff8059..22b12c14a 100644 --- a/spec/std/isa/inst/V/vredor.vs.yaml +++ b/spec/std/isa/inst/V/vredor.vs.yaml @@ -9,7 +9,9 @@ name: vredor.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000010-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vredsum.vs.yaml b/spec/std/isa/inst/V/vredsum.vs.yaml index d66db793e..a69d263f0 100644 --- a/spec/std/isa/inst/V/vredsum.vs.yaml +++ b/spec/std/isa/inst/V/vredsum.vs.yaml @@ -9,7 +9,9 @@ name: vredsum.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000000-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vredxor.vs.yaml b/spec/std/isa/inst/V/vredxor.vs.yaml index 40d7b008e..c96d30e39 100644 --- a/spec/std/isa/inst/V/vredxor.vs.yaml +++ b/spec/std/isa/inst/V/vredxor.vs.yaml @@ -9,7 +9,9 @@ name: vredxor.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000011-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vrem.vv.yaml b/spec/std/isa/inst/V/vrem.vv.yaml index f660fa8a3..cdab37157 100644 --- a/spec/std/isa/inst/V/vrem.vv.yaml +++ b/spec/std/isa/inst/V/vrem.vv.yaml @@ -9,7 +9,9 @@ name: vrem.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100011-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vrem.vx.yaml b/spec/std/isa/inst/V/vrem.vx.yaml index 4c64c830c..24f77098d 100644 --- a/spec/std/isa/inst/V/vrem.vx.yaml +++ b/spec/std/isa/inst/V/vrem.vx.yaml @@ -9,7 +9,9 @@ name: vrem.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100011-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vremu.vv.yaml b/spec/std/isa/inst/V/vremu.vv.yaml index 0a5b54e9d..66f2104c1 100644 --- a/spec/std/isa/inst/V/vremu.vv.yaml +++ b/spec/std/isa/inst/V/vremu.vv.yaml @@ -9,7 +9,9 @@ name: vremu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100010-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vremu.vx.yaml b/spec/std/isa/inst/V/vremu.vx.yaml index 0ca4295a5..2ac68cc95 100644 --- a/spec/std/isa/inst/V/vremu.vx.yaml +++ b/spec/std/isa/inst/V/vremu.vx.yaml @@ -9,7 +9,9 @@ name: vremu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100010-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vrgather.vi.yaml b/spec/std/isa/inst/V/vrgather.vi.yaml index 9d91f5d42..fcee2685a 100644 --- a/spec/std/isa/inst/V/vrgather.vi.yaml +++ b/spec/std/isa/inst/V/vrgather.vi.yaml @@ -9,7 +9,9 @@ name: vrgather.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 001100-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vrgather.vv.yaml b/spec/std/isa/inst/V/vrgather.vv.yaml index fb9a885c4..b3aba6c1a 100644 --- a/spec/std/isa/inst/V/vrgather.vv.yaml +++ b/spec/std/isa/inst/V/vrgather.vv.yaml @@ -9,7 +9,9 @@ name: vrgather.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001100-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vrgather.vx.yaml b/spec/std/isa/inst/V/vrgather.vx.yaml index d05a7e5ef..85c7c8897 100644 --- a/spec/std/isa/inst/V/vrgather.vx.yaml +++ b/spec/std/isa/inst/V/vrgather.vx.yaml @@ -9,7 +9,9 @@ name: vrgather.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001100-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vrgatherei16.vv.yaml b/spec/std/isa/inst/V/vrgatherei16.vv.yaml index f511755bc..cf1604ad7 100644 --- a/spec/std/isa/inst/V/vrgatherei16.vv.yaml +++ b/spec/std/isa/inst/V/vrgatherei16.vv.yaml @@ -9,7 +9,9 @@ name: vrgatherei16.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001110-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vrsub.vi.yaml b/spec/std/isa/inst/V/vrsub.vi.yaml index ac698d350..9bf9e32d0 100644 --- a/spec/std/isa/inst/V/vrsub.vi.yaml +++ b/spec/std/isa/inst/V/vrsub.vi.yaml @@ -9,7 +9,9 @@ name: vrsub.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 000011-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vrsub.vx.yaml b/spec/std/isa/inst/V/vrsub.vx.yaml index def7671d5..a881436a5 100644 --- a/spec/std/isa/inst/V/vrsub.vx.yaml +++ b/spec/std/isa/inst/V/vrsub.vx.yaml @@ -9,7 +9,9 @@ name: vrsub.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 000011-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vs1r.v.yaml b/spec/std/isa/inst/V/vs1r.v.yaml index 6a90ff6cd..eb3907652 100644 --- a/spec/std/isa/inst/V/vs1r.v.yaml +++ b/spec/std/isa/inst/V/vs1r.v.yaml @@ -9,7 +9,9 @@ name: vs1r.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, xs1 encoding: match: 000000101000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vs2r.v.yaml b/spec/std/isa/inst/V/vs2r.v.yaml index 381005d16..ce81ec92c 100644 --- a/spec/std/isa/inst/V/vs2r.v.yaml +++ b/spec/std/isa/inst/V/vs2r.v.yaml @@ -9,7 +9,9 @@ name: vs2r.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, xs1 encoding: match: 001000101000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vs4r.v.yaml b/spec/std/isa/inst/V/vs4r.v.yaml index 7674e57df..3ae5396f5 100644 --- a/spec/std/isa/inst/V/vs4r.v.yaml +++ b/spec/std/isa/inst/V/vs4r.v.yaml @@ -9,7 +9,9 @@ name: vs4r.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, xs1 encoding: match: 011000101000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vs8r.v.yaml b/spec/std/isa/inst/V/vs8r.v.yaml index f990e0b4f..8d5c0df73 100644 --- a/spec/std/isa/inst/V/vs8r.v.yaml +++ b/spec/std/isa/inst/V/vs8r.v.yaml @@ -9,7 +9,9 @@ name: vs8r.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, xs1 encoding: match: 111000101000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vsadd.vi.yaml b/spec/std/isa/inst/V/vsadd.vi.yaml index 756714cae..e8a65bdf5 100644 --- a/spec/std/isa/inst/V/vsadd.vi.yaml +++ b/spec/std/isa/inst/V/vsadd.vi.yaml @@ -9,7 +9,9 @@ name: vsadd.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 100001-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vsadd.vv.yaml b/spec/std/isa/inst/V/vsadd.vv.yaml index 12e12b442..fce943cdf 100644 --- a/spec/std/isa/inst/V/vsadd.vv.yaml +++ b/spec/std/isa/inst/V/vsadd.vv.yaml @@ -9,7 +9,9 @@ name: vsadd.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100001-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vsadd.vx.yaml b/spec/std/isa/inst/V/vsadd.vx.yaml index 7351522d2..2d7789264 100644 --- a/spec/std/isa/inst/V/vsadd.vx.yaml +++ b/spec/std/isa/inst/V/vsadd.vx.yaml @@ -9,7 +9,9 @@ name: vsadd.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100001-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vsaddu.vi.yaml b/spec/std/isa/inst/V/vsaddu.vi.yaml index 8233ca7c1..d9fd7e020 100644 --- a/spec/std/isa/inst/V/vsaddu.vi.yaml +++ b/spec/std/isa/inst/V/vsaddu.vi.yaml @@ -9,7 +9,9 @@ name: vsaddu.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 100000-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vsaddu.vv.yaml b/spec/std/isa/inst/V/vsaddu.vv.yaml index 4014bc89c..7412c3909 100644 --- a/spec/std/isa/inst/V/vsaddu.vv.yaml +++ b/spec/std/isa/inst/V/vsaddu.vv.yaml @@ -9,7 +9,9 @@ name: vsaddu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100000-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vsaddu.vx.yaml b/spec/std/isa/inst/V/vsaddu.vx.yaml index 39a1b659c..79bfac15a 100644 --- a/spec/std/isa/inst/V/vsaddu.vx.yaml +++ b/spec/std/isa/inst/V/vsaddu.vx.yaml @@ -9,7 +9,9 @@ name: vsaddu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100000-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vsbc.vvm.yaml b/spec/std/isa/inst/V/vsbc.vvm.yaml index b1a4f8e93..f68fd5816 100644 --- a/spec/std/isa/inst/V/vsbc.vvm.yaml +++ b/spec/std/isa/inst/V/vsbc.vvm.yaml @@ -9,7 +9,9 @@ name: vsbc.vvm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, v0 encoding: match: 0100100----------000-----1010111 diff --git a/spec/std/isa/inst/V/vsbc.vxm.yaml b/spec/std/isa/inst/V/vsbc.vxm.yaml index 2dd6b1d52..4c1d5abf5 100644 --- a/spec/std/isa/inst/V/vsbc.vxm.yaml +++ b/spec/std/isa/inst/V/vsbc.vxm.yaml @@ -9,7 +9,9 @@ name: vsbc.vxm long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, v0 encoding: match: 0100100----------100-----1010111 diff --git a/spec/std/isa/inst/V/vse16.v.yaml b/spec/std/isa/inst/V/vse16.v.yaml index 82e0ebd8d..7934810ed 100644 --- a/spec/std/isa/inst/V/vse16.v.yaml +++ b/spec/std/isa/inst/V/vse16.v.yaml @@ -9,7 +9,9 @@ name: vse16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 000000-00000-----101-----0100111 diff --git a/spec/std/isa/inst/V/vse32.v.yaml b/spec/std/isa/inst/V/vse32.v.yaml index e7c4a70b2..0eaf2636e 100644 --- a/spec/std/isa/inst/V/vse32.v.yaml +++ b/spec/std/isa/inst/V/vse32.v.yaml @@ -9,7 +9,9 @@ name: vse32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 000000-00000-----110-----0100111 diff --git a/spec/std/isa/inst/V/vse64.v.yaml b/spec/std/isa/inst/V/vse64.v.yaml index 7ab5295ff..888f5c2ae 100644 --- a/spec/std/isa/inst/V/vse64.v.yaml +++ b/spec/std/isa/inst/V/vse64.v.yaml @@ -9,7 +9,9 @@ name: vse64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 000000-00000-----111-----0100111 diff --git a/spec/std/isa/inst/V/vse8.v.yaml b/spec/std/isa/inst/V/vse8.v.yaml index 8af671b7e..e3d77fc5d 100644 --- a/spec/std/isa/inst/V/vse8.v.yaml +++ b/spec/std/isa/inst/V/vse8.v.yaml @@ -9,7 +9,9 @@ name: vse8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 000000-00000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vsetivli.yaml b/spec/std/isa/inst/V/vsetivli.yaml index abba15668..6bd744ee4 100644 --- a/spec/std/isa/inst/V/vsetivli.yaml +++ b/spec/std/isa/inst/V/vsetivli.yaml @@ -9,7 +9,9 @@ name: vsetivli long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: xd, uimm, vtypei encoding: match: 11---------------111-----1010111 diff --git a/spec/std/isa/inst/V/vsetvl.yaml b/spec/std/isa/inst/V/vsetvl.yaml index 81b49a6f4..c153b0f80 100644 --- a/spec/std/isa/inst/V/vsetvl.yaml +++ b/spec/std/isa/inst/V/vsetvl.yaml @@ -9,7 +9,9 @@ name: vsetvl long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: xd, xs1, xs2 encoding: match: 1000000----------111-----1010111 diff --git a/spec/std/isa/inst/V/vsetvli.yaml b/spec/std/isa/inst/V/vsetvli.yaml index 51358a26b..ded776426 100644 --- a/spec/std/isa/inst/V/vsetvli.yaml +++ b/spec/std/isa/inst/V/vsetvli.yaml @@ -9,7 +9,9 @@ name: vsetvli long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: xd, xs1, vtypei encoding: match: 0----------------111-----1010111 diff --git a/spec/std/isa/inst/V/vsext.vf2.yaml b/spec/std/isa/inst/V/vsext.vf2.yaml index de436257e..be143b5b9 100644 --- a/spec/std/isa/inst/V/vsext.vf2.yaml +++ b/spec/std/isa/inst/V/vsext.vf2.yaml @@ -9,7 +9,9 @@ name: vsext.vf2 long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00111010-----1010111 diff --git a/spec/std/isa/inst/V/vsext.vf4.yaml b/spec/std/isa/inst/V/vsext.vf4.yaml index 09c20601c..41447245f 100644 --- a/spec/std/isa/inst/V/vsext.vf4.yaml +++ b/spec/std/isa/inst/V/vsext.vf4.yaml @@ -9,7 +9,9 @@ name: vsext.vf4 long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00101010-----1010111 diff --git a/spec/std/isa/inst/V/vsext.vf8.yaml b/spec/std/isa/inst/V/vsext.vf8.yaml index 755543d10..079e791d8 100644 --- a/spec/std/isa/inst/V/vsext.vf8.yaml +++ b/spec/std/isa/inst/V/vsext.vf8.yaml @@ -9,7 +9,9 @@ name: vsext.vf8 long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00011010-----1010111 diff --git a/spec/std/isa/inst/V/vslide1down.vx.yaml b/spec/std/isa/inst/V/vslide1down.vx.yaml index edea9aa4f..7d026ce2b 100644 --- a/spec/std/isa/inst/V/vslide1down.vx.yaml +++ b/spec/std/isa/inst/V/vslide1down.vx.yaml @@ -9,7 +9,9 @@ name: vslide1down.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001111-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vslide1up.vx.yaml b/spec/std/isa/inst/V/vslide1up.vx.yaml index 13393d452..dd650ec14 100644 --- a/spec/std/isa/inst/V/vslide1up.vx.yaml +++ b/spec/std/isa/inst/V/vslide1up.vx.yaml @@ -9,7 +9,9 @@ name: vslide1up.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001110-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vslidedown.vi.yaml b/spec/std/isa/inst/V/vslidedown.vi.yaml index 167b01c22..46535feab 100644 --- a/spec/std/isa/inst/V/vslidedown.vi.yaml +++ b/spec/std/isa/inst/V/vslidedown.vi.yaml @@ -9,7 +9,9 @@ name: vslidedown.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 001111-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vslidedown.vx.yaml b/spec/std/isa/inst/V/vslidedown.vx.yaml index 0f41cdcb8..f69025a3d 100644 --- a/spec/std/isa/inst/V/vslidedown.vx.yaml +++ b/spec/std/isa/inst/V/vslidedown.vx.yaml @@ -9,7 +9,9 @@ name: vslidedown.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001111-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vslideup.vi.yaml b/spec/std/isa/inst/V/vslideup.vi.yaml index 7e959fda9..8dafdb42c 100644 --- a/spec/std/isa/inst/V/vslideup.vi.yaml +++ b/spec/std/isa/inst/V/vslideup.vi.yaml @@ -9,7 +9,9 @@ name: vslideup.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 001110-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vslideup.vx.yaml b/spec/std/isa/inst/V/vslideup.vx.yaml index 52d068bfe..67e4c57be 100644 --- a/spec/std/isa/inst/V/vslideup.vx.yaml +++ b/spec/std/isa/inst/V/vslideup.vx.yaml @@ -9,7 +9,9 @@ name: vslideup.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001110-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vsll.vi.yaml b/spec/std/isa/inst/V/vsll.vi.yaml index 0bdc557d4..cca96cab6 100644 --- a/spec/std/isa/inst/V/vsll.vi.yaml +++ b/spec/std/isa/inst/V/vsll.vi.yaml @@ -9,7 +9,9 @@ name: vsll.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 100101-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vsll.vv.yaml b/spec/std/isa/inst/V/vsll.vv.yaml index 1c5f005d8..f738d234b 100644 --- a/spec/std/isa/inst/V/vsll.vv.yaml +++ b/spec/std/isa/inst/V/vsll.vv.yaml @@ -9,7 +9,9 @@ name: vsll.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100101-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vsll.vx.yaml b/spec/std/isa/inst/V/vsll.vx.yaml index aa35d19ec..73634bb70 100644 --- a/spec/std/isa/inst/V/vsll.vx.yaml +++ b/spec/std/isa/inst/V/vsll.vx.yaml @@ -9,7 +9,9 @@ name: vsll.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100101-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vsm.v.yaml b/spec/std/isa/inst/V/vsm.v.yaml index 0c22bd439..377833f10 100644 --- a/spec/std/isa/inst/V/vsm.v.yaml +++ b/spec/std/isa/inst/V/vsm.v.yaml @@ -9,7 +9,9 @@ name: vsm.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1) encoding: match: 000000101011-----000-----0100111 diff --git a/spec/std/isa/inst/V/vsmul.vv.yaml b/spec/std/isa/inst/V/vsmul.vv.yaml index ad781091c..cc0c26917 100644 --- a/spec/std/isa/inst/V/vsmul.vv.yaml +++ b/spec/std/isa/inst/V/vsmul.vv.yaml @@ -9,7 +9,9 @@ name: vsmul.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100111-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vsmul.vx.yaml b/spec/std/isa/inst/V/vsmul.vx.yaml index a075194b0..58fa0524b 100644 --- a/spec/std/isa/inst/V/vsmul.vx.yaml +++ b/spec/std/isa/inst/V/vsmul.vx.yaml @@ -9,7 +9,9 @@ name: vsmul.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100111-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vsoxei16.v.yaml b/spec/std/isa/inst/V/vsoxei16.v.yaml index ec482cffd..13a360bbe 100644 --- a/spec/std/isa/inst/V/vsoxei16.v.yaml +++ b/spec/std/isa/inst/V/vsoxei16.v.yaml @@ -9,7 +9,9 @@ name: vsoxei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 000011-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsoxei32.v.yaml b/spec/std/isa/inst/V/vsoxei32.v.yaml index 97e257985..0dbcf62a3 100644 --- a/spec/std/isa/inst/V/vsoxei32.v.yaml +++ b/spec/std/isa/inst/V/vsoxei32.v.yaml @@ -9,7 +9,9 @@ name: vsoxei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 000011-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsoxei64.v.yaml b/spec/std/isa/inst/V/vsoxei64.v.yaml index 318ec9473..3725e8798 100644 --- a/spec/std/isa/inst/V/vsoxei64.v.yaml +++ b/spec/std/isa/inst/V/vsoxei64.v.yaml @@ -9,7 +9,9 @@ name: vsoxei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 000011-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsoxei8.v.yaml b/spec/std/isa/inst/V/vsoxei8.v.yaml index 1c64ae323..d3d7a8463 100644 --- a/spec/std/isa/inst/V/vsoxei8.v.yaml +++ b/spec/std/isa/inst/V/vsoxei8.v.yaml @@ -9,7 +9,9 @@ name: vsoxei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 000011-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg2ei16.v.yaml b/spec/std/isa/inst/V/vsoxseg2ei16.v.yaml index 420bc9ded..b15e97d5d 100644 --- a/spec/std/isa/inst/V/vsoxseg2ei16.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg2ei16.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg2ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 001011-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg2ei32.v.yaml b/spec/std/isa/inst/V/vsoxseg2ei32.v.yaml index a2988c91b..cafa479de 100644 --- a/spec/std/isa/inst/V/vsoxseg2ei32.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg2ei32.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg2ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 001011-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg2ei64.v.yaml b/spec/std/isa/inst/V/vsoxseg2ei64.v.yaml index 5296849ab..0f7b9c993 100644 --- a/spec/std/isa/inst/V/vsoxseg2ei64.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg2ei64.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg2ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 001011-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg2ei8.v.yaml b/spec/std/isa/inst/V/vsoxseg2ei8.v.yaml index 4126ba85b..62e0e4de3 100644 --- a/spec/std/isa/inst/V/vsoxseg2ei8.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg2ei8.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg2ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 001011-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg3ei16.v.yaml b/spec/std/isa/inst/V/vsoxseg3ei16.v.yaml index c58040044..b37bc4aaa 100644 --- a/spec/std/isa/inst/V/vsoxseg3ei16.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg3ei16.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg3ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 010011-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg3ei32.v.yaml b/spec/std/isa/inst/V/vsoxseg3ei32.v.yaml index 7e0351e86..94497d2df 100644 --- a/spec/std/isa/inst/V/vsoxseg3ei32.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg3ei32.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg3ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 010011-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg3ei64.v.yaml b/spec/std/isa/inst/V/vsoxseg3ei64.v.yaml index aa9b2f132..5e2e1f772 100644 --- a/spec/std/isa/inst/V/vsoxseg3ei64.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg3ei64.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg3ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 010011-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg3ei8.v.yaml b/spec/std/isa/inst/V/vsoxseg3ei8.v.yaml index 5d00c9848..aa6a55892 100644 --- a/spec/std/isa/inst/V/vsoxseg3ei8.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg3ei8.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg3ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 010011-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg4ei16.v.yaml b/spec/std/isa/inst/V/vsoxseg4ei16.v.yaml index 9291e52c7..4277a65b8 100644 --- a/spec/std/isa/inst/V/vsoxseg4ei16.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg4ei16.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg4ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 011011-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg4ei32.v.yaml b/spec/std/isa/inst/V/vsoxseg4ei32.v.yaml index 1d8cb3df5..27efc7d0c 100644 --- a/spec/std/isa/inst/V/vsoxseg4ei32.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg4ei32.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg4ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 011011-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg4ei64.v.yaml b/spec/std/isa/inst/V/vsoxseg4ei64.v.yaml index cb0fa0c3a..d4fe987b3 100644 --- a/spec/std/isa/inst/V/vsoxseg4ei64.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg4ei64.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg4ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 011011-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg4ei8.v.yaml b/spec/std/isa/inst/V/vsoxseg4ei8.v.yaml index 0acdd383a..d25003713 100644 --- a/spec/std/isa/inst/V/vsoxseg4ei8.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg4ei8.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg4ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 011011-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg5ei16.v.yaml b/spec/std/isa/inst/V/vsoxseg5ei16.v.yaml index f4cdafcf1..dc56cb320 100644 --- a/spec/std/isa/inst/V/vsoxseg5ei16.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg5ei16.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg5ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 100011-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg5ei32.v.yaml b/spec/std/isa/inst/V/vsoxseg5ei32.v.yaml index b4607b954..20945e669 100644 --- a/spec/std/isa/inst/V/vsoxseg5ei32.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg5ei32.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg5ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 100011-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg5ei64.v.yaml b/spec/std/isa/inst/V/vsoxseg5ei64.v.yaml index 9d0f20fa0..03a7da9f0 100644 --- a/spec/std/isa/inst/V/vsoxseg5ei64.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg5ei64.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg5ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 100011-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg5ei8.v.yaml b/spec/std/isa/inst/V/vsoxseg5ei8.v.yaml index de3b5c56c..b062edfe4 100644 --- a/spec/std/isa/inst/V/vsoxseg5ei8.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg5ei8.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg5ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 100011-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg6ei16.v.yaml b/spec/std/isa/inst/V/vsoxseg6ei16.v.yaml index 11a69cd11..592d6e031 100644 --- a/spec/std/isa/inst/V/vsoxseg6ei16.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg6ei16.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg6ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 101011-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg6ei32.v.yaml b/spec/std/isa/inst/V/vsoxseg6ei32.v.yaml index f9c2db1a3..b5e1827cd 100644 --- a/spec/std/isa/inst/V/vsoxseg6ei32.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg6ei32.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg6ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 101011-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg6ei64.v.yaml b/spec/std/isa/inst/V/vsoxseg6ei64.v.yaml index 733687d5e..75cce93ca 100644 --- a/spec/std/isa/inst/V/vsoxseg6ei64.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg6ei64.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg6ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 101011-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg6ei8.v.yaml b/spec/std/isa/inst/V/vsoxseg6ei8.v.yaml index 2b3fd9e10..2713ac242 100644 --- a/spec/std/isa/inst/V/vsoxseg6ei8.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg6ei8.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg6ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 101011-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg7ei16.v.yaml b/spec/std/isa/inst/V/vsoxseg7ei16.v.yaml index 384c445e4..99fb4aa37 100644 --- a/spec/std/isa/inst/V/vsoxseg7ei16.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg7ei16.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg7ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 110011-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg7ei32.v.yaml b/spec/std/isa/inst/V/vsoxseg7ei32.v.yaml index 9d1aafb25..b68b2490d 100644 --- a/spec/std/isa/inst/V/vsoxseg7ei32.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg7ei32.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg7ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 110011-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg7ei64.v.yaml b/spec/std/isa/inst/V/vsoxseg7ei64.v.yaml index e13d8360b..761ed9634 100644 --- a/spec/std/isa/inst/V/vsoxseg7ei64.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg7ei64.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg7ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 110011-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg7ei8.v.yaml b/spec/std/isa/inst/V/vsoxseg7ei8.v.yaml index c18a167e5..9a28aec5b 100644 --- a/spec/std/isa/inst/V/vsoxseg7ei8.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg7ei8.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg7ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 110011-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg8ei16.v.yaml b/spec/std/isa/inst/V/vsoxseg8ei16.v.yaml index 68cb771b0..11d7632cf 100644 --- a/spec/std/isa/inst/V/vsoxseg8ei16.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg8ei16.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg8ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 111011-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg8ei32.v.yaml b/spec/std/isa/inst/V/vsoxseg8ei32.v.yaml index ecdfa4ae0..a46e33fa1 100644 --- a/spec/std/isa/inst/V/vsoxseg8ei32.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg8ei32.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg8ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 111011-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg8ei64.v.yaml b/spec/std/isa/inst/V/vsoxseg8ei64.v.yaml index 669927368..a67e235c1 100644 --- a/spec/std/isa/inst/V/vsoxseg8ei64.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg8ei64.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg8ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 111011-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsoxseg8ei8.v.yaml b/spec/std/isa/inst/V/vsoxseg8ei8.v.yaml index 8f8c83272..0474b8a82 100644 --- a/spec/std/isa/inst/V/vsoxseg8ei8.v.yaml +++ b/spec/std/isa/inst/V/vsoxseg8ei8.v.yaml @@ -9,7 +9,9 @@ name: vsoxseg8ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 111011-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsra.vi.yaml b/spec/std/isa/inst/V/vsra.vi.yaml index 830c9e725..616eef4e0 100644 --- a/spec/std/isa/inst/V/vsra.vi.yaml +++ b/spec/std/isa/inst/V/vsra.vi.yaml @@ -9,7 +9,9 @@ name: vsra.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 101001-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vsra.vv.yaml b/spec/std/isa/inst/V/vsra.vv.yaml index 259e11d2c..ffded09ae 100644 --- a/spec/std/isa/inst/V/vsra.vv.yaml +++ b/spec/std/isa/inst/V/vsra.vv.yaml @@ -9,7 +9,9 @@ name: vsra.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 101001-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vsra.vx.yaml b/spec/std/isa/inst/V/vsra.vx.yaml index 15f94a673..6b71f1445 100644 --- a/spec/std/isa/inst/V/vsra.vx.yaml +++ b/spec/std/isa/inst/V/vsra.vx.yaml @@ -9,7 +9,9 @@ name: vsra.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 101001-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vsrl.vi.yaml b/spec/std/isa/inst/V/vsrl.vi.yaml index d5873d48a..3022a52b8 100644 --- a/spec/std/isa/inst/V/vsrl.vi.yaml +++ b/spec/std/isa/inst/V/vsrl.vi.yaml @@ -9,7 +9,9 @@ name: vsrl.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 101000-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vsrl.vv.yaml b/spec/std/isa/inst/V/vsrl.vv.yaml index b00dd0ff8..2cda65546 100644 --- a/spec/std/isa/inst/V/vsrl.vv.yaml +++ b/spec/std/isa/inst/V/vsrl.vv.yaml @@ -9,7 +9,9 @@ name: vsrl.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 101000-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vsrl.vx.yaml b/spec/std/isa/inst/V/vsrl.vx.yaml index 682748162..5336f6660 100644 --- a/spec/std/isa/inst/V/vsrl.vx.yaml +++ b/spec/std/isa/inst/V/vsrl.vx.yaml @@ -9,7 +9,9 @@ name: vsrl.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 101000-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vsse16.v.yaml b/spec/std/isa/inst/V/vsse16.v.yaml index 3c2f20683..cdc8da229 100644 --- a/spec/std/isa/inst/V/vsse16.v.yaml +++ b/spec/std/isa/inst/V/vsse16.v.yaml @@ -9,7 +9,9 @@ name: vsse16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 000010-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsse32.v.yaml b/spec/std/isa/inst/V/vsse32.v.yaml index 78ce835d4..4a905e9dd 100644 --- a/spec/std/isa/inst/V/vsse32.v.yaml +++ b/spec/std/isa/inst/V/vsse32.v.yaml @@ -9,7 +9,9 @@ name: vsse32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 000010-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsse64.v.yaml b/spec/std/isa/inst/V/vsse64.v.yaml index 150ebaeed..4451ba689 100644 --- a/spec/std/isa/inst/V/vsse64.v.yaml +++ b/spec/std/isa/inst/V/vsse64.v.yaml @@ -9,7 +9,9 @@ name: vsse64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 000010-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsse8.v.yaml b/spec/std/isa/inst/V/vsse8.v.yaml index 21c467130..4651c43fc 100644 --- a/spec/std/isa/inst/V/vsse8.v.yaml +++ b/spec/std/isa/inst/V/vsse8.v.yaml @@ -9,7 +9,9 @@ name: vsse8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 000010-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsseg2e16.v.yaml b/spec/std/isa/inst/V/vsseg2e16.v.yaml index 01a555379..c68b3569f 100644 --- a/spec/std/isa/inst/V/vsseg2e16.v.yaml +++ b/spec/std/isa/inst/V/vsseg2e16.v.yaml @@ -9,7 +9,9 @@ name: vsseg2e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 001000-00000-----101-----0100111 diff --git a/spec/std/isa/inst/V/vsseg2e32.v.yaml b/spec/std/isa/inst/V/vsseg2e32.v.yaml index e0ba25cab..96d76fdee 100644 --- a/spec/std/isa/inst/V/vsseg2e32.v.yaml +++ b/spec/std/isa/inst/V/vsseg2e32.v.yaml @@ -9,7 +9,9 @@ name: vsseg2e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 001000-00000-----110-----0100111 diff --git a/spec/std/isa/inst/V/vsseg2e64.v.yaml b/spec/std/isa/inst/V/vsseg2e64.v.yaml index 91052d615..21d998dbe 100644 --- a/spec/std/isa/inst/V/vsseg2e64.v.yaml +++ b/spec/std/isa/inst/V/vsseg2e64.v.yaml @@ -9,7 +9,9 @@ name: vsseg2e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 001000-00000-----111-----0100111 diff --git a/spec/std/isa/inst/V/vsseg2e8.v.yaml b/spec/std/isa/inst/V/vsseg2e8.v.yaml index 9cd01616d..1c8a525e0 100644 --- a/spec/std/isa/inst/V/vsseg2e8.v.yaml +++ b/spec/std/isa/inst/V/vsseg2e8.v.yaml @@ -9,7 +9,9 @@ name: vsseg2e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 001000-00000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vsseg3e16.v.yaml b/spec/std/isa/inst/V/vsseg3e16.v.yaml index 9499e853f..2f3efe6cd 100644 --- a/spec/std/isa/inst/V/vsseg3e16.v.yaml +++ b/spec/std/isa/inst/V/vsseg3e16.v.yaml @@ -9,7 +9,9 @@ name: vsseg3e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 010000-00000-----101-----0100111 diff --git a/spec/std/isa/inst/V/vsseg3e32.v.yaml b/spec/std/isa/inst/V/vsseg3e32.v.yaml index 0d39afd81..6e935f043 100644 --- a/spec/std/isa/inst/V/vsseg3e32.v.yaml +++ b/spec/std/isa/inst/V/vsseg3e32.v.yaml @@ -9,7 +9,9 @@ name: vsseg3e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 010000-00000-----110-----0100111 diff --git a/spec/std/isa/inst/V/vsseg3e64.v.yaml b/spec/std/isa/inst/V/vsseg3e64.v.yaml index 9dae79739..22e75a68c 100644 --- a/spec/std/isa/inst/V/vsseg3e64.v.yaml +++ b/spec/std/isa/inst/V/vsseg3e64.v.yaml @@ -9,7 +9,9 @@ name: vsseg3e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 010000-00000-----111-----0100111 diff --git a/spec/std/isa/inst/V/vsseg3e8.v.yaml b/spec/std/isa/inst/V/vsseg3e8.v.yaml index fd05c4585..14082e37d 100644 --- a/spec/std/isa/inst/V/vsseg3e8.v.yaml +++ b/spec/std/isa/inst/V/vsseg3e8.v.yaml @@ -9,7 +9,9 @@ name: vsseg3e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 010000-00000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vsseg4e16.v.yaml b/spec/std/isa/inst/V/vsseg4e16.v.yaml index 44c1938e8..ee18139a3 100644 --- a/spec/std/isa/inst/V/vsseg4e16.v.yaml +++ b/spec/std/isa/inst/V/vsseg4e16.v.yaml @@ -9,7 +9,9 @@ name: vsseg4e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 011000-00000-----101-----0100111 diff --git a/spec/std/isa/inst/V/vsseg4e32.v.yaml b/spec/std/isa/inst/V/vsseg4e32.v.yaml index 89d1d411f..f3c4a8938 100644 --- a/spec/std/isa/inst/V/vsseg4e32.v.yaml +++ b/spec/std/isa/inst/V/vsseg4e32.v.yaml @@ -9,7 +9,9 @@ name: vsseg4e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 011000-00000-----110-----0100111 diff --git a/spec/std/isa/inst/V/vsseg4e64.v.yaml b/spec/std/isa/inst/V/vsseg4e64.v.yaml index 6138991ee..040bfb5eb 100644 --- a/spec/std/isa/inst/V/vsseg4e64.v.yaml +++ b/spec/std/isa/inst/V/vsseg4e64.v.yaml @@ -9,7 +9,9 @@ name: vsseg4e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 011000-00000-----111-----0100111 diff --git a/spec/std/isa/inst/V/vsseg4e8.v.yaml b/spec/std/isa/inst/V/vsseg4e8.v.yaml index 625bff3f3..48ac14a83 100644 --- a/spec/std/isa/inst/V/vsseg4e8.v.yaml +++ b/spec/std/isa/inst/V/vsseg4e8.v.yaml @@ -9,7 +9,9 @@ name: vsseg4e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 011000-00000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vsseg5e16.v.yaml b/spec/std/isa/inst/V/vsseg5e16.v.yaml index bf81188bc..4b350a606 100644 --- a/spec/std/isa/inst/V/vsseg5e16.v.yaml +++ b/spec/std/isa/inst/V/vsseg5e16.v.yaml @@ -9,7 +9,9 @@ name: vsseg5e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 100000-00000-----101-----0100111 diff --git a/spec/std/isa/inst/V/vsseg5e32.v.yaml b/spec/std/isa/inst/V/vsseg5e32.v.yaml index c4add52e6..52631d1bd 100644 --- a/spec/std/isa/inst/V/vsseg5e32.v.yaml +++ b/spec/std/isa/inst/V/vsseg5e32.v.yaml @@ -9,7 +9,9 @@ name: vsseg5e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 100000-00000-----110-----0100111 diff --git a/spec/std/isa/inst/V/vsseg5e64.v.yaml b/spec/std/isa/inst/V/vsseg5e64.v.yaml index 304611f61..cce85bdff 100644 --- a/spec/std/isa/inst/V/vsseg5e64.v.yaml +++ b/spec/std/isa/inst/V/vsseg5e64.v.yaml @@ -9,7 +9,9 @@ name: vsseg5e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 100000-00000-----111-----0100111 diff --git a/spec/std/isa/inst/V/vsseg5e8.v.yaml b/spec/std/isa/inst/V/vsseg5e8.v.yaml index 83556343f..f40ee3aa7 100644 --- a/spec/std/isa/inst/V/vsseg5e8.v.yaml +++ b/spec/std/isa/inst/V/vsseg5e8.v.yaml @@ -9,7 +9,9 @@ name: vsseg5e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 100000-00000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vsseg6e16.v.yaml b/spec/std/isa/inst/V/vsseg6e16.v.yaml index 8e1057719..46efc386c 100644 --- a/spec/std/isa/inst/V/vsseg6e16.v.yaml +++ b/spec/std/isa/inst/V/vsseg6e16.v.yaml @@ -9,7 +9,9 @@ name: vsseg6e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 101000-00000-----101-----0100111 diff --git a/spec/std/isa/inst/V/vsseg6e32.v.yaml b/spec/std/isa/inst/V/vsseg6e32.v.yaml index 65458281f..32e3c48d4 100644 --- a/spec/std/isa/inst/V/vsseg6e32.v.yaml +++ b/spec/std/isa/inst/V/vsseg6e32.v.yaml @@ -9,7 +9,9 @@ name: vsseg6e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 101000-00000-----110-----0100111 diff --git a/spec/std/isa/inst/V/vsseg6e64.v.yaml b/spec/std/isa/inst/V/vsseg6e64.v.yaml index f04368dff..6c59fcc19 100644 --- a/spec/std/isa/inst/V/vsseg6e64.v.yaml +++ b/spec/std/isa/inst/V/vsseg6e64.v.yaml @@ -9,7 +9,9 @@ name: vsseg6e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 101000-00000-----111-----0100111 diff --git a/spec/std/isa/inst/V/vsseg6e8.v.yaml b/spec/std/isa/inst/V/vsseg6e8.v.yaml index a23ece343..4e76f80fc 100644 --- a/spec/std/isa/inst/V/vsseg6e8.v.yaml +++ b/spec/std/isa/inst/V/vsseg6e8.v.yaml @@ -9,7 +9,9 @@ name: vsseg6e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 101000-00000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vsseg7e16.v.yaml b/spec/std/isa/inst/V/vsseg7e16.v.yaml index 9f7f4d3c5..b149851e6 100644 --- a/spec/std/isa/inst/V/vsseg7e16.v.yaml +++ b/spec/std/isa/inst/V/vsseg7e16.v.yaml @@ -9,7 +9,9 @@ name: vsseg7e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 110000-00000-----101-----0100111 diff --git a/spec/std/isa/inst/V/vsseg7e32.v.yaml b/spec/std/isa/inst/V/vsseg7e32.v.yaml index 6d2c74500..ab26736c1 100644 --- a/spec/std/isa/inst/V/vsseg7e32.v.yaml +++ b/spec/std/isa/inst/V/vsseg7e32.v.yaml @@ -9,7 +9,9 @@ name: vsseg7e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 110000-00000-----110-----0100111 diff --git a/spec/std/isa/inst/V/vsseg7e64.v.yaml b/spec/std/isa/inst/V/vsseg7e64.v.yaml index b7182becd..854089fab 100644 --- a/spec/std/isa/inst/V/vsseg7e64.v.yaml +++ b/spec/std/isa/inst/V/vsseg7e64.v.yaml @@ -9,7 +9,9 @@ name: vsseg7e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 110000-00000-----111-----0100111 diff --git a/spec/std/isa/inst/V/vsseg7e8.v.yaml b/spec/std/isa/inst/V/vsseg7e8.v.yaml index 17c960457..ab69f4313 100644 --- a/spec/std/isa/inst/V/vsseg7e8.v.yaml +++ b/spec/std/isa/inst/V/vsseg7e8.v.yaml @@ -9,7 +9,9 @@ name: vsseg7e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 110000-00000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vsseg8e16.v.yaml b/spec/std/isa/inst/V/vsseg8e16.v.yaml index b86657196..f219f824f 100644 --- a/spec/std/isa/inst/V/vsseg8e16.v.yaml +++ b/spec/std/isa/inst/V/vsseg8e16.v.yaml @@ -9,7 +9,9 @@ name: vsseg8e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 111000-00000-----101-----0100111 diff --git a/spec/std/isa/inst/V/vsseg8e32.v.yaml b/spec/std/isa/inst/V/vsseg8e32.v.yaml index 95e262b63..1f722f030 100644 --- a/spec/std/isa/inst/V/vsseg8e32.v.yaml +++ b/spec/std/isa/inst/V/vsseg8e32.v.yaml @@ -9,7 +9,9 @@ name: vsseg8e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 111000-00000-----110-----0100111 diff --git a/spec/std/isa/inst/V/vsseg8e64.v.yaml b/spec/std/isa/inst/V/vsseg8e64.v.yaml index 3888c03eb..925c40fa6 100644 --- a/spec/std/isa/inst/V/vsseg8e64.v.yaml +++ b/spec/std/isa/inst/V/vsseg8e64.v.yaml @@ -9,7 +9,9 @@ name: vsseg8e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 111000-00000-----111-----0100111 diff --git a/spec/std/isa/inst/V/vsseg8e8.v.yaml b/spec/std/isa/inst/V/vsseg8e8.v.yaml index 934d4f749..ae0899640 100644 --- a/spec/std/isa/inst/V/vsseg8e8.v.yaml +++ b/spec/std/isa/inst/V/vsseg8e8.v.yaml @@ -9,7 +9,9 @@ name: vsseg8e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vm encoding: match: 111000-00000-----000-----0100111 diff --git a/spec/std/isa/inst/V/vssra.vi.yaml b/spec/std/isa/inst/V/vssra.vi.yaml index b1f7e1e53..af84fc0c5 100644 --- a/spec/std/isa/inst/V/vssra.vi.yaml +++ b/spec/std/isa/inst/V/vssra.vi.yaml @@ -9,7 +9,9 @@ name: vssra.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 101011-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vssra.vv.yaml b/spec/std/isa/inst/V/vssra.vv.yaml index 66394d01f..3f8fe6527 100644 --- a/spec/std/isa/inst/V/vssra.vv.yaml +++ b/spec/std/isa/inst/V/vssra.vv.yaml @@ -9,7 +9,9 @@ name: vssra.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 101011-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vssra.vx.yaml b/spec/std/isa/inst/V/vssra.vx.yaml index 0a288fd3a..e390c1f2e 100644 --- a/spec/std/isa/inst/V/vssra.vx.yaml +++ b/spec/std/isa/inst/V/vssra.vx.yaml @@ -9,7 +9,9 @@ name: vssra.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 101011-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vssrl.vi.yaml b/spec/std/isa/inst/V/vssrl.vi.yaml index b0a389bea..5f2601378 100644 --- a/spec/std/isa/inst/V/vssrl.vi.yaml +++ b/spec/std/isa/inst/V/vssrl.vi.yaml @@ -9,7 +9,9 @@ name: vssrl.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 101010-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vssrl.vv.yaml b/spec/std/isa/inst/V/vssrl.vv.yaml index 724c4fd2e..809c912c7 100644 --- a/spec/std/isa/inst/V/vssrl.vv.yaml +++ b/spec/std/isa/inst/V/vssrl.vv.yaml @@ -9,7 +9,9 @@ name: vssrl.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 101010-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vssrl.vx.yaml b/spec/std/isa/inst/V/vssrl.vx.yaml index 68f459a66..342d28dcf 100644 --- a/spec/std/isa/inst/V/vssrl.vx.yaml +++ b/spec/std/isa/inst/V/vssrl.vx.yaml @@ -9,7 +9,9 @@ name: vssrl.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 101010-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vssseg2e16.v.yaml b/spec/std/isa/inst/V/vssseg2e16.v.yaml index 160d38e7b..d22527f7c 100644 --- a/spec/std/isa/inst/V/vssseg2e16.v.yaml +++ b/spec/std/isa/inst/V/vssseg2e16.v.yaml @@ -9,7 +9,9 @@ name: vssseg2e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 001010-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vssseg2e32.v.yaml b/spec/std/isa/inst/V/vssseg2e32.v.yaml index eae657677..c78cd3923 100644 --- a/spec/std/isa/inst/V/vssseg2e32.v.yaml +++ b/spec/std/isa/inst/V/vssseg2e32.v.yaml @@ -9,7 +9,9 @@ name: vssseg2e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 001010-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vssseg2e64.v.yaml b/spec/std/isa/inst/V/vssseg2e64.v.yaml index 3050dbce2..cff65b133 100644 --- a/spec/std/isa/inst/V/vssseg2e64.v.yaml +++ b/spec/std/isa/inst/V/vssseg2e64.v.yaml @@ -9,7 +9,9 @@ name: vssseg2e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 001010-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vssseg2e8.v.yaml b/spec/std/isa/inst/V/vssseg2e8.v.yaml index cabbfcced..e659e69dd 100644 --- a/spec/std/isa/inst/V/vssseg2e8.v.yaml +++ b/spec/std/isa/inst/V/vssseg2e8.v.yaml @@ -9,7 +9,9 @@ name: vssseg2e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 001010-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vssseg3e16.v.yaml b/spec/std/isa/inst/V/vssseg3e16.v.yaml index b9d64c951..78dfb1ef0 100644 --- a/spec/std/isa/inst/V/vssseg3e16.v.yaml +++ b/spec/std/isa/inst/V/vssseg3e16.v.yaml @@ -9,7 +9,9 @@ name: vssseg3e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 010010-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vssseg3e32.v.yaml b/spec/std/isa/inst/V/vssseg3e32.v.yaml index 8e4f5680f..b545ffc78 100644 --- a/spec/std/isa/inst/V/vssseg3e32.v.yaml +++ b/spec/std/isa/inst/V/vssseg3e32.v.yaml @@ -9,7 +9,9 @@ name: vssseg3e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 010010-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vssseg3e64.v.yaml b/spec/std/isa/inst/V/vssseg3e64.v.yaml index dc87a8ee7..e44ff4bf9 100644 --- a/spec/std/isa/inst/V/vssseg3e64.v.yaml +++ b/spec/std/isa/inst/V/vssseg3e64.v.yaml @@ -9,7 +9,9 @@ name: vssseg3e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 010010-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vssseg3e8.v.yaml b/spec/std/isa/inst/V/vssseg3e8.v.yaml index 3701575e3..0dce30bb6 100644 --- a/spec/std/isa/inst/V/vssseg3e8.v.yaml +++ b/spec/std/isa/inst/V/vssseg3e8.v.yaml @@ -9,7 +9,9 @@ name: vssseg3e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 010010-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vssseg4e16.v.yaml b/spec/std/isa/inst/V/vssseg4e16.v.yaml index 6891e663b..f752a3b29 100644 --- a/spec/std/isa/inst/V/vssseg4e16.v.yaml +++ b/spec/std/isa/inst/V/vssseg4e16.v.yaml @@ -9,7 +9,9 @@ name: vssseg4e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 011010-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vssseg4e32.v.yaml b/spec/std/isa/inst/V/vssseg4e32.v.yaml index 7bd1f4abf..8e01a30a6 100644 --- a/spec/std/isa/inst/V/vssseg4e32.v.yaml +++ b/spec/std/isa/inst/V/vssseg4e32.v.yaml @@ -9,7 +9,9 @@ name: vssseg4e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 011010-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vssseg4e64.v.yaml b/spec/std/isa/inst/V/vssseg4e64.v.yaml index 3db190694..4d6d40581 100644 --- a/spec/std/isa/inst/V/vssseg4e64.v.yaml +++ b/spec/std/isa/inst/V/vssseg4e64.v.yaml @@ -9,7 +9,9 @@ name: vssseg4e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 011010-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vssseg4e8.v.yaml b/spec/std/isa/inst/V/vssseg4e8.v.yaml index 9d85c26d4..23c052e5e 100644 --- a/spec/std/isa/inst/V/vssseg4e8.v.yaml +++ b/spec/std/isa/inst/V/vssseg4e8.v.yaml @@ -9,7 +9,9 @@ name: vssseg4e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 011010-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vssseg5e16.v.yaml b/spec/std/isa/inst/V/vssseg5e16.v.yaml index dde947f68..70105f389 100644 --- a/spec/std/isa/inst/V/vssseg5e16.v.yaml +++ b/spec/std/isa/inst/V/vssseg5e16.v.yaml @@ -9,7 +9,9 @@ name: vssseg5e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 100010-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vssseg5e32.v.yaml b/spec/std/isa/inst/V/vssseg5e32.v.yaml index fd213dcba..961000d48 100644 --- a/spec/std/isa/inst/V/vssseg5e32.v.yaml +++ b/spec/std/isa/inst/V/vssseg5e32.v.yaml @@ -9,7 +9,9 @@ name: vssseg5e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 100010-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vssseg5e64.v.yaml b/spec/std/isa/inst/V/vssseg5e64.v.yaml index 6eebcd4f9..5ec890746 100644 --- a/spec/std/isa/inst/V/vssseg5e64.v.yaml +++ b/spec/std/isa/inst/V/vssseg5e64.v.yaml @@ -9,7 +9,9 @@ name: vssseg5e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 100010-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vssseg5e8.v.yaml b/spec/std/isa/inst/V/vssseg5e8.v.yaml index d786f89fd..ebe89d3fc 100644 --- a/spec/std/isa/inst/V/vssseg5e8.v.yaml +++ b/spec/std/isa/inst/V/vssseg5e8.v.yaml @@ -9,7 +9,9 @@ name: vssseg5e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 100010-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vssseg6e16.v.yaml b/spec/std/isa/inst/V/vssseg6e16.v.yaml index 88203a967..f3e3cccbf 100644 --- a/spec/std/isa/inst/V/vssseg6e16.v.yaml +++ b/spec/std/isa/inst/V/vssseg6e16.v.yaml @@ -9,7 +9,9 @@ name: vssseg6e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 101010-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vssseg6e32.v.yaml b/spec/std/isa/inst/V/vssseg6e32.v.yaml index a82cca684..dd6cc3b50 100644 --- a/spec/std/isa/inst/V/vssseg6e32.v.yaml +++ b/spec/std/isa/inst/V/vssseg6e32.v.yaml @@ -9,7 +9,9 @@ name: vssseg6e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 101010-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vssseg6e64.v.yaml b/spec/std/isa/inst/V/vssseg6e64.v.yaml index 5ceee7282..5f1de9af3 100644 --- a/spec/std/isa/inst/V/vssseg6e64.v.yaml +++ b/spec/std/isa/inst/V/vssseg6e64.v.yaml @@ -9,7 +9,9 @@ name: vssseg6e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 101010-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vssseg6e8.v.yaml b/spec/std/isa/inst/V/vssseg6e8.v.yaml index 2275d8845..696135471 100644 --- a/spec/std/isa/inst/V/vssseg6e8.v.yaml +++ b/spec/std/isa/inst/V/vssseg6e8.v.yaml @@ -9,7 +9,9 @@ name: vssseg6e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 101010-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vssseg7e16.v.yaml b/spec/std/isa/inst/V/vssseg7e16.v.yaml index 00ac7a247..5e3cbfda8 100644 --- a/spec/std/isa/inst/V/vssseg7e16.v.yaml +++ b/spec/std/isa/inst/V/vssseg7e16.v.yaml @@ -9,7 +9,9 @@ name: vssseg7e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 110010-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vssseg7e32.v.yaml b/spec/std/isa/inst/V/vssseg7e32.v.yaml index 8d7770e9e..d017160a8 100644 --- a/spec/std/isa/inst/V/vssseg7e32.v.yaml +++ b/spec/std/isa/inst/V/vssseg7e32.v.yaml @@ -9,7 +9,9 @@ name: vssseg7e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 110010-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vssseg7e64.v.yaml b/spec/std/isa/inst/V/vssseg7e64.v.yaml index 8e2a001d5..ad3ef11d0 100644 --- a/spec/std/isa/inst/V/vssseg7e64.v.yaml +++ b/spec/std/isa/inst/V/vssseg7e64.v.yaml @@ -9,7 +9,9 @@ name: vssseg7e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 110010-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vssseg7e8.v.yaml b/spec/std/isa/inst/V/vssseg7e8.v.yaml index c610fc76b..530d704cf 100644 --- a/spec/std/isa/inst/V/vssseg7e8.v.yaml +++ b/spec/std/isa/inst/V/vssseg7e8.v.yaml @@ -9,7 +9,9 @@ name: vssseg7e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 110010-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vssseg8e16.v.yaml b/spec/std/isa/inst/V/vssseg8e16.v.yaml index 83524e0b2..5b5a8d1e5 100644 --- a/spec/std/isa/inst/V/vssseg8e16.v.yaml +++ b/spec/std/isa/inst/V/vssseg8e16.v.yaml @@ -9,7 +9,9 @@ name: vssseg8e16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 111010-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vssseg8e32.v.yaml b/spec/std/isa/inst/V/vssseg8e32.v.yaml index dbca73022..20855bff3 100644 --- a/spec/std/isa/inst/V/vssseg8e32.v.yaml +++ b/spec/std/isa/inst/V/vssseg8e32.v.yaml @@ -9,7 +9,9 @@ name: vssseg8e32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 111010-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vssseg8e64.v.yaml b/spec/std/isa/inst/V/vssseg8e64.v.yaml index 91b62eb98..44b35ebdf 100644 --- a/spec/std/isa/inst/V/vssseg8e64.v.yaml +++ b/spec/std/isa/inst/V/vssseg8e64.v.yaml @@ -9,7 +9,9 @@ name: vssseg8e64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 111010-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vssseg8e8.v.yaml b/spec/std/isa/inst/V/vssseg8e8.v.yaml index 3dbe99840..e6fa31184 100644 --- a/spec/std/isa/inst/V/vssseg8e8.v.yaml +++ b/spec/std/isa/inst/V/vssseg8e8.v.yaml @@ -9,7 +9,9 @@ name: vssseg8e8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), xs2, vm encoding: match: 111010-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vssub.vv.yaml b/spec/std/isa/inst/V/vssub.vv.yaml index 0f746090e..d92778fd8 100644 --- a/spec/std/isa/inst/V/vssub.vv.yaml +++ b/spec/std/isa/inst/V/vssub.vv.yaml @@ -9,7 +9,9 @@ name: vssub.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100011-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vssub.vx.yaml b/spec/std/isa/inst/V/vssub.vx.yaml index e1748d9a2..402090be9 100644 --- a/spec/std/isa/inst/V/vssub.vx.yaml +++ b/spec/std/isa/inst/V/vssub.vx.yaml @@ -9,7 +9,9 @@ name: vssub.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100011-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vssubu.vv.yaml b/spec/std/isa/inst/V/vssubu.vv.yaml index 6f15bcdc4..51e3c3589 100644 --- a/spec/std/isa/inst/V/vssubu.vv.yaml +++ b/spec/std/isa/inst/V/vssubu.vv.yaml @@ -9,7 +9,9 @@ name: vssubu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 100010-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vssubu.vx.yaml b/spec/std/isa/inst/V/vssubu.vx.yaml index 6e0abfed4..3d10a7e1e 100644 --- a/spec/std/isa/inst/V/vssubu.vx.yaml +++ b/spec/std/isa/inst/V/vssubu.vx.yaml @@ -9,7 +9,9 @@ name: vssubu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 100010-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vsub.vv.yaml b/spec/std/isa/inst/V/vsub.vv.yaml index 053a4a68d..5dc012ceb 100644 --- a/spec/std/isa/inst/V/vsub.vv.yaml +++ b/spec/std/isa/inst/V/vsub.vv.yaml @@ -9,7 +9,9 @@ name: vsub.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 000010-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vsub.vx.yaml b/spec/std/isa/inst/V/vsub.vx.yaml index d09d260ae..29f3c5722 100644 --- a/spec/std/isa/inst/V/vsub.vx.yaml +++ b/spec/std/isa/inst/V/vsub.vx.yaml @@ -9,7 +9,9 @@ name: vsub.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 000010-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vsuxei16.v.yaml b/spec/std/isa/inst/V/vsuxei16.v.yaml index 041bba921..b30bf3efc 100644 --- a/spec/std/isa/inst/V/vsuxei16.v.yaml +++ b/spec/std/isa/inst/V/vsuxei16.v.yaml @@ -9,7 +9,9 @@ name: vsuxei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 000001-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsuxei32.v.yaml b/spec/std/isa/inst/V/vsuxei32.v.yaml index 4529ae71e..afa42f160 100644 --- a/spec/std/isa/inst/V/vsuxei32.v.yaml +++ b/spec/std/isa/inst/V/vsuxei32.v.yaml @@ -9,7 +9,9 @@ name: vsuxei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 000001-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsuxei64.v.yaml b/spec/std/isa/inst/V/vsuxei64.v.yaml index 2eeffb297..8c9019dae 100644 --- a/spec/std/isa/inst/V/vsuxei64.v.yaml +++ b/spec/std/isa/inst/V/vsuxei64.v.yaml @@ -9,7 +9,9 @@ name: vsuxei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 000001-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsuxei8.v.yaml b/spec/std/isa/inst/V/vsuxei8.v.yaml index 2e5a986c9..d613b5063 100644 --- a/spec/std/isa/inst/V/vsuxei8.v.yaml +++ b/spec/std/isa/inst/V/vsuxei8.v.yaml @@ -9,7 +9,9 @@ name: vsuxei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 000001-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg2ei16.v.yaml b/spec/std/isa/inst/V/vsuxseg2ei16.v.yaml index 2329ed9f6..ad6a058fb 100644 --- a/spec/std/isa/inst/V/vsuxseg2ei16.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg2ei16.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg2ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 001001-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg2ei32.v.yaml b/spec/std/isa/inst/V/vsuxseg2ei32.v.yaml index 2c9456c8d..83f88e526 100644 --- a/spec/std/isa/inst/V/vsuxseg2ei32.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg2ei32.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg2ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 001001-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg2ei64.v.yaml b/spec/std/isa/inst/V/vsuxseg2ei64.v.yaml index 7e5bd01e6..12e6a6bb5 100644 --- a/spec/std/isa/inst/V/vsuxseg2ei64.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg2ei64.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg2ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 001001-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg2ei8.v.yaml b/spec/std/isa/inst/V/vsuxseg2ei8.v.yaml index 873b47f51..e81f0c616 100644 --- a/spec/std/isa/inst/V/vsuxseg2ei8.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg2ei8.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg2ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 001001-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg3ei16.v.yaml b/spec/std/isa/inst/V/vsuxseg3ei16.v.yaml index af895922a..e8a093952 100644 --- a/spec/std/isa/inst/V/vsuxseg3ei16.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg3ei16.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg3ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 010001-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg3ei32.v.yaml b/spec/std/isa/inst/V/vsuxseg3ei32.v.yaml index ac5cba3e1..0b784dc92 100644 --- a/spec/std/isa/inst/V/vsuxseg3ei32.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg3ei32.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg3ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 010001-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg3ei64.v.yaml b/spec/std/isa/inst/V/vsuxseg3ei64.v.yaml index cc4a37955..0217d174e 100644 --- a/spec/std/isa/inst/V/vsuxseg3ei64.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg3ei64.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg3ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 010001-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg3ei8.v.yaml b/spec/std/isa/inst/V/vsuxseg3ei8.v.yaml index d47b3b2b1..c2b310f25 100644 --- a/spec/std/isa/inst/V/vsuxseg3ei8.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg3ei8.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg3ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 010001-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg4ei16.v.yaml b/spec/std/isa/inst/V/vsuxseg4ei16.v.yaml index 2365dd24d..bf8121e0f 100644 --- a/spec/std/isa/inst/V/vsuxseg4ei16.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg4ei16.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg4ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 011001-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg4ei32.v.yaml b/spec/std/isa/inst/V/vsuxseg4ei32.v.yaml index 50d804383..902af2edc 100644 --- a/spec/std/isa/inst/V/vsuxseg4ei32.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg4ei32.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg4ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 011001-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg4ei64.v.yaml b/spec/std/isa/inst/V/vsuxseg4ei64.v.yaml index ee9ead66f..99d344baa 100644 --- a/spec/std/isa/inst/V/vsuxseg4ei64.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg4ei64.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg4ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 011001-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg4ei8.v.yaml b/spec/std/isa/inst/V/vsuxseg4ei8.v.yaml index 6b6644b50..1a2dcdde3 100644 --- a/spec/std/isa/inst/V/vsuxseg4ei8.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg4ei8.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg4ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 011001-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg5ei16.v.yaml b/spec/std/isa/inst/V/vsuxseg5ei16.v.yaml index d2919a094..ff2e25caa 100644 --- a/spec/std/isa/inst/V/vsuxseg5ei16.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg5ei16.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg5ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 100001-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg5ei32.v.yaml b/spec/std/isa/inst/V/vsuxseg5ei32.v.yaml index 12d38c552..bc19a4acc 100644 --- a/spec/std/isa/inst/V/vsuxseg5ei32.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg5ei32.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg5ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 100001-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg5ei64.v.yaml b/spec/std/isa/inst/V/vsuxseg5ei64.v.yaml index 522a1cdcf..e7acf7d48 100644 --- a/spec/std/isa/inst/V/vsuxseg5ei64.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg5ei64.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg5ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 100001-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg5ei8.v.yaml b/spec/std/isa/inst/V/vsuxseg5ei8.v.yaml index 863e33877..059069848 100644 --- a/spec/std/isa/inst/V/vsuxseg5ei8.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg5ei8.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg5ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 100001-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg6ei16.v.yaml b/spec/std/isa/inst/V/vsuxseg6ei16.v.yaml index c9e871ec7..0811ac856 100644 --- a/spec/std/isa/inst/V/vsuxseg6ei16.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg6ei16.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg6ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 101001-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg6ei32.v.yaml b/spec/std/isa/inst/V/vsuxseg6ei32.v.yaml index 1e7046505..78d8f1dfd 100644 --- a/spec/std/isa/inst/V/vsuxseg6ei32.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg6ei32.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg6ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 101001-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg6ei64.v.yaml b/spec/std/isa/inst/V/vsuxseg6ei64.v.yaml index 29fc944df..b7df93544 100644 --- a/spec/std/isa/inst/V/vsuxseg6ei64.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg6ei64.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg6ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 101001-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg6ei8.v.yaml b/spec/std/isa/inst/V/vsuxseg6ei8.v.yaml index b7f88b971..21607fc31 100644 --- a/spec/std/isa/inst/V/vsuxseg6ei8.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg6ei8.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg6ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 101001-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg7ei16.v.yaml b/spec/std/isa/inst/V/vsuxseg7ei16.v.yaml index 409c47c68..db4b1bd6d 100644 --- a/spec/std/isa/inst/V/vsuxseg7ei16.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg7ei16.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg7ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 110001-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg7ei32.v.yaml b/spec/std/isa/inst/V/vsuxseg7ei32.v.yaml index 15fad8f76..0c01d8c57 100644 --- a/spec/std/isa/inst/V/vsuxseg7ei32.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg7ei32.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg7ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 110001-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg7ei64.v.yaml b/spec/std/isa/inst/V/vsuxseg7ei64.v.yaml index ad5c9a3d7..f2e12cd0c 100644 --- a/spec/std/isa/inst/V/vsuxseg7ei64.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg7ei64.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg7ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 110001-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg7ei8.v.yaml b/spec/std/isa/inst/V/vsuxseg7ei8.v.yaml index a90099cd0..0bfa255b7 100644 --- a/spec/std/isa/inst/V/vsuxseg7ei8.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg7ei8.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg7ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 110001-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg8ei16.v.yaml b/spec/std/isa/inst/V/vsuxseg8ei16.v.yaml index a1d0c02a6..de795cea9 100644 --- a/spec/std/isa/inst/V/vsuxseg8ei16.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg8ei16.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg8ei16.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 111001-----------101-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg8ei32.v.yaml b/spec/std/isa/inst/V/vsuxseg8ei32.v.yaml index ed0caacc7..8a76e7286 100644 --- a/spec/std/isa/inst/V/vsuxseg8ei32.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg8ei32.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg8ei32.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 111001-----------110-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg8ei64.v.yaml b/spec/std/isa/inst/V/vsuxseg8ei64.v.yaml index 95e8a54ac..b5b78a7c6 100644 --- a/spec/std/isa/inst/V/vsuxseg8ei64.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg8ei64.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg8ei64.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 111001-----------111-----0100111 diff --git a/spec/std/isa/inst/V/vsuxseg8ei8.v.yaml b/spec/std/isa/inst/V/vsuxseg8ei8.v.yaml index 4fd30fba0..2c9dbc176 100644 --- a/spec/std/isa/inst/V/vsuxseg8ei8.v.yaml +++ b/spec/std/isa/inst/V/vsuxseg8ei8.v.yaml @@ -9,7 +9,9 @@ name: vsuxseg8ei8.v long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vs3, (xs1), vs2, vm encoding: match: 111001-----------000-----0100111 diff --git a/spec/std/isa/inst/V/vwadd.vv.yaml b/spec/std/isa/inst/V/vwadd.vv.yaml index 35848a85e..0734155df 100644 --- a/spec/std/isa/inst/V/vwadd.vv.yaml +++ b/spec/std/isa/inst/V/vwadd.vv.yaml @@ -9,7 +9,9 @@ name: vwadd.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110001-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwadd.vx.yaml b/spec/std/isa/inst/V/vwadd.vx.yaml index 407fabe42..fa236802a 100644 --- a/spec/std/isa/inst/V/vwadd.vx.yaml +++ b/spec/std/isa/inst/V/vwadd.vx.yaml @@ -9,7 +9,9 @@ name: vwadd.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 110001-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwadd.wv.yaml b/spec/std/isa/inst/V/vwadd.wv.yaml index a40ae0b82..d511a200f 100644 --- a/spec/std/isa/inst/V/vwadd.wv.yaml +++ b/spec/std/isa/inst/V/vwadd.wv.yaml @@ -9,7 +9,9 @@ name: vwadd.wv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110101-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwadd.wx.yaml b/spec/std/isa/inst/V/vwadd.wx.yaml index 510ea1a3b..cd1420392 100644 --- a/spec/std/isa/inst/V/vwadd.wx.yaml +++ b/spec/std/isa/inst/V/vwadd.wx.yaml @@ -9,7 +9,9 @@ name: vwadd.wx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 110101-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwaddu.vv.yaml b/spec/std/isa/inst/V/vwaddu.vv.yaml index c9187c4eb..2018d20be 100644 --- a/spec/std/isa/inst/V/vwaddu.vv.yaml +++ b/spec/std/isa/inst/V/vwaddu.vv.yaml @@ -9,7 +9,9 @@ name: vwaddu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110000-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwaddu.vx.yaml b/spec/std/isa/inst/V/vwaddu.vx.yaml index 9a10fb2c2..380263a23 100644 --- a/spec/std/isa/inst/V/vwaddu.vx.yaml +++ b/spec/std/isa/inst/V/vwaddu.vx.yaml @@ -9,7 +9,9 @@ name: vwaddu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 110000-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwaddu.wv.yaml b/spec/std/isa/inst/V/vwaddu.wv.yaml index 6fa62c8ac..3a5afc47c 100644 --- a/spec/std/isa/inst/V/vwaddu.wv.yaml +++ b/spec/std/isa/inst/V/vwaddu.wv.yaml @@ -9,7 +9,9 @@ name: vwaddu.wv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110100-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwaddu.wx.yaml b/spec/std/isa/inst/V/vwaddu.wx.yaml index c795b200b..a0f81a9af 100644 --- a/spec/std/isa/inst/V/vwaddu.wx.yaml +++ b/spec/std/isa/inst/V/vwaddu.wx.yaml @@ -9,7 +9,9 @@ name: vwaddu.wx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 110100-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwmacc.vv.yaml b/spec/std/isa/inst/V/vwmacc.vv.yaml index 2bcade502..aa6d4da46 100644 --- a/spec/std/isa/inst/V/vwmacc.vv.yaml +++ b/spec/std/isa/inst/V/vwmacc.vv.yaml @@ -9,7 +9,9 @@ name: vwmacc.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 111101-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwmacc.vx.yaml b/spec/std/isa/inst/V/vwmacc.vx.yaml index 118fb77d5..327e76838 100644 --- a/spec/std/isa/inst/V/vwmacc.vx.yaml +++ b/spec/std/isa/inst/V/vwmacc.vx.yaml @@ -9,7 +9,9 @@ name: vwmacc.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, xs1, vs2, vm encoding: match: 111101-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwmaccsu.vv.yaml b/spec/std/isa/inst/V/vwmaccsu.vv.yaml index 5cb3d538c..e67a44659 100644 --- a/spec/std/isa/inst/V/vwmaccsu.vv.yaml +++ b/spec/std/isa/inst/V/vwmaccsu.vv.yaml @@ -9,7 +9,9 @@ name: vwmaccsu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 111111-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwmaccsu.vx.yaml b/spec/std/isa/inst/V/vwmaccsu.vx.yaml index 2da9a1e12..8a7ad3e93 100644 --- a/spec/std/isa/inst/V/vwmaccsu.vx.yaml +++ b/spec/std/isa/inst/V/vwmaccsu.vx.yaml @@ -9,7 +9,9 @@ name: vwmaccsu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, xs1, vs2, vm encoding: match: 111111-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwmaccu.vv.yaml b/spec/std/isa/inst/V/vwmaccu.vv.yaml index 092e4d117..cd7c4eb64 100644 --- a/spec/std/isa/inst/V/vwmaccu.vv.yaml +++ b/spec/std/isa/inst/V/vwmaccu.vv.yaml @@ -9,7 +9,9 @@ name: vwmaccu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs1, vs2, vm encoding: match: 111100-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwmaccu.vx.yaml b/spec/std/isa/inst/V/vwmaccu.vx.yaml index 48009e39e..3a6b2f07a 100644 --- a/spec/std/isa/inst/V/vwmaccu.vx.yaml +++ b/spec/std/isa/inst/V/vwmaccu.vx.yaml @@ -9,7 +9,9 @@ name: vwmaccu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, xs1, vs2, vm encoding: match: 111100-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwmaccus.vx.yaml b/spec/std/isa/inst/V/vwmaccus.vx.yaml index 489eac53c..58806f908 100644 --- a/spec/std/isa/inst/V/vwmaccus.vx.yaml +++ b/spec/std/isa/inst/V/vwmaccus.vx.yaml @@ -9,7 +9,9 @@ name: vwmaccus.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, xs1, vs2, vm encoding: match: 111110-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwmul.vv.yaml b/spec/std/isa/inst/V/vwmul.vv.yaml index 1ac209f97..21029ede1 100644 --- a/spec/std/isa/inst/V/vwmul.vv.yaml +++ b/spec/std/isa/inst/V/vwmul.vv.yaml @@ -9,7 +9,9 @@ name: vwmul.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 111011-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwmul.vx.yaml b/spec/std/isa/inst/V/vwmul.vx.yaml index 135e65b10..a99dea009 100644 --- a/spec/std/isa/inst/V/vwmul.vx.yaml +++ b/spec/std/isa/inst/V/vwmul.vx.yaml @@ -9,7 +9,9 @@ name: vwmul.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 111011-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwmulsu.vv.yaml b/spec/std/isa/inst/V/vwmulsu.vv.yaml index baecd48f4..7fab9e290 100644 --- a/spec/std/isa/inst/V/vwmulsu.vv.yaml +++ b/spec/std/isa/inst/V/vwmulsu.vv.yaml @@ -9,7 +9,9 @@ name: vwmulsu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 111010-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwmulsu.vx.yaml b/spec/std/isa/inst/V/vwmulsu.vx.yaml index 62db62eef..f75ebc0dc 100644 --- a/spec/std/isa/inst/V/vwmulsu.vx.yaml +++ b/spec/std/isa/inst/V/vwmulsu.vx.yaml @@ -9,7 +9,9 @@ name: vwmulsu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 111010-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwmulu.vv.yaml b/spec/std/isa/inst/V/vwmulu.vv.yaml index 198a523d0..7d2b208d8 100644 --- a/spec/std/isa/inst/V/vwmulu.vv.yaml +++ b/spec/std/isa/inst/V/vwmulu.vv.yaml @@ -9,7 +9,9 @@ name: vwmulu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 111000-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwmulu.vx.yaml b/spec/std/isa/inst/V/vwmulu.vx.yaml index 92d0b9104..cc065f230 100644 --- a/spec/std/isa/inst/V/vwmulu.vx.yaml +++ b/spec/std/isa/inst/V/vwmulu.vx.yaml @@ -9,7 +9,9 @@ name: vwmulu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 111000-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwredsum.vs.yaml b/spec/std/isa/inst/V/vwredsum.vs.yaml index 6d97415b9..fb9d2b218 100644 --- a/spec/std/isa/inst/V/vwredsum.vs.yaml +++ b/spec/std/isa/inst/V/vwredsum.vs.yaml @@ -9,7 +9,9 @@ name: vwredsum.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110001-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vwredsumu.vs.yaml b/spec/std/isa/inst/V/vwredsumu.vs.yaml index aa7e9beae..8f64dece7 100644 --- a/spec/std/isa/inst/V/vwredsumu.vs.yaml +++ b/spec/std/isa/inst/V/vwredsumu.vs.yaml @@ -9,7 +9,9 @@ name: vwredsumu.vs long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110000-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vwsub.vv.yaml b/spec/std/isa/inst/V/vwsub.vv.yaml index aa573c400..46a7afefb 100644 --- a/spec/std/isa/inst/V/vwsub.vv.yaml +++ b/spec/std/isa/inst/V/vwsub.vv.yaml @@ -9,7 +9,9 @@ name: vwsub.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110011-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwsub.vx.yaml b/spec/std/isa/inst/V/vwsub.vx.yaml index 17003b8c5..3101e8146 100644 --- a/spec/std/isa/inst/V/vwsub.vx.yaml +++ b/spec/std/isa/inst/V/vwsub.vx.yaml @@ -9,7 +9,9 @@ name: vwsub.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 110011-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwsub.wv.yaml b/spec/std/isa/inst/V/vwsub.wv.yaml index e9dff037c..6ad74896e 100644 --- a/spec/std/isa/inst/V/vwsub.wv.yaml +++ b/spec/std/isa/inst/V/vwsub.wv.yaml @@ -9,7 +9,9 @@ name: vwsub.wv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110111-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwsub.wx.yaml b/spec/std/isa/inst/V/vwsub.wx.yaml index fa4bea86e..fa9e7a720 100644 --- a/spec/std/isa/inst/V/vwsub.wx.yaml +++ b/spec/std/isa/inst/V/vwsub.wx.yaml @@ -9,7 +9,9 @@ name: vwsub.wx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 110111-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwsubu.vv.yaml b/spec/std/isa/inst/V/vwsubu.vv.yaml index 045020acf..ac396ab86 100644 --- a/spec/std/isa/inst/V/vwsubu.vv.yaml +++ b/spec/std/isa/inst/V/vwsubu.vv.yaml @@ -9,7 +9,9 @@ name: vwsubu.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110010-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwsubu.vx.yaml b/spec/std/isa/inst/V/vwsubu.vx.yaml index 7389f12c6..aa099fe62 100644 --- a/spec/std/isa/inst/V/vwsubu.vx.yaml +++ b/spec/std/isa/inst/V/vwsubu.vx.yaml @@ -9,7 +9,9 @@ name: vwsubu.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 110010-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vwsubu.wv.yaml b/spec/std/isa/inst/V/vwsubu.wv.yaml index 8858c9aea..58988360b 100644 --- a/spec/std/isa/inst/V/vwsubu.wv.yaml +++ b/spec/std/isa/inst/V/vwsubu.wv.yaml @@ -9,7 +9,9 @@ name: vwsubu.wv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 110110-----------010-----1010111 diff --git a/spec/std/isa/inst/V/vwsubu.wx.yaml b/spec/std/isa/inst/V/vwsubu.wx.yaml index 23819ffd5..404c18c29 100644 --- a/spec/std/isa/inst/V/vwsubu.wx.yaml +++ b/spec/std/isa/inst/V/vwsubu.wx.yaml @@ -9,7 +9,9 @@ name: vwsubu.wx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 110110-----------110-----1010111 diff --git a/spec/std/isa/inst/V/vxor.vi.yaml b/spec/std/isa/inst/V/vxor.vi.yaml index a6f981d9e..15fb0e213 100644 --- a/spec/std/isa/inst/V/vxor.vi.yaml +++ b/spec/std/isa/inst/V/vxor.vi.yaml @@ -9,7 +9,9 @@ name: vxor.vi long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, imm, vm encoding: match: 001011-----------011-----1010111 diff --git a/spec/std/isa/inst/V/vxor.vv.yaml b/spec/std/isa/inst/V/vxor.vv.yaml index 27aa37a24..983156f61 100644 --- a/spec/std/isa/inst/V/vxor.vv.yaml +++ b/spec/std/isa/inst/V/vxor.vv.yaml @@ -9,7 +9,9 @@ name: vxor.vv long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vs1, vm encoding: match: 001011-----------000-----1010111 diff --git a/spec/std/isa/inst/V/vxor.vx.yaml b/spec/std/isa/inst/V/vxor.vx.yaml index 203e0ceb1..0b687d97d 100644 --- a/spec/std/isa/inst/V/vxor.vx.yaml +++ b/spec/std/isa/inst/V/vxor.vx.yaml @@ -9,7 +9,9 @@ name: vxor.vx long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, xs1, vm encoding: match: 001011-----------100-----1010111 diff --git a/spec/std/isa/inst/V/vzext.vf2.yaml b/spec/std/isa/inst/V/vzext.vf2.yaml index ff6af5133..e7f931959 100644 --- a/spec/std/isa/inst/V/vzext.vf2.yaml +++ b/spec/std/isa/inst/V/vzext.vf2.yaml @@ -9,7 +9,9 @@ name: vzext.vf2 long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00110010-----1010111 diff --git a/spec/std/isa/inst/V/vzext.vf4.yaml b/spec/std/isa/inst/V/vzext.vf4.yaml index f810feb84..6e991faa0 100644 --- a/spec/std/isa/inst/V/vzext.vf4.yaml +++ b/spec/std/isa/inst/V/vzext.vf4.yaml @@ -9,7 +9,9 @@ name: vzext.vf4 long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00100010-----1010111 diff --git a/spec/std/isa/inst/V/vzext.vf8.yaml b/spec/std/isa/inst/V/vzext.vf8.yaml index b1d3ecda6..6fa4d1676 100644 --- a/spec/std/isa/inst/V/vzext.vf8.yaml +++ b/spec/std/isa/inst/V/vzext.vf8.yaml @@ -9,7 +9,9 @@ name: vzext.vf8 long_name: No synopsis available description: | No description available. -definedBy: V +definedBy: + extension: + name: V assembly: vd, vs2, vm encoding: match: 010010------00010010-----1010111 diff --git a/spec/std/isa/inst/Zaamo/amoadd.d.yaml b/spec/std/isa/inst/Zaamo/amoadd.d.yaml index 4b16dcfbb..3e3e271e5 100644 --- a/spec/std/isa/inst/Zaamo/amoadd.d.yaml +++ b/spec/std/isa/inst/Zaamo/amoadd.d.yaml @@ -14,7 +14,9 @@ description: | * Write the loaded value into _rd_ * Add the value of register _rs2_ to the loaded value * Write the sum to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zaamo/amoadd.w.yaml b/spec/std/isa/inst/Zaamo/amoadd.w.yaml index 41e1435cd..782bdd555 100644 --- a/spec/std/isa/inst/Zaamo/amoadd.w.yaml +++ b/spec/std/isa/inst/Zaamo/amoadd.w.yaml @@ -14,7 +14,9 @@ description: | * Write the sign-extended value into _rd_ * Add the least-significant word of register _rs2_ to the loaded value * Write the sum to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo assembly: xd, xs2, (xs1) encoding: match: 00000------------010-----0101111 diff --git a/spec/std/isa/inst/Zaamo/amoand.d.yaml b/spec/std/isa/inst/Zaamo/amoand.d.yaml index 3439e6b95..924ee89f1 100644 --- a/spec/std/isa/inst/Zaamo/amoand.d.yaml +++ b/spec/std/isa/inst/Zaamo/amoand.d.yaml @@ -14,7 +14,9 @@ description: | * Write the loaded value into _rd_ * AND the value of register _rs2_ to the loaded value * Write the result to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zaamo/amoand.w.yaml b/spec/std/isa/inst/Zaamo/amoand.w.yaml index 869f9cef8..fdd142862 100644 --- a/spec/std/isa/inst/Zaamo/amoand.w.yaml +++ b/spec/std/isa/inst/Zaamo/amoand.w.yaml @@ -14,7 +14,9 @@ description: | * Write the sign-extended value into _rd_ * AND the least-significant word of register _rs2_ to the loaded value * Write the result to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo assembly: xd, xs2, (xs1) encoding: match: 01100------------010-----0101111 diff --git a/spec/std/isa/inst/Zaamo/amomax.d.yaml b/spec/std/isa/inst/Zaamo/amomax.d.yaml index 16e0bea75..cf3f6154d 100644 --- a/spec/std/isa/inst/Zaamo/amomax.d.yaml +++ b/spec/std/isa/inst/Zaamo/amomax.d.yaml @@ -14,7 +14,9 @@ description: | * Write the loaded value into _rd_ * Signed compare the value of register _rs2_ to the loaded value, and select the maximum value * Write the maximum to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zaamo/amomax.w.yaml b/spec/std/isa/inst/Zaamo/amomax.w.yaml index 15ded95f5..4f45d3508 100644 --- a/spec/std/isa/inst/Zaamo/amomax.w.yaml +++ b/spec/std/isa/inst/Zaamo/amomax.w.yaml @@ -14,7 +14,9 @@ description: | * Write the sign-extended value into _rd_ * Signed compare the least-significant word of register _rs2_ to the loaded value, and select the maximum value * Write the maximum to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo assembly: xd, xs2, (xs1) encoding: match: 10100------------010-----0101111 diff --git a/spec/std/isa/inst/Zaamo/amomaxu.d.yaml b/spec/std/isa/inst/Zaamo/amomaxu.d.yaml index 4c2392f00..584546adc 100644 --- a/spec/std/isa/inst/Zaamo/amomaxu.d.yaml +++ b/spec/std/isa/inst/Zaamo/amomaxu.d.yaml @@ -14,7 +14,9 @@ description: | * Write the loaded value into _rd_ * Unsigned compare the value of register _rs2_ to the loaded value, and select the maximum value * Write the maximum to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zaamo/amomaxu.w.yaml b/spec/std/isa/inst/Zaamo/amomaxu.w.yaml index d14b6c83b..991ae111a 100644 --- a/spec/std/isa/inst/Zaamo/amomaxu.w.yaml +++ b/spec/std/isa/inst/Zaamo/amomaxu.w.yaml @@ -14,7 +14,9 @@ description: | * Write the sign-extended value into _rd_ * Unsigned compare the least-significant word of register _rs2_ to the loaded value, and select the maximum value * Write the maximum to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo assembly: xd, xs2, (xs1) encoding: match: 11100------------010-----0101111 diff --git a/spec/std/isa/inst/Zaamo/amomin.d.yaml b/spec/std/isa/inst/Zaamo/amomin.d.yaml index 2892c2852..8f6090a5e 100644 --- a/spec/std/isa/inst/Zaamo/amomin.d.yaml +++ b/spec/std/isa/inst/Zaamo/amomin.d.yaml @@ -14,7 +14,9 @@ description: | * Write the loaded value into _rd_ * Signed compare the value of register _rs2_ to the loaded value, and select the minimum value * Write the minimum to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zaamo/amomin.w.yaml b/spec/std/isa/inst/Zaamo/amomin.w.yaml index 8889998d0..fb032c3af 100644 --- a/spec/std/isa/inst/Zaamo/amomin.w.yaml +++ b/spec/std/isa/inst/Zaamo/amomin.w.yaml @@ -14,7 +14,9 @@ description: | * Write the sign-extended value into _rd_ * Signed compare the least-significant word of register _rs2_ to the loaded value, and select the minimum value * Write the result to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo assembly: xd, xs2, (xs1) encoding: match: 10000------------010-----0101111 diff --git a/spec/std/isa/inst/Zaamo/amominu.d.yaml b/spec/std/isa/inst/Zaamo/amominu.d.yaml index 58cfae972..22b3af10a 100644 --- a/spec/std/isa/inst/Zaamo/amominu.d.yaml +++ b/spec/std/isa/inst/Zaamo/amominu.d.yaml @@ -14,7 +14,9 @@ description: | * Write the loaded value into _rd_ * Unsigned compare the value of register _rs2_ to the loaded value, and select the minimum value * Write the minimum to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zaamo/amominu.w.yaml b/spec/std/isa/inst/Zaamo/amominu.w.yaml index a7be5a689..bdc059f80 100644 --- a/spec/std/isa/inst/Zaamo/amominu.w.yaml +++ b/spec/std/isa/inst/Zaamo/amominu.w.yaml @@ -14,7 +14,9 @@ description: | * Write the sign-extended value into _rd_ * Unsigned compare the least-significant word of register _rs2_ to the loaded word, and select the minimum value * Write the result to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo assembly: xd, xs2, (xs1) encoding: match: 11000------------010-----0101111 diff --git a/spec/std/isa/inst/Zaamo/amoor.d.yaml b/spec/std/isa/inst/Zaamo/amoor.d.yaml index ebf53c55b..3cc5f3da7 100644 --- a/spec/std/isa/inst/Zaamo/amoor.d.yaml +++ b/spec/std/isa/inst/Zaamo/amoor.d.yaml @@ -14,7 +14,9 @@ description: | * Write the loaded value into _rd_ * OR the value of register _rs2_ to the loaded value * Write the result to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zaamo/amoor.w.yaml b/spec/std/isa/inst/Zaamo/amoor.w.yaml index 36baa667f..497ddb1ab 100644 --- a/spec/std/isa/inst/Zaamo/amoor.w.yaml +++ b/spec/std/isa/inst/Zaamo/amoor.w.yaml @@ -14,7 +14,9 @@ description: | * Write the sign-extended value into _rd_ * OR the least-significant word of register _rs2_ to the loaded value * Write the result to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo assembly: xd, xs2, (xs1) encoding: match: 01000------------010-----0101111 diff --git a/spec/std/isa/inst/Zaamo/amoswap.d.yaml b/spec/std/isa/inst/Zaamo/amoswap.d.yaml index ea5cb092a..391082548 100644 --- a/spec/std/isa/inst/Zaamo/amoswap.d.yaml +++ b/spec/std/isa/inst/Zaamo/amoswap.d.yaml @@ -13,7 +13,9 @@ description: | * Load the doubleword at address _rs1_ * Write the value into _rd_ * Store the value of register _rs2_ to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zaamo/amoswap.w.yaml b/spec/std/isa/inst/Zaamo/amoswap.w.yaml index c2f02a1a6..4915fc329 100644 --- a/spec/std/isa/inst/Zaamo/amoswap.w.yaml +++ b/spec/std/isa/inst/Zaamo/amoswap.w.yaml @@ -13,7 +13,9 @@ description: | * Load the word at address _rs1_ * Write the sign-extended value into _rd_ * Store the least-significant word of register _rs2_ to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo assembly: xd, xs2, (xs1) encoding: match: 00001------------010-----0101111 diff --git a/spec/std/isa/inst/Zaamo/amoxor.d.yaml b/spec/std/isa/inst/Zaamo/amoxor.d.yaml index be956bee1..680428273 100644 --- a/spec/std/isa/inst/Zaamo/amoxor.d.yaml +++ b/spec/std/isa/inst/Zaamo/amoxor.d.yaml @@ -14,7 +14,9 @@ description: | * Write the loaded value into _rd_ * XOR the value of register _rs2_ to the loaded value * Write the result to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zaamo/amoxor.w.yaml b/spec/std/isa/inst/Zaamo/amoxor.w.yaml index 5dc389404..597926d87 100644 --- a/spec/std/isa/inst/Zaamo/amoxor.w.yaml +++ b/spec/std/isa/inst/Zaamo/amoxor.w.yaml @@ -14,7 +14,9 @@ description: | * Write the sign-extended value into _rd_ * XOR the least-significant word of register _rs2_ to the loaded value * Write the result to the address in _rs1_ -definedBy: Zaamo +definedBy: + extension: + name: Zaamo assembly: xd, xs2, (xs1) encoding: match: 00100------------010-----0101111 diff --git a/spec/std/isa/inst/Zabha/amoadd.b.yaml b/spec/std/isa/inst/Zabha/amoadd.b.yaml index d90f57c11..e338bd5ff 100644 --- a/spec/std/isa/inst/Zabha/amoadd.b.yaml +++ b/spec/std/isa/inst/Zabha/amoadd.b.yaml @@ -9,7 +9,9 @@ name: amoadd.b long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 00000------------000-----0101111 diff --git a/spec/std/isa/inst/Zabha/amoadd.h.yaml b/spec/std/isa/inst/Zabha/amoadd.h.yaml index 8731c4c73..69fa051ea 100644 --- a/spec/std/isa/inst/Zabha/amoadd.h.yaml +++ b/spec/std/isa/inst/Zabha/amoadd.h.yaml @@ -9,7 +9,9 @@ name: amoadd.h long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 00000------------001-----0101111 diff --git a/spec/std/isa/inst/Zabha/amoand.b.yaml b/spec/std/isa/inst/Zabha/amoand.b.yaml index a6085fe91..46b1c27b7 100644 --- a/spec/std/isa/inst/Zabha/amoand.b.yaml +++ b/spec/std/isa/inst/Zabha/amoand.b.yaml @@ -9,7 +9,9 @@ name: amoand.b long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 01100------------000-----0101111 diff --git a/spec/std/isa/inst/Zabha/amoand.h.yaml b/spec/std/isa/inst/Zabha/amoand.h.yaml index 2d870e27a..98cf463e0 100644 --- a/spec/std/isa/inst/Zabha/amoand.h.yaml +++ b/spec/std/isa/inst/Zabha/amoand.h.yaml @@ -9,7 +9,9 @@ name: amoand.h long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 01100------------001-----0101111 diff --git a/spec/std/isa/inst/Zabha/amocas.b.yaml b/spec/std/isa/inst/Zabha/amocas.b.yaml index 9216ac6aa..ce6befa1f 100644 --- a/spec/std/isa/inst/Zabha/amocas.b.yaml +++ b/spec/std/isa/inst/Zabha/amocas.b.yaml @@ -9,7 +9,9 @@ name: amocas.b long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 00101------------000-----0101111 diff --git a/spec/std/isa/inst/Zabha/amocas.h.yaml b/spec/std/isa/inst/Zabha/amocas.h.yaml index 8cf8e50bd..cf188e8c7 100644 --- a/spec/std/isa/inst/Zabha/amocas.h.yaml +++ b/spec/std/isa/inst/Zabha/amocas.h.yaml @@ -9,7 +9,9 @@ name: amocas.h long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 00101------------001-----0101111 diff --git a/spec/std/isa/inst/Zabha/amomax.b.yaml b/spec/std/isa/inst/Zabha/amomax.b.yaml index e0153ccb2..04b2cdf6c 100644 --- a/spec/std/isa/inst/Zabha/amomax.b.yaml +++ b/spec/std/isa/inst/Zabha/amomax.b.yaml @@ -9,7 +9,9 @@ name: amomax.b long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 10100------------000-----0101111 diff --git a/spec/std/isa/inst/Zabha/amomax.h.yaml b/spec/std/isa/inst/Zabha/amomax.h.yaml index aa7f15d06..d6ed7032e 100644 --- a/spec/std/isa/inst/Zabha/amomax.h.yaml +++ b/spec/std/isa/inst/Zabha/amomax.h.yaml @@ -9,7 +9,9 @@ name: amomax.h long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 10100------------001-----0101111 diff --git a/spec/std/isa/inst/Zabha/amomaxu.b.yaml b/spec/std/isa/inst/Zabha/amomaxu.b.yaml index 86288f7a8..5c5b1de4c 100644 --- a/spec/std/isa/inst/Zabha/amomaxu.b.yaml +++ b/spec/std/isa/inst/Zabha/amomaxu.b.yaml @@ -9,7 +9,9 @@ name: amomaxu.b long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 11100------------000-----0101111 diff --git a/spec/std/isa/inst/Zabha/amomaxu.h.yaml b/spec/std/isa/inst/Zabha/amomaxu.h.yaml index f833f8e29..a58adbcf4 100644 --- a/spec/std/isa/inst/Zabha/amomaxu.h.yaml +++ b/spec/std/isa/inst/Zabha/amomaxu.h.yaml @@ -9,7 +9,9 @@ name: amomaxu.h long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 11100------------001-----0101111 diff --git a/spec/std/isa/inst/Zabha/amomin.b.yaml b/spec/std/isa/inst/Zabha/amomin.b.yaml index 3f67d7a3e..bcc2df9da 100644 --- a/spec/std/isa/inst/Zabha/amomin.b.yaml +++ b/spec/std/isa/inst/Zabha/amomin.b.yaml @@ -9,7 +9,9 @@ name: amomin.b long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 10000------------000-----0101111 diff --git a/spec/std/isa/inst/Zabha/amomin.h.yaml b/spec/std/isa/inst/Zabha/amomin.h.yaml index 75e606a1e..9b6c7a771 100644 --- a/spec/std/isa/inst/Zabha/amomin.h.yaml +++ b/spec/std/isa/inst/Zabha/amomin.h.yaml @@ -9,7 +9,9 @@ name: amomin.h long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 10000------------001-----0101111 diff --git a/spec/std/isa/inst/Zabha/amominu.b.yaml b/spec/std/isa/inst/Zabha/amominu.b.yaml index 6fb887788..cb4b848dd 100644 --- a/spec/std/isa/inst/Zabha/amominu.b.yaml +++ b/spec/std/isa/inst/Zabha/amominu.b.yaml @@ -9,7 +9,9 @@ name: amominu.b long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 11000------------000-----0101111 diff --git a/spec/std/isa/inst/Zabha/amominu.h.yaml b/spec/std/isa/inst/Zabha/amominu.h.yaml index 43a2526ff..4bc26b4cc 100644 --- a/spec/std/isa/inst/Zabha/amominu.h.yaml +++ b/spec/std/isa/inst/Zabha/amominu.h.yaml @@ -9,7 +9,9 @@ name: amominu.h long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 11000------------001-----0101111 diff --git a/spec/std/isa/inst/Zabha/amoor.b.yaml b/spec/std/isa/inst/Zabha/amoor.b.yaml index 7737105c4..168f0d18e 100644 --- a/spec/std/isa/inst/Zabha/amoor.b.yaml +++ b/spec/std/isa/inst/Zabha/amoor.b.yaml @@ -9,7 +9,9 @@ name: amoor.b long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 01000------------000-----0101111 diff --git a/spec/std/isa/inst/Zabha/amoor.h.yaml b/spec/std/isa/inst/Zabha/amoor.h.yaml index 61db4b008..97e2c092b 100644 --- a/spec/std/isa/inst/Zabha/amoor.h.yaml +++ b/spec/std/isa/inst/Zabha/amoor.h.yaml @@ -9,7 +9,9 @@ name: amoor.h long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 01000------------001-----0101111 diff --git a/spec/std/isa/inst/Zabha/amoswap.b.yaml b/spec/std/isa/inst/Zabha/amoswap.b.yaml index 4e7ec3406..604fd0d50 100644 --- a/spec/std/isa/inst/Zabha/amoswap.b.yaml +++ b/spec/std/isa/inst/Zabha/amoswap.b.yaml @@ -9,7 +9,9 @@ name: amoswap.b long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 00001------------000-----0101111 diff --git a/spec/std/isa/inst/Zabha/amoswap.h.yaml b/spec/std/isa/inst/Zabha/amoswap.h.yaml index d4179f01f..b3789aaf9 100644 --- a/spec/std/isa/inst/Zabha/amoswap.h.yaml +++ b/spec/std/isa/inst/Zabha/amoswap.h.yaml @@ -9,7 +9,9 @@ name: amoswap.h long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 00001------------001-----0101111 diff --git a/spec/std/isa/inst/Zabha/amoxor.b.yaml b/spec/std/isa/inst/Zabha/amoxor.b.yaml index 44870f1f7..74b0e6fa0 100644 --- a/spec/std/isa/inst/Zabha/amoxor.b.yaml +++ b/spec/std/isa/inst/Zabha/amoxor.b.yaml @@ -9,7 +9,9 @@ name: amoxor.b long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 00100------------000-----0101111 diff --git a/spec/std/isa/inst/Zabha/amoxor.h.yaml b/spec/std/isa/inst/Zabha/amoxor.h.yaml index 86c2565ac..f0d271570 100644 --- a/spec/std/isa/inst/Zabha/amoxor.h.yaml +++ b/spec/std/isa/inst/Zabha/amoxor.h.yaml @@ -9,7 +9,9 @@ name: amoxor.h long_name: No synopsis available description: | No description available. -definedBy: Zabha +definedBy: + extension: + name: Zabha assembly: xd, xs2, (xs1) encoding: match: 00100------------001-----0101111 diff --git a/spec/std/isa/inst/Zacas/amocas.d.yaml b/spec/std/isa/inst/Zacas/amocas.d.yaml index 5410825b6..1756d08d5 100644 --- a/spec/std/isa/inst/Zacas/amocas.d.yaml +++ b/spec/std/isa/inst/Zacas/amocas.d.yaml @@ -1,7 +1,6 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear ---- # yaml-language-server: $schema=../../../../schemas/inst_schema.json $schema: "inst_schema.json#" @@ -49,7 +48,9 @@ description: | An AMOCAS.D instruction always requires write permissions. -definedBy: Zacas +definedBy: + extension: + name: Zacas assembly: xd, xs2, (xs1) encoding: RV32: diff --git a/spec/std/isa/inst/Zacas/amocas.q.yaml b/spec/std/isa/inst/Zacas/amocas.q.yaml index 0ab03e692..77bbf0830 100644 --- a/spec/std/isa/inst/Zacas/amocas.q.yaml +++ b/spec/std/isa/inst/Zacas/amocas.q.yaml @@ -1,7 +1,6 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear ---- # yaml-language-server: $schema=../../../../schemas/inst_schema.json $schema: "inst_schema.json#" @@ -43,7 +42,9 @@ description: | An AMOCAS.Q instruction always requires write permissions. -definedBy: Zacas +definedBy: + extension: + name: Zacas base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zacas/amocas.w.yaml b/spec/std/isa/inst/Zacas/amocas.w.yaml index 9828a364a..e75081180 100644 --- a/spec/std/isa/inst/Zacas/amocas.w.yaml +++ b/spec/std/isa/inst/Zacas/amocas.w.yaml @@ -1,7 +1,6 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear ---- # yaml-language-server: $schema=../../../../schemas/inst_schema.json $schema: "inst_schema.json#" @@ -43,7 +42,9 @@ description: | An AMOCAS.W instruction always requires write permissions. -definedBy: Zacas +definedBy: + extension: + name: Zacas assembly: xd, xs2, (xs1) encoding: match: 00101------------010-----0101111 diff --git a/spec/std/isa/inst/Zalasr/lb.aq.yaml b/spec/std/isa/inst/Zalasr/lb.aq.yaml index 243b30000..95d4b2ef3 100644 --- a/spec/std/isa/inst/Zalasr/lb.aq.yaml +++ b/spec/std/isa/inst/Zalasr/lb.aq.yaml @@ -9,7 +9,9 @@ name: lb.aq long_name: No synopsis available description: | No description available. -definedBy: Zalasr +definedBy: + extension: + name: Zalasr assembly: xd, (xs1) encoding: match: 001101000000-----000-----0101111 diff --git a/spec/std/isa/inst/Zalasr/ld.aq.yaml b/spec/std/isa/inst/Zalasr/ld.aq.yaml index e2d4c100f..003d9dbeb 100644 --- a/spec/std/isa/inst/Zalasr/ld.aq.yaml +++ b/spec/std/isa/inst/Zalasr/ld.aq.yaml @@ -9,7 +9,9 @@ name: ld.aq long_name: No synopsis available description: | No description available. -definedBy: Zalasr +definedBy: + extension: + name: Zalasr assembly: xd, (xs1) encoding: match: 001101000000-----011-----0101111 diff --git a/spec/std/isa/inst/Zalasr/lh.aq.yaml b/spec/std/isa/inst/Zalasr/lh.aq.yaml index dcb854ecd..ce713ce59 100644 --- a/spec/std/isa/inst/Zalasr/lh.aq.yaml +++ b/spec/std/isa/inst/Zalasr/lh.aq.yaml @@ -9,7 +9,9 @@ name: lh.aq long_name: No synopsis available description: | No description available. -definedBy: Zalasr +definedBy: + extension: + name: Zalasr assembly: xd, (xs1) encoding: match: 001101000000-----001-----0101111 diff --git a/spec/std/isa/inst/Zalasr/lw.aq.yaml b/spec/std/isa/inst/Zalasr/lw.aq.yaml index 70e93356b..71970a818 100644 --- a/spec/std/isa/inst/Zalasr/lw.aq.yaml +++ b/spec/std/isa/inst/Zalasr/lw.aq.yaml @@ -9,7 +9,9 @@ name: lw.aq long_name: No synopsis available description: | No description available. -definedBy: Zalasr +definedBy: + extension: + name: Zalasr assembly: xd, (xs1) encoding: match: 001101000000-----010-----0101111 diff --git a/spec/std/isa/inst/Zalasr/sb.rl.yaml b/spec/std/isa/inst/Zalasr/sb.rl.yaml index ec17d48a3..a7ffda413 100644 --- a/spec/std/isa/inst/Zalasr/sb.rl.yaml +++ b/spec/std/isa/inst/Zalasr/sb.rl.yaml @@ -9,7 +9,9 @@ name: sb.rl long_name: No synopsis available description: | No description available. -definedBy: Zalasr +definedBy: + extension: + name: Zalasr assembly: xs2, (xs1) encoding: match: 0011101----------000000000101111 diff --git a/spec/std/isa/inst/Zalasr/sd.rl.yaml b/spec/std/isa/inst/Zalasr/sd.rl.yaml index 301e4487b..514fdeb11 100644 --- a/spec/std/isa/inst/Zalasr/sd.rl.yaml +++ b/spec/std/isa/inst/Zalasr/sd.rl.yaml @@ -9,7 +9,9 @@ name: sd.rl long_name: No synopsis available description: | No description available. -definedBy: Zalasr +definedBy: + extension: + name: Zalasr assembly: xs2, (xs1) encoding: match: 0011101----------011000000101111 diff --git a/spec/std/isa/inst/Zalasr/sh.rl.yaml b/spec/std/isa/inst/Zalasr/sh.rl.yaml index c2583d856..44353eaf6 100644 --- a/spec/std/isa/inst/Zalasr/sh.rl.yaml +++ b/spec/std/isa/inst/Zalasr/sh.rl.yaml @@ -9,7 +9,9 @@ name: sh.rl long_name: No synopsis available description: | No description available. -definedBy: Zalasr +definedBy: + extension: + name: Zalasr assembly: xs2, (xs1) encoding: match: 0011101----------001000000101111 diff --git a/spec/std/isa/inst/Zalasr/sw.rl.yaml b/spec/std/isa/inst/Zalasr/sw.rl.yaml index 1e2d94822..68b516309 100644 --- a/spec/std/isa/inst/Zalasr/sw.rl.yaml +++ b/spec/std/isa/inst/Zalasr/sw.rl.yaml @@ -9,7 +9,9 @@ name: sw.rl long_name: No synopsis available description: | No description available. -definedBy: Zalasr +definedBy: + extension: + name: Zalasr assembly: xs2, (xs1) encoding: match: 0011101----------010000000101111 diff --git a/spec/std/isa/inst/Zalrsc/lr.d.yaml b/spec/std/isa/inst/Zalrsc/lr.d.yaml index 58ea3b740..2dc9b1e1d 100644 --- a/spec/std/isa/inst/Zalrsc/lr.d.yaml +++ b/spec/std/isa/inst/Zalrsc/lr.d.yaml @@ -45,7 +45,9 @@ description: | Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set. LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those with both bits clear, but may result in lower performance. -definedBy: Zalrsc +definedBy: + extension: + name: Zalrsc base: 64 assembly: xd, (xs1) encoding: diff --git a/spec/std/isa/inst/Zalrsc/lr.w.yaml b/spec/std/isa/inst/Zalrsc/lr.w.yaml index 8a994e59b..1ea62a38f 100644 --- a/spec/std/isa/inst/Zalrsc/lr.w.yaml +++ b/spec/std/isa/inst/Zalrsc/lr.w.yaml @@ -50,7 +50,9 @@ description: | Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set. LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those with both bits clear, but may result in lower performance. -definedBy: Zalrsc +definedBy: + extension: + name: Zalrsc assembly: xd, (xs1) encoding: match: 00010--00000-----010-----0101111 diff --git a/spec/std/isa/inst/Zalrsc/sc.d.yaml b/spec/std/isa/inst/Zalrsc/sc.d.yaml index 8b06cce3c..837ebf43a 100644 --- a/spec/std/isa/inst/Zalrsc/sc.d.yaml +++ b/spec/std/isa/inst/Zalrsc/sc.d.yaml @@ -101,7 +101,9 @@ description: | Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set. LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those with both bits clear, but may result in lower performance. -definedBy: Zalrsc +definedBy: + extension: + name: Zalrsc base: 64 assembly: xd, xs2, (xs1) encoding: diff --git a/spec/std/isa/inst/Zalrsc/sc.w.yaml b/spec/std/isa/inst/Zalrsc/sc.w.yaml index 380884c8b..8c0907f49 100644 --- a/spec/std/isa/inst/Zalrsc/sc.w.yaml +++ b/spec/std/isa/inst/Zalrsc/sc.w.yaml @@ -107,7 +107,9 @@ description: | Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set. LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those with both bits clear, but may result in lower performance. -definedBy: Zalrsc +definedBy: + extension: + name: Zalrsc assembly: xd, xs2, (xs1) encoding: match: 00011------------010-----0101111 diff --git a/spec/std/isa/inst/Zawrs/wrs.nto.yaml b/spec/std/isa/inst/Zawrs/wrs.nto.yaml index 835c008c2..18bf11a66 100644 --- a/spec/std/isa/inst/Zawrs/wrs.nto.yaml +++ b/spec/std/isa/inst/Zawrs/wrs.nto.yaml @@ -39,7 +39,9 @@ description: | may promptly cause an illegal instruction exception if used at U-mode. Unlike WFI, `wrs.nto` is expected to be used by software in U-mode when waiting on memory but without a deadline for that wait. -definedBy: Zawrs +definedBy: + extension: + name: Zawrs assembly: "" encoding: match: "00000000110100000000000001110011" diff --git a/spec/std/isa/inst/Zawrs/wrs.sto.yaml b/spec/std/isa/inst/Zawrs/wrs.sto.yaml index 4d1c26f93..0961babeb 100644 --- a/spec/std/isa/inst/Zawrs/wrs.sto.yaml +++ b/spec/std/isa/inst/Zawrs/wrs.sto.yaml @@ -35,7 +35,9 @@ description: | The duration of a `wrs.sto` instruction's timeout may vary significantly within and among implementations. In typical implementations this duration should be roughly in the range of 10 to 100 times an on-chip cache miss latency or a cacheless access to main memory. -definedBy: Zawrs +definedBy: + extension: + name: Zawrs assembly: "" encoding: match: "00000001110100000000000001110011" diff --git a/spec/std/isa/inst/Zba/add.uw.yaml b/spec/std/isa/inst/Zba/add.uw.yaml index d24e93996..1e89cc543 100644 --- a/spec/std/isa/inst/Zba/add.uw.yaml +++ b/spec/std/isa/inst/Zba/add.uw.yaml @@ -11,7 +11,9 @@ base: 64 description: | Performs an XLEN-wide addition between rs2 and the zero-extended least-significant word of rs1. -definedBy: Zba +definedBy: + extension: + name: Zba assembly: xd, xs1, xs2 format: $inherits: diff --git a/spec/std/isa/inst/Zba/sh1add.uw.yaml b/spec/std/isa/inst/Zba/sh1add.uw.yaml index 993131203..4108954c2 100644 --- a/spec/std/isa/inst/Zba/sh1add.uw.yaml +++ b/spec/std/isa/inst/Zba/sh1add.uw.yaml @@ -11,7 +11,9 @@ description: | Performs an XLEN-wide addition of two addends. The first addend is rs2. The second addend is the unsigned value formed by extracting the least-significant word of rs1 and shifting it left by 1 place. -definedBy: Zba +definedBy: + extension: + name: Zba base: 64 encoding: match: 0010000----------010-----0111011 diff --git a/spec/std/isa/inst/Zba/sh1add.yaml b/spec/std/isa/inst/Zba/sh1add.yaml index d4e1734e8..32b1866d1 100644 --- a/spec/std/isa/inst/Zba/sh1add.yaml +++ b/spec/std/isa/inst/Zba/sh1add.yaml @@ -9,7 +9,9 @@ name: sh1add long_name: Shift left by 1 and add description: | Shifts `rs1` to the left by 1 bit and adds it to `rs2`. -definedBy: Zba +definedBy: + extension: + name: Zba assembly: xd, xs1, xs2 encoding: match: 0010000----------010-----0110011 diff --git a/spec/std/isa/inst/Zba/sh2add.uw.yaml b/spec/std/isa/inst/Zba/sh2add.uw.yaml index 0788466bd..6d5200150 100644 --- a/spec/std/isa/inst/Zba/sh2add.uw.yaml +++ b/spec/std/isa/inst/Zba/sh2add.uw.yaml @@ -11,7 +11,9 @@ description: | Performs an XLEN-wide addition of two addends. The first addend is rs2. The second addend is the unsigned value formed by extracting the least-significant word of rs1 and shifting it left by 2 places. -definedBy: Zba +definedBy: + extension: + name: Zba base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zba/sh2add.yaml b/spec/std/isa/inst/Zba/sh2add.yaml index 06aa56f4a..a98ca8c56 100644 --- a/spec/std/isa/inst/Zba/sh2add.yaml +++ b/spec/std/isa/inst/Zba/sh2add.yaml @@ -9,7 +9,9 @@ name: sh2add long_name: Shift left by 2 and add description: | Shifts `rs1` to the left by 2 places and adds it to `rs2`. -definedBy: Zba +definedBy: + extension: + name: Zba assembly: xd, xs1, xs2 encoding: match: 0010000----------100-----0110011 diff --git a/spec/std/isa/inst/Zba/sh3add.uw.yaml b/spec/std/isa/inst/Zba/sh3add.uw.yaml index 98a1a0f53..4764c40c0 100644 --- a/spec/std/isa/inst/Zba/sh3add.uw.yaml +++ b/spec/std/isa/inst/Zba/sh3add.uw.yaml @@ -11,7 +11,9 @@ description: | Performs an XLEN-wide addition of two addends. The first addend is rs2. The second addend is the unsigned value formed by extracting the least-significant word of rs1 and shifting it left by 3 places. -definedBy: Zba +definedBy: + extension: + name: Zba base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zba/sh3add.yaml b/spec/std/isa/inst/Zba/sh3add.yaml index e026d2b51..e7cd493db 100644 --- a/spec/std/isa/inst/Zba/sh3add.yaml +++ b/spec/std/isa/inst/Zba/sh3add.yaml @@ -9,7 +9,9 @@ name: sh3add long_name: Shift left by 3 and add description: | Shifts `rs1` to the left by 3 places and adds it to `rs2`. -definedBy: Zba +definedBy: + extension: + name: Zba assembly: xd, xs1, xs2 encoding: match: 0010000----------110-----0110011 diff --git a/spec/std/isa/inst/Zba/slli.uw.yaml b/spec/std/isa/inst/Zba/slli.uw.yaml index e4223e5e8..fecfa1bea 100644 --- a/spec/std/isa/inst/Zba/slli.uw.yaml +++ b/spec/std/isa/inst/Zba/slli.uw.yaml @@ -13,7 +13,9 @@ description: | [NOTE] This instruction is the same as `slli` with `zext.w` performed on rs1 before shifting. -definedBy: Zba +definedBy: + extension: + name: Zba base: 64 encoding: match: 000010-----------001-----0011011 diff --git a/spec/std/isa/inst/Zbb/clz.yaml b/spec/std/isa/inst/Zbb/clz.yaml index a1f0a3188..1eed3c0ed 100644 --- a/spec/std/isa/inst/Zbb/clz.yaml +++ b/spec/std/isa/inst/Zbb/clz.yaml @@ -12,7 +12,9 @@ description: | starting at the most-significant bit (i.e., XLEN-1) and progressing to bit 0. Accordingly, if the input is 0, the output is XLEN, and if the most-significant bit of the input is a 1, the output is 0. -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1 encoding: match: 011000000000-----001-----0010011 diff --git a/spec/std/isa/inst/Zbb/clzw.yaml b/spec/std/isa/inst/Zbb/clzw.yaml index 566dd59ed..1a3c2fbdd 100644 --- a/spec/std/isa/inst/Zbb/clzw.yaml +++ b/spec/std/isa/inst/Zbb/clzw.yaml @@ -12,7 +12,9 @@ description: | Accordingly, if the least-significant word is 0, the output is 32, and if the most-significant bit of the word (_i.e._, bit 31) is a 1, the output is 0. base: 64 -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1 encoding: match: 011000000000-----001-----0011011 diff --git a/spec/std/isa/inst/Zbb/cpop.yaml b/spec/std/isa/inst/Zbb/cpop.yaml index 88531c3e9..dc5ba361b 100644 --- a/spec/std/isa/inst/Zbb/cpop.yaml +++ b/spec/std/isa/inst/Zbb/cpop.yaml @@ -21,7 +21,9 @@ description: | function `__builtin_popcountl (unsigned long x)` for LP64 is implemented by cpop on RV64. ---- -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1 encoding: match: 011000000010-----001-----0010011 diff --git a/spec/std/isa/inst/Zbb/cpopw.yaml b/spec/std/isa/inst/Zbb/cpopw.yaml index 2d6f03be8..9734b4590 100644 --- a/spec/std/isa/inst/Zbb/cpopw.yaml +++ b/spec/std/isa/inst/Zbb/cpopw.yaml @@ -21,7 +21,9 @@ description: | function `__builtin_popcountl (unsigned long x)` for LP64 is implemented by cpop on RV64. ---- -definedBy: Zbb +definedBy: + extension: + name: Zbb base: 64 assembly: xd, xs1 encoding: diff --git a/spec/std/isa/inst/Zbb/ctz.yaml b/spec/std/isa/inst/Zbb/ctz.yaml index c54eac5cc..1c8c40100 100644 --- a/spec/std/isa/inst/Zbb/ctz.yaml +++ b/spec/std/isa/inst/Zbb/ctz.yaml @@ -13,7 +13,9 @@ description: | to the most-significant bit (i.e., XLEN-1). Accordingly, if the input is 0, the output is XLEN, and if the least-significant bit of the input is a 1, the output is 0. -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1 encoding: match: 011000000001-----001-----0010011 diff --git a/spec/std/isa/inst/Zbb/ctzw.yaml b/spec/std/isa/inst/Zbb/ctzw.yaml index 2959f452b..8852d133e 100644 --- a/spec/std/isa/inst/Zbb/ctzw.yaml +++ b/spec/std/isa/inst/Zbb/ctzw.yaml @@ -13,7 +13,9 @@ description: | to the most-significant bit of the least-significant word (i.e., 31). Accordingly, if the least-significant word is 0, the output is 32, and if the least-significant bit of the input is a 1, the output is 0. -definedBy: Zbb +definedBy: + extension: + name: Zbb base: 64 assembly: xd, xs1 encoding: diff --git a/spec/std/isa/inst/Zbb/max.yaml b/spec/std/isa/inst/Zbb/max.yaml index b52418173..10b6006bf 100644 --- a/spec/std/isa/inst/Zbb/max.yaml +++ b/spec/std/isa/inst/Zbb/max.yaml @@ -17,7 +17,9 @@ description: | common sequence, it is suggested that they are scheduled with no intervening instructions so that implementations that are so optimized can fuse them together. -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1, xs2 encoding: match: 0000101----------110-----0110011 diff --git a/spec/std/isa/inst/Zbb/maxu.yaml b/spec/std/isa/inst/Zbb/maxu.yaml index 181cbe7c2..81fdbeca3 100644 --- a/spec/std/isa/inst/Zbb/maxu.yaml +++ b/spec/std/isa/inst/Zbb/maxu.yaml @@ -9,7 +9,9 @@ name: maxu long_name: Unsigned maximum description: | Returns the larger of two unsigned integers. -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1, xs2 encoding: match: 0000101----------111-----0110011 diff --git a/spec/std/isa/inst/Zbb/min.yaml b/spec/std/isa/inst/Zbb/min.yaml index 907f56509..280e384c4 100644 --- a/spec/std/isa/inst/Zbb/min.yaml +++ b/spec/std/isa/inst/Zbb/min.yaml @@ -9,7 +9,9 @@ name: min long_name: Minimum description: | Returns the smaller of two signed integers. -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1, xs2 encoding: match: 0000101----------100-----0110011 diff --git a/spec/std/isa/inst/Zbb/minu.yaml b/spec/std/isa/inst/Zbb/minu.yaml index f6ad5f081..804e0a76e 100644 --- a/spec/std/isa/inst/Zbb/minu.yaml +++ b/spec/std/isa/inst/Zbb/minu.yaml @@ -9,7 +9,9 @@ name: minu long_name: Unsigned minimum description: | Returns the smaller of two unsigned integers. -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1, xs2 encoding: match: 0000101----------101-----0110011 diff --git a/spec/std/isa/inst/Zbb/orc.b.yaml b/spec/std/isa/inst/Zbb/orc.b.yaml index 309daeeb2..00bb19ce3 100644 --- a/spec/std/isa/inst/Zbb/orc.b.yaml +++ b/spec/std/isa/inst/Zbb/orc.b.yaml @@ -11,7 +11,9 @@ description: | Combines the bits within each byte using bitwise logical OR. This sets the bits of each byte in the result rd to all zeros if no bit within the respective byte of rs is set, or to all ones if any bit within the respective byte of rs is set. -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1 encoding: match: 001010000111-----101-----0010011 diff --git a/spec/std/isa/inst/Zbb/sext.b.yaml b/spec/std/isa/inst/Zbb/sext.b.yaml index 505288348..ee24b81e4 100644 --- a/spec/std/isa/inst/Zbb/sext.b.yaml +++ b/spec/std/isa/inst/Zbb/sext.b.yaml @@ -10,7 +10,9 @@ long_name: Sign-extend byte description: | Sign-extends the least-significant byte in the source to XLEN by copying the most-significant bit in the byte (i.e., bit 7) to all of the more-significant bits. -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1 encoding: match: 011000000100-----001-----0010011 diff --git a/spec/std/isa/inst/Zbb/sext.h.yaml b/spec/std/isa/inst/Zbb/sext.h.yaml index 930316c5b..124ddb2d8 100644 --- a/spec/std/isa/inst/Zbb/sext.h.yaml +++ b/spec/std/isa/inst/Zbb/sext.h.yaml @@ -10,7 +10,9 @@ long_name: Sign-extend halfword description: | Sign-extends the least-significant halfword in the source to XLEN by copying the most-significant bit in the halfword (i.e., bit 15) to all of the more-significant bits. -definedBy: Zbb +definedBy: + extension: + name: Zbb assembly: xd, xs1 encoding: match: 011000000101-----001-----0010011 diff --git a/spec/std/isa/inst/Zbb/zext.h.yaml b/spec/std/isa/inst/Zbb/zext.h.yaml index 9373520eb..25ee6506c 100644 --- a/spec/std/isa/inst/Zbb/zext.h.yaml +++ b/spec/std/isa/inst/Zbb/zext.h.yaml @@ -18,9 +18,11 @@ description: | The *zext.h* instruction is a pseudo-op for `packw` when `Zbkb` is implemented and XLEN == 64. definedBy: # When The Bit-manipulation for Cryptography extension (Zbkb) is implemented, then zext.h is an alias of pack. - allOf: - - Zbb - - not: Zbkb + extension: + allOf: + - name: Zbb + - not: + name: Zbkb encoding: RV32: match: 000010000000-----100-----0110011 diff --git a/spec/std/isa/inst/Zbc/clmulr.yaml b/spec/std/isa/inst/Zbc/clmulr.yaml index 3772aac57..e1d429c98 100644 --- a/spec/std/isa/inst/Zbc/clmulr.yaml +++ b/spec/std/isa/inst/Zbc/clmulr.yaml @@ -9,7 +9,9 @@ name: clmulr long_name: Carry-less multiply (reversed) description: | `clmulr` produces bits 2*XLEN-2:XLEN-1 of the 2*XLEN carry-less product -definedBy: Zbc +definedBy: + extension: + name: Zbc assembly: xd, xs1, xs2 access: s: always diff --git a/spec/std/isa/inst/Zbkb/brev8.yaml b/spec/std/isa/inst/Zbkb/brev8.yaml index 159acf964..2658a2d6b 100644 --- a/spec/std/isa/inst/Zbkb/brev8.yaml +++ b/spec/std/isa/inst/Zbkb/brev8.yaml @@ -9,7 +9,9 @@ name: brev8 long_name: Reverse bits in bytes description: | Reverses the order of the bits in every byte of a register. -definedBy: Zbkb +definedBy: + extension: + name: Zbkb assembly: xd, xs1 encoding: match: 011010000111-----101-----0010011 diff --git a/spec/std/isa/inst/Zbkb/pack.yaml b/spec/std/isa/inst/Zbkb/pack.yaml index e71031657..f4cd2e83b 100644 --- a/spec/std/isa/inst/Zbkb/pack.yaml +++ b/spec/std/isa/inst/Zbkb/pack.yaml @@ -9,7 +9,9 @@ name: pack long_name: No synopsis available description: | No description available. -definedBy: Zbkb +definedBy: + extension: + name: Zbkb assembly: xd, xs1, xs2 encoding: match: 0000100----------100-----0110011 diff --git a/spec/std/isa/inst/Zbkb/packh.yaml b/spec/std/isa/inst/Zbkb/packh.yaml index 2d29c9320..e24202206 100644 --- a/spec/std/isa/inst/Zbkb/packh.yaml +++ b/spec/std/isa/inst/Zbkb/packh.yaml @@ -9,7 +9,9 @@ name: packh long_name: No synopsis available description: | No description available. -definedBy: Zbkb +definedBy: + extension: + name: Zbkb assembly: xd, xs1, xs2 encoding: match: 0000100----------111-----0110011 diff --git a/spec/std/isa/inst/Zbkb/packw.yaml b/spec/std/isa/inst/Zbkb/packw.yaml index 86d8e1c02..7849c38e9 100644 --- a/spec/std/isa/inst/Zbkb/packw.yaml +++ b/spec/std/isa/inst/Zbkb/packw.yaml @@ -9,7 +9,9 @@ name: packw long_name: No synopsis available description: | No description available. -definedBy: Zbkb +definedBy: + extension: + name: Zbkb base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zbkb/unzip.yaml b/spec/std/isa/inst/Zbkb/unzip.yaml index 4b6cf3970..44f6ef6fd 100644 --- a/spec/std/isa/inst/Zbkb/unzip.yaml +++ b/spec/std/isa/inst/Zbkb/unzip.yaml @@ -11,7 +11,9 @@ description: | Gathers bits from the high and low halves of the source word into odd/even bit positions in the destination word. It is the inverse of the zip instruction. This instruction is available only on RV32. -definedBy: Zbkb +definedBy: + extension: + name: Zbkb assembly: xd, xs1 encoding: match: 000010001111-----101-----0010011 diff --git a/spec/std/isa/inst/Zbkb/zip.yaml b/spec/std/isa/inst/Zbkb/zip.yaml index ef6206a24..d2b266bad 100644 --- a/spec/std/isa/inst/Zbkb/zip.yaml +++ b/spec/std/isa/inst/Zbkb/zip.yaml @@ -11,7 +11,9 @@ description: | Scatters all of the odd and even bits of a source word into the high and low halves of a destination word. It is the inverse of the unzip instruction. This instruction is available only on RV32. -definedBy: Zbkb +definedBy: + extension: + name: Zbkb assembly: xd, xs1 encoding: match: 000010001111-----001-----0010011 diff --git a/spec/std/isa/inst/Zbkx/xperm4.yaml b/spec/std/isa/inst/Zbkx/xperm4.yaml index d43c1fd5b..cc0dd7ea1 100644 --- a/spec/std/isa/inst/Zbkx/xperm4.yaml +++ b/spec/std/isa/inst/Zbkx/xperm4.yaml @@ -11,7 +11,9 @@ description: | The xperm4 instruction operates on nibbles. The rs1 register contains a vector of XLEN/4 4-bit elements. The rs2 register contains a vector of XLEN/4 4-bit indexes. The result is each element in rs2 replaced by the indexed element in rs1, or zero if the index into rs2 is out of bounds. -definedBy: Zbkx +definedBy: + extension: + name: Zbkx assembly: xd, xs1, xs2 encoding: match: 0010100----------010-----0110011 diff --git a/spec/std/isa/inst/Zbkx/xperm8.yaml b/spec/std/isa/inst/Zbkx/xperm8.yaml index 7dee63b67..b2dbab1dc 100644 --- a/spec/std/isa/inst/Zbkx/xperm8.yaml +++ b/spec/std/isa/inst/Zbkx/xperm8.yaml @@ -11,7 +11,9 @@ description: | The xperm8 instruction operates on bytes. The rs1 register contains a vector of XLEN/8 8-bit elements. The rs2 register contains a vector of XLEN/8 8-bit indexes. The result is each element in rs2 replaced by the indexed element in rs1, or zero if the index into rs2 is out of bounds. -definedBy: Zbkx +definedBy: + extension: + name: Zbkx assembly: xd, xs1, xs2 encoding: match: 0010100----------100-----0110011 diff --git a/spec/std/isa/inst/Zbs/bclr.yaml b/spec/std/isa/inst/Zbs/bclr.yaml index be2d5c3a1..24e9e7f40 100644 --- a/spec/std/isa/inst/Zbs/bclr.yaml +++ b/spec/std/isa/inst/Zbs/bclr.yaml @@ -10,7 +10,9 @@ long_name: Single-Bit clear (Register) description: | Returns rs1 with a single bit cleared at the index specified in rs2. The index is read from the lower log2(XLEN) bits of rs2. -definedBy: Zbs +definedBy: + extension: + name: Zbs assembly: xd, xs1, xs2 encoding: match: 0100100----------001-----0110011 diff --git a/spec/std/isa/inst/Zbs/bclri.yaml b/spec/std/isa/inst/Zbs/bclri.yaml index 9eddce850..e8f374439 100644 --- a/spec/std/isa/inst/Zbs/bclri.yaml +++ b/spec/std/isa/inst/Zbs/bclri.yaml @@ -11,7 +11,9 @@ description: | Returns rs1 with a single bit cleared at the index specified in shamt. The index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings corresponding to shamt[5]=1 are reserved. -definedBy: Zbs +definedBy: + extension: + name: Zbs assembly: xd, xs1, shamt encoding: RV32: diff --git a/spec/std/isa/inst/Zbs/bext.yaml b/spec/std/isa/inst/Zbs/bext.yaml index 34c310591..09de96137 100644 --- a/spec/std/isa/inst/Zbs/bext.yaml +++ b/spec/std/isa/inst/Zbs/bext.yaml @@ -10,7 +10,9 @@ long_name: Single-Bit extract (Register) description: | Returns a single bit extracted from rs1 at the index specified in rs2. The index is read from the lower log2(XLEN) bits of rs2. -definedBy: Zbs +definedBy: + extension: + name: Zbs assembly: xd, xs1, xs2 encoding: match: 0100100----------101-----0110011 diff --git a/spec/std/isa/inst/Zbs/bexti.yaml b/spec/std/isa/inst/Zbs/bexti.yaml index d3b8d003a..b749dd54b 100644 --- a/spec/std/isa/inst/Zbs/bexti.yaml +++ b/spec/std/isa/inst/Zbs/bexti.yaml @@ -11,7 +11,9 @@ description: | Returns a single bit extracted from rs1 at the index specified in rs2. The index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings corresponding to shamt[5]=1 are reserved. -definedBy: Zbs +definedBy: + extension: + name: Zbs assembly: xd, xs1, shamt encoding: RV32: diff --git a/spec/std/isa/inst/Zbs/binv.yaml b/spec/std/isa/inst/Zbs/binv.yaml index c92d22937..99d16556c 100644 --- a/spec/std/isa/inst/Zbs/binv.yaml +++ b/spec/std/isa/inst/Zbs/binv.yaml @@ -10,7 +10,9 @@ long_name: Single-Bit invert (Register) description: | Returns rs1 with a single bit inverted at the index specified in rs2. The index is read from the lower log2(XLEN) bits of rs2. -definedBy: Zbs +definedBy: + extension: + name: Zbs assembly: xd, xs1, xs2 encoding: match: 0110100----------001-----0110011 diff --git a/spec/std/isa/inst/Zbs/binvi.yaml b/spec/std/isa/inst/Zbs/binvi.yaml index 4dc3a0620..1aeab09f3 100644 --- a/spec/std/isa/inst/Zbs/binvi.yaml +++ b/spec/std/isa/inst/Zbs/binvi.yaml @@ -11,7 +11,9 @@ description: | Returns rs1 with a single bit inverted at the index specified in shamt. The index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings corresponding to shamt[5]=1 are reserved. -definedBy: Zbs +definedBy: + extension: + name: Zbs assembly: xd, xs1, shamt encoding: RV32: diff --git a/spec/std/isa/inst/Zbs/bset.yaml b/spec/std/isa/inst/Zbs/bset.yaml index 102cc7a09..18f976f64 100644 --- a/spec/std/isa/inst/Zbs/bset.yaml +++ b/spec/std/isa/inst/Zbs/bset.yaml @@ -10,7 +10,9 @@ long_name: Single-Bit set (Register) description: | Returns rs1 with a single bit set at the index specified in rs2. The index is read from the lower log2(XLEN) bits of rs2. -definedBy: Zbs +definedBy: + extension: + name: Zbs assembly: xd, xs1, xs2 encoding: match: 0010100----------001-----0110011 diff --git a/spec/std/isa/inst/Zbs/bseti.yaml b/spec/std/isa/inst/Zbs/bseti.yaml index 11a767499..2d0463cf0 100644 --- a/spec/std/isa/inst/Zbs/bseti.yaml +++ b/spec/std/isa/inst/Zbs/bseti.yaml @@ -11,7 +11,9 @@ description: | Returns rs1 with a single bit set at the index specified in shamt. The index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings corresponding to shamt[5]=1 are reserved. -definedBy: Zbs +definedBy: + extension: + name: Zbs assembly: xd, xs1, shamt encoding: RV32: diff --git a/spec/std/isa/inst/Zcb/c.lbu.yaml b/spec/std/isa/inst/Zcb/c.lbu.yaml index e2feeaf55..fc7377c4e 100644 --- a/spec/std/isa/inst/Zcb/c.lbu.yaml +++ b/spec/std/isa/inst/Zcb/c.lbu.yaml @@ -12,9 +12,10 @@ description: | It computes an effective address by adding the zero-extended offset, to the base address in register rs1. It expands to `lbu` `rd, offset(rs1)`. definedBy: - anyOf: - - Zcb - - Zce + extension: + anyOf: + - name: Zcb + - name: Zce assembly: xd, imm(xs1) encoding: match: 100000--------00 diff --git a/spec/std/isa/inst/Zcb/c.lh.yaml b/spec/std/isa/inst/Zcb/c.lh.yaml index 92f02dc34..20cebc379 100644 --- a/spec/std/isa/inst/Zcb/c.lh.yaml +++ b/spec/std/isa/inst/Zcb/c.lh.yaml @@ -12,9 +12,10 @@ description: | It computes an effective address by adding the zero-extended offset, to the base address in register rs1. It expands to `lh` `rd, offset(rs1)`. definedBy: - anyOf: - - Zcb - - Zce + extension: + anyOf: + - name: Zcb + - name: Zce assembly: xd, imm(xs1) encoding: match: 100001---1----00 diff --git a/spec/std/isa/inst/Zcb/c.lhu.yaml b/spec/std/isa/inst/Zcb/c.lhu.yaml index 7a73db5c7..37d40cca3 100644 --- a/spec/std/isa/inst/Zcb/c.lhu.yaml +++ b/spec/std/isa/inst/Zcb/c.lhu.yaml @@ -12,9 +12,10 @@ description: | It computes an effective address by adding the zero-extended offset, to the base address in register rs1. It expands to `lhu` `rd, offset(rs1)`. definedBy: - anyOf: - - Zcb - - Zce + extension: + anyOf: + - name: Zcb + - name: Zce assembly: xd, imm(xs1) encoding: match: 100001---0----00 diff --git a/spec/std/isa/inst/Zcb/c.mul.yaml b/spec/std/isa/inst/Zcb/c.mul.yaml index f726bd7cb..35876355a 100644 --- a/spec/std/isa/inst/Zcb/c.mul.yaml +++ b/spec/std/isa/inst/Zcb/c.mul.yaml @@ -11,9 +11,10 @@ description: | Multiplies XLEN bits of the source operands from rsd' and rs2' and writes the lowest XLEN bits of the result to rsd'. definedBy: - allOf: - - Zcb - - Zmmul + extension: + allOf: + - name: Zcb + - name: Zmmul assembly: xd, xs2 encoding: match: 100111---10---01 @@ -27,7 +28,7 @@ access: u: always vs: always vu: always -operation(): | +operation(): |2 if (implemented?(ExtensionName::M) && (CSR[misa].M == 1'b0)) { raise (ExceptionCode::IllegalInstruction, mode(), $encoding); diff --git a/spec/std/isa/inst/Zcb/c.not.yaml b/spec/std/isa/inst/Zcb/c.not.yaml index 16c073a7e..1fe400483 100644 --- a/spec/std/isa/inst/Zcb/c.not.yaml +++ b/spec/std/isa/inst/Zcb/c.not.yaml @@ -12,9 +12,10 @@ description: | This instruction takes the one's complement of rd'/rs1' and writes the result to the same register. definedBy: - anyOf: - - Zcb - - Zce + extension: + anyOf: + - name: Zcb + - name: Zce assembly: xd encoding: match: 100111---1110101 @@ -26,7 +27,7 @@ access: u: always vs: always vu: always -operation(): | +operation(): |2 if (implemented?(ExtensionName::C) && (CSR[misa].C == 1'b0)) { raise(ExceptionCode::IllegalInstruction, mode(), $encoding); diff --git a/spec/std/isa/inst/Zcb/c.sb.yaml b/spec/std/isa/inst/Zcb/c.sb.yaml index fbd89b97c..0d1ae58c0 100644 --- a/spec/std/isa/inst/Zcb/c.sb.yaml +++ b/spec/std/isa/inst/Zcb/c.sb.yaml @@ -12,9 +12,10 @@ description: | It computes an effective address by adding the zero-extended offset, to the base address in register rs1. It expands to `sb` `rs2, offset(rs1)`. definedBy: - anyOf: - - Zcb - - Zce + extension: + anyOf: + - name: Zcb + - name: Zce assembly: xs2, imm(xs1) encoding: match: 100010--------00 diff --git a/spec/std/isa/inst/Zcb/c.sext.b.yaml b/spec/std/isa/inst/Zcb/c.sext.b.yaml index 1af11851c..60a628f4f 100644 --- a/spec/std/isa/inst/Zcb/c.sext.b.yaml +++ b/spec/std/isa/inst/Zcb/c.sext.b.yaml @@ -13,9 +13,10 @@ description: | the most-significant bit in the byte (i.e., bit 7) to all of the more-significant bits. definedBy: - allOf: - - Zcb - - Zbb + extension: + allOf: + - name: Zcb + - name: Zbb assembly: xd encoding: match: 100111---1100101 @@ -27,7 +28,7 @@ access: u: always vs: always vu: always -operation(): | +operation(): |2 if (implemented?(ExtensionName::B) && (CSR[misa].B == 1'b0)) { raise (ExceptionCode::IllegalInstruction, mode(), $encoding); diff --git a/spec/std/isa/inst/Zcb/c.sext.h.yaml b/spec/std/isa/inst/Zcb/c.sext.h.yaml index f24381382..50ab341b1 100644 --- a/spec/std/isa/inst/Zcb/c.sext.h.yaml +++ b/spec/std/isa/inst/Zcb/c.sext.h.yaml @@ -13,9 +13,10 @@ description: | the most-significant bit in the halfword (i.e., bit 15) to all of the more-significant bits. definedBy: - allOf: - - Zcb - - Zbb + extension: + allOf: + - name: Zcb + - name: Zbb assembly: xd encoding: match: 100111---1101101 @@ -27,7 +28,7 @@ access: u: always vs: always vu: always -operation(): | +operation(): |2 if (implemented?(ExtensionName::B) && (CSR[misa].B == 1'b0)) { raise (ExceptionCode::IllegalInstruction, mode(), $encoding); diff --git a/spec/std/isa/inst/Zcb/c.sh.yaml b/spec/std/isa/inst/Zcb/c.sh.yaml index 0ae9c1431..3f89b504a 100644 --- a/spec/std/isa/inst/Zcb/c.sh.yaml +++ b/spec/std/isa/inst/Zcb/c.sh.yaml @@ -12,9 +12,10 @@ description: | It computes an effective address by adding the zero-extended offset, to the base address in register rs1. It expands to `sh` `rs2, offset(rs1)`. definedBy: - anyOf: - - Zcb - - Zce + extension: + anyOf: + - name: Zcb + - name: Zce assembly: xs2, imm(xs1) encoding: match: 100011---0----00 diff --git a/spec/std/isa/inst/Zcb/c.zext.b.yaml b/spec/std/isa/inst/Zcb/c.zext.b.yaml index daecf0a31..c71e1b88b 100644 --- a/spec/std/isa/inst/Zcb/c.zext.b.yaml +++ b/spec/std/isa/inst/Zcb/c.zext.b.yaml @@ -13,9 +13,10 @@ description: | 0's into all of the bits more significant than 7. definedBy: - allOf: - - Zcb - - Zbb + extension: + allOf: + - name: Zcb + - name: Zbb assembly: xd encoding: match: 100111---1100001 @@ -27,7 +28,7 @@ access: u: always vs: always vu: always -operation(): | +operation(): |2 if (implemented?(ExtensionName::B) && (CSR[misa].B == 1'b0)) { raise (ExceptionCode::IllegalInstruction, mode(), $encoding); diff --git a/spec/std/isa/inst/Zcb/c.zext.h.yaml b/spec/std/isa/inst/Zcb/c.zext.h.yaml index ca2c1e0bc..69a7f6054 100644 --- a/spec/std/isa/inst/Zcb/c.zext.h.yaml +++ b/spec/std/isa/inst/Zcb/c.zext.h.yaml @@ -13,9 +13,10 @@ description: | 0's into all of the bits more significant than 15. definedBy: - allOf: - - Zcb - - Zbb + extension: + allOf: + - name: Zcb + - name: Zbb assembly: xd encoding: match: 100111---1101001 @@ -27,7 +28,7 @@ access: u: always vs: always vu: always -operation(): | +operation(): |2 if (implemented?(ExtensionName::B) && (CSR[misa].B == 1'b0)) { raise (ExceptionCode::IllegalInstruction, mode(), $encoding); diff --git a/spec/std/isa/inst/Zcb/c.zext.w.yaml b/spec/std/isa/inst/Zcb/c.zext.w.yaml index 4541d83d0..6bb6725cf 100644 --- a/spec/std/isa/inst/Zcb/c.zext.w.yaml +++ b/spec/std/isa/inst/Zcb/c.zext.w.yaml @@ -12,9 +12,10 @@ description: | It zero-extends the least-significant word of the operand to XLEN bits by inserting zeros into all of the bits more significant than 31. definedBy: - allOf: - - Zcb - - Zbb + extension: + allOf: + - name: Zcb + - name: Zbb assembly: xd base: 64 encoding: @@ -27,7 +28,7 @@ access: u: always vs: always vu: always -operation(): | +operation(): |2 if (implemented?(ExtensionName::B) && (CSR[misa].B == 1'b0)) { raise (ExceptionCode::IllegalInstruction, mode(), $encoding); diff --git a/spec/std/isa/inst/Zcd/c.fld.yaml b/spec/std/isa/inst/Zcd/c.fld.yaml index c7ec62f1f..43296aca9 100644 --- a/spec/std/isa/inst/Zcd/c.fld.yaml +++ b/spec/std/isa/inst/Zcd/c.fld.yaml @@ -13,11 +13,12 @@ description: | to the base address in register xs1. It expands to `fld` `fd, offset(xs1)`. definedBy: - anyOf: - - allOf: - - C - - D - - Zcd + extension: + anyOf: + - allOf: + - name: C + - name: D + - name: Zcd assembly: xd, imm(xs1) encoding: match: 001-----------00 diff --git a/spec/std/isa/inst/Zcd/c.fldsp.yaml b/spec/std/isa/inst/Zcd/c.fldsp.yaml index 5f077ddd0..a8a20e640 100644 --- a/spec/std/isa/inst/Zcd/c.fldsp.yaml +++ b/spec/std/isa/inst/Zcd/c.fldsp.yaml @@ -13,11 +13,12 @@ description: | to the stack pointer, x2. It expands to `fld` `fd, offset(x2)`. definedBy: - anyOf: - - allOf: - - C - - D - - Zcd + extension: + anyOf: + - allOf: + - name: C + - name: D + - name: Zcd assembly: fd, imm(sp) encoding: match: 001-----------10 diff --git a/spec/std/isa/inst/Zcd/c.fsd.yaml b/spec/std/isa/inst/Zcd/c.fsd.yaml index 556524b2e..ecaa788cd 100644 --- a/spec/std/isa/inst/Zcd/c.fsd.yaml +++ b/spec/std/isa/inst/Zcd/c.fsd.yaml @@ -13,11 +13,12 @@ description: | to the base address in register xs1. It expands to `fsd` `fs2, offset(xs1)`. definedBy: - anyOf: - - allOf: - - C - - D - - Zcd + extension: + anyOf: + - allOf: + - name: C + - name: D + - name: Zcd assembly: xs2, imm(xs1) encoding: match: 101-----------00 diff --git a/spec/std/isa/inst/Zcd/c.fsdsp.yaml b/spec/std/isa/inst/Zcd/c.fsdsp.yaml index 33e8b280c..df8ebc858 100644 --- a/spec/std/isa/inst/Zcd/c.fsdsp.yaml +++ b/spec/std/isa/inst/Zcd/c.fsdsp.yaml @@ -13,11 +13,12 @@ description: | to the stack pointer, x2. It expands to `fsd` `fs2, offset(x2)`. definedBy: - anyOf: - - allOf: - - C - - D - - Zcd + extension: + anyOf: + - allOf: + - name: C + - name: D + - name: Zcd assembly: fs2, imm(sp) encoding: match: 101-----------10 diff --git a/spec/std/isa/inst/Zcf/c.flw.yaml b/spec/std/isa/inst/Zcf/c.flw.yaml index a8601cc18..d99385f7d 100644 --- a/spec/std/isa/inst/Zcf/c.flw.yaml +++ b/spec/std/isa/inst/Zcf/c.flw.yaml @@ -13,11 +13,12 @@ description: | to the base address in register xs1. It expands to `flw` `fd, offset(xs1)`. definedBy: - anyOf: - - allOf: - - C - - F - - Zcf + extension: + anyOf: + - allOf: + - name: C + - name: F + - name: Zcf assembly: fd, imm(xs1) base: 32 encoding: diff --git a/spec/std/isa/inst/Zcf/c.flwsp.yaml b/spec/std/isa/inst/Zcf/c.flwsp.yaml index fb1dbbd69..9f39068ff 100644 --- a/spec/std/isa/inst/Zcf/c.flwsp.yaml +++ b/spec/std/isa/inst/Zcf/c.flwsp.yaml @@ -13,11 +13,12 @@ description: | to the stack pointer, x2. It expands to `flw` `fd, offset(x2)`. definedBy: - anyOf: - - allOf: - - C - - F - - Zcf + extension: + anyOf: + - allOf: + - name: C + - name: F + - name: Zcf assembly: fd, imm(sp) base: 32 encoding: diff --git a/spec/std/isa/inst/Zcf/c.fsw.yaml b/spec/std/isa/inst/Zcf/c.fsw.yaml index 22e36bf3a..a00bf9872 100644 --- a/spec/std/isa/inst/Zcf/c.fsw.yaml +++ b/spec/std/isa/inst/Zcf/c.fsw.yaml @@ -13,11 +13,12 @@ description: | to the base address in register xs1. It expands to `fsw` `fs2, offset(xs1)`. definedBy: - anyOf: - - allOf: - - C - - F - - Zcf + extension: + anyOf: + - allOf: + - name: C + - name: F + - name: Zcf base: 32 assembly: fs2, imm(xs1) encoding: diff --git a/spec/std/isa/inst/Zcf/c.fswsp.yaml b/spec/std/isa/inst/Zcf/c.fswsp.yaml index caf2d8486..4a99b2f64 100644 --- a/spec/std/isa/inst/Zcf/c.fswsp.yaml +++ b/spec/std/isa/inst/Zcf/c.fswsp.yaml @@ -13,11 +13,12 @@ description: | to the stack pointer, x2. It expands to `fsw` `fs2, offset(x2)`. definedBy: - anyOf: - - allOf: - - C - - F - - Zcf + extension: + anyOf: + - allOf: + - name: C + - name: F + - name: Zcf assembly: fs2, imm(sp) base: 32 encoding: diff --git a/spec/std/isa/inst/Zcmop/c.mop.n.yaml b/spec/std/isa/inst/Zcmop/c.mop.n.yaml index 3ccdb3479..e677e130b 100644 --- a/spec/std/isa/inst/Zcmop/c.mop.n.yaml +++ b/spec/std/isa/inst/Zcmop/c.mop.n.yaml @@ -7,8 +7,14 @@ $schema: inst_schema.json# kind: instruction name: c.mop.n long_name: Compressed May-Be-Operation -description: C.MOP.n is encoded in the reserved encoding space corresponding to C.LUI xn, 0. Unlike the MOPs defined in the Zimop extension, the C.MOP.n instructions are defined to not write any register. Their encoding allows future extensions to define them to read register x[n]. -definedBy: Zcmop +description: + C.MOP.n is encoded in the reserved encoding space corresponding to C.LUI + xn, 0. Unlike the MOPs defined in the Zimop extension, the C.MOP.n instructions + are defined to not write any register. Their encoding allows future extensions to + define them to read register x[n]. +definedBy: + extension: + name: Zcmop assembly: "" encoding: match: 01100---10000001 diff --git a/spec/std/isa/inst/Zcmp/cm.mva01s.yaml b/spec/std/isa/inst/Zcmp/cm.mva01s.yaml index 1315656ba..afccef45f 100644 --- a/spec/std/isa/inst/Zcmp/cm.mva01s.yaml +++ b/spec/std/isa/inst/Zcmp/cm.mva01s.yaml @@ -10,7 +10,9 @@ long_name: Move two s0-s7 registers into a0-a1 description: | Moves r1s' into a0 and r2s' into a1. The execution is atomic, so it is not possible to observe state where only one of a0 or a1 have been updated. The encoding uses sreg number specifiers instead of xreg number specifiers to save encoding space. The mapping between them is specified in the pseudo-code below. -definedBy: Zcmp +definedBy: + extension: + name: Zcmp assembly: r1s, r2s encoding: match: 101011---11---10 diff --git a/spec/std/isa/inst/Zcmp/cm.mvsa01.yaml b/spec/std/isa/inst/Zcmp/cm.mvsa01.yaml index c83c49a1e..14af57b1f 100644 --- a/spec/std/isa/inst/Zcmp/cm.mvsa01.yaml +++ b/spec/std/isa/inst/Zcmp/cm.mvsa01.yaml @@ -12,7 +12,9 @@ description: | The execution is atomic, so it is not possible to observe state where only one of r1s' or r2s' has been updated. The encoding uses sreg number specifiers instead of xreg number specifiers to save encoding space. The mapping between them is specified in the pseudo-code below. -definedBy: Zcmp +definedBy: + extension: + name: Zcmp assembly: r1s, r2s encoding: match: 101011---01---10 diff --git a/spec/std/isa/inst/Zcmp/cm.pop.yaml b/spec/std/isa/inst/Zcmp/cm.pop.yaml index 7e24c6e85..99deb9dbb 100644 --- a/spec/std/isa/inst/Zcmp/cm.pop.yaml +++ b/spec/std/isa/inst/Zcmp/cm.pop.yaml @@ -17,7 +17,9 @@ description: | * it must be a multiple of 16 (bytes): ** for RV32 the allowed values are: 16, 32, 48, 64, 80, 96, 112 ** for RV64 the allowed values are: 16, 32, 48, 64, 80, 96, 112, 128, 144, 160 -definedBy: Zcmp +definedBy: + extension: + name: Zcmp assembly: reg_list, stack_adj encoding: match: 10111010------10 diff --git a/spec/std/isa/inst/Zcmp/cm.popret.yaml b/spec/std/isa/inst/Zcmp/cm.popret.yaml index 6005c91a0..a589661a0 100644 --- a/spec/std/isa/inst/Zcmp/cm.popret.yaml +++ b/spec/std/isa/inst/Zcmp/cm.popret.yaml @@ -17,7 +17,9 @@ description: | * it must be a multiple of 16 (bytes): ** for RV32 the allowed values are: 16, 32, 48, 64, 80, 96, 112 ** for RV64 the allowed values are: 16, 32, 48, 64, 80, 96, 112, 128, 144, 160 -definedBy: Zcmp +definedBy: + extension: + name: Zcmp assembly: reg_list, stack_adj encoding: match: 10111110------10 diff --git a/spec/std/isa/inst/Zcmp/cm.popretz.yaml b/spec/std/isa/inst/Zcmp/cm.popretz.yaml index a95557639..62cd8930a 100644 --- a/spec/std/isa/inst/Zcmp/cm.popretz.yaml +++ b/spec/std/isa/inst/Zcmp/cm.popretz.yaml @@ -17,7 +17,9 @@ description: | * it must be a multiple of 16 (bytes): ** for RV32 the allowed values are: 16, 32, 48, 64, 80, 96, 112 ** for RV64 the allowed values are: 16, 32, 48, 64, 80, 96, 112, 128, 144, 160 -definedBy: Zcmp +definedBy: + extension: + name: Zcmp assembly: reg_list, stack_adj encoding: match: 10111100------10 diff --git a/spec/std/isa/inst/Zcmp/cm.push.yaml b/spec/std/isa/inst/Zcmp/cm.push.yaml index e8b9cf644..ba199de7b 100644 --- a/spec/std/isa/inst/Zcmp/cm.push.yaml +++ b/spec/std/isa/inst/Zcmp/cm.push.yaml @@ -18,7 +18,9 @@ description: | * it must be a multiple of 16 (bytes): ** for RV32 the allowed values are: 16, 32, 48, 64, 80, 96, 112 ** for RV64 the allowed values are: 16, 32, 48, 64, 80, 96, 112, 128, 144, 160 -definedBy: Zcmp +definedBy: + extension: + name: Zcmp assembly: reg_list, -stack_adj encoding: match: 10111000------10 diff --git a/spec/std/isa/inst/Zfbfmin/fcvt.bf16.s.yaml b/spec/std/isa/inst/Zfbfmin/fcvt.bf16.s.yaml index 6a4efc47b..672880377 100644 --- a/spec/std/isa/inst/Zfbfmin/fcvt.bf16.s.yaml +++ b/spec/std/isa/inst/Zfbfmin/fcvt.bf16.s.yaml @@ -9,7 +9,9 @@ name: fcvt.bf16.s long_name: No synopsis available description: | No description available. -definedBy: Zfbfmin +definedBy: + extension: + name: Zfbfmin assembly: fd, fs1, rm encoding: match: 010001001000-------------1010011 diff --git a/spec/std/isa/inst/Zfbfmin/fcvt.s.bf16.yaml b/spec/std/isa/inst/Zfbfmin/fcvt.s.bf16.yaml index eaed84c99..34c4cb8d8 100644 --- a/spec/std/isa/inst/Zfbfmin/fcvt.s.bf16.yaml +++ b/spec/std/isa/inst/Zfbfmin/fcvt.s.bf16.yaml @@ -9,7 +9,9 @@ name: fcvt.s.bf16 long_name: No synopsis available description: | No description available. -definedBy: Zfbfmin +definedBy: + extension: + name: Zfbfmin assembly: fd, fs1, rm encoding: match: 010000000110-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fadd.h.yaml b/spec/std/isa/inst/Zfh/fadd.h.yaml index 62df41388..cf9743f33 100644 --- a/spec/std/isa/inst/Zfh/fadd.h.yaml +++ b/spec/std/isa/inst/Zfh/fadd.h.yaml @@ -9,7 +9,9 @@ name: fadd.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2, rm encoding: match: 0000010------------------1010011 diff --git a/spec/std/isa/inst/Zfh/fclass.h.yaml b/spec/std/isa/inst/Zfh/fclass.h.yaml index 3aeca59c6..87bb0f4e1 100644 --- a/spec/std/isa/inst/Zfh/fclass.h.yaml +++ b/spec/std/isa/inst/Zfh/fclass.h.yaml @@ -9,7 +9,9 @@ name: fclass.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: xd, fs1 encoding: match: 111001000000-----001-----1010011 diff --git a/spec/std/isa/inst/Zfh/fcvt.d.h.yaml b/spec/std/isa/inst/Zfh/fcvt.d.h.yaml index 90de62fb3..f2608c5c3 100644 --- a/spec/std/isa/inst/Zfh/fcvt.d.h.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.d.h.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [D, Zfh] + extension: + allOf: + - name: D + - name: Zfh assembly: fd, fs1, rm encoding: match: 010000100010-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fcvt.h.d.yaml b/spec/std/isa/inst/Zfh/fcvt.h.d.yaml index 59c69a45c..2c59e4e35 100644 --- a/spec/std/isa/inst/Zfh/fcvt.h.d.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.h.d.yaml @@ -13,7 +13,10 @@ description: text: | `fcvt.h.d` converts a Double-precision Floating-point number to a Half-precision floating-point number. definedBy: - allOf: [D, Zfh] + extension: + allOf: + - name: D + - name: Zfh assembly: fd, fs1, rm encoding: match: 010001000001-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fcvt.h.l.yaml b/spec/std/isa/inst/Zfh/fcvt.h.l.yaml index 51aa58009..f69d021f2 100644 --- a/spec/std/isa/inst/Zfh/fcvt.h.l.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.h.l.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.h.l` converts a 64-bit signed integer to a half-precision floating-point number. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, xs1, rm encoding: match: 110101000010-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fcvt.h.lu.yaml b/spec/std/isa/inst/Zfh/fcvt.h.lu.yaml index cd5eb7da6..c2f8c6cf5 100644 --- a/spec/std/isa/inst/Zfh/fcvt.h.lu.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.h.lu.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.h.lu` converts a 64-bit unsigned integer to a half-precision floating-point number. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, xs1, rm encoding: match: 110101000011-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fcvt.h.s.yaml b/spec/std/isa/inst/Zfh/fcvt.h.s.yaml index bca0f8d46..7c6599ff4 100644 --- a/spec/std/isa/inst/Zfh/fcvt.h.s.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.h.s.yaml @@ -8,7 +8,10 @@ kind: instruction name: fcvt.h.s long_name: Convert half-precision float to a single-precision float definedBy: - allOf: [Zfh, Zfhmin] + extension: + allOf: + - name: Zfh + - name: Zfhmin assembly: fd, fs1, rm description: | Converts a half-precision number in floating-point register _fs1_ into a single-precision floating-point number in diff --git a/spec/std/isa/inst/Zfh/fcvt.h.w.yaml b/spec/std/isa/inst/Zfh/fcvt.h.w.yaml index 77fec6d33..6f0612b2d 100644 --- a/spec/std/isa/inst/Zfh/fcvt.h.w.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.h.w.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.h.w` converts a 32-bit signed integer to a half-precision floating-point number. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, xs1, rm encoding: match: 110101000000-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fcvt.h.wu.yaml b/spec/std/isa/inst/Zfh/fcvt.h.wu.yaml index 46c624452..f92ba474f 100644 --- a/spec/std/isa/inst/Zfh/fcvt.h.wu.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.h.wu.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.h.wu` converts a 32-bit unsigned integer to a half-precision floating-point number. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, xs1, rm encoding: match: 110101000001-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fcvt.l.h.yaml b/spec/std/isa/inst/Zfh/fcvt.l.h.yaml index c33d1e6b2..c856f701f 100644 --- a/spec/std/isa/inst/Zfh/fcvt.l.h.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.l.h.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.l.h` converts a half-precision floating-point number to a signed 64-bit integer. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: xd, fs1, rm encoding: match: 110001000010-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fcvt.lu.h.yaml b/spec/std/isa/inst/Zfh/fcvt.lu.h.yaml index 129e54acd..22b89b019 100644 --- a/spec/std/isa/inst/Zfh/fcvt.lu.h.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.lu.h.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.lu.h` converts a half-precision floating-point number to an unsigned 64-bit integer. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: xd, fs1, rm encoding: match: 110001000011-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fcvt.s.h.yaml b/spec/std/isa/inst/Zfh/fcvt.s.h.yaml index 51407f7b3..5414c0cf6 100644 --- a/spec/std/isa/inst/Zfh/fcvt.s.h.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.s.h.yaml @@ -8,7 +8,10 @@ kind: instruction name: fcvt.s.h long_name: Convert single-precision float to a half-precision float definedBy: - allOf: [Zfh, Zfhmin] + extension: + allOf: + - name: Zfh + - name: Zfhmin assembly: fd, fs1, rm description: | Converts a single-precision number in floating-point register _fs1_ into a half-precision floating-point number in diff --git a/spec/std/isa/inst/Zfh/fcvt.w.h.yaml b/spec/std/isa/inst/Zfh/fcvt.w.h.yaml index add4781f6..3e7621221 100644 --- a/spec/std/isa/inst/Zfh/fcvt.w.h.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.w.h.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.w.h` converts a half-precision floating-point number to a signed 32-bit integer. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: xd, fs1, rm encoding: match: 110001000000-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fcvt.wu.h.yaml b/spec/std/isa/inst/Zfh/fcvt.wu.h.yaml index 4a9ab907f..a81902f7d 100644 --- a/spec/std/isa/inst/Zfh/fcvt.wu.h.yaml +++ b/spec/std/isa/inst/Zfh/fcvt.wu.h.yaml @@ -12,7 +12,9 @@ description: normative: false text: | `fcvt.wu.h` converts a half-precision floating-point number to an unsigned 32-bit integer. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: xd, fs1, rm encoding: match: 110001000001-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fdiv.h.yaml b/spec/std/isa/inst/Zfh/fdiv.h.yaml index ac844b16f..d33cd403c 100644 --- a/spec/std/isa/inst/Zfh/fdiv.h.yaml +++ b/spec/std/isa/inst/Zfh/fdiv.h.yaml @@ -9,7 +9,9 @@ name: fdiv.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2, rm encoding: match: 0001110------------------1010011 diff --git a/spec/std/isa/inst/Zfh/feq.h.yaml b/spec/std/isa/inst/Zfh/feq.h.yaml index fbfba3259..e26d1962e 100644 --- a/spec/std/isa/inst/Zfh/feq.h.yaml +++ b/spec/std/isa/inst/Zfh/feq.h.yaml @@ -9,7 +9,9 @@ name: feq.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: xd, fs1, fs2 encoding: match: 1010010----------010-----1010011 diff --git a/spec/std/isa/inst/Zfh/fle.h.yaml b/spec/std/isa/inst/Zfh/fle.h.yaml index 56466815e..1d0b77def 100644 --- a/spec/std/isa/inst/Zfh/fle.h.yaml +++ b/spec/std/isa/inst/Zfh/fle.h.yaml @@ -9,7 +9,9 @@ name: fle.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: xd, fs1, fs2 encoding: match: 1010010----------000-----1010011 diff --git a/spec/std/isa/inst/Zfh/fleq.h.yaml b/spec/std/isa/inst/Zfh/fleq.h.yaml index 9a9ae3141..2ad1caf14 100644 --- a/spec/std/isa/inst/Zfh/fleq.h.yaml +++ b/spec/std/isa/inst/Zfh/fleq.h.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Zfa, Zfh] + extension: + allOf: + - name: Zfa + - name: Zfh assembly: xd, fs1, fs2 encoding: match: 1010010----------100-----1010011 diff --git a/spec/std/isa/inst/Zfh/flh.yaml b/spec/std/isa/inst/Zfh/flh.yaml index ceabcbeb2..ae0f2b7c3 100644 --- a/spec/std/isa/inst/Zfh/flh.yaml +++ b/spec/std/isa/inst/Zfh/flh.yaml @@ -15,10 +15,14 @@ description: | `flh` is only guaranteed to execute atomically if the effective address is naturally aligned. definedBy: - anyOf: [Zfh, Zfhmin, Zhinx] + extension: + anyOf: + - name: Zfh + - name: Zfhmin + - name: Zhinx assembly: fd, imm(xs1) encoding: - match: -----------------001-----0000111 + match: "-----------------001-----0000111" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/Zfh/fli.h.yaml b/spec/std/isa/inst/Zfh/fli.h.yaml index c22a081e1..3affd938f 100644 --- a/spec/std/isa/inst/Zfh/fli.h.yaml +++ b/spec/std/isa/inst/Zfh/fli.h.yaml @@ -10,7 +10,10 @@ long_name: Floating-point Load Immediate Half-precision description: | No description available. definedBy: - allOf: [Zfa, Zfh] + extension: + allOf: + - name: Zfa + - name: Zfh assembly: fd, xs1 encoding: match: 111101000001-----000-----1010011 diff --git a/spec/std/isa/inst/Zfh/flt.h.yaml b/spec/std/isa/inst/Zfh/flt.h.yaml index 478f23ddc..816a508c2 100644 --- a/spec/std/isa/inst/Zfh/flt.h.yaml +++ b/spec/std/isa/inst/Zfh/flt.h.yaml @@ -9,7 +9,9 @@ name: flt.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: xd, fs1, fs2 encoding: match: 1010010----------001-----1010011 diff --git a/spec/std/isa/inst/Zfh/fltq.h.yaml b/spec/std/isa/inst/Zfh/fltq.h.yaml index 9dc3f167e..03c4b7048 100644 --- a/spec/std/isa/inst/Zfh/fltq.h.yaml +++ b/spec/std/isa/inst/Zfh/fltq.h.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Zfa, Zfh] + extension: + allOf: + - name: Zfa + - name: Zfh assembly: xd, fs1, fs2 encoding: match: 1010010----------101-----1010011 diff --git a/spec/std/isa/inst/Zfh/fmadd.h.yaml b/spec/std/isa/inst/Zfh/fmadd.h.yaml index 396090105..01f1b0633 100644 --- a/spec/std/isa/inst/Zfh/fmadd.h.yaml +++ b/spec/std/isa/inst/Zfh/fmadd.h.yaml @@ -9,10 +9,12 @@ name: fmadd.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----10------------------1000011 + match: "-----10------------------1000011" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/Zfh/fmax.h.yaml b/spec/std/isa/inst/Zfh/fmax.h.yaml index 18be1432c..6f5904e1d 100644 --- a/spec/std/isa/inst/Zfh/fmax.h.yaml +++ b/spec/std/isa/inst/Zfh/fmax.h.yaml @@ -9,7 +9,9 @@ name: fmax.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2 encoding: match: 0010110----------001-----1010011 diff --git a/spec/std/isa/inst/Zfh/fmaxm.h.yaml b/spec/std/isa/inst/Zfh/fmaxm.h.yaml index 1390972e8..fc05a19dc 100644 --- a/spec/std/isa/inst/Zfh/fmaxm.h.yaml +++ b/spec/std/isa/inst/Zfh/fmaxm.h.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Zfa, Zfh] + extension: + allOf: + - name: Zfa + - name: Zfh assembly: fd, fs1, fs2 encoding: match: 0010110----------011-----1010011 diff --git a/spec/std/isa/inst/Zfh/fmin.h.yaml b/spec/std/isa/inst/Zfh/fmin.h.yaml index 42a3f8479..57aff2e5a 100644 --- a/spec/std/isa/inst/Zfh/fmin.h.yaml +++ b/spec/std/isa/inst/Zfh/fmin.h.yaml @@ -9,7 +9,9 @@ name: fmin.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2 encoding: match: 0010110----------000-----1010011 diff --git a/spec/std/isa/inst/Zfh/fminm.h.yaml b/spec/std/isa/inst/Zfh/fminm.h.yaml index ba6a8b134..5d515e581 100644 --- a/spec/std/isa/inst/Zfh/fminm.h.yaml +++ b/spec/std/isa/inst/Zfh/fminm.h.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Zfa, Zfh] + extension: + allOf: + - name: Zfa + - name: Zfh assembly: fd, fs1, fs2 encoding: match: 0010110----------010-----1010011 diff --git a/spec/std/isa/inst/Zfh/fmsub.h.yaml b/spec/std/isa/inst/Zfh/fmsub.h.yaml index 931dc428b..b8296d792 100644 --- a/spec/std/isa/inst/Zfh/fmsub.h.yaml +++ b/spec/std/isa/inst/Zfh/fmsub.h.yaml @@ -9,10 +9,12 @@ name: fmsub.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----10------------------1000111 + match: "-----10------------------1000111" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/Zfh/fmul.h.yaml b/spec/std/isa/inst/Zfh/fmul.h.yaml index f669a2b4c..8292d909a 100644 --- a/spec/std/isa/inst/Zfh/fmul.h.yaml +++ b/spec/std/isa/inst/Zfh/fmul.h.yaml @@ -9,7 +9,9 @@ name: fmul.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2, rm encoding: match: 0001010------------------1010011 diff --git a/spec/std/isa/inst/Zfh/fmv.h.x.yaml b/spec/std/isa/inst/Zfh/fmv.h.x.yaml index 623c7a3a9..788de3e4b 100644 --- a/spec/std/isa/inst/Zfh/fmv.h.x.yaml +++ b/spec/std/isa/inst/Zfh/fmv.h.x.yaml @@ -12,7 +12,9 @@ description: | from the lower 16 bits of integer register `xs1` to the floating-point register `fd`. The bits are not modified in the transfer, and in particular, the payloads of non-canonical NaNs are preserved. -definedBy: F +definedBy: + extension: + name: F assembly: fd, xs1 encoding: match: 111101000000-----000-----1010011 diff --git a/spec/std/isa/inst/Zfh/fmv.x.h.yaml b/spec/std/isa/inst/Zfh/fmv.x.h.yaml index 3f8213c83..3b2a00dc7 100644 --- a/spec/std/isa/inst/Zfh/fmv.x.h.yaml +++ b/spec/std/isa/inst/Zfh/fmv.x.h.yaml @@ -8,7 +8,11 @@ kind: instruction name: fmv.x.h long_name: Move half-precision value from floating-point to integer register definedBy: - anyOf: [Zfh, Zfhmin, Zhinx] + extension: + anyOf: + - name: Zfh + - name: Zfhmin + - name: Zhinx assembly: xd, fs1 description: | Moves the half-precision value in floating-point register fs1 represented in IEEE 754-2008 diff --git a/spec/std/isa/inst/Zfh/fnmadd.h.yaml b/spec/std/isa/inst/Zfh/fnmadd.h.yaml index fb3f22a3f..8d0e56a2a 100644 --- a/spec/std/isa/inst/Zfh/fnmadd.h.yaml +++ b/spec/std/isa/inst/Zfh/fnmadd.h.yaml @@ -9,10 +9,12 @@ name: fnmadd.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----10------------------1001111 + match: "-----10------------------1001111" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/Zfh/fnmsub.h.yaml b/spec/std/isa/inst/Zfh/fnmsub.h.yaml index 0cd6f2b17..1c6aa0dc6 100644 --- a/spec/std/isa/inst/Zfh/fnmsub.h.yaml +++ b/spec/std/isa/inst/Zfh/fnmsub.h.yaml @@ -9,10 +9,12 @@ name: fnmsub.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2, fs3, rm encoding: - match: -----10------------------1001011 + match: "-----10------------------1001011" variables: - name: fs3 location: 31-27 diff --git a/spec/std/isa/inst/Zfh/fround.h.yaml b/spec/std/isa/inst/Zfh/fround.h.yaml index cecadf53c..17e21c2aa 100644 --- a/spec/std/isa/inst/Zfh/fround.h.yaml +++ b/spec/std/isa/inst/Zfh/fround.h.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Zfa, Zfh] + extension: + allOf: + - name: Zfa + - name: Zfh assembly: fd, fs1, rm encoding: match: 010001000100-------------1010011 diff --git a/spec/std/isa/inst/Zfh/froundnx.h.yaml b/spec/std/isa/inst/Zfh/froundnx.h.yaml index cdda52839..7d5086646 100644 --- a/spec/std/isa/inst/Zfh/froundnx.h.yaml +++ b/spec/std/isa/inst/Zfh/froundnx.h.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - allOf: [Zfa, Zfh] + extension: + allOf: + - name: Zfa + - name: Zfh assembly: fd, fs1, rm encoding: match: 010001000101-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fsgnj.h.yaml b/spec/std/isa/inst/Zfh/fsgnj.h.yaml index bae7a5a1f..11ae907bc 100644 --- a/spec/std/isa/inst/Zfh/fsgnj.h.yaml +++ b/spec/std/isa/inst/Zfh/fsgnj.h.yaml @@ -9,7 +9,9 @@ name: fsgnj.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2 encoding: match: 0010010----------000-----1010011 diff --git a/spec/std/isa/inst/Zfh/fsgnjn.h.yaml b/spec/std/isa/inst/Zfh/fsgnjn.h.yaml index c71fd9eab..57b5b1bed 100644 --- a/spec/std/isa/inst/Zfh/fsgnjn.h.yaml +++ b/spec/std/isa/inst/Zfh/fsgnjn.h.yaml @@ -9,7 +9,9 @@ name: fsgnjn.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2 encoding: match: 0010010----------001-----1010011 diff --git a/spec/std/isa/inst/Zfh/fsgnjx.h.yaml b/spec/std/isa/inst/Zfh/fsgnjx.h.yaml index bb709073d..ba05c5739 100644 --- a/spec/std/isa/inst/Zfh/fsgnjx.h.yaml +++ b/spec/std/isa/inst/Zfh/fsgnjx.h.yaml @@ -9,7 +9,9 @@ name: fsgnjx.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2 encoding: match: 0010010----------010-----1010011 diff --git a/spec/std/isa/inst/Zfh/fsh.yaml b/spec/std/isa/inst/Zfh/fsh.yaml index ef39d06bf..5ec18cf54 100644 --- a/spec/std/isa/inst/Zfh/fsh.yaml +++ b/spec/std/isa/inst/Zfh/fsh.yaml @@ -18,10 +18,14 @@ description: | `fsh` is only guaranteed to execute atomically if the effective address is naturally aligned. definedBy: - anyOf: [Zfh, Zfhmin, Zhinx] + extension: + anyOf: + - name: Zfh + - name: Zfhmin + - name: Zhinx assembly: fs2, imm(xs1) encoding: - match: -----------------001-----0100111 + match: "-----------------001-----0100111" variables: - name: imm location: 31-25|11-7 diff --git a/spec/std/isa/inst/Zfh/fsqrt.h.yaml b/spec/std/isa/inst/Zfh/fsqrt.h.yaml index 4b34cdcfe..fd5eaaf05 100644 --- a/spec/std/isa/inst/Zfh/fsqrt.h.yaml +++ b/spec/std/isa/inst/Zfh/fsqrt.h.yaml @@ -9,7 +9,9 @@ name: fsqrt.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, rm encoding: match: 010111000000-------------1010011 diff --git a/spec/std/isa/inst/Zfh/fsub.h.yaml b/spec/std/isa/inst/Zfh/fsub.h.yaml index 45cb19a32..cbd0df7b6 100644 --- a/spec/std/isa/inst/Zfh/fsub.h.yaml +++ b/spec/std/isa/inst/Zfh/fsub.h.yaml @@ -9,7 +9,9 @@ name: fsub.h long_name: No synopsis available description: | No description available. -definedBy: Zfh +definedBy: + extension: + name: Zfh assembly: fd, fs1, fs2, rm encoding: match: 0000110------------------1010011 diff --git a/spec/std/isa/inst/Zicbom/cbo.clean.yaml b/spec/std/isa/inst/Zicbom/cbo.clean.yaml index 80f0ac30a..a7c2c36fc 100644 --- a/spec/std/isa/inst/Zicbom/cbo.clean.yaml +++ b/spec/std/isa/inst/Zicbom/cbo.clean.yaml @@ -38,7 +38,9 @@ description: | CBO operations never raise a misaligned address fault. -definedBy: Zicbom +definedBy: + extension: + name: Zicbom assembly: (xs1) encoding: match: 000000000001-----010000000001111 diff --git a/spec/std/isa/inst/Zicbom/cbo.flush.yaml b/spec/std/isa/inst/Zicbom/cbo.flush.yaml index 90a0dfd85..7d09f84ae 100644 --- a/spec/std/isa/inst/Zicbom/cbo.flush.yaml +++ b/spec/std/isa/inst/Zicbom/cbo.flush.yaml @@ -31,7 +31,9 @@ description: | <%- end -%> CBO operations never raise a misaligned address fault. -definedBy: Zicbom +definedBy: + extension: + name: Zicbom assembly: (xs1) encoding: match: 000000000010-----010000000001111 diff --git a/spec/std/isa/inst/Zicbom/cbo.inval.yaml b/spec/std/isa/inst/Zicbom/cbo.inval.yaml index 41583ff31..c9fa4cd66 100644 --- a/spec/std/isa/inst/Zicbom/cbo.inval.yaml +++ b/spec/std/isa/inst/Zicbom/cbo.inval.yaml @@ -70,7 +70,9 @@ description: | <%- end -%> CBO operations never raise a misaligned address fault. -definedBy: Zicbom +definedBy: + extension: + name: Zicbom assembly: (xs1) encoding: match: 000000000000-----010000000001111 diff --git a/spec/std/isa/inst/Zicboz/cbo.zero.yaml b/spec/std/isa/inst/Zicboz/cbo.zero.yaml index 05d045683..f0cf130ca 100644 --- a/spec/std/isa/inst/Zicboz/cbo.zero.yaml +++ b/spec/std/isa/inst/Zicboz/cbo.zero.yaml @@ -33,7 +33,9 @@ description: | <%- end -%> CBO operations never raise a misaligned address fault. -definedBy: Zicboz +definedBy: + extension: + name: Zicboz assembly: (xs1) encoding: match: 000000000100-----010000000001111 diff --git a/spec/std/isa/inst/Zicfilp/lpad.yaml b/spec/std/isa/inst/Zicfilp/lpad.yaml index a02c76f8a..acf5d762f 100644 --- a/spec/std/isa/inst/Zicfilp/lpad.yaml +++ b/spec/std/isa/inst/Zicfilp/lpad.yaml @@ -9,10 +9,12 @@ name: lpad long_name: No synopsis available description: | No description available. -definedBy: Zicfilp +definedBy: + extension: + name: Zicfilp assembly: imm encoding: - match: --------------------000000010111 + match: "--------------------000000010111" variables: - name: imm location: 31-12 diff --git a/spec/std/isa/inst/Zicfiss/ssamoswap.d.yaml b/spec/std/isa/inst/Zicfiss/ssamoswap.d.yaml index 4daf91812..30b8bcf88 100644 --- a/spec/std/isa/inst/Zicfiss/ssamoswap.d.yaml +++ b/spec/std/isa/inst/Zicfiss/ssamoswap.d.yaml @@ -9,7 +9,9 @@ name: ssamoswap.d long_name: No synopsis available description: | No description available. -definedBy: Zicfiss +definedBy: + extension: + name: Zicfiss assembly: xd, xs2, xs1 encoding: match: 01001------------011-----0101111 diff --git a/spec/std/isa/inst/Zicfiss/ssamoswap.w.yaml b/spec/std/isa/inst/Zicfiss/ssamoswap.w.yaml index ff5864555..8646fe526 100644 --- a/spec/std/isa/inst/Zicfiss/ssamoswap.w.yaml +++ b/spec/std/isa/inst/Zicfiss/ssamoswap.w.yaml @@ -9,7 +9,9 @@ name: ssamoswap.w long_name: No synopsis available description: | No description available. -definedBy: Zicfiss +definedBy: + extension: + name: Zicfiss assembly: xd, xs2, xs1 encoding: match: 01001------------010-----0101111 diff --git a/spec/std/isa/inst/Zicfiss/sspopchk.x1.yaml b/spec/std/isa/inst/Zicfiss/sspopchk.x1.yaml index 685ca04ad..6908993da 100644 --- a/spec/std/isa/inst/Zicfiss/sspopchk.x1.yaml +++ b/spec/std/isa/inst/Zicfiss/sspopchk.x1.yaml @@ -9,7 +9,9 @@ name: sspopchk.x1 long_name: No synopsis available description: | No description available. -definedBy: Zicfiss +definedBy: + extension: + name: Zicfiss assembly: sspopchk_x1 encoding: match: "11001101110000001100000001110011" diff --git a/spec/std/isa/inst/Zicfiss/sspopchk.x5.yaml b/spec/std/isa/inst/Zicfiss/sspopchk.x5.yaml index c660552ba..c9522174a 100644 --- a/spec/std/isa/inst/Zicfiss/sspopchk.x5.yaml +++ b/spec/std/isa/inst/Zicfiss/sspopchk.x5.yaml @@ -9,7 +9,9 @@ name: sspopchk.x5 long_name: No synopsis available description: | No description available. -definedBy: Zicfiss +definedBy: + extension: + name: Zicfiss assembly: sspopchk_x5 encoding: match: "11001101110000101100000001110011" diff --git a/spec/std/isa/inst/Zicfiss/sspush.x1.yaml b/spec/std/isa/inst/Zicfiss/sspush.x1.yaml index aa9416029..8dde7b7d8 100644 --- a/spec/std/isa/inst/Zicfiss/sspush.x1.yaml +++ b/spec/std/isa/inst/Zicfiss/sspush.x1.yaml @@ -9,7 +9,9 @@ name: sspush.x1 long_name: No synopsis available description: | No description available. -definedBy: Zicfiss +definedBy: + extension: + name: Zicfiss assembly: sspush_x1 encoding: match: "11001110000100000100000001110011" diff --git a/spec/std/isa/inst/Zicfiss/sspush.x5.yaml b/spec/std/isa/inst/Zicfiss/sspush.x5.yaml index 95300ec8f..586fbf664 100644 --- a/spec/std/isa/inst/Zicfiss/sspush.x5.yaml +++ b/spec/std/isa/inst/Zicfiss/sspush.x5.yaml @@ -9,7 +9,9 @@ name: sspush.x5 long_name: No synopsis available description: | No description available. -definedBy: Zicfiss +definedBy: + extension: + name: Zicfiss assembly: sspush_x5 encoding: match: "11001110010100000100000001110011" diff --git a/spec/std/isa/inst/Zicfiss/ssrdp.yaml b/spec/std/isa/inst/Zicfiss/ssrdp.yaml index 3d5a019de..ae000b3b3 100644 --- a/spec/std/isa/inst/Zicfiss/ssrdp.yaml +++ b/spec/std/isa/inst/Zicfiss/ssrdp.yaml @@ -9,7 +9,9 @@ name: ssrdp long_name: Read ssp into a Register description: | No description available. -definedBy: Zicfiss +definedBy: + extension: + name: Zicfiss assembly: xd encoding: match: 11001101110000000100-----1110011 diff --git a/spec/std/isa/inst/Zicond/czero.eqz.yaml b/spec/std/isa/inst/Zicond/czero.eqz.yaml index 4aed10342..ad3129e4b 100644 --- a/spec/std/isa/inst/Zicond/czero.eqz.yaml +++ b/spec/std/isa/inst/Zicond/czero.eqz.yaml @@ -12,7 +12,9 @@ description: | copies the contents of rs1 to rd. This instruction carries a syntactic dependency from both rs1 and rs2 to rd. Furthermore, if the Zkt extension is implemented, this instruction's timing is independent of the data values in rs1 and rs2. -definedBy: Zicond +definedBy: + extension: + name: Zicond assembly: xd, xs1, xs2 encoding: match: 0000111----------101-----0110011 diff --git a/spec/std/isa/inst/Zicond/czero.nez.yaml b/spec/std/isa/inst/Zicond/czero.nez.yaml index f2f0bf5ba..435cc308d 100644 --- a/spec/std/isa/inst/Zicond/czero.nez.yaml +++ b/spec/std/isa/inst/Zicond/czero.nez.yaml @@ -12,7 +12,9 @@ description: | instruction copies the contents of rs1 to rd. This instruction carries a syntactic dependency from both rs1 and rs2 to rd. Furthermore, if the Zkt extension is implemented, this instruction's timing is independent of the data values in rs1 and rs2. -definedBy: Zicond +definedBy: + extension: + name: Zicond assembly: xd, xs1, xs2 encoding: match: 0000111----------111-----0110011 diff --git a/spec/std/isa/inst/Zicsr/csrrc.yaml b/spec/std/isa/inst/Zicsr/csrrc.yaml index 50861340b..68653aae7 100644 --- a/spec/std/isa/inst/Zicsr/csrrc.yaml +++ b/spec/std/isa/inst/Zicsr/csrrc.yaml @@ -20,10 +20,12 @@ description: | Note that if `rs1` specifies a register other than `x0`, and that register holds a zero value, the instruction will not action any attendant per-field side effects, but will action any side effects caused by writing to the entire CSR. -definedBy: Zicsr +definedBy: + extension: + name: Zicsr assembly: xd, csr, xs1 encoding: - match: -----------------011-----1110011 + match: "-----------------011-----1110011" variables: - name: csr location: 31-20 diff --git a/spec/std/isa/inst/Zicsr/csrrci.yaml b/spec/std/isa/inst/Zicsr/csrrci.yaml index 79ed324ba..ff41c6fa3 100644 --- a/spec/std/isa/inst/Zicsr/csrrci.yaml +++ b/spec/std/isa/inst/Zicsr/csrrci.yaml @@ -14,10 +14,12 @@ description: | will not write to the CSR, and shall not cause any of the side effects that might otherwise occur on a CSR write, nor raise illegal-instruction exceptions on accesses to read-only CSRs. The CSRRCI will always read the CSR and cause any read side effects regardless of `rd` and `rs1` fields. -definedBy: Zicsr +definedBy: + extension: + name: Zicsr assembly: xd, csr, uimm encoding: - match: -----------------111-----1110011 + match: "-----------------111-----1110011" variables: - name: csr location: 31-20 diff --git a/spec/std/isa/inst/Zicsr/csrrs.yaml b/spec/std/isa/inst/Zicsr/csrrs.yaml index bf2652fe9..bd036f81c 100644 --- a/spec/std/isa/inst/Zicsr/csrrs.yaml +++ b/spec/std/isa/inst/Zicsr/csrrs.yaml @@ -16,10 +16,12 @@ description: | to be set in the CSR. Any bit that is high in `xs1` will cause the corresponding bit to be set in the CSR, if that CSR bit is writable. Other bits in the CSR are not explicitly written. -definedBy: Zicsr +definedBy: + extension: + name: Zicsr assembly: xd, csr, xs1 encoding: - match: -----------------010-----1110011 + match: "-----------------010-----1110011" variables: - name: csr location: 31-20 diff --git a/spec/std/isa/inst/Zicsr/csrrsi.yaml b/spec/std/isa/inst/Zicsr/csrrsi.yaml index 9e696349a..f7e515b2a 100644 --- a/spec/std/isa/inst/Zicsr/csrrsi.yaml +++ b/spec/std/isa/inst/Zicsr/csrrsi.yaml @@ -14,10 +14,12 @@ description: | will not write to the CSR, and shall not cause any of the side effects that might otherwise occur on a CSR write, nor raise illegal-instruction exceptions on accesses to read-only CSRs. The CSRRSI will always read the CSR and cause any read side effects regardless of `rd` and `rs1` fields. -definedBy: Zicsr +definedBy: + extension: + name: Zicsr assembly: xd, csr, uimm encoding: - match: -----------------110-----1110011 + match: "-----------------110-----1110011" variables: - name: csr location: 31-20 diff --git a/spec/std/isa/inst/Zicsr/csrrw.yaml b/spec/std/isa/inst/Zicsr/csrrw.yaml index 00d3c19d3..171626585 100644 --- a/spec/std/isa/inst/Zicsr/csrrw.yaml +++ b/spec/std/isa/inst/Zicsr/csrrw.yaml @@ -15,10 +15,12 @@ description: | The initial value in xs1 is written to the CSR. If `xd=x0`, then the instruction shall not read the CSR and shall not cause any of the side effects that might occur on a CSR read. -definedBy: Zicsr +definedBy: + extension: + name: Zicsr assembly: xd, csr, xs1 encoding: - match: -----------------001-----1110011 + match: "-----------------001-----1110011" variables: - name: csr location: 31-20 diff --git a/spec/std/isa/inst/Zicsr/csrrwi.yaml b/spec/std/isa/inst/Zicsr/csrrwi.yaml index de89506e0..1e1ff5d10 100644 --- a/spec/std/isa/inst/Zicsr/csrrwi.yaml +++ b/spec/std/isa/inst/Zicsr/csrrwi.yaml @@ -15,10 +15,12 @@ description: | The 5-bit uimm field is zero-extended and written to the CSR. If `xd=x0`, then the instruction shall not read the CSR and shall not cause any of the side effects that might occur on a CSR read. -definedBy: Zicsr +definedBy: + extension: + name: Zicsr assembly: xd, csr, imm encoding: - match: -----------------101-----1110011 + match: "-----------------101-----1110011" variables: - name: csr location: 31-20 diff --git a/spec/std/isa/inst/Zifencei/fence.i.yaml b/spec/std/isa/inst/Zifencei/fence.i.yaml index 273c0a0e0..70c4ec479 100644 --- a/spec/std/isa/inst/Zifencei/fence.i.yaml +++ b/spec/std/isa/inst/Zifencei/fence.i.yaml @@ -35,10 +35,12 @@ description: | provide mechanisms for efficient multiprocessor instruction-stream synchronization. ==== -definedBy: Zifencei +definedBy: + extension: + name: Zifencei assembly: "" encoding: - match: -----------------001-----0001111 + match: "-----------------001-----0001111" variables: - name: imm location: 31-20 diff --git a/spec/std/isa/inst/Zilsd/ld.yaml b/spec/std/isa/inst/Zilsd/ld.yaml index acf88c739..7043c2640 100644 --- a/spec/std/isa/inst/Zilsd/ld.yaml +++ b/spec/std/isa/inst/Zilsd/ld.yaml @@ -10,10 +10,12 @@ long_name: Load doubleword to even/odd register pair description: | Loads a 64-bit value into registers rd and rd+1. The effective address is obtained by adding register rs1 to the sign-extended 12-bit offset. -definedBy: Zilsd +definedBy: + extension: + name: Zilsd assembly: rd, offset(rs1) encoding: - match: -----------------011-----0000011 + match: "-----------------011-----0000011" variables: - name: rd location: 11-7 diff --git a/spec/std/isa/inst/Zilsd/sd.yaml b/spec/std/isa/inst/Zilsd/sd.yaml index c97b09afb..a59eaf1e0 100644 --- a/spec/std/isa/inst/Zilsd/sd.yaml +++ b/spec/std/isa/inst/Zilsd/sd.yaml @@ -10,10 +10,12 @@ long_name: Store doubleword from even/odd register pair description: | Stores a 64-bit value from registers xs2 and xs2+1. The effective address is obtained by adding register xs1 to the sign-extended 12-bit offset. -definedBy: Zilsd +definedBy: + extension: + name: Zilsd assembly: xs2, offset(xs1) encoding: - match: -----------------011-----0100011 + match: "-----------------011-----0100011" variables: - name: xs1 location: 19-15 diff --git a/spec/std/isa/inst/Zimop/mop.r.n.yaml b/spec/std/isa/inst/Zimop/mop.r.n.yaml index 3c179290b..a1e10102e 100644 --- a/spec/std/isa/inst/Zimop/mop.r.n.yaml +++ b/spec/std/isa/inst/Zimop/mop.r.n.yaml @@ -10,7 +10,9 @@ long_name: May-be-operation (1 source register) description: | Unless redefined by another extension, this instructions simply writes 0 to X[xd]. The encoding allows future extensions to define them to read X[xs1], as well as write X[xd]. -definedBy: Zimop +definedBy: + extension: + name: Zimop assembly: xd, xs1 encoding: match: 1-00--0111-------100-----1110011 diff --git a/spec/std/isa/inst/Zimop/mop.rr.n.yaml b/spec/std/isa/inst/Zimop/mop.rr.n.yaml index 60ba685a0..d9b5e7ad0 100644 --- a/spec/std/isa/inst/Zimop/mop.rr.n.yaml +++ b/spec/std/isa/inst/Zimop/mop.rr.n.yaml @@ -11,7 +11,9 @@ description: | The Zimop extension defines 8 MOP instructions named MOP.RR.n, where n is an integer between 0 and 7, inclusive. Unless redefined by another extension, these instructions simply write 0 to X[xd]. Their encoding allows future extensions to define them to read X[xs1] and X[xs2], as well as write X[xd]. -definedBy: Zimop +definedBy: + extension: + name: Zimop assembly: xd, xs1, xs2 encoding: match: 1-00--1----------100-----1110011 diff --git a/spec/std/isa/inst/Zkn/aes64ks1i.yaml b/spec/std/isa/inst/Zkn/aes64ks1i.yaml index 0e0b8989f..d49ae05e0 100644 --- a/spec/std/isa/inst/Zkn/aes64ks1i.yaml +++ b/spec/std/isa/inst/Zkn/aes64ks1i.yaml @@ -18,7 +18,10 @@ description: text: | `rnum` must be in the range `0x0..0xA`. The values `0xB..0xF` are reserved. definedBy: - anyOf: [Zknd, Zkne] + extension: + anyOf: + - name: Zknd + - name: Zkne base: 64 assembly: xd, xs1, rnum encoding: diff --git a/spec/std/isa/inst/Zkn/aes64ks2.yaml b/spec/std/isa/inst/Zkn/aes64ks2.yaml index e5418182d..cea76c30e 100644 --- a/spec/std/isa/inst/Zkn/aes64ks2.yaml +++ b/spec/std/isa/inst/Zkn/aes64ks2.yaml @@ -14,7 +14,10 @@ description: This instruction implements the additional XOR'ing of key words as part of the AES block cipher Key Schedule. definedBy: - anyOf: [Zknd, Zkne] + extension: + anyOf: + - name: Zknd + - name: Zkne base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zknd/aes32dsi.yaml b/spec/std/isa/inst/Zknd/aes32dsi.yaml index 7637e15b5..bce59ef10 100644 --- a/spec/std/isa/inst/Zknd/aes32dsi.yaml +++ b/spec/std/isa/inst/Zknd/aes32dsi.yaml @@ -11,7 +11,9 @@ description: | Sources a single byte from `rs2` according to `bs`. To this it applies the inverse AES SBox operation, and XOR's the result with `rs1`. This instruction must always be implemented such that its execution latency does not depend on the data being operated on. -definedBy: Zknd +definedBy: + extension: + name: Zknd base: 32 assembly: xd, xs1, xs2, bs encoding: diff --git a/spec/std/isa/inst/Zknd/aes32dsmi.yaml b/spec/std/isa/inst/Zknd/aes32dsmi.yaml index 60cdc769e..ea894b533 100644 --- a/spec/std/isa/inst/Zknd/aes32dsmi.yaml +++ b/spec/std/isa/inst/Zknd/aes32dsmi.yaml @@ -12,7 +12,9 @@ description: | SBox operation, and a partial inverse MixColumn, before XOR'ing the result with `rs1`. This instruction must always be implemented such that its execution latency does not depend on the data being operated on. -definedBy: Zknd +definedBy: + extension: + name: Zknd base: 32 assembly: xd, xs1, xs2, bs encoding: diff --git a/spec/std/isa/inst/Zknd/aes64ds.yaml b/spec/std/isa/inst/Zknd/aes64ds.yaml index e2fe08ba2..0d31a7a83 100644 --- a/spec/std/isa/inst/Zknd/aes64ds.yaml +++ b/spec/std/isa/inst/Zknd/aes64ds.yaml @@ -13,7 +13,9 @@ description: text: | Uses the two 64-bit source registers to represent the entire AES state, and produces _half_ of the next round output, applying the Inverse ShiftRows and SubBytes steps. -definedBy: Zknd +definedBy: + extension: + name: Zknd base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zknd/aes64dsm.yaml b/spec/std/isa/inst/Zknd/aes64dsm.yaml index 10e2040ea..f8b6addb0 100644 --- a/spec/std/isa/inst/Zknd/aes64dsm.yaml +++ b/spec/std/isa/inst/Zknd/aes64dsm.yaml @@ -13,7 +13,9 @@ description: text: | Uses the two 64-bit source registers to represent the entire AES state, and produces _half_ of the next round output, applying the Inverse ShiftRows, SubBytes and MixColumns steps. -definedBy: Zknd +definedBy: + extension: + name: Zknd base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zknd/aes64im.yaml b/spec/std/isa/inst/Zknd/aes64im.yaml index f5fa56a82..f7732d0c8 100644 --- a/spec/std/isa/inst/Zknd/aes64im.yaml +++ b/spec/std/isa/inst/Zknd/aes64im.yaml @@ -14,7 +14,9 @@ description: The instruction applies the inverse MixColumns transformation to two columns of the state array, packed into a single 64-bit register. It is used to create the inverse cipher KeySchedule, according to the equivalent inverse cipher construction in (NIST, 2001) (Page 23, Section 5.3.5). -definedBy: Zknd +definedBy: + extension: + name: Zknd base: 64 assembly: xd, xs1 encoding: diff --git a/spec/std/isa/inst/Zkne/aes32esi.yaml b/spec/std/isa/inst/Zkne/aes32esi.yaml index 88dec147e..51d24fd57 100644 --- a/spec/std/isa/inst/Zkne/aes32esi.yaml +++ b/spec/std/isa/inst/Zkne/aes32esi.yaml @@ -9,7 +9,9 @@ name: aes32esi long_name: No synopsis available description: | No description available. -definedBy: Zkne +definedBy: + extension: + name: Zkne base: 32 assembly: xd, xs1, xs2, bs encoding: diff --git a/spec/std/isa/inst/Zkne/aes32esmi.yaml b/spec/std/isa/inst/Zkne/aes32esmi.yaml index 82babca97..8cdcfbac3 100644 --- a/spec/std/isa/inst/Zkne/aes32esmi.yaml +++ b/spec/std/isa/inst/Zkne/aes32esmi.yaml @@ -9,7 +9,9 @@ name: aes32esmi long_name: No synopsis available description: | No description available. -definedBy: Zkne +definedBy: + extension: + name: Zkne base: 32 assembly: xd, xs1, xs2, bs encoding: diff --git a/spec/std/isa/inst/Zkne/aes64es.yaml b/spec/std/isa/inst/Zkne/aes64es.yaml index 6a1df4555..d999cddea 100644 --- a/spec/std/isa/inst/Zkne/aes64es.yaml +++ b/spec/std/isa/inst/Zkne/aes64es.yaml @@ -13,7 +13,9 @@ description: text: | Uses the two 64-bit source registers to represent the entire AES state, and produces _half_ of the next round output, applying the ShiftRows and SubBytes steps. -definedBy: Zkne +definedBy: + extension: + name: Zkne base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zkne/aes64esm.yaml b/spec/std/isa/inst/Zkne/aes64esm.yaml index ea3aff3f4..bb365eb6f 100644 --- a/spec/std/isa/inst/Zkne/aes64esm.yaml +++ b/spec/std/isa/inst/Zkne/aes64esm.yaml @@ -13,7 +13,9 @@ description: text: | Uses the two 64-bit source registers to represent the entire AES state, and produces _half_ of the next round output, applying the Inverse ShiftRows, SubBytes and MixColumns steps. -definedBy: Zkne +definedBy: + extension: + name: Zkne base: 64 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zknh/sha256sig0.yaml b/spec/std/isa/inst/Zknh/sha256sig0.yaml index aeb2ceed3..a7fa6c18f 100644 --- a/spec/std/isa/inst/Zknh/sha256sig0.yaml +++ b/spec/std/isa/inst/Zknh/sha256sig0.yaml @@ -9,7 +9,9 @@ name: sha256sig0 long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh assembly: xd, xs1 encoding: match: 000100000010-----001-----0010011 diff --git a/spec/std/isa/inst/Zknh/sha256sig1.yaml b/spec/std/isa/inst/Zknh/sha256sig1.yaml index 20246a9f7..8ba215294 100644 --- a/spec/std/isa/inst/Zknh/sha256sig1.yaml +++ b/spec/std/isa/inst/Zknh/sha256sig1.yaml @@ -9,7 +9,9 @@ name: sha256sig1 long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh assembly: xd, xs1 encoding: match: 000100000011-----001-----0010011 diff --git a/spec/std/isa/inst/Zknh/sha256sum0.yaml b/spec/std/isa/inst/Zknh/sha256sum0.yaml index 5c5063f9d..fcc2f81c2 100644 --- a/spec/std/isa/inst/Zknh/sha256sum0.yaml +++ b/spec/std/isa/inst/Zknh/sha256sum0.yaml @@ -9,7 +9,9 @@ name: sha256sum0 long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh assembly: xd, xs1 encoding: match: 000100000000-----001-----0010011 diff --git a/spec/std/isa/inst/Zknh/sha256sum1.yaml b/spec/std/isa/inst/Zknh/sha256sum1.yaml index d61cf5b40..71378af79 100644 --- a/spec/std/isa/inst/Zknh/sha256sum1.yaml +++ b/spec/std/isa/inst/Zknh/sha256sum1.yaml @@ -9,7 +9,9 @@ name: sha256sum1 long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh assembly: xd, xs1 encoding: match: 000100000001-----001-----0010011 diff --git a/spec/std/isa/inst/Zknh/sha512sig0.yaml b/spec/std/isa/inst/Zknh/sha512sig0.yaml index d4131b9be..2606f0763 100644 --- a/spec/std/isa/inst/Zknh/sha512sig0.yaml +++ b/spec/std/isa/inst/Zknh/sha512sig0.yaml @@ -9,7 +9,9 @@ name: sha512sig0 long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh base: 64 assembly: xd, xs1 encoding: diff --git a/spec/std/isa/inst/Zknh/sha512sig0h.yaml b/spec/std/isa/inst/Zknh/sha512sig0h.yaml index b4975cf38..b06237b83 100644 --- a/spec/std/isa/inst/Zknh/sha512sig0h.yaml +++ b/spec/std/isa/inst/Zknh/sha512sig0h.yaml @@ -9,7 +9,9 @@ name: sha512sig0h long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh base: 32 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zknh/sha512sig0l.yaml b/spec/std/isa/inst/Zknh/sha512sig0l.yaml index 926164e12..0741b3ec2 100644 --- a/spec/std/isa/inst/Zknh/sha512sig0l.yaml +++ b/spec/std/isa/inst/Zknh/sha512sig0l.yaml @@ -9,7 +9,9 @@ name: sha512sig0l long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh base: 32 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zknh/sha512sig1.yaml b/spec/std/isa/inst/Zknh/sha512sig1.yaml index 40a401389..60f6daa55 100644 --- a/spec/std/isa/inst/Zknh/sha512sig1.yaml +++ b/spec/std/isa/inst/Zknh/sha512sig1.yaml @@ -9,7 +9,9 @@ name: sha512sig1 long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh base: 64 assembly: xd, xs1 encoding: diff --git a/spec/std/isa/inst/Zknh/sha512sig1h.yaml b/spec/std/isa/inst/Zknh/sha512sig1h.yaml index 01b2653d4..ac57b68c2 100644 --- a/spec/std/isa/inst/Zknh/sha512sig1h.yaml +++ b/spec/std/isa/inst/Zknh/sha512sig1h.yaml @@ -9,7 +9,9 @@ name: sha512sig1h long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh base: 32 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zknh/sha512sig1l.yaml b/spec/std/isa/inst/Zknh/sha512sig1l.yaml index e76793e46..779a506ad 100644 --- a/spec/std/isa/inst/Zknh/sha512sig1l.yaml +++ b/spec/std/isa/inst/Zknh/sha512sig1l.yaml @@ -9,7 +9,9 @@ name: sha512sig1l long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh base: 32 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zknh/sha512sum0.yaml b/spec/std/isa/inst/Zknh/sha512sum0.yaml index ccac52dc8..04bd39010 100644 --- a/spec/std/isa/inst/Zknh/sha512sum0.yaml +++ b/spec/std/isa/inst/Zknh/sha512sum0.yaml @@ -9,7 +9,9 @@ name: sha512sum0 long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh base: 64 assembly: xd, xs1 encoding: diff --git a/spec/std/isa/inst/Zknh/sha512sum0r.yaml b/spec/std/isa/inst/Zknh/sha512sum0r.yaml index cadb9a7e5..4df4f13d7 100644 --- a/spec/std/isa/inst/Zknh/sha512sum0r.yaml +++ b/spec/std/isa/inst/Zknh/sha512sum0r.yaml @@ -9,7 +9,9 @@ name: sha512sum0r long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh base: 32 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zknh/sha512sum1.yaml b/spec/std/isa/inst/Zknh/sha512sum1.yaml index e37b4d61f..c65d3371b 100644 --- a/spec/std/isa/inst/Zknh/sha512sum1.yaml +++ b/spec/std/isa/inst/Zknh/sha512sum1.yaml @@ -9,7 +9,9 @@ name: sha512sum1 long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh base: 64 assembly: xd, xs1 encoding: diff --git a/spec/std/isa/inst/Zknh/sha512sum1r.yaml b/spec/std/isa/inst/Zknh/sha512sum1r.yaml index 2f235767a..8dfc29f7c 100644 --- a/spec/std/isa/inst/Zknh/sha512sum1r.yaml +++ b/spec/std/isa/inst/Zknh/sha512sum1r.yaml @@ -9,7 +9,9 @@ name: sha512sum1r long_name: No synopsis available description: | No description available. -definedBy: Zknh +definedBy: + extension: + name: Zknh base: 32 assembly: xd, xs1, xs2 encoding: diff --git a/spec/std/isa/inst/Zks/sm3p0.yaml b/spec/std/isa/inst/Zks/sm3p0.yaml index 5b557576b..3a1930be0 100644 --- a/spec/std/isa/inst/Zks/sm3p0.yaml +++ b/spec/std/isa/inst/Zks/sm3p0.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - anyOf: [Zks, Zksh] + extension: + anyOf: + - name: Zks + - name: Zksh assembly: xd, xs1 encoding: match: 000100001000-----001-----0010011 diff --git a/spec/std/isa/inst/Zks/sm3p1.yaml b/spec/std/isa/inst/Zks/sm3p1.yaml index e9855ec53..201c29cb9 100644 --- a/spec/std/isa/inst/Zks/sm3p1.yaml +++ b/spec/std/isa/inst/Zks/sm3p1.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - anyOf: [Zks, Zksh] + extension: + anyOf: + - name: Zks + - name: Zksh assembly: xd, xs1 encoding: match: 000100001001-----001-----0010011 diff --git a/spec/std/isa/inst/Zks/sm4ed.yaml b/spec/std/isa/inst/Zks/sm4ed.yaml index ceec6da64..0366b9c10 100644 --- a/spec/std/isa/inst/Zks/sm4ed.yaml +++ b/spec/std/isa/inst/Zks/sm4ed.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - anyOf: [Zks, Zksed] + extension: + anyOf: + - name: Zks + - name: Zksed assembly: xd, xs1, xs2, bs encoding: match: --11000----------000-----0110011 diff --git a/spec/std/isa/inst/Zks/sm4ks.yaml b/spec/std/isa/inst/Zks/sm4ks.yaml index 1b5dcbd95..441710ee2 100644 --- a/spec/std/isa/inst/Zks/sm4ks.yaml +++ b/spec/std/isa/inst/Zks/sm4ks.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - anyOf: [Zks, Zksed] + extension: + anyOf: + - name: Zks + - name: Zksed assembly: xd, xs1, xs2, bs encoding: match: --11010----------000-----0110011 diff --git a/spec/std/isa/inst/Zvbb/vandn.vv.yaml b/spec/std/isa/inst/Zvbb/vandn.vv.yaml index ebacf1750..16d624c0c 100644 --- a/spec/std/isa/inst/Zvbb/vandn.vv.yaml +++ b/spec/std/isa/inst/Zvbb/vandn.vv.yaml @@ -9,7 +9,9 @@ name: vandn.vv long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, vs1, vm encoding: match: 000001-----------000-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vandn.vx.yaml b/spec/std/isa/inst/Zvbb/vandn.vx.yaml index cc6391517..8739c1c81 100644 --- a/spec/std/isa/inst/Zvbb/vandn.vx.yaml +++ b/spec/std/isa/inst/Zvbb/vandn.vx.yaml @@ -9,7 +9,9 @@ name: vandn.vx long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, xs1, vm encoding: match: 000001-----------100-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vbrev.v.yaml b/spec/std/isa/inst/Zvbb/vbrev.v.yaml index 7daa147e2..6623036cb 100644 --- a/spec/std/isa/inst/Zvbb/vbrev.v.yaml +++ b/spec/std/isa/inst/Zvbb/vbrev.v.yaml @@ -9,7 +9,9 @@ name: vbrev.v long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, vm encoding: match: 010010------01010010-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vbrev8.v.yaml b/spec/std/isa/inst/Zvbb/vbrev8.v.yaml index 782fb6aa0..330bd7a50 100644 --- a/spec/std/isa/inst/Zvbb/vbrev8.v.yaml +++ b/spec/std/isa/inst/Zvbb/vbrev8.v.yaml @@ -9,7 +9,9 @@ name: vbrev8.v long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, vm encoding: match: 010010------01000010-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vclz.v.yaml b/spec/std/isa/inst/Zvbb/vclz.v.yaml index bd73f0710..42b94667a 100644 --- a/spec/std/isa/inst/Zvbb/vclz.v.yaml +++ b/spec/std/isa/inst/Zvbb/vclz.v.yaml @@ -9,7 +9,9 @@ name: vclz.v long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, vm encoding: match: 010010------01100010-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vcpop.v.yaml b/spec/std/isa/inst/Zvbb/vcpop.v.yaml index 44d02bd45..61846eda4 100644 --- a/spec/std/isa/inst/Zvbb/vcpop.v.yaml +++ b/spec/std/isa/inst/Zvbb/vcpop.v.yaml @@ -9,7 +9,9 @@ name: vcpop.v long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, vm encoding: match: 010010------01110010-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vctz.v.yaml b/spec/std/isa/inst/Zvbb/vctz.v.yaml index 8ccb949ea..014724bf8 100644 --- a/spec/std/isa/inst/Zvbb/vctz.v.yaml +++ b/spec/std/isa/inst/Zvbb/vctz.v.yaml @@ -9,7 +9,9 @@ name: vctz.v long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, vm encoding: match: 010010------01101010-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vrev8.v.yaml b/spec/std/isa/inst/Zvbb/vrev8.v.yaml index cf886856a..7aa2346ca 100644 --- a/spec/std/isa/inst/Zvbb/vrev8.v.yaml +++ b/spec/std/isa/inst/Zvbb/vrev8.v.yaml @@ -9,7 +9,9 @@ name: vrev8.v long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, vm encoding: match: 010010------01001010-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vrol.vv.yaml b/spec/std/isa/inst/Zvbb/vrol.vv.yaml index fb60e7bc9..05c49b284 100644 --- a/spec/std/isa/inst/Zvbb/vrol.vv.yaml +++ b/spec/std/isa/inst/Zvbb/vrol.vv.yaml @@ -9,7 +9,9 @@ name: vrol.vv long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, vs1, vm encoding: match: 010101-----------000-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vrol.vx.yaml b/spec/std/isa/inst/Zvbb/vrol.vx.yaml index 4bac0a07d..ca9b52315 100644 --- a/spec/std/isa/inst/Zvbb/vrol.vx.yaml +++ b/spec/std/isa/inst/Zvbb/vrol.vx.yaml @@ -9,7 +9,9 @@ name: vrol.vx long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, xs1, vm encoding: match: 010101-----------100-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vror.vi.yaml b/spec/std/isa/inst/Zvbb/vror.vi.yaml index de395d193..53e8a4051 100644 --- a/spec/std/isa/inst/Zvbb/vror.vi.yaml +++ b/spec/std/isa/inst/Zvbb/vror.vi.yaml @@ -9,7 +9,9 @@ name: vror.vi long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, imm, vm encoding: match: 01010------------011-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vror.vv.yaml b/spec/std/isa/inst/Zvbb/vror.vv.yaml index b945fc127..b7f246d3f 100644 --- a/spec/std/isa/inst/Zvbb/vror.vv.yaml +++ b/spec/std/isa/inst/Zvbb/vror.vv.yaml @@ -9,7 +9,9 @@ name: vror.vv long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, vs1, vm encoding: match: 010100-----------000-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vror.vx.yaml b/spec/std/isa/inst/Zvbb/vror.vx.yaml index d6fd28773..24d879f28 100644 --- a/spec/std/isa/inst/Zvbb/vror.vx.yaml +++ b/spec/std/isa/inst/Zvbb/vror.vx.yaml @@ -9,7 +9,9 @@ name: vror.vx long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, xs1, vm encoding: match: 010100-----------100-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vwsll.vi.yaml b/spec/std/isa/inst/Zvbb/vwsll.vi.yaml index 81f6a8708..a6d1d03d5 100644 --- a/spec/std/isa/inst/Zvbb/vwsll.vi.yaml +++ b/spec/std/isa/inst/Zvbb/vwsll.vi.yaml @@ -9,7 +9,9 @@ name: vwsll.vi long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, imm, vm encoding: match: 110101-----------011-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vwsll.vv.yaml b/spec/std/isa/inst/Zvbb/vwsll.vv.yaml index d1ae8fcfe..55801dc9f 100644 --- a/spec/std/isa/inst/Zvbb/vwsll.vv.yaml +++ b/spec/std/isa/inst/Zvbb/vwsll.vv.yaml @@ -9,7 +9,9 @@ name: vwsll.vv long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, vs1, vm encoding: match: 110101-----------000-----1010111 diff --git a/spec/std/isa/inst/Zvbb/vwsll.vx.yaml b/spec/std/isa/inst/Zvbb/vwsll.vx.yaml index e0e4d244e..0561496c8 100644 --- a/spec/std/isa/inst/Zvbb/vwsll.vx.yaml +++ b/spec/std/isa/inst/Zvbb/vwsll.vx.yaml @@ -9,7 +9,9 @@ name: vwsll.vx long_name: No synopsis available description: | No description available. -definedBy: Zvbb +definedBy: + extension: + name: Zvbb assembly: vd, vs2, xs1, vm encoding: match: 110101-----------100-----1010111 diff --git a/spec/std/isa/inst/Zvbc/vclmul.vv.yaml b/spec/std/isa/inst/Zvbc/vclmul.vv.yaml index 04e2d6809..ecbe9bae9 100644 --- a/spec/std/isa/inst/Zvbc/vclmul.vv.yaml +++ b/spec/std/isa/inst/Zvbc/vclmul.vv.yaml @@ -9,7 +9,9 @@ name: vclmul.vv long_name: No synopsis available description: | No description available. -definedBy: Zvbc +definedBy: + extension: + name: Zvbc assembly: vd, vs2, vs1, vm encoding: match: 001100-----------010-----1010111 diff --git a/spec/std/isa/inst/Zvbc/vclmul.vx.yaml b/spec/std/isa/inst/Zvbc/vclmul.vx.yaml index c3b664175..c59750104 100644 --- a/spec/std/isa/inst/Zvbc/vclmul.vx.yaml +++ b/spec/std/isa/inst/Zvbc/vclmul.vx.yaml @@ -9,7 +9,9 @@ name: vclmul.vx long_name: No synopsis available description: | No description available. -definedBy: Zvbc +definedBy: + extension: + name: Zvbc assembly: vd, vs2, xs1, vm encoding: match: 001100-----------110-----1010111 diff --git a/spec/std/isa/inst/Zvbc/vclmulh.vv.yaml b/spec/std/isa/inst/Zvbc/vclmulh.vv.yaml index 8b4293510..37fff2581 100644 --- a/spec/std/isa/inst/Zvbc/vclmulh.vv.yaml +++ b/spec/std/isa/inst/Zvbc/vclmulh.vv.yaml @@ -9,7 +9,9 @@ name: vclmulh.vv long_name: No synopsis available description: | No description available. -definedBy: Zvbc +definedBy: + extension: + name: Zvbc assembly: vd, vs2, vs1, vm encoding: match: 001101-----------010-----1010111 diff --git a/spec/std/isa/inst/Zvbc/vclmulh.vx.yaml b/spec/std/isa/inst/Zvbc/vclmulh.vx.yaml index 2d76049e7..33c68e2e5 100644 --- a/spec/std/isa/inst/Zvbc/vclmulh.vx.yaml +++ b/spec/std/isa/inst/Zvbc/vclmulh.vx.yaml @@ -9,7 +9,9 @@ name: vclmulh.vx long_name: No synopsis available description: | No description available. -definedBy: Zvbc +definedBy: + extension: + name: Zvbc assembly: vd, vs2, xs1, vm encoding: match: 001101-----------110-----1010111 diff --git a/spec/std/isa/inst/Zvfbfmin/vfncvtbf16.f.f.w.yaml b/spec/std/isa/inst/Zvfbfmin/vfncvtbf16.f.f.w.yaml index 91d1636aa..59fe7f2ad 100644 --- a/spec/std/isa/inst/Zvfbfmin/vfncvtbf16.f.f.w.yaml +++ b/spec/std/isa/inst/Zvfbfmin/vfncvtbf16.f.f.w.yaml @@ -9,7 +9,9 @@ name: vfncvtbf16.f.f.w long_name: No synopsis available description: | No description available. -definedBy: Zvfbfmin +definedBy: + extension: + name: Zvfbfmin assembly: vd, vs2, vm encoding: match: 010010------11101001-----1010111 diff --git a/spec/std/isa/inst/Zvfbfmin/vfwcvtbf16.f.f.v.yaml b/spec/std/isa/inst/Zvfbfmin/vfwcvtbf16.f.f.v.yaml index 0181d7941..a0bbe20c7 100644 --- a/spec/std/isa/inst/Zvfbfmin/vfwcvtbf16.f.f.v.yaml +++ b/spec/std/isa/inst/Zvfbfmin/vfwcvtbf16.f.f.v.yaml @@ -9,7 +9,9 @@ name: vfwcvtbf16.f.f.v long_name: No synopsis available description: | No description available. -definedBy: Zvfbfmin +definedBy: + extension: + name: Zvfbfmin assembly: vd, vs2, vm encoding: match: 010010------01101001-----1010111 diff --git a/spec/std/isa/inst/Zvfbfwma/vfwmaccbf16.vf.yaml b/spec/std/isa/inst/Zvfbfwma/vfwmaccbf16.vf.yaml index c353c6d13..3e2640c4c 100644 --- a/spec/std/isa/inst/Zvfbfwma/vfwmaccbf16.vf.yaml +++ b/spec/std/isa/inst/Zvfbfwma/vfwmaccbf16.vf.yaml @@ -9,7 +9,9 @@ name: vfwmaccbf16.vf long_name: No synopsis available description: | No description available. -definedBy: Zvfbfwma +definedBy: + extension: + name: Zvfbfwma assembly: vd, fs1, vs2, vm encoding: match: 111011-----------101-----1010111 diff --git a/spec/std/isa/inst/Zvfbfwma/vfwmaccbf16.vv.yaml b/spec/std/isa/inst/Zvfbfwma/vfwmaccbf16.vv.yaml index 75517540a..e550d9986 100644 --- a/spec/std/isa/inst/Zvfbfwma/vfwmaccbf16.vv.yaml +++ b/spec/std/isa/inst/Zvfbfwma/vfwmaccbf16.vv.yaml @@ -9,7 +9,9 @@ name: vfwmaccbf16.vv long_name: No synopsis available description: | No description available. -definedBy: Zvfbfwma +definedBy: + extension: + name: Zvfbfwma assembly: vd, vs1, vs2, vm encoding: match: 111011-----------001-----1010111 diff --git a/spec/std/isa/inst/Zvkg/vghsh.vv.yaml b/spec/std/isa/inst/Zvkg/vghsh.vv.yaml index 85b23d85d..8a8fea805 100644 --- a/spec/std/isa/inst/Zvkg/vghsh.vv.yaml +++ b/spec/std/isa/inst/Zvkg/vghsh.vv.yaml @@ -9,7 +9,9 @@ name: vghsh.vv long_name: No synopsis available description: | No description available. -definedBy: Zvkg +definedBy: + extension: + name: Zvkg assembly: vd, vs2, vs1 encoding: match: 1011001----------010-----1110111 diff --git a/spec/std/isa/inst/Zvkg/vgmul.vv.yaml b/spec/std/isa/inst/Zvkg/vgmul.vv.yaml index b62fa44f5..80e092d2d 100644 --- a/spec/std/isa/inst/Zvkg/vgmul.vv.yaml +++ b/spec/std/isa/inst/Zvkg/vgmul.vv.yaml @@ -9,7 +9,9 @@ name: vgmul.vv long_name: No synopsis available description: | No description available. -definedBy: Zvkg +definedBy: + extension: + name: Zvkg assembly: vd, vs2 encoding: match: 1010001-----10001010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaesdf.vs.yaml b/spec/std/isa/inst/Zvkned/vaesdf.vs.yaml index 7ff102adf..1a218ecf5 100644 --- a/spec/std/isa/inst/Zvkned/vaesdf.vs.yaml +++ b/spec/std/isa/inst/Zvkned/vaesdf.vs.yaml @@ -9,7 +9,9 @@ name: vaesdf.vs long_name: No synopsis available description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2 encoding: match: 1010011-----00001010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaesdf.vv.yaml b/spec/std/isa/inst/Zvkned/vaesdf.vv.yaml index 6d7e1c8d5..1fa539288 100644 --- a/spec/std/isa/inst/Zvkned/vaesdf.vv.yaml +++ b/spec/std/isa/inst/Zvkned/vaesdf.vv.yaml @@ -9,7 +9,9 @@ name: vaesdf.vv long_name: No synopsis available description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2 encoding: match: 1010001-----00001010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaesdm.vs.yaml b/spec/std/isa/inst/Zvkned/vaesdm.vs.yaml index 8557e69c0..61421af3c 100644 --- a/spec/std/isa/inst/Zvkned/vaesdm.vs.yaml +++ b/spec/std/isa/inst/Zvkned/vaesdm.vs.yaml @@ -9,7 +9,9 @@ name: vaesdm.vs long_name: No synopsis available description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2 encoding: match: 1010011-----00000010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaesdm.vv.yaml b/spec/std/isa/inst/Zvkned/vaesdm.vv.yaml index 6e95fe75d..de65d232b 100644 --- a/spec/std/isa/inst/Zvkned/vaesdm.vv.yaml +++ b/spec/std/isa/inst/Zvkned/vaesdm.vv.yaml @@ -9,7 +9,9 @@ name: vaesdm.vv long_name: No synopsis available description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2 encoding: match: 1010001-----00000010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaesef.vs.yaml b/spec/std/isa/inst/Zvkned/vaesef.vs.yaml index fc72e2629..8c521d825 100644 --- a/spec/std/isa/inst/Zvkned/vaesef.vs.yaml +++ b/spec/std/isa/inst/Zvkned/vaesef.vs.yaml @@ -9,7 +9,9 @@ name: vaesef.vs long_name: No synopsis available description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2 encoding: match: 1010011-----00011010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaesef.vv.yaml b/spec/std/isa/inst/Zvkned/vaesef.vv.yaml index 8c6d92951..5b3aff507 100644 --- a/spec/std/isa/inst/Zvkned/vaesef.vv.yaml +++ b/spec/std/isa/inst/Zvkned/vaesef.vv.yaml @@ -9,7 +9,9 @@ name: vaesef.vv long_name: No synopsis available description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2 encoding: match: 1010001-----00011010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaesem.vs.yaml b/spec/std/isa/inst/Zvkned/vaesem.vs.yaml index a01888764..d5959c03e 100644 --- a/spec/std/isa/inst/Zvkned/vaesem.vs.yaml +++ b/spec/std/isa/inst/Zvkned/vaesem.vs.yaml @@ -9,7 +9,9 @@ name: vaesem.vs long_name: No synopsis available description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2 encoding: match: 1010011-----00010010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaesem.vv.yaml b/spec/std/isa/inst/Zvkned/vaesem.vv.yaml index 0c5e89157..9e78e1d19 100644 --- a/spec/std/isa/inst/Zvkned/vaesem.vv.yaml +++ b/spec/std/isa/inst/Zvkned/vaesem.vv.yaml @@ -9,7 +9,9 @@ name: vaesem.vv long_name: No synopsis available description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2 encoding: match: 1010001-----00010010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaeskf1.vi.yaml b/spec/std/isa/inst/Zvkned/vaeskf1.vi.yaml index 96b05cb8c..09c1f25fc 100644 --- a/spec/std/isa/inst/Zvkned/vaeskf1.vi.yaml +++ b/spec/std/isa/inst/Zvkned/vaeskf1.vi.yaml @@ -9,7 +9,9 @@ name: vaeskf1.vi long_name: No synopsis available description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2, imm encoding: match: 1000101----------010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaeskf2.vi.yaml b/spec/std/isa/inst/Zvkned/vaeskf2.vi.yaml index 01b0a6fa6..4373750f3 100644 --- a/spec/std/isa/inst/Zvkned/vaeskf2.vi.yaml +++ b/spec/std/isa/inst/Zvkned/vaeskf2.vi.yaml @@ -9,7 +9,9 @@ name: vaeskf2.vi long_name: No synopsis available description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2, imm encoding: match: 1010101----------010-----1110111 diff --git a/spec/std/isa/inst/Zvkned/vaesz.vs.yaml b/spec/std/isa/inst/Zvkned/vaesz.vs.yaml index 6e036d391..81b56d05d 100644 --- a/spec/std/isa/inst/Zvkned/vaesz.vs.yaml +++ b/spec/std/isa/inst/Zvkned/vaesz.vs.yaml @@ -9,7 +9,9 @@ name: vaesz.vs long_name: Vector AES round zero description: | No description available. -definedBy: Zvkned +definedBy: + extension: + name: Zvkned assembly: vd, vs2 encoding: match: 1010011-----00111010-----1110111 diff --git a/spec/std/isa/inst/Zvknha/vsha2ch.vv.yaml b/spec/std/isa/inst/Zvknha/vsha2ch.vv.yaml index 9ed2739b3..ea4e8ee96 100644 --- a/spec/std/isa/inst/Zvknha/vsha2ch.vv.yaml +++ b/spec/std/isa/inst/Zvknha/vsha2ch.vv.yaml @@ -9,7 +9,9 @@ name: vsha2ch.vv long_name: No synopsis available description: | No description available. -definedBy: Zvknha +definedBy: + extension: + name: Zvknha assembly: vd, vs2, vs1 encoding: match: 1011101----------010-----1110111 diff --git a/spec/std/isa/inst/Zvknha/vsha2cl.vv.yaml b/spec/std/isa/inst/Zvknha/vsha2cl.vv.yaml index 1047aad5a..2b621d5be 100644 --- a/spec/std/isa/inst/Zvknha/vsha2cl.vv.yaml +++ b/spec/std/isa/inst/Zvknha/vsha2cl.vv.yaml @@ -9,7 +9,9 @@ name: vsha2cl.vv long_name: No synopsis available description: | No description available. -definedBy: Zvknha +definedBy: + extension: + name: Zvknha assembly: vd, vs2, vs1 encoding: match: 1011111----------010-----1110111 diff --git a/spec/std/isa/inst/Zvknha/vsha2ms.vv.yaml b/spec/std/isa/inst/Zvknha/vsha2ms.vv.yaml index 4f2eaba7e..f0ca129c5 100644 --- a/spec/std/isa/inst/Zvknha/vsha2ms.vv.yaml +++ b/spec/std/isa/inst/Zvknha/vsha2ms.vv.yaml @@ -9,7 +9,9 @@ name: vsha2ms.vv long_name: No synopsis available description: | No description available. -definedBy: Zvknha +definedBy: + extension: + name: Zvknha assembly: vd, vs2, vs1 encoding: match: 1011011----------010-----1110111 diff --git a/spec/std/isa/inst/Zvks/vsm3c.vi.yaml b/spec/std/isa/inst/Zvks/vsm3c.vi.yaml index 15f51bc6b..1d293a19f 100644 --- a/spec/std/isa/inst/Zvks/vsm3c.vi.yaml +++ b/spec/std/isa/inst/Zvks/vsm3c.vi.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - anyOf: [Zvks, Zvksh] + extension: + anyOf: + - name: Zvks + - name: Zvksh assembly: vd, vs2, imm encoding: match: 1010111----------010-----1110111 diff --git a/spec/std/isa/inst/Zvks/vsm3me.vv.yaml b/spec/std/isa/inst/Zvks/vsm3me.vv.yaml index 6a2f0b0ce..149b3e882 100644 --- a/spec/std/isa/inst/Zvks/vsm3me.vv.yaml +++ b/spec/std/isa/inst/Zvks/vsm3me.vv.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - anyOf: [Zvks, Zvksh] + extension: + anyOf: + - name: Zvks + - name: Zvksh assembly: vd, vs2, vs1 encoding: match: 1000001----------010-----1110111 diff --git a/spec/std/isa/inst/Zvks/vsm4k.vi.yaml b/spec/std/isa/inst/Zvks/vsm4k.vi.yaml index 4b5612513..d76c505f2 100644 --- a/spec/std/isa/inst/Zvks/vsm4k.vi.yaml +++ b/spec/std/isa/inst/Zvks/vsm4k.vi.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - anyOf: [Zvks, Zvksed] + extension: + anyOf: + - name: Zvks + - name: Zvksed assembly: vd, vs2, imm encoding: match: 1000011----------010-----1110111 diff --git a/spec/std/isa/inst/Zvks/vsm4r.vs.yaml b/spec/std/isa/inst/Zvks/vsm4r.vs.yaml index 2626ff109..02e32fb50 100644 --- a/spec/std/isa/inst/Zvks/vsm4r.vs.yaml +++ b/spec/std/isa/inst/Zvks/vsm4r.vs.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - anyOf: [Zvks, Zvksed] + extension: + anyOf: + - name: Zvks + - name: Zvksed assembly: vd, vs2 encoding: match: 1010011-----10000010-----1110111 diff --git a/spec/std/isa/inst/Zvks/vsm4r.vv.yaml b/spec/std/isa/inst/Zvks/vsm4r.vv.yaml index cfac04424..45f2527f5 100644 --- a/spec/std/isa/inst/Zvks/vsm4r.vv.yaml +++ b/spec/std/isa/inst/Zvks/vsm4r.vv.yaml @@ -10,7 +10,10 @@ long_name: No synopsis available description: | No description available. definedBy: - anyOf: [Zvks, Zvksed] + extension: + anyOf: + - name: Zvks + - name: Zvksed assembly: vd, vs2 encoding: match: 1010001-----10000010-----1110111 diff --git a/tools/ruby-gems/idl_highlighter/idl_highlighter.gemspec b/tools/ruby-gems/idl_highlighter/idl_highlighter.gemspec index f5d97aae4..51f2f8ddb 100644 --- a/tools/ruby-gems/idl_highlighter/idl_highlighter.gemspec +++ b/tools/ruby-gems/idl_highlighter/idl_highlighter.gemspec @@ -26,7 +26,7 @@ Gem::Specification.new do |s| "mailing_list_uri" => "https://lists.riscv.org/g/tech-unifieddb", "bug_tracker_uri" => "https://github.com/riscv-software-src/riscv-unified-db/issues" } - s.required_ruby_version = "~> 3.2" # only supported in UDB container + s.required_ruby_version = "~> 3.2" s.require_paths = ["lib"] diff --git a/tools/ruby-gems/idlc/Gemfile.lock b/tools/ruby-gems/idlc/Gemfile.lock index 43933ebae..4217ed010 100644 --- a/tools/ruby-gems/idlc/Gemfile.lock +++ b/tools/ruby-gems/idlc/Gemfile.lock @@ -157,6 +157,7 @@ DEPENDENCIES rubocop-sorbet simplecov sorbet + spoom tapioca yard yard-sorbet diff --git a/tools/ruby-gems/idlc/Rakefile b/tools/ruby-gems/idlc/Rakefile index ace5599d6..55a4447cc 100644 --- a/tools/ruby-gems/idlc/Rakefile +++ b/tools/ruby-gems/idlc/Rakefile @@ -21,9 +21,9 @@ namespace :chore do ENV["BUNDLE_APP_CONFIG"] = ($root / ".bundle").to_s Dir.chdir(IDLC_ROOT) do sh "bundle install --gemfile #{IDLC_ROOT}/Gemfile" - sh "bundle exec --gemfile #{IDLC_ROOT}/Gemfile tapioca gems --all" - sh "bundle exec --gemfile #{IDLC_ROOT}/Gemfile tapioca dsl" - sh "bundle exec --gemfile #{IDLC_ROOT}/Gemfile tapioca annotations" + sh "bundle exec --gemfile #{IDLC_ROOT}/Gemfile tapioca gems" + # sh "bundle exec --gemfile #{IDLC_ROOT}/Gemfile tapioca dsl" + # sh "bundle exec --gemfile #{IDLC_ROOT}/Gemfile tapioca annotations" end end end @@ -38,6 +38,12 @@ namespace :test do end end + task :sorbet_coverage do + Dir.chdir(IDLC_ROOT) do + sh "bundle exec spoom srb coverage" + end + end + desc "Run all unit tests" task :unit do Dir.chdir(IDLC_ROOT) do diff --git a/tools/ruby-gems/idlc/idlc.gemspec b/tools/ruby-gems/idlc/idlc.gemspec index 042b2ff12..b559fce63 100644 --- a/tools/ruby-gems/idlc/idlc.gemspec +++ b/tools/ruby-gems/idlc/idlc.gemspec @@ -26,7 +26,7 @@ Gem::Specification.new do |s| "mailing_list_uri" => "https://lists.riscv.org/g/tech-unifieddb", "bug_tracker_uri" => "https://github.com/riscv-software-src/riscv-unified-db/issues" } - s.required_ruby_version = "~> 3.2" # only supported in UDB container + s.required_ruby_version = "~> 3.2" s.require_paths = ["lib"] s.bindir = "bin" @@ -38,6 +38,7 @@ Gem::Specification.new do |s| s.add_dependency "treetop", "1.6.12" s.add_development_dependency "minitest" + s.add_development_dependency "ruby-debug-ide" s.add_development_dependency "rouge" s.add_development_dependency "rubocop-github" s.add_development_dependency "rubocop-minitest" @@ -45,6 +46,7 @@ Gem::Specification.new do |s| s.add_development_dependency "rubocop-sorbet" s.add_development_dependency "simplecov" s.add_development_dependency "sorbet" + s.add_development_dependency "spoom" s.add_development_dependency "tapioca" s.add_development_dependency "yard" s.add_development_dependency "yard-sorbet" diff --git a/tools/ruby-gems/idlc/lib/idlc/ast.rb b/tools/ruby-gems/idlc/lib/idlc/ast.rb index e96191a56..00dbecc12 100644 --- a/tools/ruby-gems/idlc/lib/idlc/ast.rb +++ b/tools/ruby-gems/idlc/lib/idlc/ast.rb @@ -2998,7 +2998,7 @@ class ImplicationExpressionSyntaxNode < SyntaxNode def to_ast ImplicationExpressionAst.new( input, interval, - antecedent.to_ast, consequent.to_ast + send(:antecedent).to_ast, send(:consequent).to_ast ) end end @@ -3016,11 +3016,17 @@ def initialize(input, interval, antecedent, consequent) super(input, interval, [antecedent, consequent]) end + + sig { override.params(symtab: SymbolTable).returns(T::Boolean) } + def const_eval?(symtab) + antecedent.const_eval?(symtab) && consequent.const_eval?(symtab) + end + sig { returns(RvalueAst) } - def antecedent = @children[0] + def antecedent = T.cast(@children.fetch(0), RvalueAst) sig { returns(RvalueAst) } - def consequent = @children[1] + def consequent = T.cast(@children.fetch(1), RvalueAst) sig { override.params(symtab: SymbolTable).void } def type_check(symtab) @@ -3031,15 +3037,18 @@ def type_check(symtab) sig { params(symtab: SymbolTable).returns(T::Boolean) } def satisfied?(symtab) return true if antecedent.value(symtab) == false - consequent.value(symtab) + T.cast(consequent.value(symtab), T::Boolean) end + sig { override.returns(String) } + def to_idl = "#{antecedent.to_idl} -> #{consequent.to_idl}" + end class ImplicationStatementSyntaxNode < SyntaxNode sig { override.returns(ImplicationStatementAst) } def to_ast - ImplicationStatementAst.new(input, interval, implication_expression.to_ast) + ImplicationStatementAst.new(input, interval, send(:implication_expression).to_ast) end end @@ -3055,8 +3064,11 @@ def initialize(input, interval, implication_expression) super(input, interval, [implication_expression]) end + sig { override.params(symtab: SymbolTable).returns(T::Boolean) } + def const_eval?(symtab) = expression.const_eval?(symtab) + sig { returns(ImplicationExpressionAst) } - def expression = @children[0] + def expression = T.cast(@children.fetch(0), ImplicationExpressionAst) sig { override.params(symtab: SymbolTable).void } def type_check(symtab) @@ -3067,6 +3079,9 @@ def type_check(symtab) def satisfied?(symtab) expression.satisfied?(symtab) end + + sig { override.returns(String) } + def to_idl = "#{expression.to_idl};" end class ConstraintBodySyntaxNode < SyntaxNode @@ -3092,6 +3107,9 @@ def initialize(input, interval, stmts) super(input, interval, stmts) end + sig { override.params(symtab: SymbolTable).returns(T::Boolean) } + def const_eval?(symtab) = stmts.all? { |stmt| stmt.const_eval?(symtab) } + sig { returns(T::Array[T.any(ImplicationStatementAst, ForLoopAst)]) } def stmts = T.cast(@children, T::Array[T.any(ImplicationStatementAst, ForLoopAst)]) @@ -3108,6 +3126,11 @@ def satisfied?(symtab) stmt.satisfied?(symtab) end end + + sig { override.returns(String) } + def to_idl + stmts.map { |stmt| stmt.to_idl }.join("\n") + end end class WidthRevealSyntaxNode < SyntaxNode diff --git a/tools/ruby-gems/idlc/lib/idlc/idl.treetop b/tools/ruby-gems/idlc/lib/idlc/idl.treetop index 9829cac93..7c5e4599e 100644 --- a/tools/ruby-gems/idlc/lib/idlc/idl.treetop +++ b/tools/ruby-gems/idlc/lib/idlc/idl.treetop @@ -23,7 +23,7 @@ grammar Idl fetch / space+ - )+ + )* end rule include_statement diff --git a/tools/ruby-gems/idlc/test/idl/literals.yaml b/tools/ruby-gems/idlc/test/idl/literals.yaml index 21f941a3c..109ab2967 100644 --- a/tools/ruby-gems/idlc/test/idl/literals.yaml +++ b/tools/ruby-gems/idlc/test/idl/literals.yaml @@ -4,6 +4,11 @@ # SPDX-License-Identifier: BSD-3-Clause-Clear +# e: IDL expression +# =: Expected result (to_idl) +# d: description +# p: parameter value list + schema: expression_schema.json# tests: ################################################### diff --git a/tools/ruby-gems/udb/lib/udb/cfg_arch.rb b/tools/ruby-gems/udb/lib/udb/cfg_arch.rb index 55a9d3968..5c2eb6138 100644 --- a/tools/ruby-gems/udb/lib/udb/cfg_arch.rb +++ b/tools/ruby-gems/udb/lib/udb/cfg_arch.rb @@ -491,7 +491,7 @@ def initialize(name, config, arch_path) end custom_globals_path = Pathname.new "#{overlay_path}/isa/globals.isa" - idl_path = File.exist?(custom_globals_path) ? custom_globals_path : Udb.repo_root / "spec" / "std" / "isa" / "isa" / "globals.isa" + idl_path = File.exist?(custom_globals_path) ? custom_globals_path : @arch_dir / "isa" / "globals.isa" @global_ast = @idl_compiler.compile_file( idl_path ) diff --git a/tools/ruby-gems/udb/lib/udb/cli.rb b/tools/ruby-gems/udb/lib/udb/cli.rb index d627e3d55..945760fb0 100644 --- a/tools/ruby-gems/udb/lib/udb/cli.rb +++ b/tools/ruby-gems/udb/lib/udb/cli.rb @@ -28,6 +28,41 @@ module CliCommands class Validate < SubCommandBase include Thor::Actions + desc "spec", "Validate that the spec follows the schema" + long_desc <<~DESC + Validate that all of the files in the spec conform to the data schema. + + The specification is determined by --config. + DESC + method_option :std, aliases: "-a", type: :string, desc: "Path to standard specification database", default: Udb.default_std_isa_path.to_s + method_option :custom, type: :string, desc: "Path to custom specification directory, if needed", default: Udb.default_custom_isa_path.to_s + method_option :config, type: :string, required: true, desc: "Configuration name, or path to a config file", default: "_" + method_option :config_dir, type: :string, desc: "Path to directory with config files", default: Udb.default_cfgs_path.to_s + method_option :gen, type: :string, desc: "Path to folder used for generation", default: Udb.default_gen_path.to_s + def spec + + cfg_file = + if File.file?(options[:config]) + Pathname.new(options[:config]) + elsif File.file?("#{options[:config_dir]}/#{options[:config]}.yaml") + Pathname.new("#{options[:config_dir]}/#{options[:config]}.yaml") + else + raise ArgumentError, "Cannot find config: #{options[:config]}" + end + + resolver = + Udb::Resolver.new( + std_path_override: Pathname.new(options[:std]), + gen_path_override: Pathname.new(options[:gen]), + custom_path_override: Pathname.new(options[:custom]) + ) + cfg_arch = resolver.cfg_arch_for(cfg_file.realpath) + + puts "Checking arch files against schema.." + cfg_arch.validate($resolver, show_progress: true) + puts "All files validate against their schema" + end + desc "cfg NAME_OR_PATH", "Validate a configuration file" long_desc <<~DESC Check that a configuration file is valid for the given spec. diff --git a/tools/ruby-gems/udb/lib/udb/condition.rb b/tools/ruby-gems/udb/lib/udb/condition.rb new file mode 100644 index 000000000..daea0813a --- /dev/null +++ b/tools/ruby-gems/udb/lib/udb/condition.rb @@ -0,0 +1,642 @@ +#!/usr/bin/env ruby + +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# typed: true +# frozen_string_literal: true + +require "sorbet-runtime" + +require "idlc/symbol_table" +require "udb/obj/extension" + +module Udb + + class Constraint + extend T::Sig + + sig { params(idl: String, input_file: String, input_line: Integer, cfg_arch: ConfiguredArchitecture).void } + def initialize(idl, input_file:, input_line:, cfg_arch:) + @ast = cfg_arch.idl_compiler.compile_func_body(idl, symtab: cfg_arch.symtab, input_file:, input_line:) + end + + sig { params(symtab: Idl::SymbolTable).returns(T::Boolean) } + def eval(symtab) + @ast.satisfied?(symtab) + end + end + + # return type for satisfied_by functions + class SatisfiedResult < T::Enum + enums do + Yes = new + No = new + Maybe = new + end + end + + class LogicNodeType < T::Enum + enums do + True = new + False = new + Term = new + Not = new + And = new + Or = new + None = new + If = new + end + end + + # Abstract syntax tree of the condition logic + class LogicNode + extend T::Sig + + sig { returns(LogicNodeType) } + attr_accessor :type + + TermType = T.type_alias { T.any(ExtensionRequirement, Constraint) } + sig { params(type: LogicNodeType, children: T::Array[T.any(LogicNode, TermType)]).void } + def initialize(type, children) + raise ArgumentError, "Children must be singular" if [LogicNodeType::Term, LogicNodeType::Not].include?(type) && children.size != 1 + raise ArgumentError, "Children must have at least two elements" if [LogicNodeType::And, LogicNodeType::Or, LogicNodeType::None, LogicNodeType::If].include?(type) && children.size < 2 + + @children = children + if [LogicNodeType::True, LogicNodeType::False].include?(type) + raise ArgumentError, "Children must be empty" unless children.empty? + elsif type == LogicNodeType::Term + # ensure the children are TermType + raise "Children must be either ExtensionRequirements or Constraints" unless children.all? { |c| c.is_a?(ExtensionRequirement) || c.is_a?(Constraint) } + else + raise ArgumentError, "All Children must be LogicNodes" unless children.all? { |child| child.is_a?(LogicNode) } + if type == LogicNodeType::Not + @children = children + else + if children.size == 2 + @children = children + else + @children = [children.fetch(0), LogicNode.new(type, T.must(children[1..]))] + end + end + end + + @type = type + end + + # @return The terms (leafs) of this tree + sig { returns(T::Array[T.any(ExtensionRequirement, Constraint)]) } + def terms + @terms ||= + if @type == LogicNodeType::Term + [@children.fetch(0)] + else + @children.map { |child| T.cast(child, LogicNode).terms }.flatten.uniq + end + end + + EvalCallbackType = T.type_alias { T.proc.params(arg0: T.any(ExtensionRequirement, Constraint)).returns(T::Boolean) } + sig { params(blk: EvalCallbackType).returns(EvalCallbackType) } + def make_eval_cb(&blk) + blk + end + private :make_eval_cb + + # evaluate the logic tree using +symtab+ to evaluate any constraints and +ext_vers+ to evaluate any extension requirements + sig { params(symtab: Idl::SymbolTable, ext_vers: T::Array[ExtensionVersion]).returns(T::Boolean) } + def eval(symtab, ext_vers) + cb = make_eval_cb do |term| + if term.is_a?(ExtensionRequirement) + ext_vers.any? do |term_value| + next unless term_value.is_a?(ExtensionVersion) + + ext_ver = T.cast(term_value, ExtensionVersion) + term.satisfied_by?(ext_ver) + end + elsif term.is_a?(Constraint) + term.eval(symtab) + else + T.absurd(term) + end + end + eval_cb(cb) + end + + sig { params(callback: EvalCallbackType).returns(T::Boolean) } + def eval_cb(callback) + if @type == LogicNodeType::True + true + elsif @type == LogicNodeType::False + false + elsif @type == LogicNodeType::Term + ext_req = T.cast(@children[0], ExtensionRequirement) + callback.call(ext_req) + elsif @type == LogicNodeType::If + cond_ext_ret = T.cast(@children[0], LogicNode) + if cond_ext_ret.eval_cb(callback) + T.cast(@children[1], LogicNode).eval_cb(callback) + else + true + end + elsif @type == LogicNodeType::Not + !T.cast(@children[0], LogicNode).eval_cb(callback) + elsif @type == LogicNodeType::And + @children.all? { |child| T.cast(child, LogicNode).eval_cb(callback) } + elsif @type == LogicNodeType::Or + @children.any? { |child| T.cast(child, LogicNode).eval_cb(callback) } + elsif @type == LogicNodeType::None + @children.none? { |child| T.cast(child, LogicNode).eval_cb(callback) } + else + T.absurd(@type) + end + end + + sig { returns(String) } + def to_s + if @type == LogicNodeType::True + "true" + elsif @type == LogicNodeType::False + "false" + elsif @type == LogicNodeType::Term + "(#{@children[0]})" + elsif @type == LogicNodeType::Not + "!#{@children[0]}" + elsif @type == LogicNodeType::And + "(#{@children[0]} ^ #{@children[1]})" + elsif @type == LogicNodeType::Or + "(#{@children[0]} v #{@children[1]})" + elsif @type == LogicNodeType::None + "!(#{@children[0]} v #{@children[1]})" + elsif @type == LogicNodeType::If + "(#{@children[0]} -> #{@children[1]})" + else + T.absurd(@type) + end + end + end + + module AbstractCondition + extend T::Sig + extend T::Helpers + interface! + + sig { abstract.returns(T::Boolean) } + def empty?; end + + sig { abstract.params(expand: T::Boolean).returns(LogicNode) } + def to_logic_tree(expand: true); end + + sig { abstract.params(_other: T.untyped).returns(T::Boolean) } + def compatible?(_other); end + + sig { abstract.returns(T.any(String, T::Hash[String, T.untyped])) } + def to_h; end + + sig { abstract.params(_cfg_arch: ConfiguredArchitecture).returns(SatisfiedResult) } + def satisfied_by_cfg_arch?(_cfg_arch); end + + sig { abstract.params(_ext_ver_list: T::Array[ExtensionVersion]).returns(T::Boolean) } + def satisfied_by_ext_ver_list?(_ext_ver_list); end + + sig { abstract.params(_cfg_arch: ConfiguredArchitecture).returns(T::Boolean) } + def could_be_true?(_cfg_arch); end + + sig { abstract.returns(T::Boolean) } + def has_constraint?; end + + sig { abstract.returns(T::Boolean) } + def has_extension_requirement?; end + end + + # represents a condition in the UDB data, which could include conditions involving + # extensions and/or parameters + class Condition + extend T::Sig + extend T::Helpers + include AbstractCondition + + sig { + params( + cfg_arch: ConfiguredArchitecture, + conds: T::Array[T.all(AbstractCondition, Object)] + ) + .returns(AbstractCondition) + } + def self.join(cfg_arch, conds) + if conds.size == 0 + AlwaysTrueCondition.new + elsif conds.size == 1 + conds.fetch(0) + else + Condition.new({ "allOf": conds.map(&:to_h) }, cfg_arch) + end + end + + sig { params(yaml: T::Hash[String, T.untyped], cfg_arch: ConfiguredArchitecture).void } + def initialize(yaml, cfg_arch) + @yaml = yaml + @cfg_arch = cfg_arch + end + + sig { override.returns(T::Hash[String, T.untyped]) } + def to_h = @yaml + + sig { override.returns(T::Boolean) } + def empty? = @yaml.empty? + + sig { override.params(expand: T::Boolean).returns(LogicNode) } + def to_logic_tree(expand: true) + @logic_tree ||= to_logic_tree_helper(@yaml, expand:) + end + + sig { + overridable + .params( + yaml: T::Hash[String, T.untyped], + expand: T::Boolean + ).returns(LogicNode) + } + def to_logic_tree_helper(yaml, expand: true) + if yaml.key?("allOf") + LogicNode.new(LogicNodeType::And, yaml["allOf"].map { |node| to_logic_tree_helper(node, expand:) }) + elsif yaml.key?("anyOf") + LogicNode.new(LogicNodeType::Or, yaml["anyOf"].map { |node| to_logic_tree_helper(node, expand:) }) + elsif yaml.key?("noneOf") + LogicNode.new(LogicNodeType::None, yaml["noneOf"].map { |node| to_logic_tree_helper(node, expand:) }) + elsif yaml.key?("not") + LogicNode.new(LogicNodeType::Not, [to_logic_tree_helper(yaml["not"], expand:)]) + elsif yaml.key?("extension") + ExtensionCondition.new(yaml["extension"], @cfg_arch).to_logic_tree + elsif yaml.key?("param") + ConstraintCondition.new(yaml["param"], @cfg_arch).to_logic_tree + else + raise "Unexpected" + end + end + private :to_logic_tree_helper + + sig { override.returns(T::Boolean) } + def has_constraint? + to_logic_tree.terms.any? { |t| t.is_a?(Constraint) } + end + + sig { override.returns(T::Boolean) } + def has_extension_requirement? + to_logic_tree.terms.any? { |t| t.is_a?(ExtensionRequirement) } + end + + sig { override.params(cfg_arch: ConfiguredArchitecture).returns(T::Boolean) } + def could_be_true?(cfg_arch) + r = satisfied_by_cfg_arch?(cfg_arch) + r == SatisfiedResult::Yes || r == SatisfiedResult::Maybe + end + + EvalCallbackType = T.type_alias { T.proc.params(term: T.any(ExtensionRequirement, Constraint)).returns(T::Boolean) } + sig { params(blk: EvalCallbackType).returns(EvalCallbackType) } + def make_cb_proc(&blk) + blk + end + private :make_cb_proc + + sig { override.params(cfg_arch: ConfiguredArchitecture).returns(SatisfiedResult) } + def satisfied_by_cfg_arch?(cfg_arch) + if cfg_arch.fully_configured? + if to_logic_tree.eval(cfg_arch.symtab, cfg_arch.transitive_implemented_extension_versions) + SatisfiedResult::Yes + else + SatisfiedResult::No + end + elsif cfg_arch.partially_configured? + mandatory_ext_cb = make_cb_proc do |term| + if term.is_a?(ExtensionRequirement) + cond_ext_req = T.cast(term, ExtensionRequirement) + cfg_arch.mandatory_extension_reqs.any? { |cfg_ext_req| cond_ext_req.satisfied_by?(cfg_ext_req) } + elsif term.is_a?(Constraint) + constraint = T.cast(term, Constraint) + constraint.eval(cfg_arch.symtab) + else + T.absurd(term) + end + end + possible_ext_cb = make_cb_proc do |term| + if term.is_a?(ExtensionRequirement) + cond_ext_req = T.cast(term, ExtensionRequirement) + cfg_arch.possible_extension_versions.any? { |cfg_ext_ver| cond_ext_req.satisfied_by?(cfg_ext_ver) } + elsif term.is_a?(Constraint) + constraint = T.cast(term, Constraint) + constraint.eval(cfg_arch.symtab) + else + T.absurd(term) + end + end + if to_logic_tree.eval_cb(mandatory_ext_cb) + SatisfiedResult::Yes + elsif to_logic_tree.eval_cb(possible_ext_cb) + SatisfiedResult::Maybe + else + SatisfiedResult::No + end + else + # unconfig. Can't really say anthing + SatisfiedResult::Maybe + end + end + + sig { override.params(ext_ver_list: T::Array[ExtensionVersion]).returns(T::Boolean) } + def satisfied_by_ext_ver_list?(ext_ver_list) + to_logic_tree.eval(@cfg_arch.symtab, ext_ver_list) + end + + sig { override.params(other: AbstractCondition).returns(T::Boolean) } + def compatible?(other) + tree1 = to_logic_tree + tree2 = other.to_logic_tree + + extensions = (tree1.terms + tree2.terms).map(&:extension).uniq + + extension_versions = extensions.map(&:versions) + + combos = combos_for(extension_versions) + combos.each do |combo| + return true if tree1.eval(combo) && tree2.eval(combo) + end + + # there is no combination in which both self and other can be true + false + end + + end + + class AlwaysTrueCondition + extend T::Sig + include AbstractCondition + + sig { override.returns(T::Boolean) } + def empty? = true + + sig { override.params(expand: T::Boolean).returns(LogicNode) } + def to_logic_tree(expand: true) + @logic_tree ||= LogicNode.new(LogicNodeType::True, []) + end + + sig { override.params(_other: T.untyped).returns(T::Boolean) } + def compatible?(_other) = true + + sig { override.returns(T.any(String, T::Hash[String, T.untyped])) } + def to_h = {} + + sig { override.params(_cfg_arch: ConfiguredArchitecture).returns(SatisfiedResult) } + def satisfied_by_cfg_arch?(_cfg_arch) = SatisfiedResult::Yes + + sig { override.params(_ext_ver_list: T::Array[ExtensionVersion]).returns(T::Boolean) } + def satisfied_by_ext_ver_list?(_ext_ver_list) = true + + sig { override.params(_cfg_arch: ConfiguredArchitecture).returns(T::Boolean) } + def could_be_true?(_cfg_arch) = true + + sig { override.returns(T::Boolean) } + def has_constraint? = false + + sig { override.returns(T::Boolean) } + def has_extension_requirement? = false + end + + class AlwaysFalseCondition + extend T::Sig + include AbstractCondition + + sig { override.returns(T::Boolean) } + def empty? = true + + sig { override.params(expand: T::Boolean).returns(LogicNode) } + def to_logic_tree(expand: true) + @logic_tree ||= LogicNode.new(LogicNodeType::False, []) + end + + sig { override.params(_other: T.untyped).returns(T::Boolean) } + def compatible?(_other) = false + + sig { override.returns(T.any(String, T::Hash[String, T.untyped])) } + def to_h = {} + + sig { override.params(_cfg_arch: ConfiguredArchitecture).returns(SatisfiedResult) } + def satisfied_by_cfg_arch?(_cfg_arch) = SatisfiedResult::No + + sig { override.params(_ext_ver_list: T::Array[ExtensionVersion]).returns(T::Boolean) } + def satisfied_by_ext_ver_list?(_ext_ver_list) = true + + sig { override.params(_cfg_arch: ConfiguredArchitecture).returns(T::Boolean) } + def could_be_true?(_cfg_arch) = false + + sig { override.returns(T::Boolean) } + def has_constraint? = false + + sig { override.returns(T::Boolean) } + def has_extension_requirement? = false + end + + class ExtensionCondition < Condition + extend T::Sig + + sig { params(yaml: T::Hash[String, T.untyped], cfg_arch: ConfiguredArchitecture).void } + def initialize(yaml, cfg_arch) + super(yaml, cfg_arch) + end + + sig { override.params(expand: T::Boolean).returns(LogicNode) } + def to_logic_tree(expand: true) + @logic_tree ||= to_logic_tree_helper(@yaml, expand:) + end + + sig { + params( + yaml: T::Hash[String, T.untyped], + cfg_arch: ConfiguredArchitecture, + expand: T::Boolean + ).returns(LogicNode) + } + def ext_req_to_logic_node(yaml, cfg_arch, expand: true) + ext_req = ExtensionRequirement.create(yaml, cfg_arch) + n = LogicNode.new(LogicNodeType::Term, [ext_req]) + + if expand + c = ext_req.extension.conflicts_condition + unless c.empty? + c = LogicNode.new(LogicNodeType::Not, [Condition.new(ext_req.extension.data["conflicts"], @cfg_arch).to_logic_tree]) + n = LogicNode.new(LogicNodeType::And, [c, n]) + end + + ext_req.satisfying_versions.each do |ext_ver| + ext_ver.implications.each do |implication| + implied_ext_ver = implication.ext_ver + implied_cond = implication.cond + implied_ext_req = { "name" => implied_ext_ver.name, "version" => "= #{implied_ext_ver.version_str}" } + if implied_cond.empty? + # convert to an ext_req + n = LogicNode.new(LogicNodeType::And, [n, ext_req_to_logic_node(implied_ext_req, cfg_arch, expand:)]) + else + # conditional + # convert to an ext_req + cond_node = implied_cond.to_logic_tree(expand:) + cond = LogicNode.new(LogicNodeType::If, [cond_node, ext_req_to_logic_node(implied_ext_req, cfg_arch, expand:)]) + n = LogicNode.new(LogicNodeType::And, [n, cond]) + end + end + end + end + + n + end + private :ext_req_to_logic_node + + sig { override.params(yaml: T::Hash[String, T.untyped], expand: T::Boolean).returns(LogicNode) } + def to_logic_tree_helper(yaml, expand: true) + if yaml.key?("allOf") + LogicNode.new(LogicNodeType::And, yaml["allOf"].map { |node| to_logic_tree_helper(node, expand:) }) + elsif yaml.key?("anyOf") + LogicNode.new(LogicNodeType::Or, yaml["anyOf"].map { |node| to_logic_tree_helper(node, expand:) }) + elsif yaml.key?("noneOf") + LogicNode.new(LogicNodeType::Or, yaml["noneOf"].map { |node| to_logic_tree_helper(node, expand:) }) + elsif yaml.key?("not") + LogicNode.new(LogicNodeType::Not, [to_logic_tree_helper(yaml.fetch("not"), expand:)]) + elsif yaml.key?("name") + ext_req_to_logic_node(yaml, @cfg_arch, expand:) + else + raise "unexpected key #{yaml.keys}" + end + end + private :to_logic_tree_helper + end + + class ConstraintCondition + end + + # represents a `requires:` entry for an extension version + # something is implied if it points to a single extension version, e.g.: + # + # requires: + # extension: + # name: A + # version: = 1.0.0 # <- this is an implication + # + # The list of implied extensions can be conditional, for example: + # + # requires: + # extension: + # allOf: + # - name: Zca + # version: "1.0.0" + # - if: + # extension: + # name: F + # version: ~> 2.2 + # then: + # name: Zcf + # version: "1.0.0" + # - if: + # extension: + # name: D + # version: ~> 2.2 + # then: + # name: Zcd + # version: "1.0.0" + # + # This is because: + # + # + # zero or more of which + # may be conditional (via an ExtensionRequirementExpression) + class Requirements < Condition + extend T::Sig + + class ConditionalExtensionVersion < T::Struct + prop :ext_ver, ExtensionVersion + prop :cond, AbstractCondition + end + + class ParseState < T::Enum + enums do + Condition = new + ExtensionCondition = new + end + end + + sig { params(yaml: T.nilable(T::Hash[String, T.untyped]), cfg_arch: ConfiguredArchitecture).void } + def initialize(yaml, cfg_arch) + super(yaml || {}, cfg_arch) + end + + sig { + params( + yaml: T::Hash[String, T.untyped], + state: ParseState, + cond_thus_far: T.nilable(T.all(AbstractCondition, Object)), + result_ary: T::Array[ConditionalExtensionVersion] + ).returns(T::Array[ConditionalExtensionVersion]) + } + def implied_extension_versions_helper(yaml, state, cond_thus_far, result_ary) + case (state) + when ParseState::Condition + if yaml.key?("extension") + implied_extension_versions_helper(yaml.fetch("extension"), ParseState::ExtensionCondition, cond_thus_far, result_ary) + elsif yaml.key?("allOf") + yaml.fetch("allOf").each do |cond_yaml| + implied_extension_versions_helper(yaml.fetch("allOf"), ParseState::Condition, cond_thus_far, result_ary) + end + elsif yaml.key?("anyOf") || yaml.key?("oneOf") || yaml.key?("noneOf") + # nothing is certain below here, so just return results thus far + return result_ary + else + raise "unexpected key(s): #{yaml.keys}" + end + + when ParseState::ExtensionCondition + if yaml.key?("name") + req_spec = + if yaml.key?("version") + RequirementSpec.new(yaml.fetch("version")) + else + RequirementSpec.new(">= 0") + end + if req_spec.op == "=" + cond = cond_thus_far.nil? ? AlwaysTrueCondition.new : T.must(cond_thus_far) + ext_ver = ExtensionVersion.new(yaml.fetch("name"), req_spec.version_spec.to_s, @cfg_arch) + result_ary << ConditionalExtensionVersion.new(cond:, ext_ver:) + end + + elsif yaml.key?("allOf") + yaml.fetch("allOf").each do |ext_cond_yaml| + implied_extension_versions_helper(ext_cond_yaml, ParseState::ExtensionCondition, cond_thus_far, result_ary) + end + + elsif yaml.key?("if") + if_cond = Condition.new(yaml.fetch("if"), @cfg_arch) + cond = cond_thus_far.nil? ? if_cond : Condition.join(@cfg_arch, [cond_thus_far, if_cond]) + implied_extension_versions_helper(yaml.fetch("then"), ParseState::ExtensionCondition, cond, result_ary) + + elsif yaml.key?("anyOf") || yaml.key("oneOf") || yaml.key("noneOf") + # there are not going to be specific requirements down an anyOf/oneOf/noneOf path + # be required + return result_ary + else + raise "Unexpected key(s): #{yaml.keys}" + end + + else + T.absurd(state) + end + + result_ary + end + private :implied_extension_versions_helper + + sig { returns(T::Array[ConditionalExtensionVersion]) } + def implied_extension_versions + if empty? + [] + else + implied_extension_versions_helper(T.must(@yaml), ParseState::Condition, nil, []) + end + end + end +end diff --git a/tools/ruby-gems/udb/lib/udb/obj/extension.rb b/tools/ruby-gems/udb/lib/udb/obj/extension.rb index f80b6c8c1..9f8490af8 100644 --- a/tools/ruby-gems/udb/lib/udb/obj/extension.rb +++ b/tools/ruby-gems/udb/lib/udb/obj/extension.rb @@ -8,7 +8,7 @@ require_relative "certifiable_obj" require_relative "parameter" require_relative "../schema" -require_relative "../req_expression" +require_relative "../condition" require_relative "../presence" require_relative "../version_spec" @@ -117,13 +117,13 @@ def implies(version_requirement = nil) end # @return [ExtensionRequirementExpression] Logic expression for conflicts - sig { returns(AbstractRequirement) } + sig { returns(AbstractCondition) } def conflicts_condition @conflicts_condition ||= if @data["conflicts"].nil? - AlwaysFalseExtensionRequirementExpression.new + AlwaysFalseCondition.new else - ExtensionRequirementExpression.new(@data["conflicts"], @cfg_arch) + Condition.new(@data["conflicts"], @cfg_arch) end end @@ -270,14 +270,15 @@ def self.to_ext_req(ext_vers) raise "All ext_vers must be of the same extension" unless ext_vers.all? { |ev| ev.name == ext_vers.fetch(0).name } sorted = ext_vers.sort - unless T.must(sorted.min).compatible?(sorted.max) + unless T.must(sorted.min).compatible?(T.must(sorted.max)) raise "Impossible to combine because the set contains incompatible versions" end ExtensionRequirement.new(ext_vers.fetch(0).name, "~> #{T.must(sorted.min).version_str}", arch: ext_vers.fetch(0).arch) end - # @return [Array] List of known ExtensionVersions that are compatible with this ExtensionVersion (i.e., have larger version number and are not breaking) + # @return List of known ExtensionVersions that are compatible with this ExtensionVersion (i.e., have larger version number and are not breaking) + sig { returns(T::Array[ExtensionVersion]) } def compatible_versions return @compatible_versions unless @compatible_versions.nil? @@ -293,40 +294,48 @@ def compatible_versions # @param other [ExtensionVersion] # @return [Boolean] Whether or not +other+ is compatible with self + sig { params(other: ExtensionVersion).returns(T::Boolean) } def compatible?(other) = compatible_versions.include?(other) # @return [Boolean] Whether or not this is a breaking version (i.e., incompatible with all prior versions) + sig { returns(T::Boolean) } def breaking? !@data["breaking"].nil? end # @return [String] Canonical version string + sig { returns(String) } def canonical_version = @version_spec.canonical # @param other [ExtensionVersion] An extension name and version # @return [Boolean] whether or not this ExtensionVersion has the exact same name and version as other + sig { params(other: ExtensionVersion).returns(T::Boolean) } def eql?(other) - raise "ExtensionVersion is not comparable to #{other.class}" unless other.is_a?(ExtensionVersion) - @ext.name == other.ext.name && @version_spec.eql?(other.version_spec) end # @param other [ExtensionVersion] An extension name and version # @return [Boolean] whether or not this ExtensionVersion has the exact same name and version as other + sig { params(other: ExtensionVersion).returns(T::Boolean) } def ==(other) eql?(other) end # @return [String] The state of the extension version ('ratified', 'developemnt', etc) - def state = @data["state"] + sig { returns(String) } + def state = T.cast(@data.fetch("state"), String) - def ratification_date = @data["ratification_date"] + sig { returns(T.nilable(String)) } + def ratification_date = T.cast(@data.fetch("ratification_date"), String) - def changes = @data["changes"].nil? ? [] : @data["changes"] + sig { returns(T.nilable(T::Array[String])) } + def changes = @data["changes"].nil? ? [] : T.cast(@data.fetch("changes"), T::Array[String]) + sig { returns(T.nilable(String)) } def url = @data["url"] # @return [Array] List of contributors to this extension version + sig { returns(T::Array[Person]) } def contributors return @contributors unless @contributors.nil? @@ -355,35 +364,30 @@ def params # # @example # ExtensionVersion.new("A", "2.2").to_rvi_s #=> "A2p2" + sig { returns(String) } def to_rvi_s "#{name}#{@version_spec.to_rvi_s}" end # @return [String] Ext@Version + sig { returns(String) } def to_s "#{name}@#{@version_spec.canonical}" end - # @return [ExtensionRequirementExpression] Condition that must be met for this version to be allowed. + # @return Condition that must be met for this version to be allowed. + sig { returns(Condition) } def requirement_condition @requirement_condition ||= - begin - r = case @data["requires"] - when nil - AlwaysTrueExtensionRequirementExpression.new - when Hash - ExtensionRequirementExpression.new(@data["requires"], @arch) - else - ExtensionRequirementExpression.new({ "oneOf" => [@data["requires"]] }, @arch) - end - r + if @data.key?("requires") + AlwaysTrueCondition.new + else + Condition.new(@data["requires"], @arch) end end - # @return [Array] List of extensions that conflict with this ExtensionVersion - # The list is *not* transitive; if conflict C1 implies C2, - # only C1 shows up in the list - sig { returns(AbstractRequirement) } + # @return Condition with extensions that conflict with this version + sig { returns(Condition) } def conflicts_condition ext.conflicts_condition end @@ -398,11 +402,11 @@ def conflicts_condition # List of extension versions that this ExtensionVersion implies # This list is *not* transitive; if an implication I1 implies another extension I2, # only I1 shows up in the list - sig { returns(ConditionalExtensionVersionList) } + sig { returns(T::Array[Requirements::ConditionalExtensionVersion]) } def implications - return ConditionalExtensionVersionList.new([], @arch) if @data["implies"].nil? + return [] if @data["requires"].nil? - ConditionalExtensionVersionList.new(@data["implies"], @arch) + Requirements.new(@data["requires"], @arch).implied_extension_versions end # @return [Array] List of extension versions that might imply this ExtensionVersion @@ -434,6 +438,7 @@ def implied_by # # @example # zba_ext_ver.implied_by_with_condition #=> [{ ext_ver: "B 1.0", cond: AlwaysTrueExtensionRequirementExpression}] + sig { returns(T::Array[Requirements::ConditionalExtensionVersion]) } def implied_by_with_condition return @implied_by_with_condition unless @implied_by_with_condition.nil? @@ -444,7 +449,10 @@ def implied_by_with_condition ext.versions.each do |ext_ver| raise "????" if ext_ver.arch.nil? ext_ver.implications.each do |implication| - @implied_by_with_condition << { ext_ver: ext_ver, cond: implication.cond } if implication.ext_ver == self + puts implication.ext_ver + if implication.ext_ver == self + @implied_by_with_condition << Requirements::ConditionalExtensionVersion.new(ext_ver: ext_ver, cond: implication.cond) + end end end end @@ -464,14 +472,6 @@ def <=>(other) end end - def eql?(other) - unless other.is_a?(ExtensionVersion) - raise ArgumentError, "ExtensionVersions are only comparable to other extension versions" - end - - @name == other.name && @version_spec == other.version_spec - end - # @return [Array] the list of CSRs implemented by this extension version (may be empty) def implemented_csrs return @implemented_csrs unless @implemented_csrs.nil? @@ -624,6 +624,23 @@ def extension @extension ||= @arch.extension(@name) end + # create an ExtensionRequirement from YAML + sig { + params( + yaml: T::Hash[String, T.untyped], + cfg_arch: ConfiguredArchitecture + ).returns(ExtensionRequirement) + } + def self.create(yaml, cfg_arch) + requirements = + if yaml.key?("version") + yaml.fetch("version") + else + ">= 0" + end + ExtensionRequirement.new(yaml.fetch("name"), requirements, arch: cfg_arch) + end + # @param name [#to_s] Extension name # @param requirements [String] Single requirement # @param requirements [Array] List of requirements, all of which must hold @@ -670,6 +687,7 @@ def invert! end # @return [Array] The list of extension versions that satisfy this extension requirement + sig { returns(T::Array[ExtensionVersion]) } def satisfying_versions return @satisfying_versions unless @satisfying_versions.nil? @@ -684,6 +702,7 @@ def params # @return [ExtensionVersion] The minimum extension version that satifies this extension requirement. # If none, raises an error. + sig { returns(ExtensionVersion) } def min_satisfying_ext_ver if satisfying_versions.empty? warn "Extension requirement '#{self}' cannot be met by any available extension version. Available versions:" @@ -698,7 +717,7 @@ def min_satisfying_ext_ver raise "Cannot satisfy extension requirement '#{self}'" end - satisfying_versions.min + T.must(satisfying_versions.min) end # @return [ExtensionVersion] The minimum extension version that satifies this extension requirement. @@ -718,7 +737,7 @@ def max_satisfying_ext_ver raise "Cannot satisfy extension requirement '#{self}'" end - satisfying_versions.max + T.must(satisfying_versions.max) end # returns true if this extension requirement is a superset of other_ext_req @@ -797,6 +816,7 @@ def satisfied_by?(*args) end # @return [Array] List of CSRs defined by any extension satisfying this requirement + sig { returns(T::Array[Csr]) } def csrs @csrs ||= @arch.csrs.select do |csr| satisfying_versions.any? do |ext_ver| @@ -805,10 +825,15 @@ def csrs end end + sig { params(other: ExtensionRequirement).returns(T::Boolean) } + def ==(other) + (satisfying_versions.size == other.satisfying_versions.size) && \ + satisfying_versions.all? { |version| other.satisfying_versions.include?(version) } + end + # sorts by name + sig { params(other: ExtensionRequirement).returns(T.nilable(Integer)) } def <=>(other) - raise ArgumentError, "ExtensionRequirements are only comparable to other extension requirements" unless other.is_a?(ExtensionRequirement) - @name <=> other.name end end diff --git a/tools/ruby-gems/udb/lib/udb/resolver.rb b/tools/ruby-gems/udb/lib/udb/resolver.rb index f3a031f9b..3ba79fde2 100644 --- a/tools/ruby-gems/udb/lib/udb/resolver.rb +++ b/tools/ruby-gems/udb/lib/udb/resolver.rb @@ -106,7 +106,8 @@ class Resolver gen_path_override: T.nilable(Pathname), std_path_override: T.nilable(Pathname), custom_path_override: T.nilable(Pathname), - python_path_override: T.nilable(Pathname) + python_path_override: T.nilable(Pathname), + quiet: T::Boolean ).void } def initialize( @@ -116,7 +117,8 @@ def initialize( gen_path_override: nil, std_path_override: nil, custom_path_override: nil, - python_path_override: nil + python_path_override: nil, + quiet: false ) @repo_root = repo_root @schemas_path = schemas_path_override || (@repo_root / "spec" / "schemas") @@ -125,6 +127,7 @@ def initialize( @std_path = std_path_override || (@repo_root / "spec" / "std" / "isa") @custom_path = custom_path_override || (@repo_root / "spec" / "custom" / "isa") @python_path = python_path_override || (@repo_root / ".home" / ".venv" / "bin" / "python3") + @quiet = quiet FileUtils.mkdir_p @gen_path end @@ -142,9 +145,13 @@ def any_newer?(target, deps) # run command in the shell. raise if exit is not zero sig { params(cmd: T::Array[String]).void } def run(cmd) - puts cmd.join(" ") - T.unsafe(self).send(:system, *cmd) - raise unless $?.success? + puts cmd.join(" ") unless @quiet + if @quiet + T.unsafe(self).send(:system, *cmd, :out=>"/dev/null", :err=>"/dev/null") + else + T.unsafe(self).send(:system, *cmd) + end + raise "data resolution error" unless $?.success? end # resolve config file and write it to gen_path @@ -218,6 +225,8 @@ def resolve_arch(config_yaml) ] FileUtils.touch(gen_path / "resolved_spec" / config_yaml["name"] / ".stamp") end + + FileUtils.cp_r(std_path / "isa", gen_path / "resolved_spec" / config_yaml["name"]) end # resolve the specification for a config, and return a ConfiguredArchitecture @@ -242,7 +251,6 @@ def cfg_arch_for(config_path_or_name) config_name = config_yaml["name"] resolve_arch(config_yaml) - @cfg_archs[config_path] = Udb::ConfiguredArchitecture.new( config_name, Udb::AbstractConfig.create(gen_path / "cfgs" / "#{config_name}.yaml"), diff --git a/tools/ruby-gems/udb/lib/udb/version_spec.rb b/tools/ruby-gems/udb/lib/udb/version_spec.rb index 5c499cea5..d8d1ea425 100644 --- a/tools/ruby-gems/udb/lib/udb/version_spec.rb +++ b/tools/ruby-gems/udb/lib/udb/version_spec.rb @@ -32,107 +32,107 @@ module Udb # - 2.2 is *not* compatible with 2.0 # - 2.1 is compatible with 2.0 # -class VersionSpec - extend T::Sig + class VersionSpec + extend T::Sig - include Comparable + include Comparable - # MAJOR[.MINOR[.PATCH[-pre]]] - VERSION_REGEX = /([0-9]+)(?:\.([0-9]+)(?:\.([0-9]+)(?:-(pre))?)?)?/ + # MAJOR[.MINOR[.PATCH[-pre]]] + VERSION_REGEX = /([0-9]+)(?:\.([0-9]+)(?:\.([0-9]+)(?:-(pre))?)?)?/ - # @return [Integer] Major version number - attr_reader :major + # @return [Integer] Major version number + attr_reader :major - # @return [Integer] Minor version number - attr_reader :minor + # @return [Integer] Minor version number + attr_reader :minor - # @return [Integer] Patch version number - attr_reader :patch + # @return [Integer] Patch version number + attr_reader :patch - # @return [Boolean] Whether or not this is a pre-release - attr_reader :pre + # @return [Boolean] Whether or not this is a pre-release + attr_reader :pre - sig { params(version_str: String).void } - def initialize(version_str) - if version_str =~ /^\s*#{VERSION_REGEX}\s*$/ - m = T.must(::Regexp.last_match) - @major = m[1].to_i - @minor_given = !m[2].nil? - @minor = @minor_given ? m[2].to_i : 0 - @patch_given = !m[3].nil? - @patch = @patch_given ? m[3].to_i : 0 - @pre = !m[4].nil? - else - raise ArgumentError, "#{version_str} is not a valid Version spec" + sig { params(version_str: String).void } + def initialize(version_str) + if version_str =~ /^\s*#{VERSION_REGEX}\s*$/ + m = T.must(::Regexp.last_match) + @major = m[1].to_i + @minor_given = !m[2].nil? + @minor = @minor_given ? m[2].to_i : 0 + @patch_given = !m[3].nil? + @patch = @patch_given ? m[3].to_i : 0 + @pre = !m[4].nil? + else + raise ArgumentError, "#{version_str} is not a valid Version spec" + end + @version_str = version_str end - @version_str = version_str - end - sig { returns(String) } - def inspect - "VersionSpec[str: #{@version_str}; major: #{@major}, minor: #{@minor}, patch: #{@patch}, pre: #{@pre}]" - end + sig { returns(String) } + def inspect + "VersionSpec[str: #{@version_str}; major: #{@major}, minor: #{@minor}, patch: #{@patch}, pre: #{@pre}]" + end - # @return [String] The version, in canonical form - sig { returns(String) } - def canonical - "#{@major}.#{@minor}.#{@patch}#{@pre ? '-pre' : ''}" - end + # @return [String] The version, in canonical form + sig { returns(String) } + def canonical + "#{@major}.#{@minor}.#{@patch}#{@pre ? '-pre' : ''}" + end - # @return [String] The version formatted like RVI docs - # - # @example - # VersionSpec.new("2.2").to_rvi_s #=> "2p2" - sig { returns(String) } - def to_rvi_s - s = @major.to_s - s += "p#{@minor}" if @minor_given - s += "p#{@patch}" if @patch_given - s += "-pre" if @pre - s - end + # @return [String] The version formatted like RVI docs + # + # @example + # VersionSpec.new("2.2").to_rvi_s #=> "2p2" + sig { returns(String) } + def to_rvi_s + s = @major.to_s + s += "p#{@minor}" if @minor_given + s += "p#{@patch}" if @patch_given + s += "-pre" if @pre + s + end - # @return [String] The exact string used during construction - sig { returns(String) } - def to_s = @version_str + # @return [String] The exact string used during construction + sig { returns(String) } + def to_s = @version_str - sig { params(other: T.any(String, VersionSpec)).returns(T.nilable(Integer)) } - def <=>(other) - if other.is_a?(String) - VersionSpec.new(other) <=> self - elsif other.is_a?(VersionSpec) - if @major != other.major - @major <=> other.major - elsif @minor != other.minor - @minor <=> other.minor - elsif @patch != other.patch - @patch <=> other.patch - elsif @pre != other.pre - @pre ? 1 : -1 + sig { params(other: T.any(String, VersionSpec)).returns(T.nilable(Integer)) } + def <=>(other) + if other.is_a?(String) + VersionSpec.new(other) <=> self + elsif other.is_a?(VersionSpec) + if @major != other.major + @major <=> other.major + elsif @minor != other.minor + @minor <=> other.minor + elsif @patch != other.patch + @patch <=> other.patch + elsif @pre != other.pre + @pre ? 1 : -1 + else + 0 + end else - 0 + T.absurd(other) end - else - T.absurd(other) end - end - # @param other [VersionSpec] Comparison - # @return [Boolean] Whether or not +other+ is an VersionSpec with the same canonical version - sig { params(other: T.any(String, VersionSpec)).returns(T::Boolean) } - def eql?(other) - if other.is_a?(String) - eql?(VersionSpec.new(other)) - elsif other.is_a?(VersionSpec) - other.major == @major && \ - other.minor == @minor && \ - other.patch == @patch && \ - other.pre == @pre - else - T.absurd(other) + # @param other [VersionSpec] Comparison + # @return [Boolean] Whether or not +other+ is an VersionSpec with the same canonical version + sig { params(other: T.any(String, VersionSpec)).returns(T::Boolean) } + def eql?(other) + if other.is_a?(String) + eql?(VersionSpec.new(other)) + elsif other.is_a?(VersionSpec) + other.major == @major && \ + other.minor == @minor && \ + other.patch == @patch && \ + other.pre == @pre + else + T.absurd(other) + end end end -end # Represents a version requirement # @@ -149,117 +149,123 @@ def eql?(other) # RequirementSpec.new("~> 1.11").satisfied_by?(VersionSpec.new("1.10"), s_ext) #=> true # RequirementSpec.new("~> 1.11").satisfied_by?(VersionSpec.new("1.11"), s_ext) #=> true # RequirementSpec.new("~> 1.11").satisfied_by?(VersionSpec.new("1.12"), s_ext) #=> false -class RequirementSpec - extend T::Sig - REQUIREMENT_OP_REGEX = /((?:>=)|(?:>)|(?:~>)|(?:<)|(?:<=)|(?:!=)|(?:=))/ - REQUIREMENT_REGEX = /#{REQUIREMENT_OP_REGEX}\s*(#{VersionSpec::VERSION_REGEX})/ - - # @param requirement [String] A requirement string - sig { params(requirement: String).void } - def initialize(requirement) - if requirement =~ /^\s*#{REQUIREMENT_REGEX}\s*$/ - m = T.must(::Regexp.last_match) - @op = T.must(m[1]) - @version_str = T.must(m[2]) - @version_spec = VersionSpec.new(@version_str) - else - raise ArgumentError, "Bad requirement string '#{requirement}' #{REQUIREMENT_REGEX}" - end - end + class RequirementSpec + extend T::Sig + REQUIREMENT_OP_REGEX = /((?:>=)|(?:>)|(?:~>)|(?:<)|(?:<=)|(?:!=)|(?:=))/ + REQUIREMENT_REGEX = /#{REQUIREMENT_OP_REGEX}\s*(#{VersionSpec::VERSION_REGEX})/ - sig { returns(String) } - def to_s - "#{@op} #{@version_str}" - end + sig { returns(String) } + attr_reader :op - # invert the requirement - sig { void } - def invert! - case @op - when ">=" - @op = "<" - when ">" - @op = "<=" - when "<=" - @op = ">" - when "<" - @op = ">=" - when "=" - @op = "!=" - when "!=" - @op = "=" - when "~>" - @op = "!~>" - end - self - end + sig { returns(VersionSpec) } + attr_reader :version_spec - # @param version [String] A version string - # @param version [VersionSpec] A version spec - # @param ext [Extension] An extension, needed to evaluate the compatible (~>) operator - # @param ext [Hash] Raw extension spec (from YAML) - # @return [Boolean] if the version satisfies the requirement - sig { params(version: T.any(String, VersionSpec), ext: T.any(Extension, T::Hash[String, T.untyped])).returns(T::Boolean) } - def satisfied_by?(version, ext) - v_spec = - case version - when String - VersionSpec.new(version) - when VersionSpec - version + # @param requirement [String] A requirement string + sig { params(requirement: String).void } + def initialize(requirement) + if requirement =~ /^\s*#{REQUIREMENT_REGEX}\s*$/ + m = T.must(::Regexp.last_match) + @op = T.must(m[1]) + @version_str = T.must(m[2]) + @version_spec = VersionSpec.new(@version_str) else - T.absurd(version) + raise ArgumentError, "Bad requirement string '#{requirement}' #{REQUIREMENT_REGEX}" end + end - case @op - when ">=" - v_spec >= @version_spec - when ">" - v_spec > @version_spec - when "<=" - v_spec <= @version_spec - when "<" - v_spec < @version_spec - when "=" - v_spec == @version_spec - when "!=" - v_spec != @version_spec - when "~>" - if ext.is_a?(Extension) - matching_ver = ext.versions.find { |v| v.version_spec == v_spec } - raise "Can't find version?" if matching_ver.nil? + sig { returns(String) } + def to_s + "#{@op} #{@version_str}" + end - matching_ver.compatible?(ExtensionVersion.new(ext.name, v_spec.to_s, ext.arch)) - else - versions = ext.fetch("versions") - compatible_versions = [] - versions.each do |vinfo| - vspec = VersionSpec.new(vinfo.fetch("version")) - compatible_versions << vspec if vspec >= v_spec - break if compatible_versions.size.positive? && vinfo.key?("breaking") + # invert the requirement + sig { void } + def invert! + case @op + when ">=" + @op = "<" + when ">" + @op = "<=" + when "<=" + @op = ">" + when "<" + @op = ">=" + when "=" + @op = "!=" + when "!=" + @op = "=" + when "~>" + @op = "!~>" + end + self + end + + # @param version [String] A version string + # @param version [VersionSpec] A version spec + # @param ext [Extension] An extension, needed to evaluate the compatible (~>) operator + # @param ext [Hash] Raw extension spec (from YAML) + # @return [Boolean] if the version satisfies the requirement + sig { params(version: T.any(String, VersionSpec), ext: T.any(Extension, T::Hash[String, T.untyped])).returns(T::Boolean) } + def satisfied_by?(version, ext) + v_spec = + case version + when String + VersionSpec.new(version) + when VersionSpec + version + else + T.absurd(version) end - compatible_versions.include?(v_spec) - end - when "!~>" # not a legal spec, but used for inversion - if ext.is_a?(Extension) - matching_ver = ext.versions.find { |v| v.version_spec == v_spec } - raise "Can't find version?" if matching_ver.nil? + case @op + when ">=" + v_spec >= @version_spec + when ">" + v_spec > @version_spec + when "<=" + v_spec <= @version_spec + when "<" + v_spec < @version_spec + when "=" + v_spec == @version_spec + when "!=" + v_spec != @version_spec + when "~>" + if ext.is_a?(Extension) + matching_ver = ext.versions.find { |v| v.version_spec == v_spec } + raise "Can't find version?" if matching_ver.nil? - !matching_ver.compatible?(ExtensionVersion.new(ext.name, v_spec.to_s, ext.arch)) - else - versions = ext.fetch("versions") - compatible_versions = [] - versions.each do |vinfo| - vspec = VersionSpec.new(vinfo.fetch("version")) - compatible_versions << vspec if vspec >= v_spec - break if compatible_versions.size.positive? && vinfo.key?("breaking") + matching_ver.compatible?(ExtensionVersion.new(ext.name, v_spec.to_s, ext.arch)) + else + versions = ext.fetch("versions") + compatible_versions = [] + versions.each do |vinfo| + vspec = VersionSpec.new(vinfo.fetch("version")) + compatible_versions << vspec if vspec >= v_spec + break if compatible_versions.size.positive? && vinfo.key?("breaking") + end + + compatible_versions.include?(v_spec) end + when "!~>" # not a legal spec, but used for inversion + if ext.is_a?(Extension) + matching_ver = ext.versions.find { |v| v.version_spec == v_spec } + raise "Can't find version?" if matching_ver.nil? + + !matching_ver.compatible?(ExtensionVersion.new(ext.name, v_spec.to_s, ext.arch)) + else + versions = ext.fetch("versions") + compatible_versions = [] + versions.each do |vinfo| + vspec = VersionSpec.new(vinfo.fetch("version")) + compatible_versions << vspec if vspec >= v_spec + break if compatible_versions.size.positive? && vinfo.key?("breaking") + end - !compatible_versions.include?(v_spec) + !compatible_versions.include?(v_spec) + end end end end -end end diff --git a/tools/ruby-gems/udb/schemas b/tools/ruby-gems/udb/schemas new file mode 120000 index 000000000..c7e8465cf --- /dev/null +++ b/tools/ruby-gems/udb/schemas @@ -0,0 +1 @@ +../../../spec/schemas \ No newline at end of file diff --git a/tools/ruby-gems/udb/test/mock_cfgs/_.yaml b/tools/ruby-gems/udb/test/mock_cfgs/_.yaml new file mode 100644 index 000000000..6400ee61e --- /dev/null +++ b/tools/ruby-gems/udb/test/mock_cfgs/_.yaml @@ -0,0 +1,11 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../schemas/config_schema.json +--- +$schema: config_schema.json# +kind: architecture configuration +type: unconfigured +name: _ +description: | + A completely unconfigured RVI-standard architecture; not even MXLEN is known. diff --git a/tools/ruby-gems/udb/test/mock_spec/isa/ext/A.yaml b/tools/ruby-gems/udb/test/mock_spec/isa/ext/A.yaml new file mode 100644 index 000000000..62a9746b4 --- /dev/null +++ b/tools/ruby-gems/udb/test/mock_spec/isa/ext/A.yaml @@ -0,0 +1,29 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/ext_schema.json + +$schema: "ext_schema.json#" +kind: extension +name: A +type: unprivileged +long_name: Mock extension A +versions: + - version: "1.0" + state: ratified + ratification_date: 2019-06 + - version: "2.0" + state: ratified + ratification_date: 2019-06 + changes: + - Change 1 +exception_codes: + - num: 1 + name: An exception + var: Exception1 +interrupt_codes: + - num: 1 + name: An interrupt + var: Interrupt1 +description: | + Something descriptive diff --git a/tools/ruby-gems/udb/test/mock_spec/isa/ext/B.yaml b/tools/ruby-gems/udb/test/mock_spec/isa/ext/B.yaml new file mode 100644 index 000000000..761e02dbc --- /dev/null +++ b/tools/ruby-gems/udb/test/mock_spec/isa/ext/B.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/ext_schema.json + +$schema: "ext_schema.json#" +kind: extension +name: B +type: unprivileged +long_name: Mock extension B +versions: + - version: "2.1.0" + state: ratified + ratification_date: 2019-06 + requires: + extension: + name: A + version: = 1.0.0 +description: | + Something descriptive diff --git a/tools/ruby-gems/udb/test/mock_spec/isa/ext/C.yaml b/tools/ruby-gems/udb/test/mock_spec/isa/ext/C.yaml new file mode 100644 index 000000000..399fe4354 --- /dev/null +++ b/tools/ruby-gems/udb/test/mock_spec/isa/ext/C.yaml @@ -0,0 +1,21 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/ext_schema.json + +$schema: "ext_schema.json#" +kind: extension +name: C +type: unprivileged +long_name: Mock extension C +versions: + - version: "1.0" + state: ratified + ratification_date: 2019-06 + - version: "2.0" + state: ratified + ratification_date: 2019-06 + changes: + - Change 1 +description: | + Something descriptive diff --git a/tools/ruby-gems/udb/test/mock_spec/isa/ext/D.yaml b/tools/ruby-gems/udb/test/mock_spec/isa/ext/D.yaml new file mode 100644 index 000000000..6ebe630aa --- /dev/null +++ b/tools/ruby-gems/udb/test/mock_spec/isa/ext/D.yaml @@ -0,0 +1,29 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/ext_schema.json + +$schema: "ext_schema.json#" +kind: extension +name: D +type: unprivileged +long_name: Mock extension D +versions: + - version: "1.0" + state: ratified + ratification_date: 2019-06 + - version: "2.0" + state: ratified + ratification_date: 2019-06 + changes: + - Change 1 + requires: + extension: + if: + extension: + name: C + then: + name: A + version: = 1.0 +description: | + Something descriptive diff --git a/spec/std/isa/inst/mock.yaml b/tools/ruby-gems/udb/test/mock_spec/isa/inst/mock.yaml similarity index 94% rename from spec/std/isa/inst/mock.yaml rename to tools/ruby-gems/udb/test/mock_spec/isa/inst/mock.yaml index e0fcf22c9..34a98b702 100644 --- a/spec/std/isa/inst/mock.yaml +++ b/tools/ruby-gems/udb/test/mock_spec/isa/inst/mock.yaml @@ -1,7 +1,7 @@ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. # SPDX-License-Identifier: BSD-3-Clause-Clear -# yaml-language-server: $schema=../../schemas/inst_schema.json +# yaml-language-server: $schema=../../../../schemas/inst_schema.json $schema: "inst_schema.json#" kind: instruction @@ -14,7 +14,9 @@ description: | [NOTE] Computing PI to an infinite number of decicial places is impossible, but hey, why not? -definedBy: Xmock +definedBy: + extension: + name: A assembly: xd, xs1, xs2 encoding: # Use custom-0 opcode to avoid conflicts with RISC-V defined instructions. @@ -79,7 +81,7 @@ cert_normative_rules: and `misa.M` is 0. doc_links: - manual:csr:misa:disabling-extension - # - idl:code:inst:mock:illegal-inst-exc-misa-disabled + # - idl:code:inst:mock:illegal-inst-exc-misa-disabled cert_test_procedures: - id: inst.mock.enc_and_basic diff --git a/tools/ruby-gems/udb/test/mock_spec/isa/isa/globals.isa b/tools/ruby-gems/udb/test/mock_spec/isa/isa/globals.isa new file mode 100644 index 000000000..866d3bc4d --- /dev/null +++ b/tools/ruby-gems/udb/test/mock_spec/isa/isa/globals.isa @@ -0,0 +1,4 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +%version: 1.0 diff --git a/tools/ruby-gems/udb/test/test_conditions.rb b/tools/ruby-gems/udb/test/test_conditions.rb new file mode 100644 index 000000000..081df7960 --- /dev/null +++ b/tools/ruby-gems/udb/test/test_conditions.rb @@ -0,0 +1,188 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# typed: true +# frozen_string_literal: true + +require "fileutils" +require "tmpdir" +require "yaml" + +require "minitest/autorun" +require "udb/condition" +require "udb/resolver" + +class TestConditions < Minitest::Test + def setup + @udb_gem_root = (Pathname.new(__dir__) / "..").realpath + @gen_path = Pathname.new(Dir.mktmpdir) + resolver = Udb::Resolver.new( + schemas_path_override: @udb_gem_root / "schemas", + cfgs_path_override: @udb_gem_root / "test" / "mock_cfgs", + gen_path_override: @gen_path, + std_path_override: @udb_gem_root / "test" / "mock_spec" / "isa", + quiet: true + ) + capture_io do + @cfg_arch = resolver.cfg_arch_for("_") + end + end + + def teardown + FileUtils.rm_rf @gen_path + end + + def test_single_extension_req + cond_str = <<~COND + extension: + name: A + COND + + cond_yaml = YAML.load(cond_str) + + cond = Udb::Condition.new(cond_yaml, @cfg_arch) + + assert_equal Udb::SatisfiedResult::Maybe, cond.satisfied_by_cfg_arch?(@cfg_arch) + assert cond.could_be_true?(@cfg_arch) + refute_empty cond + + tree = cond.to_logic_tree + assert_equal 1, tree.terms.size + assert_equal Udb::ExtensionRequirement.new("A", ">= 0", arch: @cfg_arch), tree.terms[0] + assert tree.eval(@cfg_arch.symtab, [Udb::ExtensionVersion.new("A", "1.0", @cfg_arch)]) + refute tree.eval(@cfg_arch.symtab, [Udb::ExtensionVersion.new("B", "2.1.0", @cfg_arch)]) + assert_equal "(A >= 0)", tree.to_s + end + + def test_requirements_with_single_unconditional_implication + req_str = <<~COND + extension: + name: A + version: = 1.0 + COND + + req_yaml = YAML.load(req_str) + + + reqs = Udb::Requirements.new(req_yaml, @cfg_arch) + ext_vers = reqs.implied_extension_versions + + assert_equal 1, ext_vers.size + assert_equal Udb::ExtensionVersion.new("A", "1.0", @cfg_arch), ext_vers.fetch(0).ext_ver + assert_instance_of Udb::AlwaysTrueCondition, ext_vers.fetch(0).cond + end + + def test_requirements_with_two_unconditional_implication + req_str = <<~COND + extension: + allOf: + - name: A + version: = 1.0 + - name: C + version: = 1.0 + COND + + req_yaml = YAML.load(req_str) + + reqs = Udb::Requirements.new(req_yaml, @cfg_arch) + ext_vers = reqs.implied_extension_versions + + assert_equal 2, ext_vers.size + assert_equal [Udb::ExtensionVersion.new("A", "1.0", @cfg_arch), Udb::ExtensionVersion.new("C", "1.0", @cfg_arch)], ext_vers.map(&:ext_ver) + assert_instance_of Udb::AlwaysTrueCondition, ext_vers.fetch(0).cond + end + + def test_requirements_with_one_unconditional_implication_and_a_requirement + req_str = <<~COND + extension: + allOf: + - name: A + version: = 1.0 + - name: C + version: ">= 1.0" + COND + + req_yaml = YAML.load(req_str) + + reqs = Udb::Requirements.new(req_yaml, @cfg_arch) + ext_vers = reqs.implied_extension_versions + + assert_equal 1, ext_vers.size + assert_equal [Udb::ExtensionVersion.new("A", "1.0", @cfg_arch)], ext_vers.map(&:ext_ver) + assert_instance_of Udb::AlwaysTrueCondition, ext_vers.fetch(0).cond + end + + def test_requirements_with_one_conditional_implication + req_str = <<~COND + extension: + if: + extension: + name: A + version: ">= 1.0" + then: + name: C + version: "= 1.0" + COND + + req_yaml = YAML.load(req_str) + + reqs = Udb::Requirements.new(req_yaml, @cfg_arch) + ext_vers = reqs.implied_extension_versions + + assert_equal 1, ext_vers.size + assert_equal [Udb::ExtensionVersion.new("C", "1.0", @cfg_arch)], ext_vers.map(&:ext_ver) + assert_instance_of Udb::Condition, ext_vers.fetch(0).cond + assert_equal [Udb::ExtensionRequirement.new("A", ">= 1.0", arch: @cfg_arch)], ext_vers.fetch(0).cond.to_logic_tree.terms + assert ext_vers.fetch(0).cond.satisfied_by_ext_ver_list?([Udb::ExtensionVersion.new("A", "1.0", @cfg_arch)]) + assert ext_vers.fetch(0).cond.satisfied_by_ext_ver_list?([Udb::ExtensionVersion.new("A", "2.0", @cfg_arch)]) + refute ext_vers.fetch(0).cond.satisfied_by_ext_ver_list?([Udb::ExtensionVersion.new("B", "2.1.0", @cfg_arch)]) + end + + def test_single_extension_req_with_implication + cond_str = <<~COND + extension: + name: B + COND + + cond_yaml = YAML.load(cond_str) + + cond = Udb::Condition.new(cond_yaml, @cfg_arch) + + assert_equal Udb::SatisfiedResult::Maybe, cond.satisfied_by_cfg_arch?(@cfg_arch) + assert cond.could_be_true?(@cfg_arch) + refute_empty cond + + tree = cond.to_logic_tree + assert_equal 2, tree.terms.size + refute tree.eval(@cfg_arch.symtab, [Udb::ExtensionVersion.new("A", "1.0", @cfg_arch)]) + refute tree.eval(@cfg_arch.symtab, [Udb::ExtensionVersion.new("B", "2.1.0", @cfg_arch)]) + assert tree.eval(@cfg_arch.symtab, [Udb::ExtensionVersion.new("A", "1.0", @cfg_arch), Udb::ExtensionVersion.new("B", "2.1.0", @cfg_arch)]) + end + + def test_single_extension_req_with_conditional_implication + cond_str = <<~COND + extension: + name: D + COND + + cond_yaml = YAML.load(cond_str) + + cond = Udb::Condition.new(cond_yaml, @cfg_arch) + + assert_equal Udb::SatisfiedResult::Maybe, cond.satisfied_by_cfg_arch?(@cfg_arch) + assert cond.could_be_true?(@cfg_arch) + refute_empty cond + + tree = cond.to_logic_tree + assert_equal 3, tree.terms.size # D, C (used in requires condition), and A (target of requires) + + # D alone should satisfy + assert cond.satisfied_by_ext_ver_list?([Udb::ExtensionVersion.new("D", "2.0", @cfg_arch)]) + + # D with C but not A should not + refute cond.satisfied_by_ext_ver_list?([Udb::ExtensionVersion.new("D", "2.0", @cfg_arch), Udb::ExtensionVersion.new("C", "2.0", @cfg_arch)]) + + # D with C and A should + assert cond.satisfied_by_ext_ver_list?([Udb::ExtensionVersion.new("A", "1.0", @cfg_arch), Udb::ExtensionVersion.new("C", "2.0", @cfg_arch), Udb::ExtensionVersion.new("D", "2.0", @cfg_arch)]) + end +end diff --git a/tools/ruby-gems/udb/udb.gemspec b/tools/ruby-gems/udb/udb.gemspec index ff318cd4c..73a3d8616 100644 --- a/tools/ruby-gems/udb/udb.gemspec +++ b/tools/ruby-gems/udb/udb.gemspec @@ -26,7 +26,7 @@ Gem::Specification.new do |s| "mailing_list_uri" => "https://lists.riscv.org/g/tech-unifieddb", "bug_tracker_uri" => "https://github.com/riscv-software-src/riscv-unified-db/issues" } - s.required_ruby_version = "~> 3.2" # only supported in UDB container + s.required_ruby_version = "~> 3.2" s.require_paths = ["lib"] s.bindir = "bin" @@ -44,6 +44,7 @@ Gem::Specification.new do |s| s.add_dependency "tilt" s.add_dependency "udb_helpers" + s.add_development_dependency "ruby-debug-ide" s.add_development_dependency "rubocop-github" s.add_development_dependency "rubocop-minitest" s.add_development_dependency "rubocop-performance" diff --git a/tools/ruby-gems/udb_helpers/udb_helpers.gemspec b/tools/ruby-gems/udb_helpers/udb_helpers.gemspec index 30fe4123f..e1f533a47 100644 --- a/tools/ruby-gems/udb_helpers/udb_helpers.gemspec +++ b/tools/ruby-gems/udb_helpers/udb_helpers.gemspec @@ -24,7 +24,7 @@ Gem::Specification.new do |s| "mailing_list_uri" => "https://lists.riscv.org/g/tech-unifieddb", "bug_tracker_uri" => "https://github.com/riscv-software-src/riscv-unified-db/issues" } - s.required_ruby_version = "~> 3.2" # only supported in UDB container + s.required_ruby_version = "~> 3.2" s.require_paths = ["lib"] From 6928ad8acc06144ef571cad5dbf9782675b039c3 Mon Sep 17 00:00:00 2001 From: Derek Hower Date: Wed, 16 Jul 2025 07:20:28 -0700 Subject: [PATCH 3/4] docs: document schema conditions and idl implications --- doc/idl.adoc | 26 ++++ doc/schema/conditions.adoc | 249 +++++++++++++++++++++++++++++++++++++ 2 files changed, 275 insertions(+) create mode 100644 doc/schema/conditions.adoc diff --git a/doc/idl.adoc b/doc/idl.adoc index ba6e3aa5f..bb8c27611 100644 --- a/doc/idl.adoc +++ b/doc/idl.adoc @@ -512,6 +512,32 @@ The result of a binary operation is signed if both operands are signed; otherwis `c` must be boolean, and `t` and `f` must be identical types. |=== +=== Implications + +Implications are used to specify dependencies that must hold among data. +Implications cannot appear in general IDL code, and are used in specific contexts, for example when expression link:schema/conditions.adoc#_generic_constraints[generic constraints] in RISC-V Unified Database. + +An implication takes the form: + +[source,idl] +---- +ANTECEDENT -> CONSEQUENT +---- + +The antecedent and consequent can be any expression with a boolean type. + +The implication passes whenever (1) the antecedent is false or (2) both the antecedent and consequent are true. + +For example: + +[source,idl] +---- +false -> true; # passes +false -> false; # passes +true -> true; # passes +true -> false; # fails +---- + == Variables and constants === Mutable variables diff --git a/doc/schema/conditions.adoc b/doc/schema/conditions.adoc new file mode 100644 index 000000000..e9423afef --- /dev/null +++ b/doc/schema/conditions.adoc @@ -0,0 +1,249 @@ +// Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +// SPDX-License-Identifier: CC-BY-4.0 + += Expressing Conditions in UDB Data + +There are many instances where there is a conditional relation among data in UDB. +For example: + +* the `Zfinx` extension is only allowed if the `F` extension is not implemented. +* the `C` extension only implies the `Zcd` extension if the `D` extension is also implemented. +* the `MTVEC_BASE_ALIGNMENT_DIRECT` parameter only applies when `MTVEC_MODES` indicates support for 'direct'. +* ... and many more + +Conditions are consistently represented using a common subschema throughout UDB, regardless of the context that they appear. + +== Condition Tests + +There are three types of things that can be tested by a condition: + +* an *extension requirement* +** For example, extension `Sm`, version `>= 1.12` +* a *parameter requirement* +** For example, `MXLEN` equals `32` +* a *generic constraint* +** For example, if `MXLEN` is `32`, then `Sv39` must not be implemented + +The three test types can be combined arbitrarily using <>. + +[#ext_reqs] +=== Extension Requirements + +An extension requirement is identified by the key `extension`. +It expects an extension `name` and an optional `version`. +If no `version` is given, then it defaults to all versions (`>= 0`). + +The `version` is a list of range specifiers, using the following operators: + +|=== +| op | Meaning | Example + +| `=` | Exactly equals | `= 1.0` +| `>` | Greater than | `> 1.0` +| `<` | Less than | `< 1.0` +| `>=` | Greater than or equal | `>= 1.0` +| `<=` | Less than or equal | `<= 1.0` +| '~>' | Compatible with | `~> 1.0` +|=== + +The "compatible with" operator will accept any version that is greater than or equal to the target and that has not been marked as a breaking version change in the database. +Note that RISC-V does not follow semantic versioning, so `2.0` may be compatible with `1.0` for a given extension as long as `2.0` (or any version between `1.0` and `2.0`) is not marked as a breaking version. + +For example: + +[source,yaml] +---- +# require C, version >= 0 +extension: + name: C +---- + +[source,yaml] +---- +# require D, version == 1.0 +extension: + name: D + version: = 1.0 +---- + +[source,yaml] +---- +# require D, version _compatible with_ 1.0 +extension: + name: D + version: ~> 1.0 +---- + +[source,yaml] +---- +# require D, version greater than or equal to 1.0 and less than 2.0 +extension: + name: D + version: [">= 1.0", "< 2.0"] +---- + +Extension requirements can also take logic expression of multiple requrements using the `allOf`, `anyOf`, `noneOf`, or `not` operators. See <> and <>. + +[#param_reqs] +=== Parameter Requirements + +A parameter requirement is identified by the key `param`. +It expects a parameter `name`, a single comparison, and a `reason` description. + +The comparison is one of: + +|=== +| Key | Meaning | Example + +| `equal` | Parameter value equals | `equal: 5`, `equal: "string value"` +| `not_equal` | Parameter value is not equal to | `not_equal: 5`, `not_equal: "string value"` +| `less_than` | Parameter value is less than | `less_than`: 5 +| `greater_than` | Parameter value is greater than | `greater_than`: 5 +| `less_than_or_equal` | Parameter value is less than or equal to | `less_than`: 5 +| `greater_than_or_equal` | Parameter value is greater than or equal to | `greater_than`: 5 +| `includes` | Array parameter includes a value | `includes: 5`, `includes: "string value"` +|=== + +For example: + +[source,yaml] +---- +param: + name: MXLEN + equal: 32 + reason: Extension is only defined in RV32 +---- + +[source,yaml] +---- +param: + name: MTVEC_MODES + includes: 0 + reason: Only relevant when direct mode is supported +---- + +Like <>, parameter requirements can be combined aribtrarily using boolean logic operations. See <> and <> + +=== Generic Constraints + +Generic constraints provide an escape hatch when a condition is difficult to express when using <> or <>. +A generic constraint is an IDL function containing one or more link:../idl.adoc#implications[implications]. +The constraint holds if all the implications are true. +The constraint function does not return a value. + +All global functions (for example, `implemented?(...)`) and parameters are in scope for the constraint function. + +For example: + +[source,yaml] +---- +constraint: + idl(): | + implemented?(ExtensionName:Sv32) -> SV32X4_TRANSLATION; + reason: + `Shgatpa` mandates that or each supported virtual memory scheme SvNN supported in + `satp`, the corresponding `hgatp` SvNNx4 mode must be supported. +---- + +[source,yaml] +---- +constraint: + idl(): | + for (U32 i = 3; i < 32; i++){ + HPM_COUNTER_EN[i] -> HCOUNTENABLE_EN[i]; + } + reason: + Shcounterenw requires that all non-read-only-0 counters can enabled with hcounteren. +---- + +[#bool_ops] +== Boolean Operators + +UDB adopts the same schema used by link:https://json-schema.org[JSON Schema] for boolean logic. +The logic can be applied either at the top level of a condition (before any `extension`, `param`, or `constraint` keys) or within a particular type. + +The following operators are supported: + +|=== +| Op | Meaning | Example + +| `allOf` | Logical AND | `allOf: [ { name: C }, { name: D} ]` +| `anyOf` | Logical OR | `anyOf: [ { name: C }, { name: D} ]` +| `noneOf` | Logical NOR | `noneOf: [ { name: C }, { name: D} ]` +| `not` | Logical NOT | `not: { name: C }` +| `if`, `then` | Logical implicaiton | `if: { name: C }, then: { name: D }` +|=== + +For example: + +[source,yaml] +---- +extension: + allOf: + - name: C + - name: D +---- + +[source,yaml] +---- +allOf: + - extension: + name: C + - param: + name: MXLEN + equal: 32 + reason: Only applies with RV32 +---- + +[source,yaml] +---- +if: + extension: + name: F + version: ~> 2.2 + then: + name: Zcf + version: = 1.0.0 +---- + +== Examples + +The following are real examples from the database: + +.mstatus CSR is defined by the Sm extension +[source,yaml] +---- +# mstatus.yaml +definedBy: + extension: + name: Sm +---- + +.C implies Zcf/d only if F/D are implemented +[source,yaml] +---- +# C.yaml +versions: + - version: "2.0.0" + state: ratified + ratification_date: 2019-12 + requires: + extension: + allOf: + - name: Zca + version: = 1.0.0 + - if: + extension: + name: F + version: ~> 2.2 + then: + name: Zcf + version: = 1.0.0 + - if: + extension: + name: D + version: ~> 2.2 + then: + name: Zcd + version: = 1.0.0 +---- From 19c9d588e3ce3e4734922e0f4722ebfcadf824cb Mon Sep 17 00:00:00 2001 From: Derek Hower Date: Wed, 16 Jul 2025 07:46:47 -0700 Subject: [PATCH 4/4] refactor: move parameters into their own YAML files --- spec/schemas/ext_schema.json | 51 -- spec/schemas/param_schema.json | 63 ++ spec/schemas/schema_defs.json | 143 ++++- spec/std/isa/ext/A.yaml | 56 -- spec/std/isa/ext/B.yaml | 6 - spec/std/isa/ext/C.yaml | 6 - spec/std/isa/ext/D.yaml | 6 - spec/std/isa/ext/F.yaml | 41 -- spec/std/isa/ext/H.yaml | 536 ------------------ spec/std/isa/ext/M.yaml | 6 - spec/std/isa/ext/Q.yaml | 6 - spec/std/isa/ext/S.yaml | 402 ------------- spec/std/isa/ext/Sdtrig.yaml | 44 -- spec/std/isa/ext/Sm.yaml | 316 ----------- spec/std/isa/ext/Smhpm.yaml | 65 --- spec/std/isa/ext/Smmpm.yaml | 8 - spec/std/isa/ext/Smnpm.yaml | 8 - spec/std/isa/ext/Smpmp.yaml | 46 -- spec/std/isa/ext/Ssaia.yaml | 85 --- spec/std/isa/ext/Sscsrind.yaml | 45 -- spec/std/isa/ext/Ssnpm.yaml | 8 - spec/std/isa/ext/Ssqosid.yaml | 19 - spec/std/isa/ext/U.yaml | 48 -- spec/std/isa/ext/V.yaml | 45 -- spec/std/isa/ext/Xmock.yaml | 143 +---- spec/std/isa/ext/Zcmt.yaml | 80 --- spec/std/isa/ext/Zicbom.yaml | 18 - spec/std/isa/ext/Zicbop.yaml | 9 - spec/std/isa/ext/Zicboz.yaml | 9 - spec/std/isa/ext/Zicfilp.yaml | 22 - spec/std/isa/ext/Zicfiss.yaml | 22 - spec/std/isa/ext/Zicntr.yaml | 18 - spec/std/isa/isa/globals.isa | 4 +- .../param/A/LRSC_FAIL_ON_NON_EXACT_LRSC.yaml | 18 + .../isa/param/A/LRSC_FAIL_ON_VA_SYNONYM.yaml | 17 + .../isa/param/A/LRSC_MISALIGNED_BEHAVIOR.yaml | 24 + .../param/A/LRSC_RESERVATION_STRATEGY.yaml | 26 + spec/std/isa/param/A/MISALIGNED_AMO.yaml | 22 + spec/std/isa/param/A/MUTABLE_MISA_A.yaml | 17 + spec/std/isa/param/B/MUTABLE_MISA_B.yaml | 19 + spec/std/isa/param/C/MUTABLE_MISA_C.yaml | 19 + spec/std/isa/param/D/MUTABLE_MISA_D.yaml | 19 + .../param/F/HW_MSTATUS_FS_DIRTY_UPDATE.yaml | 28 + .../isa/param/F/MSTATUS_FS_LEGAL_VALUES.yaml | 39 ++ spec/std/isa/param/F/MUTABLE_MISA_F.yaml | 19 + spec/std/isa/param/H/GSTAGE_MODE_BARE.yaml | 18 + spec/std/isa/param/H/HCOUNTENABLE_EN.yaml | 27 + ...ALID_VSATP_MODE_WRITES_WHEN_V_EQ_ZERO.yaml | 18 + spec/std/isa/param/H/MUTABLE_MISA_H.yaml | 26 + .../H/NUM_EXTERNAL_GUEST_INTERRUPTS.yaml | 25 + ...DING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION.yaml | 19 + ...PORT_GPA_IN_HTVAL_ON_GUEST_PAGE_FAULT.yaml | 19 + ..._TVAL_ON_INSTRUCTION_GUEST_PAGE_FAULT.yaml | 18 + ...TVAL_ON_INTERMEDIATE_GUEST_PAGE_FAULT.yaml | 19 + ..._GPA_IN_TVAL_ON_LOAD_GUEST_PAGE_FAULT.yaml | 18 + ...IN_TVAL_ON_STORE_AMO_GUEST_PAGE_FAULT.yaml | 18 + .../H/REPORT_VA_IN_VSTVAL_ON_BREAKPOINT.yaml | 20 + ...IN_VSTVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml | 20 + ...A_IN_VSTVAL_ON_INSTRUCTION_MISALIGNED.yaml | 21 + ...A_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT.yaml | 20 + ...ORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT.yaml | 19 + ...EPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED.yaml | 20 + ...EPORT_VA_IN_VSTVAL_ON_LOAD_PAGE_FAULT.yaml | 19 + ...A_IN_VSTVAL_ON_STORE_AMO_ACCESS_FAULT.yaml | 19 + ..._VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED.yaml | 20 + ..._VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT.yaml | 19 + spec/std/isa/param/H/SV39X4_TRANSLATION.yaml | 20 + .../isa/param/H/SV39_VSMODE_TRANSLATION.yaml | 20 + spec/std/isa/param/H/SV48X4_TRANSLATION.yaml | 20 + .../isa/param/H/SV48_VSMODE_TRANSLATION.yaml | 20 + spec/std/isa/param/H/SV57X4_TRANSLATION.yaml | 20 + .../isa/param/H/SV57_VSMODE_TRANSLATION.yaml | 20 + .../param/H/TINST_VALUE_ON_BREAKPOINT.yaml | 23 + ...ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT.yaml | 23 + ..._VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT.yaml | 27 + ...E_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT.yaml | 27 + ...LUE_ON_INSTRUCTION_ADDRESS_MISALIGNED.yaml | 23 + .../H/TINST_VALUE_ON_LOAD_ACCESS_FAULT.yaml | 25 + ...INST_VALUE_ON_LOAD_ADDRESS_MISALIGNED.yaml | 25 + .../H/TINST_VALUE_ON_LOAD_PAGE_FAULT.yaml | 25 + .../std/isa/param/H/TINST_VALUE_ON_MCALL.yaml | 23 + .../std/isa/param/H/TINST_VALUE_ON_SCALL.yaml | 23 + ...TINST_VALUE_ON_STORE_AMO_ACCESS_FAULT.yaml | 25 + ...VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED.yaml | 25 + .../TINST_VALUE_ON_STORE_AMO_PAGE_FAULT.yaml | 25 + .../std/isa/param/H/TINST_VALUE_ON_UCALL.yaml | 23 + .../H/TINST_VALUE_ON_VIRTUAL_INSTRUCTION.yaml | 23 + .../isa/param/H/TINST_VALUE_ON_VSCALL.yaml | 23 + .../isa/param/H/TRAP_ON_ECALL_FROM_VS.yaml | 20 + spec/std/isa/param/H/VMID_WIDTH.yaml | 26 + spec/std/isa/param/H/VSTVEC_MODE_DIRECT.yaml | 20 + .../std/isa/param/H/VSTVEC_MODE_VECTORED.yaml | 20 + spec/std/isa/param/H/VSXLEN.yaml | 32 ++ spec/std/isa/param/H/VS_MODE_ENDIANNESS.yaml | 25 + spec/std/isa/param/H/VUXLEN.yaml | 29 + spec/std/isa/param/H/VU_MODE_ENDIANNESS.yaml | 25 + spec/std/isa/param/M/MUTABLE_MISA_M.yaml | 19 + spec/std/isa/param/Q/MUTABLE_MISA_Q.yaml | 19 + spec/std/isa/param/S/ASID_WIDTH.yaml | 26 + .../std/isa/param/S/HSTATEEN_ENVCFG_TYPE.yaml | 46 ++ .../std/isa/param/S/MSTATEEN_ENVCFG_TYPE.yaml | 28 + .../isa/param/S/MSTATUS_TVM_IMPLEMENTED.yaml | 18 + .../isa/param/S/MSTATUS_VS_LEGAL_VALUES.yaml | 35 ++ spec/std/isa/param/S/MSTATUS_VS_WRITABLE.yaml | 23 + spec/std/isa/param/S/MUTABLE_MISA_S.yaml | 26 + ...ODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION.yaml | 19 + ...VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT.yaml | 20 + ...REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT.yaml | 19 + ...T_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT.yaml | 19 + .../S/REPORT_VA_IN_STVAL_ON_BREAKPOINT.yaml | 20 + ..._IN_STVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml | 20 + ...VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED.yaml | 21 + ...VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT.yaml | 20 + ...PORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT.yaml | 19 + ...REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED.yaml | 20 + ...REPORT_VA_IN_STVAL_ON_LOAD_PAGE_FAULT.yaml | 19 + ...VA_IN_STVAL_ON_STORE_AMO_ACCESS_FAULT.yaml | 19 + ...T_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED.yaml | 20 + ...T_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT.yaml | 19 + spec/std/isa/param/S/SATP_MODE_BARE.yaml | 17 + spec/std/isa/param/S/SCOUNTENABLE_EN.yaml | 49 ++ spec/std/isa/param/S/STVAL_WIDTH.yaml | 19 + spec/std/isa/param/S/STVEC_MODE_DIRECT.yaml | 20 + spec/std/isa/param/S/STVEC_MODE_VECTORED.yaml | 20 + spec/std/isa/param/S/SXLEN.yaml | 32 ++ spec/std/isa/param/S/S_MODE_ENDIANNESS.yaml | 25 + .../std/isa/param/S/TRAP_ON_ECALL_FROM_S.yaml | 20 + ...FENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml | 32 ++ .../param/Sdtrig/HSTATEEN_CONTEXT_TYPE.yaml | 50 ++ .../param/Sdtrig/MSTATEEN_CONTEXT_TYPE.yaml | 28 + spec/std/isa/param/Sm/ARCH_ID_VALUE.yaml | 35 ++ spec/std/isa/param/Sm/CONFIG_PTR_ADDRESS.yaml | 31 + spec/std/isa/param/Sm/IMP_ID_VALUE.yaml | 24 + .../std/isa/param/Sm/MARCHID_IMPLEMENTED.yaml | 17 + spec/std/isa/param/Sm/MIMPID_IMPLEMENTED.yaml | 17 + spec/std/isa/param/Sm/MISALIGNED_LDST.yaml | 19 + .../MISALIGNED_LDST_EXCEPTION_PRIORITY.yaml | 40 ++ ...MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE.yaml | 40 ++ .../param/Sm/MISALIGNED_SPLIT_STRATEGY.yaml | 29 + .../isa/param/Sm/MISA_CSR_IMPLEMENTED.yaml | 24 + spec/std/isa/param/Sm/MTVAL_WIDTH.yaml | 63 ++ spec/std/isa/param/Sm/MTVEC_ACCESS.yaml | 25 + .../param/Sm/MTVEC_BASE_ALIGNMENT_DIRECT.yaml | 38 ++ .../Sm/MTVEC_BASE_ALIGNMENT_VECTORED.yaml | 38 ++ .../Sm/MTVEC_ILLEGAL_WRITE_BEHAVIOR.yaml | 27 + spec/std/isa/param/Sm/MTVEC_MODES.yaml | 36 ++ spec/std/isa/param/Sm/MXLEN.yaml | 16 + spec/std/isa/param/Sm/M_MODE_ENDIANESS.yaml | 27 + spec/std/isa/param/Sm/PHYS_ADDR_WIDTH.yaml | 29 + spec/std/isa/param/Sm/PMA_GRANULARITY.yaml | 22 + .../Sm/PRECISE_SYNCHRONOUS_EXCEPTIONS.yaml | 17 + ...ODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION.yaml | 22 + .../Sm/REPORT_VA_IN_MTVAL_ON_BREAKPOINT.yaml | 24 + ..._IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml | 22 + ...PORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT.yaml | 22 + ...REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED.yaml | 22 + ...VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT.yaml | 22 + ...T_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED.yaml | 22 + ...VS_IN_MTVAL_ON_INSTRUCTION_MISALIGNED.yaml | 22 + spec/std/isa/param/Sm/TRAP_ON_EBREAK.yaml | 17 + .../isa/param/Sm/TRAP_ON_ECALL_FROM_M.yaml | 17 + .../isa/param/Sm/TRAP_ON_ILLEGAL_WLRL.yaml | 22 + .../Sm/TRAP_ON_RESERVED_INSTRUCTION.yaml | 25 + .../Sm/TRAP_ON_UNIMPLEMENTED_INSTRUCTION.yaml | 24 + spec/std/isa/param/Sm/VENDOR_ID_BANK.yaml | 21 + spec/std/isa/param/Sm/VENDOR_ID_OFFSET.yaml | 19 + spec/std/isa/param/Smhpm/COUNTINHIBIT_EN.yaml | 32 ++ spec/std/isa/param/Smhpm/HPM_COUNTER_EN.yaml | 29 + spec/std/isa/param/Smhpm/HPM_EVENTS.yaml | 21 + spec/std/isa/param/Smhpm/MCOUNTENABLE_EN.yaml | 27 + spec/std/isa/param/Smmpm/PMLEN.yaml | 20 + spec/std/isa/param/Smpmp/NUM_PMP_ENTRIES.yaml | 42 ++ spec/std/isa/param/Smpmp/PMP_GRANULARITY.yaml | 25 + .../isa/param/Ssaia/HSTATEEN_AIA_TYPE.yaml | 43 ++ .../isa/param/Ssaia/HSTATEEN_IMSIC_TYPE.yaml | 46 ++ .../isa/param/Ssaia/MSTATEEN_AIA_TYPE.yaml | 28 + .../isa/param/Ssaia/MSTATEEN_IMSIC_TYPE.yaml | 28 + .../param/Sscsrind/HSTATEEN_CSRIND_TYPE.yaml | 45 ++ .../param/Sscsrind/MSTATEEN_CSRIND_TYPE.yaml | 30 + spec/std/isa/param/Ssqosid/MCID_WIDTH.yaml | 19 + spec/std/isa/param/Ssqosid/RCID_WIDTH.yaml | 19 + spec/std/isa/param/U/MUTABLE_MISA_U.yaml | 19 + .../std/isa/param/U/TRAP_ON_ECALL_FROM_U.yaml | 20 + spec/std/isa/param/U/UXLEN.yaml | 34 ++ spec/std/isa/param/U/U_MODE_ENDIANNESS.yaml | 25 + .../param/V/HW_MSTATUS_VS_DIRTY_UPDATE.yaml | 28 + .../isa/param/V/MSTATUS_VS_LEGAL_VALUES.yaml | 43 ++ spec/std/isa/param/V/MUTABLE_MISA_V.yaml | 19 + spec/std/isa/param/Xmock/MOCK_1_BIT_INT.yaml | 17 + spec/std/isa/param/Xmock/MOCK_25_BIT_INT.yaml | 17 + spec/std/isa/param/Xmock/MOCK_2_BIT_INT.yaml | 17 + spec/std/isa/param/Xmock/MOCK_32_BIT_INT.yaml | 17 + spec/std/isa/param/Xmock/MOCK_64_BIT_INT.yaml | 17 + ...K_ARRAY_BOOL_ARRAY_OF_8_FIRST_2_FALSE.yaml | 22 + .../isa/param/Xmock/MOCK_ARRAY_INT_ENUM.yaml | 23 + .../isa/param/Xmock/MOCK_ARRAY_MAX_ONLY.yaml | 21 + .../isa/param/Xmock/MOCK_ARRAY_MIN_ONLY.yaml | 21 + .../param/Xmock/MOCK_ARRAY_STRING_ENUM1.yaml | 21 + .../param/Xmock/MOCK_ARRAY_STRING_ENUM2.yaml | 21 + spec/std/isa/param/Xmock/MOCK_BOOL_1.yaml | 15 + spec/std/isa/param/Xmock/MOCK_BOOL_2.yaml | 15 + .../std/isa/param/Xmock/MOCK_ENUM_2_INTS.yaml | 18 + .../isa/param/Xmock/MOCK_ENUM_2_STRINGS.yaml | 18 + .../param/Xmock/MOCK_INT_RANGE_0_TO_1023.yaml | 17 + .../param/Xmock/MOCK_INT_RANGE_0_TO_127.yaml | 17 + .../param/Xmock/MOCK_INT_RANGE_0_TO_128.yaml | 17 + .../param/Xmock/MOCK_INT_RANGE_0_TO_2.yaml | 17 + .../param/Xmock/MOCK_INT_RANGE_0_TO_999.yaml | 17 + .../Xmock/MOCK_INT_RANGE_1000_TO_2048.yaml | 17 + .../param/Xmock/MOCK_INT_RANGE_1_TO_128.yaml | 17 + .../std/isa/param/Zcmt/HSTATEEN_JVT_TYPE.yaml | 44 ++ .../std/isa/param/Zcmt/MSTATEEN_JVT_TYPE.yaml | 30 + .../std/isa/param/Zcmt/SSTATEEN_JVT_TYPE.yaml | 53 ++ .../isa/param/Zicbom/CACHE_BLOCK_SIZE.yaml | 22 + .../FORCE_UPGRADE_CBO_INVAL_TO_FLUSH.yaml | 20 + ...N_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml | 18 + ...N_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml | 18 + ..._VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml | 18 + ..._MTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml | 18 + ..._STVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml | 18 + ...VSTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml | 18 + .../param/Zicntr/TIME_CSR_IMPLEMENTED.yaml | 28 + 222 files changed, 4711 insertions(+), 2176 deletions(-) create mode 100644 spec/schemas/param_schema.json create mode 100644 spec/std/isa/param/A/LRSC_FAIL_ON_NON_EXACT_LRSC.yaml create mode 100644 spec/std/isa/param/A/LRSC_FAIL_ON_VA_SYNONYM.yaml create mode 100644 spec/std/isa/param/A/LRSC_MISALIGNED_BEHAVIOR.yaml create mode 100644 spec/std/isa/param/A/LRSC_RESERVATION_STRATEGY.yaml create mode 100644 spec/std/isa/param/A/MISALIGNED_AMO.yaml create mode 100644 spec/std/isa/param/A/MUTABLE_MISA_A.yaml create mode 100644 spec/std/isa/param/B/MUTABLE_MISA_B.yaml create mode 100644 spec/std/isa/param/C/MUTABLE_MISA_C.yaml create mode 100644 spec/std/isa/param/D/MUTABLE_MISA_D.yaml create mode 100644 spec/std/isa/param/F/HW_MSTATUS_FS_DIRTY_UPDATE.yaml create mode 100644 spec/std/isa/param/F/MSTATUS_FS_LEGAL_VALUES.yaml create mode 100644 spec/std/isa/param/F/MUTABLE_MISA_F.yaml create mode 100644 spec/std/isa/param/H/GSTAGE_MODE_BARE.yaml create mode 100644 spec/std/isa/param/H/HCOUNTENABLE_EN.yaml create mode 100644 spec/std/isa/param/H/IGNORE_INVALID_VSATP_MODE_WRITES_WHEN_V_EQ_ZERO.yaml create mode 100644 spec/std/isa/param/H/MUTABLE_MISA_H.yaml create mode 100644 spec/std/isa/param/H/NUM_EXTERNAL_GUEST_INTERRUPTS.yaml create mode 100644 spec/std/isa/param/H/REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION.yaml create mode 100644 spec/std/isa/param/H/REPORT_GPA_IN_HTVAL_ON_GUEST_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_INSTRUCTION_GUEST_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_INTERMEDIATE_GUEST_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_LOAD_GUEST_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_STORE_AMO_GUEST_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_BREAKPOINT.yaml create mode 100644 spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_MISALIGNED.yaml create mode 100644 spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED.yaml create mode 100644 spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED.yaml create mode 100644 spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/SV39X4_TRANSLATION.yaml create mode 100644 spec/std/isa/param/H/SV39_VSMODE_TRANSLATION.yaml create mode 100644 spec/std/isa/param/H/SV48X4_TRANSLATION.yaml create mode 100644 spec/std/isa/param/H/SV48_VSMODE_TRANSLATION.yaml create mode 100644 spec/std/isa/param/H/SV57X4_TRANSLATION.yaml create mode 100644 spec/std/isa/param/H/SV57_VSMODE_TRANSLATION.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_BREAKPOINT.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_INSTRUCTION_ADDRESS_MISALIGNED.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_LOAD_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_LOAD_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_MCALL.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_SCALL.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_UCALL.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_VIRTUAL_INSTRUCTION.yaml create mode 100644 spec/std/isa/param/H/TINST_VALUE_ON_VSCALL.yaml create mode 100644 spec/std/isa/param/H/TRAP_ON_ECALL_FROM_VS.yaml create mode 100644 spec/std/isa/param/H/VMID_WIDTH.yaml create mode 100644 spec/std/isa/param/H/VSTVEC_MODE_DIRECT.yaml create mode 100644 spec/std/isa/param/H/VSTVEC_MODE_VECTORED.yaml create mode 100644 spec/std/isa/param/H/VSXLEN.yaml create mode 100644 spec/std/isa/param/H/VS_MODE_ENDIANNESS.yaml create mode 100644 spec/std/isa/param/H/VUXLEN.yaml create mode 100644 spec/std/isa/param/H/VU_MODE_ENDIANNESS.yaml create mode 100644 spec/std/isa/param/M/MUTABLE_MISA_M.yaml create mode 100644 spec/std/isa/param/Q/MUTABLE_MISA_Q.yaml create mode 100644 spec/std/isa/param/S/ASID_WIDTH.yaml create mode 100644 spec/std/isa/param/S/HSTATEEN_ENVCFG_TYPE.yaml create mode 100644 spec/std/isa/param/S/MSTATEEN_ENVCFG_TYPE.yaml create mode 100644 spec/std/isa/param/S/MSTATUS_TVM_IMPLEMENTED.yaml create mode 100644 spec/std/isa/param/S/MSTATUS_VS_LEGAL_VALUES.yaml create mode 100644 spec/std/isa/param/S/MSTATUS_VS_WRITABLE.yaml create mode 100644 spec/std/isa/param/S/MUTABLE_MISA_S.yaml create mode 100644 spec/std/isa/param/S/REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_BREAKPOINT.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED.yaml create mode 100644 spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT.yaml create mode 100644 spec/std/isa/param/S/SATP_MODE_BARE.yaml create mode 100644 spec/std/isa/param/S/SCOUNTENABLE_EN.yaml create mode 100644 spec/std/isa/param/S/STVAL_WIDTH.yaml create mode 100644 spec/std/isa/param/S/STVEC_MODE_DIRECT.yaml create mode 100644 spec/std/isa/param/S/STVEC_MODE_VECTORED.yaml create mode 100644 spec/std/isa/param/S/SXLEN.yaml create mode 100644 spec/std/isa/param/S/S_MODE_ENDIANNESS.yaml create mode 100644 spec/std/isa/param/S/TRAP_ON_ECALL_FROM_S.yaml create mode 100644 spec/std/isa/param/S/TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml create mode 100644 spec/std/isa/param/Sdtrig/HSTATEEN_CONTEXT_TYPE.yaml create mode 100644 spec/std/isa/param/Sdtrig/MSTATEEN_CONTEXT_TYPE.yaml create mode 100644 spec/std/isa/param/Sm/ARCH_ID_VALUE.yaml create mode 100644 spec/std/isa/param/Sm/CONFIG_PTR_ADDRESS.yaml create mode 100644 spec/std/isa/param/Sm/IMP_ID_VALUE.yaml create mode 100644 spec/std/isa/param/Sm/MARCHID_IMPLEMENTED.yaml create mode 100644 spec/std/isa/param/Sm/MIMPID_IMPLEMENTED.yaml create mode 100644 spec/std/isa/param/Sm/MISALIGNED_LDST.yaml create mode 100644 spec/std/isa/param/Sm/MISALIGNED_LDST_EXCEPTION_PRIORITY.yaml create mode 100644 spec/std/isa/param/Sm/MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE.yaml create mode 100644 spec/std/isa/param/Sm/MISALIGNED_SPLIT_STRATEGY.yaml create mode 100644 spec/std/isa/param/Sm/MISA_CSR_IMPLEMENTED.yaml create mode 100644 spec/std/isa/param/Sm/MTVAL_WIDTH.yaml create mode 100644 spec/std/isa/param/Sm/MTVEC_ACCESS.yaml create mode 100644 spec/std/isa/param/Sm/MTVEC_BASE_ALIGNMENT_DIRECT.yaml create mode 100644 spec/std/isa/param/Sm/MTVEC_BASE_ALIGNMENT_VECTORED.yaml create mode 100644 spec/std/isa/param/Sm/MTVEC_ILLEGAL_WRITE_BEHAVIOR.yaml create mode 100644 spec/std/isa/param/Sm/MTVEC_MODES.yaml create mode 100644 spec/std/isa/param/Sm/MXLEN.yaml create mode 100644 spec/std/isa/param/Sm/M_MODE_ENDIANESS.yaml create mode 100644 spec/std/isa/param/Sm/PHYS_ADDR_WIDTH.yaml create mode 100644 spec/std/isa/param/Sm/PMA_GRANULARITY.yaml create mode 100644 spec/std/isa/param/Sm/PRECISE_SYNCHRONOUS_EXCEPTIONS.yaml create mode 100644 spec/std/isa/param/Sm/REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION.yaml create mode 100644 spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_BREAKPOINT.yaml create mode 100644 spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED.yaml create mode 100644 spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT.yaml create mode 100644 spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED.yaml create mode 100644 spec/std/isa/param/Sm/REPORT_VS_IN_MTVAL_ON_INSTRUCTION_MISALIGNED.yaml create mode 100644 spec/std/isa/param/Sm/TRAP_ON_EBREAK.yaml create mode 100644 spec/std/isa/param/Sm/TRAP_ON_ECALL_FROM_M.yaml create mode 100644 spec/std/isa/param/Sm/TRAP_ON_ILLEGAL_WLRL.yaml create mode 100644 spec/std/isa/param/Sm/TRAP_ON_RESERVED_INSTRUCTION.yaml create mode 100644 spec/std/isa/param/Sm/TRAP_ON_UNIMPLEMENTED_INSTRUCTION.yaml create mode 100644 spec/std/isa/param/Sm/VENDOR_ID_BANK.yaml create mode 100644 spec/std/isa/param/Sm/VENDOR_ID_OFFSET.yaml create mode 100644 spec/std/isa/param/Smhpm/COUNTINHIBIT_EN.yaml create mode 100644 spec/std/isa/param/Smhpm/HPM_COUNTER_EN.yaml create mode 100644 spec/std/isa/param/Smhpm/HPM_EVENTS.yaml create mode 100644 spec/std/isa/param/Smhpm/MCOUNTENABLE_EN.yaml create mode 100644 spec/std/isa/param/Smmpm/PMLEN.yaml create mode 100644 spec/std/isa/param/Smpmp/NUM_PMP_ENTRIES.yaml create mode 100644 spec/std/isa/param/Smpmp/PMP_GRANULARITY.yaml create mode 100644 spec/std/isa/param/Ssaia/HSTATEEN_AIA_TYPE.yaml create mode 100644 spec/std/isa/param/Ssaia/HSTATEEN_IMSIC_TYPE.yaml create mode 100644 spec/std/isa/param/Ssaia/MSTATEEN_AIA_TYPE.yaml create mode 100644 spec/std/isa/param/Ssaia/MSTATEEN_IMSIC_TYPE.yaml create mode 100644 spec/std/isa/param/Sscsrind/HSTATEEN_CSRIND_TYPE.yaml create mode 100644 spec/std/isa/param/Sscsrind/MSTATEEN_CSRIND_TYPE.yaml create mode 100644 spec/std/isa/param/Ssqosid/MCID_WIDTH.yaml create mode 100644 spec/std/isa/param/Ssqosid/RCID_WIDTH.yaml create mode 100644 spec/std/isa/param/U/MUTABLE_MISA_U.yaml create mode 100644 spec/std/isa/param/U/TRAP_ON_ECALL_FROM_U.yaml create mode 100644 spec/std/isa/param/U/UXLEN.yaml create mode 100644 spec/std/isa/param/U/U_MODE_ENDIANNESS.yaml create mode 100644 spec/std/isa/param/V/HW_MSTATUS_VS_DIRTY_UPDATE.yaml create mode 100644 spec/std/isa/param/V/MSTATUS_VS_LEGAL_VALUES.yaml create mode 100644 spec/std/isa/param/V/MUTABLE_MISA_V.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_1_BIT_INT.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_25_BIT_INT.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_2_BIT_INT.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_32_BIT_INT.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_64_BIT_INT.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_ARRAY_BOOL_ARRAY_OF_8_FIRST_2_FALSE.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_ARRAY_INT_ENUM.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_ARRAY_MAX_ONLY.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_ARRAY_MIN_ONLY.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_ARRAY_STRING_ENUM1.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_ARRAY_STRING_ENUM2.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_BOOL_1.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_BOOL_2.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_ENUM_2_INTS.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_ENUM_2_STRINGS.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_1023.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_127.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_128.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_2.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_999.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_INT_RANGE_1000_TO_2048.yaml create mode 100644 spec/std/isa/param/Xmock/MOCK_INT_RANGE_1_TO_128.yaml create mode 100644 spec/std/isa/param/Zcmt/HSTATEEN_JVT_TYPE.yaml create mode 100644 spec/std/isa/param/Zcmt/MSTATEEN_JVT_TYPE.yaml create mode 100644 spec/std/isa/param/Zcmt/SSTATEEN_JVT_TYPE.yaml create mode 100644 spec/std/isa/param/Zicbom/CACHE_BLOCK_SIZE.yaml create mode 100644 spec/std/isa/param/Zicbom/FORCE_UPGRADE_CBO_INVAL_TO_FLUSH.yaml create mode 100644 spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml create mode 100644 spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml create mode 100644 spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml create mode 100644 spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_MTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml create mode 100644 spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_STVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml create mode 100644 spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_VSTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml create mode 100644 spec/std/isa/param/Zicntr/TIME_CSR_IMPLEMENTED.yaml diff --git a/spec/schemas/ext_schema.json b/spec/schemas/ext_schema.json index 401af72f5..f5700f5f8 100644 --- a/spec/schemas/ext_schema.json +++ b/spec/schemas/ext_schema.json @@ -1,48 +1,6 @@ { "$schema": "http://json-schema.org/draft-07/schema#", - "$defs": { - "param_data": { - "type": "object", - "required": ["description", "schema"], - "properties": { - "description": { - "$ref": "schema_defs.json#/$defs/spec_text", - "description": "Parameter description, including list of valid values" - }, - "also_defined_in": { - "oneOf": [ - { - "$ref": "schema_defs.json#/$defs/extension_name" - }, - { - "type": "array", - "items": { - "$ref": "schema_defs.json#/$defs/extension_name" - } - } - ], - "description": "When a parameter is defined by multiple extensions, declare the other extensions here. The parameter *must* mean the same thing in all extensions." - }, - "schema": { - "$ref": "json-schema-draft-07.json#" - }, - "restrictions": { - "$ref": "schema_defs.json#/$defs/constraint_list" - }, - "definedBy": { - "description": "Extension requirement condition that must be met for parameter to exist. The condition that the defining extension is implemented is implicit, and does not need to be explicitly listed", - "$ref": "schema_defs.json#/$defs/condition" - }, - "extra_validation": { - "description": "Ruby code to perform extra validation, when it is not easily expressed with JSON Schema (_e.g._, because it depends on the value of another parameter)", - "type": "string" - } - }, - "additionalProperties": false - } - }, - "type": "object", "required": [ "$schema", @@ -269,15 +227,6 @@ "additionalProperties": false } }, - "params": { - "type": "object", - "patternProperties": { - "^[A-Z][A-Z_0-9]*$": { - "$ref": "#/$defs/param_data" - } - }, - "additionalProperties": false - }, "$source": { "type": "string", "description": "Source file where this extension was defined" diff --git a/spec/schemas/param_schema.json b/spec/schemas/param_schema.json new file mode 100644 index 000000000..003aa6c80 --- /dev/null +++ b/spec/schemas/param_schema.json @@ -0,0 +1,63 @@ +{ + "$schema": "http://json-schema.org/draft-07/schema#", + "type": "object", + + "required": [ + "$schema", + "kind", + "description", + "long_name", + "definedBy", + "schema" + ], + "properties": { + "$schema": { + "const": "param_schema.json#" + }, + "kind": { + "const": "parameter" + }, + "name": { + "$ref": "schema_defs.json#/$defs/param_name" + }, + "long_name": { + "description": "Short description of the parameter", + "type": "string" + }, + "description": { + "$ref": "schema_defs.json#/$defs/spec_text", + "description": "Parameter description, including list of valid values" + }, + "definedBy": { + "description": "Extension requirement condition that must be met for parameter to exist. The condition that the defining extension is implemented is implicit, and does not need to be explicitly listed", + "$ref": "schema_defs.json#/$defs/condition" + }, + "schema": { + "oneOf": [ + { + "type": "object", + "required": ["rv32", "rv64"], + "additionalProperties": false, + "properties": { + "rv32": { + "$ref": "json-schema-draft-07.json#", + "additionalProperties": false + }, + "rv64": { + "$ref": "json-schema-draft-07.json#", + "additionalProperties": false + } + } + }, + { + "$ref": "json-schema-draft-07.json#", + "additionalProperties": false + } + ] + }, + "restrictions": { + "$ref": "schema_defs.json#/$defs/constraint_list" + } + }, + "additionalProperties": false +} diff --git a/spec/schemas/schema_defs.json b/spec/schemas/schema_defs.json index afb91fd82..83622aca7 100644 --- a/spec/schemas/schema_defs.json +++ b/spec/schemas/schema_defs.json @@ -540,7 +540,106 @@ "required": ["param"], "properties": { "param": { - "$ref": "#/$defs/param_requirement" + "oneOf": [ + { + "type": "object", + "additionalProperties": false, + "required": ["name", "reason"], + "properties": { + "name": { + "$ref": "#/$defs/param_name" + }, + "equal": { + "oneOf": [ + { + "type": "integer" + }, + { + "type": "string" + } + ] + }, + "not_equal": { + "oneOf": [ + { + "type": "integer" + }, + { + "type": "string" + } + ] + }, + "greater_than": { + "type": "integer" + }, + "less_than": { + "type": "integer" + }, + "greater_than_or_equal": { + "type": "integer" + }, + "less_than_or_equal": { + "type": "integer" + }, + "includes": { + "oneOf": [ + { + "type": "integer" + }, + { + "type": "string" + } + ] + }, + "reason": { + "description": "Why the param condition exists", + "type": "string" + } + }, + "$comment": "Mandating exactly 3 properties, together with required properties 'name' and 'reason', means that exactly one logic condition may be specified", + "minProperties": 3, + "maxProperties": 3 + }, + { + "type": "object", + "additionalProperties": false, + "properties": { + "allOf": { + "type": "array", + "items": { + "$ref": "schema_defs.json#/$defs/param_condition/properties/param" + }, + "minItems": 1 + }, + "anyOf": { + "type": "array", + "items": { + "$ref": "schema_defs.json#/$defs/param_condition/properties/param" + }, + "minItems": 1 + }, + "oneOf": { + "type": "array", + "items": { + "$ref": "schema_defs.json#/$defs/param_condition/properties/param" + }, + "minItems": 1 + }, + "noneOf": { + "type": "array", + "items": { + "$ref": "schema_defs.json#/$defs/param_condition/properties/param" + }, + "minItems": 1 + }, + "not": { + "$ref": "schema_defs.json#/$defs/param_condition/properties/param" + } + }, + "minProperties": 1, + "maxProperties": 1 + } + ] } }, "additionalProperties": false @@ -633,8 +732,50 @@ }, { "$ref": "#/$defs/param_condition" + }, + { + "$ref": "#/$defs/constraint" } ] + }, + + "uint32": { + "type": "integer", + "minimum": 0, + "maximum": 4294967295 + }, + "uint64": { + "type": "integer", + "minimum": 0, + "maximum": 18446744073709551615 + }, + "32bit_unsigned_pow2": { + "description": "An unsigned power of 2 that fits in 32 bits", + "type": "integer", + "enum": [ + 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4095, 8192, 16384, + 32768, 65536, 131072, 262144, 524288, 1048576, 2097152, 4194304, + 8388608, 16777216, 33554432, 67108864, 134217728, 268435456, 536870912, + 1073741824, 2147483648 + ] + }, + "64bit_unsigned_pow2": { + "description": "An unsigned power of 2 that fits in 64 bits", + "type": "integer", + "enum": [ + 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4095, 8192, 16384, + 32768, 65536, 131072, 262144, 524288, 1048576, 2097152, 4194304, + 8388608, 16777216, 33554432, 67108864, 134217728, 268435456, 536870912, + 1073741824, 2147483648, 4294967296, 8589934592, 17179869184, + 34359738368, 68719476736, 137438953472, 274877906944, 549755813888, + 1099511627776, 2199023255552, 4398046511104, 8796093022208, + 17592186044416, 35184372088832, 70368744177664, 140737488355328, + 281474976710656, 562949953421312, 1125899906842624, 2251799813685248, + 4503599627370496, 9007199254740992, 18014398509481984, + 36028797018963968, 72057594037927936, 144115188075855872, + 288230376151711744, 576460752303423488, 1152921504606846976, + 2305843009213693952, 4611686018427387904, 9223372036854775808 + ] } } } diff --git a/spec/std/isa/ext/A.yaml b/spec/std/isa/ext/A.yaml index 44e88e765..7294c96be 100644 --- a/spec/std/isa/ext/A.yaml +++ b/spec/std/isa/ext/A.yaml @@ -77,59 +77,3 @@ description: | and cannot be observed to happen before any earlier memory operations or after any later memory operations in the same RISC-V hart and to the same address domain. -params: - MISALIGNED_AMO: - description: | - whether or not the implementation supports misaligned atomics in main memory - schema: - type: boolean - definedBy: - extension: - name: Zaamo - LRSC_RESERVATION_STRATEGY: - description: | - Strategy used to handle reservation sets. - - * "reserve naturally-aligned 64-byte region": Always reserve the 64-byte block containing the LR/SC address - * "reserve naturally-aligned 128-byte region": Always reserve the 128-byte block containing the LR/SC address - * "reserve exactly enough to cover the access": Always reserve exactly the LR/SC access, and no more - * "custom": Custom behavior, leading to an 'unpredictable' call on any LR/SC - schema: - type: string - enum: - - reserve naturally-aligned 64-byte region - - reserve naturally-aligned 128-byte region - - reserve exactly enough to cover the access - - custom - LRSC_FAIL_ON_VA_SYNONYM: - description: | - Whether or not an `sc.l`/`sc.d` will fail if its VA does not match the VA of the prior - `lr.l`/`lr.d`, even if the physical address of the SC and LR are the same - schema: - type: boolean - LRSC_MISALIGNED_BEHAVIOR: - description: | - What to do when an LR/SC address is misaligned and MISALIGNED_AMO == false. - - * 'always raise misaligned exception': self-explainitory - * 'always raise access fault': self-explainitory - * 'custom': Custom behavior; misaligned LR/SC may sometimes raise a misaligned exception and sometimes raise a access fault. Will lead to an 'unpredictable' call on any misaligned LR/SC access - schema: - type: string - enum: - - always raise misaligned exception - - always raise access fault - - custom - LRSC_FAIL_ON_NON_EXACT_LRSC: - description: | - Whether or not a Store Conditional fails if its physical address and size do not - exactly match the physical address and size of the last Load Reserved in program order - (independent of whether or not the SC is in the current reservation set) - schema: - type: boolean - MUTABLE_MISA_A: - description: | - When the `A` extensions is supported, indicates whether or not - the extension can be disabled in the `misa.A` bit. - schema: - type: boolean diff --git a/spec/std/isa/ext/B.yaml b/spec/std/isa/ext/B.yaml index c94bfb648..aeb65f25a 100644 --- a/spec/std/isa/ext/B.yaml +++ b/spec/std/isa/ext/B.yaml @@ -39,9 +39,3 @@ description: | the implementation supports the instructions provided by the `Zba`, `Zbb`, and `Zbs` extensions. When `misa.B` is 0, it indicates that the implementation may not support one or more of the `Zba`, `Zbb`, or `Zbs` extensions. -params: - MUTABLE_MISA_B: - description: | - Indicates whether or not the `B` extension can be disabled with the `misa.B` bit. - schema: - type: boolean diff --git a/spec/std/isa/ext/C.yaml b/spec/std/isa/ext/C.yaml index e17dd1a90..2775dfdd1 100644 --- a/spec/std/isa/ext/C.yaml +++ b/spec/std/isa/ext/C.yaml @@ -317,9 +317,3 @@ description: | !`fs0` !`fs1` !`fa0` !`fa1` !`fa2`!`fa3` !`fa4` !`fa5` !=== |=== -params: - MUTABLE_MISA_C: - description: | - Indicates whether or not the `C` extension can be disabled with the `misa.C` bit. - schema: - type: boolean diff --git a/spec/std/isa/ext/D.yaml b/spec/std/isa/ext/D.yaml index 9a6cc08fb..352dc8354 100644 --- a/spec/std/isa/ext/D.yaml +++ b/spec/std/isa/ext/D.yaml @@ -107,9 +107,3 @@ description: | normalization except for skipping over leading-1 bits instead of skipping over leading-0 bits, allowing the datapath muxing to be shared. ==== -params: - MUTABLE_MISA_D: - description: | - Indicates whether or not the `D` extension can be disabled with the `misa.D` bit. - schema: - type: boolean diff --git a/spec/std/isa/ext/F.yaml b/spec/std/isa/ext/F.yaml index f95ffc7d4..3ebdc790b 100644 --- a/spec/std/isa/ext/F.yaml +++ b/spec/std/isa/ext/F.yaml @@ -238,44 +238,3 @@ description: | Detecting tininess after rounding results in fewer spurious underflow signals. ==== -params: - MUTABLE_MISA_F: - description: | - Indicates whether or not the `F` extension can be disabled with the `misa.F` bit. - schema: - type: boolean - HW_MSTATUS_FS_DIRTY_UPDATE: - description: | - Indicates whether or not hardware will write to `mstatus.FS` - - Values are: - [separator="!"] - !=== - h! never ! Hardware never writes `mstatus.FS` - h! precise ! Hardware writes `mstatus.FS` to the Dirty (3) state precisely when F registers are modified - h! imprecise ! Hardware writes `mstatus.FS` imprecisely. This will result in a call to unpredictable() on any attempt to read `mstatus` or write FP state. - !=== - schema: - type: string - enum: ["never", "precise", "imprecise"] - MSTATUS_FS_LEGAL_VALUES: - description: | - The set of values that mstatus.FS supports. - schema: - type: array - items: - type: integer - enum: [0, 1, 2, 3] - maxItems: 4 - minItems: 1 - uniqueItems: true - restrictions: - constraint(): | - implemented?(ExtensionName::F) && - (HW_MSTATUS_FS_DIRTY_UPDATE == "precise") || - HW_MSTATUS_FS_DIRTY_UPDATE == "imprecise") - -> - $ary_includes?(MSTATUS_FS_LEGAL_VALUES, 3); - reason: - If there is a hardware update to mstatus.FS, then the Dirty state must be supported - also_defined_in: S diff --git a/spec/std/isa/ext/H.yaml b/spec/std/isa/ext/H.yaml index 700fd5b8c..c4bfabbfa 100644 --- a/spec/std/isa/ext/H.yaml +++ b/spec/std/isa/ext/H.yaml @@ -152,539 +152,3 @@ description: | interrupts and will be revised if an extension for user-level interrupts is adopted. ==== -params: - MUTABLE_MISA_H: - description: | - Indicates whether or not the `H` extension can be disabled with the `misa.H` bit. - schema: - type: boolean - restrictions: - constraint(): | - MUTABLE_MISA_S -> MUTABLE_MISA_H; - reason: | - If S mode can be disabled, then H mode must also be disabled since you can't be in H mode - without S mode (and thus MUTABLE_MISA_H is not an option -- it's always true) - NUM_EXTERNAL_GUEST_INTERRUPTS: - description: | - Number of supported virtualized guest interrupts - - Corresponds to the `GEILEN` parameter in the RVI specs - schema: - RV32: - type: integer - minimum: 1 - maximum: 63 - RV64: - type: integer - minimum: 1 - maximum: 31 - VS_MODE_ENDIANNESS: - description: | - Endianness of data in VS-mode. Can be one of: - - * little: VS-mode data is always little endian - * big: VS-mode data is always big endian - * dynamic: VS-mode data can be either little or big endian, - depending on the CSR field `hstatus.VSBE` - schema: - type: string - enum: [little, big, dynamic] - VU_MODE_ENDIANNESS: - description: | - Endianness of data in VU-mode. Can be one of: - - * little: VU-mode data is always little endian - * big: VU-mode data is always big endian - * dynamic: VU-mode data can be either little or big endian, - depending on the CSR field `vsstatus.UBE` - schema: - type: string - enum: [little, big, dynamic] - VUXLEN: - description: | - Set of XLENs supported in VU-mode. When both 32 and 64 are supported, VUXLEN can be changed - via `vsstatus.UXL`. - schema: - type: array - items: - enum: [32, 64] - minItems: 1 - maxItems: 2 - uniqueItems: true - restrictions: - constraint(): | - !$ary_includes?(VSXLEN, 64) -> !$ary_includes?(VUXLEN, 64) - reason: | - XLEN in VU-mode can never be larger than XLEN in VS-mode - (and, transitively, cannot be larger than XLEN in S-mode or M-mode). - VSXLEN: - description: | - Set of XLENs supported in VS-mode. Can be one of: - - * 32: VSXLEN is always 32 - * 64: VSXLEN is always 64 - * 3264: VSXLEN can be changed (via `hstatus.VSXL`) between 32 and 64 - schema: - type: array - items: - enum: [32, 64] - minItems: 1 - maxItems: 2 - uniqueItems: true - restrictions: - constraint(): | - !$ary_includes?(SXLEN, 64) -> !$ary_includes?(VSXLEN, 64) - reason: | - XLEN in VS-mode can never be larger than XLEN in S-mode - (and, transitively, cannot be larger than XLEN in M-mode). - REPORT_VA_IN_VSTVAL_ON_BREAKPOINT: - description: | - When true, `vstval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`). - - When false, `vstval` is written with 0 on an EBREAK instruction. - - Regardless, `vstval` is always written with a virtual PC when an external breakpoint is generated. - schema: - type: boolean - REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED: - description: | - When true, `vstval` is written with the virtual address of a load instruction when the - address is misaligned and MISALIGNED_LDST is false. - - When false, `vstval` is written with 0 when a load address is misaligned and - MISALIGNED_LDST is false. - schema: - type: boolean - REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED: - description: | - When true, `vstval` is written with the virtual address of a store instruction when the - address is misaligned and MISALIGNED_LDST is false. - - When false, `vstval` is written with 0 when a store address is misaligned and - MISALIGNED_LDST is false. - schema: - type: boolean - REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_MISALIGNED: - description: | - When true, `vstval` is written with the virtual PC when an instruction fetch is misaligned. - - When false, `vstval` is written with 0 when an instruction fetch is misaligned. - - Note that when IALIGN=16 (i.e., when the `C` or one of the `Zc*` extensions are implemented), - it is impossible to generate a misaligned fetch, and so this parameter has no effect. - schema: - type: boolean - REPORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT: - description: | - When true, `vstval` is written with the virtual address of a load when it causes a - `LoadAccessFault`. - - WHen false, `vstval` is written with 0 when a load causes a `LoadAccessFault`. - schema: - type: boolean - REPORT_VA_IN_VSTVAL_ON_STORE_AMO_ACCESS_FAULT: - description: | - When true, `vstval` is written with the virtual address of a store when it causes a - `StoreAmoAccessFault`. - - WHen false, `vstval` is written with 0 when a store causes a `StoreAmoAccessFault`. - schema: - type: boolean - REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_ACCESS_FAULT: - description: | - When true, `vstval` is written with the virtual PC of an instructino when fetch causes an - `InstructionAccessFault`. - - WHen false, `vstval` is written with 0 when an instruction fetch causes an - `InstructionAccessFault`. - schema: - type: boolean - REPORT_VA_IN_VSTVAL_ON_LOAD_PAGE_FAULT: - description: | - When true, `vstval` is written with the virtual address of a load when it causes a - `LoadPageFault`. - - WHen false, `vstval` is written with 0 when a load causes a `LoadPageFault`. - schema: - type: boolean - REPORT_VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT: - description: | - When true, `vstval` is written with the virtual address of a store when it causes a - `StoreAmoPageFault`. - - WHen false, `vstval` is written with 0 when a store causes a `StoreAmoPageFault`. - schema: - type: boolean - REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT: - description: | - When true, `vstval` is written with the virtual PC of an instructino when fetch causes an - `InstructionPageFault`. - - WHen false, `vstval` is written with 0 when an instruction fetch causes an - `InstructionPageFault`. - schema: - type: boolean - REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION: - description: | - When true, `vstval` is written with the encoding of an instruction that causes an - `IllegalInstruction` exception. - - When false `vstval` is written with 0 when an `IllegalInstruction` exception occurs. - schema: - type: boolean - REPORT_GPA_IN_HTVAL_ON_GUEST_PAGE_FAULT: - description: | - When true, `htval` is written with the Guest Physical Address, shifted right by 2, that - caused a `GuestPageFault` exception. - - When false, `htval` is written with 0 when a `GuestPageFault` exception occurs. - schema: - type: boolean - HCOUNTENABLE_EN: - description: | - Indicates which counters can delegated via `hcounteren` - - An unimplemented counter cannot be specified, i.e., if - HPM_COUNTER_EN[3] is false, it would be illegal to set - HCOUNTENABLE_EN[3] to true. - - HCOUNTENABLE_EN[0:2] must all be false if `Zicntr` is not implemented. - HCOUNTENABLE_EN[3:31] must all be false if `Zihpm` is not implemented. - schema: - type: array - items: - type: boolean - maxItems: 32 - minItems: 32 - IGNORE_INVALID_VSATP_MODE_WRITES_WHEN_V_EQ_ZERO: - description: | - Whether writes from M-mode, U-mode, or S-mode to vsatp with an illegal mode setting are - ignored (as they are with satp), or if they are treated as WARL, leading to undpredictable - behavior. - schema: - type: boolean - GSTAGE_MODE_BARE: - description: | - Whether or not writing mode=Bare is supported in the `hgatp` register. - schema: - type: boolean - - SV39_VSMODE_TRANSLATION: - description: | - Whether or not Sv39 translation is supported in first-stage (VS-stage) - translation. - schema: - type: boolean - restrictions: - constraint(): | - !$ary_includes?(VSXLEN, 64) -> !SV39_VSMODE_TRANSLATION; - reason: - Sv39 in VS-mode is only valid if VS-mode can get into RV64 mode - - SV48_VSMODE_TRANSLATION: - description: | - Whether or not Sv48 translation is supported in first-stage (VS-stage) - translation. - schema: - type: boolean - restrictions: - constraint(): | - !$ary_includes?(VSXLEN, 64) -> !SV48_VSMODE_TRANSLATION; - reason: - Sv48 in VS-mode is only valid if VS-mode can get into RV64 mode - - SV57_VSMODE_TRANSLATION: - description: | - Whether or not Sv57 translation is supported in first-stage (VS-stage) - translation. - schema: - type: boolean - restrictions: - constraint(): | - !$ary_includes?(VSXLEN, 64) -> !SV57_VSMODE_TRANSLATION; - reason: - Sv57 in VS-mode is only valid if VS-mode can get into RV64 mode - - SV39X4_TRANSLATION: - description: | - Whether or not Sv39x4 translation mode is supported. - schema: - type: boolean - restrictions: - constraint(): | - !$ary_includes?(SXLEN, 64) -> !SV39X4_VSMODE_TRANSLATION; - reason: - Sv39x4 is only valid if S-mode can get into RV64 mode - - SV48X4_TRANSLATION: - description: | - Whether or not Sv48x4 translation mode is supported. - schema: - type: boolean - restrictions: - constraint(): | - !$ary_includes?(SXLEN, 64) -> !SV48X4_VSMODE_TRANSLATION; - reason: - Sv48x4 is only valid if S-mode can get into RV64 mode - - SV57X4_TRANSLATION: - description: | - Whether or not Sv57x4 translation mode is supported. - schema: - type: boolean - restrictions: - constraint(): | - !$ary_includes?(SXLEN, 64) -> !SV57X4_VSMODE_TRANSLATION; - reason: - Sv48x4 is only valid if S-mode can get into RV64 mode - - VMID_WIDTH: - description: | - Number of bits supported in `hgatp.VMID` (i.e., the supported width of a virtual machine ID). - schema: - RV32: - type: integer - minimum: 0 - maximum: 7 - RV64: - type: integer - minimum: 0 - maximum: 14 - REPORT_GPA_IN_TVAL_ON_LOAD_GUEST_PAGE_FAULT: - description: | - Whether or not GPA >> 2 is written into htval/mtval2 when a load guest page fault occurs. - - If false, 0 will be written into htval/mtval2 on a load guest page fault. - schema: - type: boolean - REPORT_GPA_IN_TVAL_ON_STORE_AMO_GUEST_PAGE_FAULT: - description: | - Whether or not GPA >> 2 is written into htval/mtval2 when a store/amo guest page fault occurs. - - If false, 0 will be written into htval/mtval2 on a store/amo guest page fault. - schema: - type: boolean - REPORT_GPA_IN_TVAL_ON_INSTRUCTION_GUEST_PAGE_FAULT: - description: | - Whether or not GPA >> 2 is written into htval/mtval2 when an instruction guest page fault occurs. - - If false, 0 will be written into htval/mtval2 on an instruction guest page fault. - schema: - type: boolean - REPORT_GPA_IN_TVAL_ON_INTERMEDIATE_GUEST_PAGE_FAULT: - description: | - Whether or not GPA >> 2 is written into htval/mtval2 when a guest page fault occurs while - walking a VS-mode page table. - - If false, 0 will be written into htval/mtval2 on an intermediate guest page fault. - schema: - type: boolean - TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT: - description: | - Value to write into htval/mtval2 when there is a guest page fault on a final translation. - - Possible values: - * "always zero": Always write the value zero - * "always pseudoinstruction": Always write the pseudoinstruction - * "always transformed standard instruction": Always write the transformation of the standard instruction encoding - * "custom": A custom value, which will cause an UNPREDICTABLE event. - schema: - type: string - enum: - - "always zero" - - "always pseudoinstruction" - - "always transformed standard instruction" - - "custom" - TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT: - description: | - Value to write into htval/mtval2 when there is a guest page fault on a final translation. - - Possible values: - * "always zero": Always write the value zero - * "always pseudoinstruction": Always write the pseudoinstruction - * "always transformed standard instruction": Always write the transformation of the standard instruction encoding - * "custom": A custom value, which will cause an UNPREDICTABLE event. - schema: - type: string - enum: - - "always zero" - - "always pseudoinstruction" - - "always transformed standard instruction" - - "custom" - TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT: - description: | - Value to write into htval/mtval2 when there is a guest page fault on a final translation. - - Possible values: - * "always zero": Always write the value zero - * "always pseudoinstruction": Always write the pseudoinstruction - schema: - type: string - enum: - - "always zero" - - "always pseudoinstruction" - TINST_VALUE_ON_INSTRUCTION_ADDRESS_MISALIGNED: - description: | - Value written into htinst/mtinst when there is an instruction address misaligned exception. - - Possible values: - * "always zero": Always write the value zero - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: - - "always zero" - - "custom" - TINST_VALUE_ON_BREAKPOINT: - description: | - Value written into htinst/mtinst on a Breakpoint exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "custom"] - TINST_VALUE_ON_VIRTUAL_INSTRUCTION: - description: | - Value written into htinst/mtinst on a VirtualInstruction exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "custom"] - TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED: - description: | - Value written into htinst/mtinst on a VirtualInstruction exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "always transformed standard instruction": Always write a transformed standard instruction as defined by H - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "always transformed standard instruction", "custom"] - TINST_VALUE_ON_LOAD_ACCESS_FAULT: - description: | - Value written into htinst/mtinst on an AccessFault exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "always transformed standard instruction": Always write a transformed standard instruction as defined by H - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "always transformed standard instruction", "custom"] - TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED: - description: | - Value written into htinst/mtinst on a VirtualInstruction exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "always transformed standard instruction": Always write a transformed standard instruction as defined by H - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "always transformed standard instruction", "custom"] - TINST_VALUE_ON_STORE_AMO_ACCESS_FAULT: - description: | - Value written into htinst/mtinst on an AccessFault exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "always transformed standard instruction": Always write a transformed standard instruction as defined by H - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "always transformed standard instruction", "custom"] - TINST_VALUE_ON_UCALL: - description: | - Value written into htinst/mtinst on a UCall exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "custom"] - TINST_VALUE_ON_SCALL: - description: | - Value written into htinst/mtinst on a SCall exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "custom"] - TINST_VALUE_ON_MCALL: - description: | - Value written into htinst/mtinst on a MCall exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "custom"] - TINST_VALUE_ON_VSCALL: - description: | - Value written into htinst/mtinst on a VSCall exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "custom"] - TINST_VALUE_ON_LOAD_PAGE_FAULT: - description: | - Value written into htinst/mtinst on a LoadPageFault exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "always transformed standard instruction": Always write a transformed standard instruction as defined by H - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "always transformed standard instruction", "custom"] - TINST_VALUE_ON_STORE_AMO_PAGE_FAULT: - description: | - Value written into htinst/mtinst on a StoreAmoPageFault exception from VU/VS-mode. - - Possible values: - * "always zero": Always write the value zero - * "always transformed standard instruction": Always write a transformed standard instruction as defined by H - * "custom": Write a custom value, which results in UNPREDICTABLE - schema: - type: string - enum: ["always zero", "always transformed standard instruction", "custom"] - TRAP_ON_ECALL_FROM_VS: - description: | - Whether or not an ECALL-from-VS-mode causes a synchronous exception. - - The spec states that implementations may handle ECALLs transparently - without raising a trap, in which case the EEI must provide a builtin. - schema: - type: boolean - default: true - VSTVEC_MODE_DIRECT: - description: | - Whether or not `vstvec.MODE` supports Direct (0). - schema: - type: boolean - restrictions: - constraint(): | - !VSTVEC_MODE_VECTORED -> VSTVEC_MODE_DIRECT; - reason: At least one vstvec mode must be supported - VSTVEC_MODE_VECTORED: - description: | - Whether or not `stvec.MODE` supports Vectored (1). - schema: - type: boolean - restrictions: - constraint(): | - !VSTVEC_MODE_DIRECT -> VSTVEC_MODE_VECTORED; - reason: At least one vstvec mode must be supported diff --git a/spec/std/isa/ext/M.yaml b/spec/std/isa/ext/M.yaml index 2791f4a46..6b4400a95 100644 --- a/spec/std/isa/ext/M.yaml +++ b/spec/std/isa/ext/M.yaml @@ -24,9 +24,3 @@ description: | divide operations are either infrequent or better handled in attached accelerators. ==== -params: - MUTABLE_MISA_M: - description: | - Indicates whether or not the `M` extension can be disabled with the `misa.M` bit. - schema: - type: boolean diff --git a/spec/std/isa/ext/Q.yaml b/spec/std/isa/ext/Q.yaml index df0ab728c..36b6ab450 100644 --- a/spec/std/isa/ext/Q.yaml +++ b/spec/std/isa/ext/Q.yaml @@ -23,9 +23,3 @@ versions: requires: extension: name: D -params: - MUTABLE_MISA_Q: - description: | - Indicates whether or not the `Q` extension can be disabled with the `misa.Q` bit. - schema: - type: boolean diff --git a/spec/std/isa/ext/S.yaml b/spec/std/isa/ext/S.yaml index af07f3415..fca7c5ae8 100644 --- a/spec/std/isa/ext/S.yaml +++ b/spec/std/isa/ext/S.yaml @@ -47,405 +47,3 @@ description: | interface (SBI). Other systems supply these facilities directly, through some other implementation-defined mechanism. ==== -params: - MUTABLE_MISA_S: - description: | - Indicates whether or not the `S` extension can be disabled with the `misa.S` bit. - schema: - type: boolean - restrictions: - constraint(): | - MUTABLE_MISA_U -> MUTABLE_MISA_S; - reason: - If U-mode can be disabled, then S must also be disabled since S cannot exist - without U (and thus there is no option for MUTABLE_MISA_S). - - ASID_WIDTH: - description: | - Number of implemented ASID bits. Maximum is 16 for XLEN==64, and 9 for XLEN==32 - schema: - RV32: - type: integer - minimum: 0 - maximum: 9 - RV64: - type: integer - minimum: 0 - maximum: 16 - - S_MODE_ENDIANNESS: - description: | - Endianness of data in S-mode. Can be one of: - - * little: S-mode data is always little endian - * big: S-mode data is always big endian - * dynamic: S-mode data can be either little or big endian, - depending on the CSR field `mstatus.SBE` - schema: - type: string - enum: [little, big, dynamic] - - SXLEN: - description: | - Set of XLENs supported in S-mode. Can be one of: - - * 32: SXLEN is always 32 - * 64: SXLEN is always 64 - * 3264: SXLEN can be changed (via mstatus.SXL) between 32 and 64 - schema: - type: array - items: - enum: [32, 64] - minItems: 1 - maxItems: 2 - uniqueItems: true - restrictions: - constraint(): | - !$ary_includes?(MXLEN, 64) -> !$ary_includes?(SXLEN, 64); - reason: | - XLEN in S-mode can never be larger than XLEN in M-mode - - REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT: - description: | - When true, `mtval` is written with the virtual address of a load when it causes a - `LoadPageFault`. - - WHen false, `mtval` is written with 0 when a load causes a `LoadPageFault`. - schema: - type: boolean - - REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT: - description: | - When true, `mtval` is written with the virtual address of a store when it causes a - `StoreAmoPageFault`. - - WHen false, `mtval` is written with 0 when a store causes a `StoreAmoPageFault`. - schema: - type: boolean - - REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT: - description: | - When true, `mtval` is written with the virtual PC of an instructino when fetch causes an - `InstructionPageFault`. - - WHen false, `mtval` is written with 0 when an instruction fetch causes an - `InstructionPageFault`. - schema: - type: boolean - - REPORT_VA_IN_STVAL_ON_BREAKPOINT: - description: | - When true, `stval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`). - - When false, `stval` is written with 0 on an EBREAK instruction. - - Regardless, `stval` is always written with a virtual PC when an external breakpoint is generated - schema: - type: boolean - - REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED: - description: | - When true, `stval` is written with the virtual address of a load instruction when the - address is misaligned and MISALIGNED_LDST is false. - - When false, `stval` is written with 0 when a load address is misaligned and - MISALIGNED_LDST is false. - schema: - type: boolean - - REPORT_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED: - description: | - When true, `stval` is written with the virtual address of a store instruction when the - address is misaligned and MISALIGNED_LDST is false. - - When false, `stval` is written with 0 when a store address is misaligned and - MISALIGNED_LDST is false. - schema: - type: boolean - - REPORT_VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED: - description: | - When true, `stval` is written with the virtual PC when an instruction fetch is misaligned. - - When false, `stval` is written with 0 when an instruction fetch is misaligned. - - Note that when IALIGN=16 (i.e., when the `C` or one of the `Zc*` extensions are implemented), - it is impossible to generate a misaligned fetch, and so this parameter has no effect. - schema: - type: boolean - - REPORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT: - description: | - When true, `stval` is written with the virtual address of a load when it causes a - `LoadAccessFault`. - - WHen false, `stval` is written with 0 when a load causes a `LoadAccessFault`. - schema: - type: boolean - - REPORT_VA_IN_STVAL_ON_STORE_AMO_ACCESS_FAULT: - description: | - When true, `stval` is written with the virtual address of a store when it causes a - `StoreAmoAccessFault`. - - WHen false, `stval` is written with 0 when a store causes a `StoreAmoAccessFault`. - schema: - type: boolean - - REPORT_VA_IN_STVAL_ON_INSTRUCTION_ACCESS_FAULT: - description: | - When true, `stval` is written with the virtual PC of an instructino when fetch causes an - `InstructionAccessFault`. - - WHen false, `stval` is written with 0 when an instruction fetch causes an - `InstructionAccessFault`. - schema: - type: boolean - - REPORT_VA_IN_STVAL_ON_LOAD_PAGE_FAULT: - description: | - When true, `stval` is written with the virtual address of a load when it causes a - `LoadPageFault`. - - WHen false, `stval` is written with 0 when a load causes a `LoadPageFault`. - schema: - type: boolean - - REPORT_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT: - description: | - When true, `stval` is written with the virtual address of a store when it causes a - `StoreAmoPageFault`. - - WHen false, `stval` is written with 0 when a store causes a `StoreAmoPageFault`. - schema: - type: boolean - - REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT: - description: | - When true, `stval` is written with the virtual PC of an instructino when fetch causes an - `InstructionPageFault`. - - WHen false, `stval` is written with 0 when an instruction fetch causes an - `InstructionPageFault`. - schema: - type: boolean - - REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION: - description: | - When true, `stval` is written with the encoding of an instruction that causes an - `IllegalInstruction` exception. - - When false `stval` is written with 0 when an `IllegalInstruction` exception occurs. - schema: - type: boolean - - STVAL_WIDTH: - description: | - The number of implemented bits in `stval`. - - Must be greater than or equal to _max_(`PHYS_ADDR_WIDTH`, `VA_SIZE`) - schema: - type: integer - maximum: 0xffffffffffffffff - - SCOUNTENABLE_EN: - description: | - Indicates which counters can delegated via `scounteren` - - An unimplemented counter cannot be specified, i.e., if - HPM_COUNTER_EN[3] is false, it would be illegal to set - SCOUNTENABLE_EN[3] to true. - - SCOUNTENABLE_EN[0:2] must all be false if `Zicntr` is not implemented. - SCOUNTENABLE_EN[3:31] must all be false if `Zihpm` is not implemented. - definedBy: - extension: - anyOf: - - name: Zicntr - - name: Zihpm - schema: - type: array - items: - type: boolean - maxItems: 32 - minItems: 32 - restrictions: - allOf: - - constraint(): | - for (U32 i = 0; i < 3; i++) { - !implemented?(ExtensionName::Zicntr) -> !SCOUNTENABLE_EN[i]; - } - reason: - Counters 0-2 are defined by Zicntr - - constraint(): | - for (U32 i = 3; i < 32; i++) { - !implemented?(ExtensionName::Zihpm) -> !SCOUNTENABLE_EN[i]; - } - reason: - Counters 3..31 are defined by Zihpm - - constraint(): | - for (U32 i = 3; i < 32; i++) { - !HPM_COUNTER_EN -> !SCOUNTENABLE_EN[i]; - } - reason: - When mhpmcounter[i] does not exist, it cannot be enabled. - - STVEC_MODE_DIRECT: - description: | - Whether or not `stvec.MODE` supports Direct (0). - schema: - type: boolean - restrictions: - constraint(): | - !STVEC_MODE_VECTORED -> STVEC_MODE_DIRECT; - reason: - stvec must support at least one mode - - STVEC_MODE_VECTORED: - description: | - Whether or not `stvec.MODE` supports Vectored (1). - schema: - type: boolean - restrictions: - constraint(): | - !STVEC_MODE_DIRECT -> STVEC_MODE_VECTORED; - reason: - stvec must support at least one mode - - SATP_MODE_BARE: - description: | - Whether or not satp.MODE == Bare is supported. - schema: - type: boolean - - TRAP_ON_ECALL_FROM_S: - description: | - Whether or not an ECALL-from-S-mode causes a synchronous exception. - - The spec states that implementations may handle ECALLs transparently - without raising a trap, in which case the EEI must provide a builtin. - schema: - type: boolean - default: true - - TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY: - description: | - For implementations that make `satp`.MODE read-only zero - (always Bare, _i.e._, no virtual translation is implemented), - attempts to execute an SFENCE.VMA instruction might raise an - illegal-instruction exception. - - TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY indicates whether - or not that exception occurs. - - TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY has no effect when - some virtual translation mode is supported. - schema: - type: boolean - - definedBy: - extension: - # Parameter only applies when the only supported translation mode is Bare - noneOf: - - name: Sv32 - - name: Sv39 - - name: Sv48 - - name: Sv57 - - MSTATUS_VS_WRITABLE: - description: | - When `S` is enabled but `V` is not, mstatus.VS is optionally writable. - schema: - type: boolean - restrictions: - constraint(): | - implemented?(ExtensionName::V) -> MSTATUS_VS_WRITABLE; - reason: - mstatus.VS must be writeable if V is present - - MSTATUS_FS_LEGAL_VALUES: - description: | - The set of values that mstatus.FS supports. - schema: - type: array - items: - type: integer - enum: [0, 1, 2, 3] - maxItems: 4 - minItems: 1 - uniqueItems: true - restrictions: - constraint(): | - implemented?(ExtensionName::F) && HW_MSTATUS_FS_DIRTY_UPDATE == "never" - -> $ary_includes?(MSTATUS_FS_LEGAL_VALUES, 3); - reason: - If there is a hardware update to mstatus.FS, then the Dirty state must be supported - also_defined_in: S - - MSTATUS_VS_LEGAL_VALUES: - description: | - The set of values that mstatus.VS will accept from a software write. - schema: - type: array - items: - type: integer - enum: [0, 1, 2, 3] - minItems: 1 - maxItems: 4 - uniqueItems: true - restrictions: - constraint(): | - implemented?(ExtensionName::V) && HW_MSTATUS_VS_DIRTY_UPDATE == "never" - -> $ary_includes?(MSTATUS_VS_LEGAL_VALUES, 3); - reason: - If there is a hardware update to mstatus.VS, then the Dirty state must be supported - also_defined_in: V - MSTATUS_TVM_IMPLEMENTED: - description: | - Whether or not mstatus.TVM is implemented. - - When not implemented mstatus.TVM will be read-only-zero. - schema: - type: boolean - MSTATEEN_ENVCFG_TYPE: - definedBy: - extension: - name: Smstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - description: | - Behavior of the mstateen0.ENVCFG bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - HSTATEEN_ENVCFG_TYPE: - definedBy: - allOf: - - extension: - name: H - version: ~> 1.0 - - extension: - name: Ssstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - restrictions: - allOf: - - constraint(): | - MSTATEEN_ENVCFG_TYPE == "read-only-0" -> HSTATEEN_ENVCFG_TYPE == "read-only-0"; - reason: - When mstateen0.ENVCFG is read-only-0, hstateen0.ENVCFG must also be read-only-0 - - constraint(): | - MSTATEEN_ENVCFG_TYPE == "read-only-1" -> HSTATEEN_ENVCFG_TYPE == "read-only-1"; - reason: - When mstateen1.ENVCFG is read-only-1, hstateen0.ENVCFG must also be read-only-1 - description: | - Behavior of the hstateen0.ENVCFG bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 diff --git a/spec/std/isa/ext/Sdtrig.yaml b/spec/std/isa/ext/Sdtrig.yaml index 059ccf97d..291d3b923 100644 --- a/spec/std/isa/ext/Sdtrig.yaml +++ b/spec/std/isa/ext/Sdtrig.yaml @@ -31,47 +31,3 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - -params: - MSTATEEN_CONTEXT_TYPE: - definedBy: - extension: - name: Smstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - description: | - Behavior of the mstateen0.CONTEXT bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - HSTATEEN_CONTEXT_TYPE: - definedBy: - allOf: - - extension: - name: H - version: ~> 1.0 - - extension: - name: Ssstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - description: | - Behavior of the hstateen0.CONTEXT bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - restrictions: - allOf: - - constraint(): | - MSTATEEN_CONTEXT_TYPE == "read-only-0" -> HSTATEEN_CONTEXT_TYPE == "read-only-0"; - reason: - When mstateen0.CONTEXT is read-only-0, hstateen0.CONTEXT must also be read-only-0 - - constraint(): | - MSTATEEN_CONTEXT_TYPE == "read-only-1" -> HSTATEEN_CONTEXT_TYPE == "read-only-1"; - reason: - When mstateen0.CONTEXT is read-only-1, hstateen0.CONTEXT must also be read-only-1 diff --git a/spec/std/isa/ext/Sm.yaml b/spec/std/isa/ext/Sm.yaml index 432ed7979..1dc49e08b 100644 --- a/spec/std/isa/ext/Sm.yaml +++ b/spec/std/isa/ext/Sm.yaml @@ -170,319 +170,3 @@ exception_codes: var: SoftwareCheck when: version: ">= 1.13.0" -params: - MXLEN: - description: | - XLEN in M-mode - schema: - type: integer - enum: [32, 64] - PRECISE_SYNCHRONOUS_EXCEPTIONS: - description: | - Whether or not all synchronous exceptions are precise. - - If false, any exception not otherwise mandated to precise (e.g., PMP violation) - will cause execution to enter an unpredictable state. - schema: - type: boolean - default: true - TRAP_ON_ECALL_FROM_M: - description: | - Whether or not an ECALL-from-M-mode causes a synchronous exception. - - The spec states that implementations may handle ECALLs transparently - without raising a trap, in which case the EEI must provide a builtin. - schema: - type: boolean - default: true - TRAP_ON_EBREAK: - description: | - Whether or not an EBREAK causes a synchronous exception. - - The spec states that implementations may handle EBREAKs transparently - without raising a trap, in which case the EEI must provide a builtin. - schema: - type: boolean - default: true - ARCH_ID: - description: | - Vendor-specific architecture ID in `marchid` - schema: - type: integer - minimum: 0 - maximum: 0xffffffffffffffff - IMP_ID: - description: | - Vendor-specific implementation ID in `mimpid` - schema: - type: integer - minimum: 0 - maximum: 0xffffffffffffffff - VENDOR_ID_BANK: - description: | - JEDEC Vendor ID bank, for `mvendorid` - schema: - type: integer - minimum: 0 - maximum: 33554431 - VENDOR_ID_OFFSET: - description: | - Vendor JEDEC code offset, for `mvendorid` - schema: - type: integer - minimum: 0 - maximum: 127 - MISALIGNED_LDST: - description: | - Does the implementation perform non-atomic misaligned loads and stores to main memory - (does *not* affect misaligned support to device memory)? - If not, the implementation always throws a misaligned exception. - schema: - type: boolean - MISALIGNED_LDST_EXCEPTION_PRIORITY: - description: | - The relative priority of a load/store/AMO exception vs. load/store/AMO page-fault - or access-fault exceptions. - - May be one of: - - [separator="!"] - !=== - ! low ! Misaligned load/store/AMO exceptions are always lower priority than load/store/AMO page-fault and access-fault exceptions. - ! high ! Misaligned load/store/AMO exceptions are always higher priority than load/store/AMO page-fault and access-fault exceptions. - !=== - - MISALIGNED_LDST_EXCEPTION_PRIORITY cannot be "high" when MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE - is non-zero, since the atomicity of an access cannot be determined in that case until after - address translation. - schema: - type: string - enum: ["low", "high"] - restrictions: - constraint(): | - MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE > 1 -> MISALIGNED_LDST_EXCEPTION_PRIORITY == "low"; - reason: - MISALIGNED_LDST_EXCEPTION_PRIORITY cannot be "high" when MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE - is non-zero, since the atomicity of an access cannot be determined in that case until after - address translation. - MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE: - description: | - The maximum granule size, in bytes, that the hart can atomically perform a - misaligned load/store/AMO without raising a Misaligned exception. When MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE is 0, the hart - cannot atomically perform a misaligned load/store/AMO. When a power of two, the hart can - atomically load/store/AMO a misaligned access that is fully contained in a - MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE-aligned region. - - [NOTE] - Even if the hart is capable of performing a misaligned load/store/AMO atomically, - a misaligned exception may still occur if the access does not have the appropriate - Misaligned Atomicity Granule PMA set. - schema: - type: integer - # can't be larger than a page, since there is no way to reconcile that with virtual memory - enum: [0, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096] - MISALIGNED_SPLIT_STRATEGY: - description: | - When misaligned accesses are supported, this determines the *order* in the implementation appears - to process the load/store, which determines how/which exceptions will be reported - - Options: - - * by_byte: The load/store appears to be broken into byte-sized accesses that processed sequentially from smallest address to largest address - * custom: Something else. Will result in a call to unpredictable() in the execution - schema: - type: string - enum: ["by_byte", "custom"] - TRAP_ON_ILLEGAL_WLRL: - description: | - When true, writing an illegal value to a WLRL CSR field raises an `IllegalInstruction` exception. - - When false, writing an illegal value to a WLRL CSR field is `unpredictable`. - schema: - type: boolean - TRAP_ON_UNIMPLEMENTED_INSTRUCTION: - description: | - When true, fetching an unimplemented instruction from the custom encoding space will cause - an `IllegalInstruction` exception. - - When false, fetching an unimplemented instruction is `UNPREDICTABLE`. - schema: - type: boolean - TRAP_ON_RESERVED_INSTRUCTION: - description: | - When true, fetching an unimplemented and/or undefined instruction from the standard/reserved - encoding space will cause an `IllegalInstruction` exception. - - When false, fetching such an instruction is `UNPREDICTABLE`. - schema: - type: boolean - TRAP_ON_UNIMPLEMENTED_CSR: - description: | - When true, accessing an unimplemented CSR (via a `Zicsr` instruction) will cause an `IllegalInstruction` exception. - - When false, accessing an unimplemented CSR (via a `Zicsr` instruction) is `unpredictable`. - schema: - type: boolean - REPORT_VA_IN_MTVAL_ON_BREAKPOINT: - description: | - When true, `mtval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`). - - When false, `mtval` is written with 0 on an EBREAK instruction. - - Regardless, `mtval` is always written with a virtual PC when an external breakpoint is generated - schema: - type: boolean - REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED: - description: | - When true, `mtval` is written with the virtual address of a load instruction when the - address is misaligned and MISALIGNED_LDST is false. - - When false, `mtval` is written with 0 when a load address is misaligned and - MISALIGNED_LDST is false. - schema: - type: boolean - REPORT_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED: - description: | - When true, `mtval` is written with the virtual address of a store instruction when the - address is misaligned and MISALIGNED_LDST is false. - - When false, `mtval` is written with 0 when a store address is misaligned and - MISALIGNED_LDST is false. - schema: - type: boolean - REPORT_VA_IN_MTVAL_ON_INSTRUCTION_MISALIGNED: - description: | - When true, `mtval` is written with the virtual PC when an instruction fetch is misaligned. - - When false, `mtval` is written with 0 when an instruction fetch is misaligned. - - Note that when IALIGN=16 (i.e., when the `C` or one of the `Zc*` extensions are implemented), - it is impossible to generate a misaligned fetch, and so this parameter has no effect. - schema: - type: boolean - REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT: - description: | - When true, `mtval` is written with the virtual address of a load when it causes a - `LoadAccessFault`. - - WHen false, `mtval` is written with 0 when a load causes a `LoadAccessFault`. - schema: - type: boolean - REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT: - description: | - When true, `mtval` is written with the virtual address of a store when it causes a - `StoreAmoAccessFault`. - - WHen false, `mtval` is written with 0 when a store causes a `StoreAmoAccessFault`. - schema: - type: boolean - REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT: - description: | - When true, `mtval` is written with the virtual PC of an instructino when fetch causes an - `InstructionAccessFault`. - - WHen false, `mtval` is written with 0 when an instruction fetch causes an - `InstructionAccessFault`. - schema: - type: boolean - REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION: - description: | - When true, `mtval` is written with the encoding of an instruction that causes an - `IllegalInstruction` exception. - - When false `mtval` is written with 0 when an `IllegalInstruction` exception occurs. - schema: - type: boolean - MTVAL_WIDTH: - description: | - The number of implemented bits in the `mtval` CSR. - This is the CSR that may be written when a trap is taken into M-mode with exception-specific information to - assist software in handling the trap (e.g., address associated with exception). - - Must be greater than or equal to _max_(`PHYS_ADDR_WIDTH`, `VA_SIZE`) - schema: - type: integer - maximum: 64 - CONFIG_PTR_ADDRESS: - description: | - Physical address of the unified discovery configuration data structure. - This address is reported in the `mconfigptr` CSR. - schema: - type: integer - minimum: 0 - maximum: 0xFFFFFFFFFFFFFFFF - definedBy: - extension: - name: Sm - version: ">= 1.12.0" - PMA_GRANULARITY: - description: | - log2 of the smallest supported PMA region. - - Generally, for systems with an MMU, should not be smaller than 12, - as that would preclude caching PMP results in the TLB along with - virtual memory translations - schema: - type: integer - minimum: 2 - maximum: 66 - PHYS_ADDR_WIDTH: - description: | - Number of bits in the physical address space. - schema: - type: integer - minimum: 1 - maximum: 64 - M_MODE_ENDIANNESS: - description: | - Endianness of data in M-mode. Can be one of: - - [separator="!"] - !=== - h! little ! M-mode data is always little endian - h! big ! M-mode data is always big endian - h! dynamic ! M-mode data can be either little or big endian, - depending on the CSR field `mstatus.MBE` - !=== - schema: - type: string - enum: [little, big, dynamic] - # TODO: Only little available in Sm 1.11 - MISA_CSR_IMPLEMENTED: - description: | - Whether or not the `misa` CSR returns zero or a non-zero value. - - Possible values: - - true:: - The `misa` CSR returns a non-zero value. - - false:: - The `misa` CSR is read-only-0. - schema: - type: boolean - MTVEC_MODES: - description: | - Modes supported by `mtvec.MODE`. If only one, it is assumed to be read-only with that value. - schema: - type: array - items: - type: integer - enum: [0, 1] - minItems: 1 - maxItems: 2 - uniqueItems: true - MTVEC_BASE_ALIGNMENT_DIRECT: - description: | - Byte alignment for `mtvec.BASE` when `mtvec.MODE` is Direct. - - Cannot be less than 4-byte alignment. - schema: - enum: [4, 8, 16, 32, 64] - MTVEC_BASE_ALIGNMENT_VECTORED: - description: | - Byte alignment for `mtvec.BASE` when `mtvec.MODE` is Vectored. - - Cannot be less than 4-byte alignment. - schema: - enum: [4, 8, 16, 32, 64] diff --git a/spec/std/isa/ext/Smhpm.yaml b/spec/std/isa/ext/Smhpm.yaml index fc4b5db13..d1d54f922 100644 --- a/spec/std/isa/ext/Smhpm.yaml +++ b/spec/std/isa/ext/Smhpm.yaml @@ -27,68 +27,3 @@ versions: - version: "1.13.0" state: frozen ratification_date: 2023-12 -params: - HPM_COUNTER_EN: - description: | - List of HPM counters that are enabled. - There is one entry for each hpmcounter. - - The first three entries *must* be false (as they correspond to CY, IR, TM in, _e.g._ `mhmpcountinhibit`) - Index 3 in HPM_COUNTER_EN corresponds to hpmcounter3. - Index 31 in HPM_COUNTER_EN corresponds to hpmcounter31. - schema: - type: array - items: - - const: false - - const: false - - const: false - additionalItems: - type: boolean - maxItems: 32 - minItems: 32 - HPM_EVENTS: - description: | - List of defined event numbers that can be written into hpmeventN - schema: - type: array - items: - type: integer - minimum: 0 - maximum: 0x03ffffffffffffff # bits 63-58 are used by `Sscofpmf` - COUNTINHIBIT_EN: - description: | - Indicates which hardware performance monitor counters can be disabled from `mcountinhibit`. - - An unimplemented counter cannot be specified, i.e., if HPM_COUNTER_EN[3] is false, - it would be illegal to set COUNTINHIBIT_EN[3] to true. - - COUNTINHIBIT_EN[1] can never be true, since it corresponds to `mcountinhibit.TM`, - which is always read-only-0. - - COUNTINHIBIT_EN[3:31] must all be false if `Zihpm` is not implemented. - schema: - type: array - items: - - type: boolean - - const: false - - type: boolean - additionalItems: - type: boolean - maxItems: 32 - minItems: 32 - MCOUNTENABLE_EN: - description: | - Indicates which counters can be delegated via `mcounteren`. - - An unimplemented counter cannot be specified, i.e., if - HPM_COUNTER_EN[3] is false, it would be illegal to set - MCOUNTENABLE_EN[3] to true. - - MCOUNTENABLE_EN[0:2] must all be false if `Zicntr` is not implemented. - MCOUNTENABLE_EN[3:31] must all be false if `Zihpm` is not implemented. - schema: - type: array - items: - type: boolean - maxItems: 32 - minItems: 32 diff --git a/spec/std/isa/ext/Smmpm.yaml b/spec/std/isa/ext/Smmpm.yaml index d8a5526c7..caf6f0ae4 100644 --- a/spec/std/isa/ext/Smmpm.yaml +++ b/spec/std/isa/ext/Smmpm.yaml @@ -14,11 +14,3 @@ versions: - version: "1.0.0" state: ratified ratification_date: null -params: - PMLEN: - description: | - The number of high-order bits of an address that are masked by the - pointer masking facility. - schema: - type: integer - also_defined_in: [Ssnpm, Smmpm] diff --git a/spec/std/isa/ext/Smnpm.yaml b/spec/std/isa/ext/Smnpm.yaml index 883b389a7..e74c1fddf 100644 --- a/spec/std/isa/ext/Smnpm.yaml +++ b/spec/std/isa/ext/Smnpm.yaml @@ -15,11 +15,3 @@ versions: - version: "1.0.0" state: ratified ratification_date: null -params: - PMLEN: - description: | - The number of high-order bits of an address that are masked by the - pointer masking facility. - schema: - type: integer - also_defined_in: [Ssnpm, Smmpm] diff --git a/spec/std/isa/ext/Smpmp.yaml b/spec/std/isa/ext/Smpmp.yaml index 5c168af13..fdc423e7f 100644 --- a/spec/std/isa/ext/Smpmp.yaml +++ b/spec/std/isa/ext/Smpmp.yaml @@ -40,49 +40,3 @@ description: | PMP has no visible ISA features (such as read-only-0 CSRs) if not present in an implementation. Making it an extension in the database prevents having the PMP CSRs show up in implementations that don't have a PMP. -- -params: - NUM_PMP_ENTRIES: - description: | - Number of implemented PMP entries. Can be any value between 0-64, inclusive. - - The architecture mandates that the number of implemented PMP registers - must appear to be 0, 16, or 64. - - Therefore, pmp registers will behave as follows according to NUN_PMP_ENTRIES: - - [separator="!"] - !=== - ! NUM_PMP_ENTRIES ! pmpaddr<0-15> / pmpcfg<0-3> ! pmpaddr<16-63> / pmpcfg<4-15> - ! 0 ! N ! N - ! 1-16 ! Y ! N - ! 17-64 ! Y ! Y - !=== - - ** N = Not implemented; access will cause `IllegalInstruction` - if TRAP_ON_UNIMPLEMENTED_CSR is true - ** Y = Implemented; access will not cause an exception (from M-mode), but register - may be read-only-zero if NUM_PMP_ENTRIES is less than the corresponding register - - [NOTE] - `pmpcfgN` for an odd N never exists when XLEN == 64 - - When NUM_PMP_ENTRIES is not exactly 0, 16, or 64, some extant pmp registers, - and associated pmpNcfg, will be read-only zero (but will never cause an exception). - schema: - type: integer - minimum: 0 - maximum: 64 - PMP_GRANULARITY: - description: | - log2 of the smallest supported PMP region. - - Generally, for systems with an MMU, should not be smaller than 12, - as that would preclude caching PMP results in the TLB along with - virtual memory translations - - Note that PMP_GRANULARITY is equal to G+2 (not G) as described in - the privileged architecture. - schema: - type: integer - minimum: 2 - maximum: 66 diff --git a/spec/std/isa/ext/Ssaia.yaml b/spec/std/isa/ext/Ssaia.yaml index ca24758d6..0beb4867c 100644 --- a/spec/std/isa/ext/Ssaia.yaml +++ b/spec/std/isa/ext/Ssaia.yaml @@ -18,88 +18,3 @@ versions: extension: name: S version: ">= 1.12" - -params: - MSTATEEN_AIA_TYPE: - definedBy: - extension: - name: Smstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - description: | - Behavior of the mstateen0.AIA bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - HSTATEEN_AIA_TYPE: - definedBy: - extension: - allOf: - - name: H - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - restrictions: - allOf: - - constraint(): | - MSTATEEN_AIA_TYPE == "read-only-0" -> HSTATEEN_AIA_TYPE == "read-only-0"; - reason: - HSTATEEN cannot have more options that MSTATEEN - - constraint(): | - MSTATEEN_AIA_TYPE == "read-only-1" -> HSTATEEN_AIA_TYPE == "read-only-1"; - reason: - HSTATEEN cannot have more options that MSTATEEN - description: | - Behavior of the hstateen0.AIA bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - MSTATEEN_IMSIC_TYPE: - definedBy: - extension: - name: Smstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - description: | - Behavior of the mstateen0.IMSIC bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - HSTATEEN_IMSIC_TYPE: - definedBy: - allOf: - - extension: - name: Ssaia - - extension: - name: H - - extension: - name: Ssstateen - schema: - type: string - enum: [rw, read-only-0, read-only-1] - restrictions: - allOf: - - constraint(): | - MSTATEEN_IMSIC_TYPE == "read-only-0" -> HSTATEEN_IMSIC_TYPE == "read-only-0"; - reason: - HSTATEEN cannot have more options that MSTATEEN - - constraint(): | - MSTATEEN_IMSIC_TYPE == "read-only-1" -> HSTATEEN_IMSIC_TYPE == "read-only-1"; - reason: - HSTATEEN cannot have more options that MSTATEEN - description: | - Behavior of the hstateen0.IMSIC bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 diff --git a/spec/std/isa/ext/Sscsrind.yaml b/spec/std/isa/ext/Sscsrind.yaml index 76a6214e6..324eab8fa 100644 --- a/spec/std/isa/ext/Sscsrind.yaml +++ b/spec/std/isa/ext/Sscsrind.yaml @@ -46,48 +46,3 @@ versions: version: ~> 1.13 - name: Smcsrind version: ~> 1.0 - -params: - MSTATEEN_CSRIND_TYPE: - definedBy: - allOf: - - extension: - name: Sscsrind - - extension: - name: Smstateen - schema: - type: string - enum: [rw, read-only-0, read-only-1] - description: | - Behavior of the mstateen0.CSRIND bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - HSTATEEN_CSRIND_TYPE: - definedBy: - extension: - allOf: - - name: H - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - description: | - Behavior of the hstateen0.CSRIND bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - restrictions: - allOf: - - constraint(): | - MSTATEEN_CSRIND_TYPE == "read-only-0" -> HSTATEEN_CSRIND_TYPE == "read-only-0" - reason: - HSTATEEN cannot have more options that MSTATEEN - - constraint(): | - MSTATEEN_CSRIND_TYPE == "read-only-1" -> HSTATEEN_CSRIND_TYPE == "read-only-1" - reason: - HSTATEEN cannot have more options that MSTATEEN diff --git a/spec/std/isa/ext/Ssnpm.yaml b/spec/std/isa/ext/Ssnpm.yaml index d42c99529..e2e760afa 100644 --- a/spec/std/isa/ext/Ssnpm.yaml +++ b/spec/std/isa/ext/Ssnpm.yaml @@ -15,11 +15,3 @@ versions: - version: "1.0.0" state: ratified ratification_date: null -params: - PMLEN: - description: | - The number of high-order bits of an address that are masked by the - pointer masking facility. - schema: - type: integer - also_defined_in: [Smnpm, Smmpm] diff --git a/spec/std/isa/ext/Ssqosid.yaml b/spec/std/isa/ext/Ssqosid.yaml index 8520542ce..db3cb1230 100644 --- a/spec/std/isa/ext/Ssqosid.yaml +++ b/spec/std/isa/ext/Ssqosid.yaml @@ -31,25 +31,6 @@ description: | which provides methods for setting resource usage limits and monitoring resource consumption. The RCID controls resource allocations, while the MCID is used for tracking resource usage. -params: - RCID_WIDTH: - description: | - Number of bits used for the Resource Control ID field (RCID). - Default is 12. - schema: - type: integer - minimum: 1 - maximum: 12 - - MCID_WIDTH: - description: | - Number of bits used for the Monitoring Counter ID field (MCID). - Default is 12. - schema: - type: integer - minimum: 1 - maximum: 12 - versions: - version: "1.0.0" state: ratified diff --git a/spec/std/isa/ext/U.yaml b/spec/std/isa/ext/U.yaml index fac291a2b..8ab04858d 100644 --- a/spec/std/isa/ext/U.yaml +++ b/spec/std/isa/ext/U.yaml @@ -15,51 +15,3 @@ versions: - version: "1.0.0" state: ratified ratification_date: 2019-12 -params: - MUTABLE_MISA_U: - description: | - Indicates whether or not the `U` extension can be disabled with the `misa.U` bit. - schema: - type: boolean - U_MODE_ENDIANNESS: - description: | - Endianness of data in U-mode. Can be one of: - - * little: U-mode data is always little endian - * big: U-mode data is always big endian - * dynamic: U-mode data can be either little or big endian, - depending on the CSR field `mstatus.UBE` - schema: - type: string - enum: [little, big, dynamic] - UXLEN: - description: | - Set of XLENs supported in U-mode. When both 32 and 64 are supported, SXLEN can be changed, - via mstatus.UXL, between 32 and 64. - schema: - type: array - items: - enum: [32, 64] - minItems: 1 - maxItems: 2 - uniqueItems: true - restrictions: - allOf: - - constraint(): | - !$ary_includes?(MXLEN, 64) -> !$ary_includes?(UXLEN, 64); - reason: | - XLEN in U-mode can never be larger than XLEN in M-mode - - constraint(): | - $ary_includes?(SXLEN, 32) -> $ary_includes?(UXLEN, 32); - reason: | - If S-mode supports RV32, then U mode must also support it. - - TRAP_ON_ECALL_FROM_U: - description: | - Whether or not an ECALL-from-U-mode causes a synchronous exception. - - The spec states that implementations may handle ECALLs transparently - without raising a trap, in which case the EEI must provide a builtin. - schema: - type: boolean - default: true diff --git a/spec/std/isa/ext/V.yaml b/spec/std/isa/ext/V.yaml index 292c2be7a..c1538948a 100644 --- a/spec/std/isa/ext/V.yaml +++ b/spec/std/isa/ext/V.yaml @@ -14,48 +14,3 @@ versions: ratification_date: null description: | TODO -params: - MUTABLE_MISA_V: - description: | - Indicates whether or not the `V` extension can be disabled with the `misa.V` bit. - schema: - type: boolean - HW_MSTATUS_VS_DIRTY_UPDATE: - description: | - Indicates whether or not hardware will write to `mstatus.VS` - - Values are: - [separator="!"] - !=== - h! never ! Hardware never writes `mstatus.VS` - h! precise ! Hardware writes `mstatus.VS` to the Dirty (3) state precisely when V registers are modified - h! imprecise ! Hardware writes `mstatus.VS` imprecisely. This will result in a call to unpredictable() on any attempt to read `mstatus` or write vector state. - !=== - schema: - type: string - enum: ["never", "precise", "imprecise"] - MSTATUS_VS_LEGAL_VALUES: - description: | - The set of values that mstatus.VS will accept from a software write. - schema: - type: array - items: - type: integer - enum: [0, 1, 2, 3] - minItems: 1 - maxItems: 4 - uniqueItems: true - restrictions: - allOf: - - constraint(): | - implemented?(ExtensionName::V) -> - ary_includes?(MSTATUS_VS_LEGAL_VALUES, 0) && - ary_includes?(MSTATUS_VS_LEGAL_VALUES, 1); - reason: - If V is supported, both Off (0) and Dirty (3) must be supported - - constraint(): | - HW_MSTATUS_VS_DIRTY_UPDATE == "precise" || HW_MSTATUS_VS_DIRTY_UPDATE == "imprecise" -> - ary_includes?(MSTATUS_VS_LEGAL_VALUES, 3) - reason: - If there is a hardware update to mstatus.VS, then the Dirty state must be supported - also_defined_in: S diff --git a/spec/std/isa/ext/Xmock.yaml b/spec/std/isa/ext/Xmock.yaml index dbd4be700..cc47b6927 100644 --- a/spec/std/isa/ext/Xmock.yaml +++ b/spec/std/isa/ext/Xmock.yaml @@ -15,148 +15,7 @@ versions: - version: "1.0.0" state: ratified ratification_date: 2024-04 -params: - MOCK_ENUM_2_INTS: - description: foo - schema: - type: integer - enum: [32, 64] - MOCK_ENUM_2_STRINGS: - description: foo - schema: - type: string - enum: ["low", "high"] - MOCK_BOOL_1: - description: foo - schema: - type: boolean - MOCK_BOOL_2: - description: foo - schema: - type: boolean - MOCK_32_BIT_INT: - description: foo - schema: - type: integer - minimum: 0 - maximum: 0xffffffff - MOCK_64_BIT_INT: - description: foo - schema: - type: integer - minimum: 0 - maximum: 0xffffffffffffffff - MOCK_1_BIT_INT: - description: foo - schema: - type: integer - minimum: 0 - maximum: 1 - MOCK_2_BIT_INT: - description: foo - schema: - type: integer - minimum: 0 - maximum: 3 - MOCK_25_BIT_INT: - description: foo - schema: - type: integer - minimum: 0 - maximum: 33554431 - MOCK_INT_RANGE_0_TO_2: - description: foo - schema: - type: integer - minimum: 0 - maximum: 2 - MOCK_INT_RANGE_0_TO_127: - description: foo - schema: - type: integer - minimum: 0 - maximum: 127 - MOCK_INT_RANGE_0_TO_999: - description: foo - schema: - type: integer - minimum: 0 - maximum: 999 - MOCK_INT_RANGE_0_TO_1023: - description: foo - schema: - type: integer - minimum: 0 - maximum: 1023 - MOCK_INT_RANGE_1000_TO_2048: - description: foo - schema: - type: integer - minimum: 1000 - maximum: 2048 - MOCK_INT_RANGE_0_TO_128: - description: foo - schema: - type: integer - minimum: 0 - maximum: 128 - MOCK_INT_RANGE_1_TO_128: - description: foo - schema: - type: integer - minimum: 1 - maximum: 128 - MOCK_ARRAY_INT_ENUM: - description: foo - schema: - type: array - items: - type: integer - enum: [0, 1] - minItems: 1 - maxItems: 2 - uniqueItems: true - MOCK_ARRAY_MIN_ONLY: - description: foo - schema: - type: array - items: - type: integer - enum: [0, 1] - minItems: 3 - MOCK_ARRAY_MAX_ONLY: - description: foo - schema: - type: array - items: - type: integer - enum: [0, 1] - maxItems: 10 - MOCK_ARRAY_STRING_ENUM1: - description: foo - schema: - type: array - items: - type: string - enum: [ABC, DEF, GHI] - MOCK_ARRAY_STRING_ENUM2: - description: foo - schema: - type: array - items: - type: string - enum: [ABC, DEF, GHI] - MOCK_ARRAY_BOOL_ARRAY_OF_8_FIRST_2_FALSE: - description: foo - schema: - type: array - items: - - const: false - - const: false - additionalItems: - type: boolean - maxItems: 8 - minItems: 8 + cert_normative_rules: - id: ext.Xmock.cov1 name: Mock normative rule 1 diff --git a/spec/std/isa/ext/Zcmt.yaml b/spec/std/isa/ext/Zcmt.yaml index be78dc8b5..4fc761386 100644 --- a/spec/std/isa/ext/Zcmt.yaml +++ b/spec/std/isa/ext/Zcmt.yaml @@ -81,83 +81,3 @@ versions: version: "1.0.0" - name: Zicsr version: "2.0.0" -params: - MSTATEEN_JVT_TYPE: - definedBy: - extension: - allOf: - - name: Zcmt - - name: Smstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - description: | - Behavior of the mstateen0.JVT bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - HSTATEEN_JVT_TYPE: - definedBy: - extension: - allOf: - - name: Zcmt - - name: H - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - restrictions: - allOf: - - constraint(): | - MSTATEEN_JVT_TYPE == "read-only-0" -> HSTATEEN_JVT_TYPE == "read-only-0"; - reason: - HSTATEEN cannot have more options that MSTATEEN - - constraint(): | - MSTATEEN_JVT_TYPE == "read-only-1" -> HSTATEEN_JVT_TYPE == "read-only-1"; - reason: - HSTATEEN cannot have more options that MSTATEEN - description: | - Behavior of the hstateen0.JVT bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - SSTATEEN_JVT_TYPE: - definedBy: - extension: - allOf: - - name: S - version: ~> 1.0 - - name: Ssstateen - version: ~> 1.0 - schema: - type: string - enum: [rw, read-only-0, read-only-1] - description: | - Behavior of the sstateen0.JVT bit: - - * 'rw': read-write - * 'read-only-0': read-only, fixed to 0 - * 'read-only-1': read-only, fixed to 1 - restrictions: - allOf: - - constraint(): | - MSTATEEN_JVT_TYPE == "read-only-0" -> SSTATEEN_JVT_TYPE == "read-only-0"; - reason: - SSTATEEN cannot have more options that MSTATEEN - - constraint(): | - MSTATEEN_JVT_TYPE == "read-only-1" -> SSTATEEN_JVT_TYPE == "read-only-1"; - reason: - SSTATEEN cannot have more options that MSTATEEN - - constraint(): | - HSTATEEN_JVT_TYPE == "read-only-0" -> SSTATEEN_JVT_TYPE == "read-only-0"; - reason: - SSTATEEN cannot have more options that HSTATEEN - - constraint(): | - HSTATEEN_JVT_TYPE == "read-only-1" -> SSTATEEN_JVT_TYPE == "read-only-1"; - reason: - SSTATEEN cannot have more options that HSTATEEN diff --git a/spec/std/isa/ext/Zicbom.yaml b/spec/std/isa/ext/Zicbom.yaml index a19d9fabb..70fa007b2 100644 --- a/spec/std/isa/ext/Zicbom.yaml +++ b/spec/std/isa/ext/Zicbom.yaml @@ -13,21 +13,3 @@ versions: - version: "1.0.0" state: ratified ratification_date: 2022-05 -params: - CACHE_BLOCK_SIZE: - description: | - The observable size of a cache block, in bytes - also_defined_in: [Zicboz, Zicbop] - schema: - type: integer - minimum: 1 - maximum: 0xFFFFFFFFFFFFFFFF - FORCE_UPGRADE_CBO_INVAL_TO_FLUSH: - description: | - When true, an implementation prohibits setting `menvcfg.CBIE` == `11` such that all `cbo.inval` - instructions either trap (when `menvcfg.CBIE` == '00') or flush (when `menvcfg.CBIE` == '01'). - - When false, an implementation allows a true INVAL operation for `cbo.inval`, and thus supports - the setting `menvcfg.CBIE` == `11`. - schema: - type: boolean diff --git a/spec/std/isa/ext/Zicbop.yaml b/spec/std/isa/ext/Zicbop.yaml index dedeeb514..c0a1253af 100644 --- a/spec/std/isa/ext/Zicbop.yaml +++ b/spec/std/isa/ext/Zicbop.yaml @@ -13,12 +13,3 @@ versions: - version: "1.0.0" state: ratified ratification_date: 2022-05 -params: - CACHE_BLOCK_SIZE: - description: | - The observable size of a cache block, in bytes - also_defined_in: [Zicboz, Zicbom] - schema: - type: integer - minimum: 1 - maximum: 0xFFFFFFFFFFFFFFFF diff --git a/spec/std/isa/ext/Zicboz.yaml b/spec/std/isa/ext/Zicboz.yaml index 0cbeae3ae..decf71542 100644 --- a/spec/std/isa/ext/Zicboz.yaml +++ b/spec/std/isa/ext/Zicboz.yaml @@ -13,12 +13,3 @@ versions: - version: "1.0.0" state: ratified ratification_date: 2022-05 -params: - CACHE_BLOCK_SIZE: - description: | - The observable size of a cache block, in bytes - also_defined_in: [Zicbom, Zicbop] - schema: - type: integer - minimum: 1 - maximum: 0xFFFFFFFFFFFFFFFF diff --git a/spec/std/isa/ext/Zicfilp.yaml b/spec/std/isa/ext/Zicfilp.yaml index 6be6f6d7d..4f93d8be3 100644 --- a/spec/std/isa/ext/Zicfilp.yaml +++ b/spec/std/isa/ext/Zicfilp.yaml @@ -14,25 +14,3 @@ versions: - version: "1.0.0" state: ratified ratification_date: 2024-07 -params: - REPORT_CAUSE_IN_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK: - description: | - When true, `mtval` is written with the shadow stack cause (code=18) when a SoftwareCheck exception is raised into M-mode due to a landing pad error. - - When false, `mtval` is written with 0. - schema: - type: boolean - REPORT_CAUSE_IN_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK: - description: | - When true, `stval` is written with the shadow stack cause (code=18) when a SoftwareCheck exception is raised into S-mode due to a landing pad error. - - When false, `stval` is written with 0. - schema: - type: boolean - REPORT_CAUSE_IN_VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK: - description: | - When true, `vstval` is written with the shadow stack cause (code=18) when a SoftwareCheck exception is raised into VS-mode due to a landing pad error. - - When false, `vstval` is written with 0. - schema: - type: boolean diff --git a/spec/std/isa/ext/Zicfiss.yaml b/spec/std/isa/ext/Zicfiss.yaml index 10bd616e7..7034875e9 100644 --- a/spec/std/isa/ext/Zicfiss.yaml +++ b/spec/std/isa/ext/Zicfiss.yaml @@ -14,25 +14,3 @@ versions: - version: "1.0.0" state: ratified ratification_date: 2024-07 -params: - REPORT_CAUSE_IN_MTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK: - description: | - When true, `mtval` is written with the shadow stack cause (code=3) when a SoftwareCheck exception is raised into M-mode due to a shadow stack pop check instruction. - - When false, `mtval` is written with 0. - schema: - type: boolean - REPORT_CAUSE_IN_STVAL_ON_SHADOW_STACK_SOFTWARE_CHECK: - description: | - When true, `stval` is written with the shadow stack cause (code=3) when a SoftwareCheck exception is raised into S-mode due to a shadow stack pop check instruction. - - When false, `stval` is written with 0. - schema: - type: boolean - REPORT_CAUSE_IN_VSTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK: - description: | - When true, `vstval` is written with the shadow stack cause (code=3) when a SoftwareCheck exception is raised into VS-mode due to a shadow stack pop check instruction. - - When false, `vstval` is written with 0. - schema: - type: boolean diff --git a/spec/std/isa/ext/Zicntr.yaml b/spec/std/isa/ext/Zicntr.yaml index 213b451dc..e0b4a309e 100644 --- a/spec/std/isa/ext/Zicntr.yaml +++ b/spec/std/isa/ext/Zicntr.yaml @@ -17,21 +17,3 @@ versions: extension: name: Zicsr version: ">= 2.0" -params: - TIME_CSR_IMPLEMENTED: - description: | - Whether or not a real hardware `time` CSR exists. Implementations can either provide a real - CSR or emulate access at M-mode. - - Possible values: - - true:: - `time`/`timeh` exists, and accessing it will not cause an IllegalInstruction trap - - false:: - `time`/`timeh` does not exist. - Accessing the CSR will cause an IllegalInstruction trap or enter an unpredictable state, - depending on TRAP_ON_UNIMPLEMENTED_CSR. - Privileged software may emulate the `time` CSR, or may pass the exception to a lower level. - schema: - type: boolean diff --git a/spec/std/isa/isa/globals.isa b/spec/std/isa/isa/globals.isa index f732e8e23..727e21704 100644 --- a/spec/std/isa/isa/globals.isa +++ b/spec/std/isa/isa/globals.isa @@ -2567,7 +2567,7 @@ function read_memory { } else { # misaligned, must break into multiple reads - if (MISALIGNED_SPLIT_STRATEGY == "by_byte") { + if (MISALIGNED_SPLIT_STRATEGY == "sequential_bytes") { Bits result = 0; for (U32 i = 0; i <= (LEN/8); i++) { result = result | (read_memory_aligned<8>(virtual_address + i, encoding) << (8*i)); @@ -2954,7 +2954,7 @@ function write_memory { raise (ExceptionCode::StoreAmoAddressMisaligned, effective_ldst_mode(), virtual_address); } else { # misaligned, must break into multiple reads - if (MISALIGNED_SPLIT_STRATEGY == "by_byte") { + if (MISALIGNED_SPLIT_STRATEGY == "sequential_bytes") { for (U32 i = 0; i <= (LEN/8); i++) { write_memory_aligned<8>(virtual_address + i, (value >> (8*i))[7:0], encoding); } diff --git a/spec/std/isa/param/A/LRSC_FAIL_ON_NON_EXACT_LRSC.yaml b/spec/std/isa/param/A/LRSC_FAIL_ON_NON_EXACT_LRSC.yaml new file mode 100644 index 000000000..4f593b1bf --- /dev/null +++ b/spec/std/isa/param/A/LRSC_FAIL_ON_NON_EXACT_LRSC.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: LRSC_FAIL_ON_NON_EXACT_LRSC +description: | + Whether or not a Store Conditional fails if its physical address and size do not + exactly match the physical address and size of the last Load Reserved in program order + (independent of whether or not the SC is in the current reservation set) +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: A diff --git a/spec/std/isa/param/A/LRSC_FAIL_ON_VA_SYNONYM.yaml b/spec/std/isa/param/A/LRSC_FAIL_ON_VA_SYNONYM.yaml new file mode 100644 index 000000000..71101af1b --- /dev/null +++ b/spec/std/isa/param/A/LRSC_FAIL_ON_VA_SYNONYM.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: LRSC_FAIL_ON_VA_SYNONYM +description: | + Whether or not an `sc.l`/`sc.d` will fail if its VA does not match the VA of the prior + `lr.l`/`lr.d`, even if the physical address of the SC and LR are the same +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: A diff --git a/spec/std/isa/param/A/LRSC_MISALIGNED_BEHAVIOR.yaml b/spec/std/isa/param/A/LRSC_MISALIGNED_BEHAVIOR.yaml new file mode 100644 index 000000000..d4ee3a7aa --- /dev/null +++ b/spec/std/isa/param/A/LRSC_MISALIGNED_BEHAVIOR.yaml @@ -0,0 +1,24 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: LRSC_MISALIGNED_BEHAVIOR +description: | + What to do when an LR/SC address is misaligned and MISALIGNED_AMO == false. + + * 'always raise misaligned exception': self-explainitory + * 'always raise access fault': self-explainitory + * 'custom': Custom behavior; misaligned LR/SC may sometimes raise a misaligned exception and sometimes raise a access fault. Will lead to an 'unpredictable' call on any misaligned LR/SC access +long_name: TODO +schema: + type: string + enum: + - always raise misaligned exception + - always raise access fault + - custom +definedBy: + extension: + name: A diff --git a/spec/std/isa/param/A/LRSC_RESERVATION_STRATEGY.yaml b/spec/std/isa/param/A/LRSC_RESERVATION_STRATEGY.yaml new file mode 100644 index 000000000..c39b911c2 --- /dev/null +++ b/spec/std/isa/param/A/LRSC_RESERVATION_STRATEGY.yaml @@ -0,0 +1,26 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: LRSC_RESERVATION_STRATEGY +description: | + Strategy used to handle reservation sets. + + * "reserve naturally-aligned 64-byte region": Always reserve the 64-byte block containing the LR/SC address + * "reserve naturally-aligned 128-byte region": Always reserve the 128-byte block containing the LR/SC address + * "reserve exactly enough to cover the access": Always reserve exactly the LR/SC access, and no more + * "custom": Custom behavior, leading to an 'unpredictable' call on any LR/SC +long_name: TODO +schema: + type: string + enum: + - reserve naturally-aligned 64-byte region + - reserve naturally-aligned 128-byte region + - reserve exactly enough to cover the access + - custom +definedBy: + extension: + name: A diff --git a/spec/std/isa/param/A/MISALIGNED_AMO.yaml b/spec/std/isa/param/A/MISALIGNED_AMO.yaml new file mode 100644 index 000000000..474b72987 --- /dev/null +++ b/spec/std/isa/param/A/MISALIGNED_AMO.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MISALIGNED_AMO +description: + "whether or not the implementation supports misaligned atomics in main + memory + + " +long_name: TODO +schema: + type: boolean +definedBy: + allOf: + - extension: + :name: A + - extension: + name: Zaamo diff --git a/spec/std/isa/param/A/MUTABLE_MISA_A.yaml b/spec/std/isa/param/A/MUTABLE_MISA_A.yaml new file mode 100644 index 000000000..c01eac6c6 --- /dev/null +++ b/spec/std/isa/param/A/MUTABLE_MISA_A.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_A +description: | + When the `A` extensions is supported, indicates whether or not + the extension can be disabled in the `misa.A` bit. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: A diff --git a/spec/std/isa/param/B/MUTABLE_MISA_B.yaml b/spec/std/isa/param/B/MUTABLE_MISA_B.yaml new file mode 100644 index 000000000..ac44d6c82 --- /dev/null +++ b/spec/std/isa/param/B/MUTABLE_MISA_B.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_B +description: + "Indicates whether or not the `B` extension can be disabled with the + `misa.B` bit. + + " +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: B diff --git a/spec/std/isa/param/C/MUTABLE_MISA_C.yaml b/spec/std/isa/param/C/MUTABLE_MISA_C.yaml new file mode 100644 index 000000000..b39a9463b --- /dev/null +++ b/spec/std/isa/param/C/MUTABLE_MISA_C.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_C +description: + "Indicates whether or not the `C` extension can be disabled with the + `misa.C` bit. + + " +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: C diff --git a/spec/std/isa/param/D/MUTABLE_MISA_D.yaml b/spec/std/isa/param/D/MUTABLE_MISA_D.yaml new file mode 100644 index 000000000..6f8cf0305 --- /dev/null +++ b/spec/std/isa/param/D/MUTABLE_MISA_D.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_D +description: + "Indicates whether or not the `D` extension can be disabled with the + `misa.D` bit. + + " +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: D diff --git a/spec/std/isa/param/F/HW_MSTATUS_FS_DIRTY_UPDATE.yaml b/spec/std/isa/param/F/HW_MSTATUS_FS_DIRTY_UPDATE.yaml new file mode 100644 index 000000000..43e56ee6e --- /dev/null +++ b/spec/std/isa/param/F/HW_MSTATUS_FS_DIRTY_UPDATE.yaml @@ -0,0 +1,28 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HW_MSTATUS_FS_DIRTY_UPDATE +description: | + Indicates whether or not hardware will write to `mstatus.FS` + + Values are: + [separator="!"] + !=== + h! never ! Hardware never writes `mstatus.FS` + h! precise ! Hardware writes `mstatus.FS` to the Dirty (3) state precisely when F registers are modified + h! imprecise ! Hardware writes `mstatus.FS` imprecisely. This will result in a call to unpredictable() on any attempt to read `mstatus` or write FP state. + !=== +long_name: TODO +schema: + type: string + enum: + - never + - precise + - imprecise +definedBy: + extension: + name: F diff --git a/spec/std/isa/param/F/MSTATUS_FS_LEGAL_VALUES.yaml b/spec/std/isa/param/F/MSTATUS_FS_LEGAL_VALUES.yaml new file mode 100644 index 000000000..d2042569f --- /dev/null +++ b/spec/std/isa/param/F/MSTATUS_FS_LEGAL_VALUES.yaml @@ -0,0 +1,39 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATUS_FS_LEGAL_VALUES +description: "The set of values that mstatus.FS supports. + + " +long_name: TODO +schema: + type: array + items: + type: integer + enum: + - 0 + - 1 + - 2 + - 3 + maxItems: 4 + minItems: 1 + uniqueItems: true +restrictions: + constraint(): | + implemented?(ExtensionName::F) && + (HW_MSTATUS_FS_DIRTY_UPDATE == "precise") || + HW_MSTATUS_FS_DIRTY_UPDATE == "imprecise") + -> + $ary_includes?(MSTATUS_FS_LEGAL_VALUES, 3); + reason: + If there is a hardware update to mstatus.FS, then the Dirty state must be + supported +definedBy: + extension: + anyOf: + - name: F + - name: S diff --git a/spec/std/isa/param/F/MUTABLE_MISA_F.yaml b/spec/std/isa/param/F/MUTABLE_MISA_F.yaml new file mode 100644 index 000000000..f7538ed64 --- /dev/null +++ b/spec/std/isa/param/F/MUTABLE_MISA_F.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_F +description: + "Indicates whether or not the `F` extension can be disabled with the + `misa.F` bit. + + " +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: F diff --git a/spec/std/isa/param/H/GSTAGE_MODE_BARE.yaml b/spec/std/isa/param/H/GSTAGE_MODE_BARE.yaml new file mode 100644 index 000000000..f97476e28 --- /dev/null +++ b/spec/std/isa/param/H/GSTAGE_MODE_BARE.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: GSTAGE_MODE_BARE +description: + "Whether or not writing mode=Bare is supported in the `hgatp` register. + + " +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/HCOUNTENABLE_EN.yaml b/spec/std/isa/param/H/HCOUNTENABLE_EN.yaml new file mode 100644 index 000000000..aa51ee5ef --- /dev/null +++ b/spec/std/isa/param/H/HCOUNTENABLE_EN.yaml @@ -0,0 +1,27 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HCOUNTENABLE_EN +description: | + Indicates which counters can delegated via `hcounteren` + + An unimplemented counter cannot be specified, i.e., if + HPM_COUNTER_EN[3] is false, it would be illegal to set + HCOUNTENABLE_EN[3] to true. + + HCOUNTENABLE_EN[0:2] must all be false if `Zicntr` is not implemented. + HCOUNTENABLE_EN[3:31] must all be false if `Zihpm` is not implemented. +long_name: TODO +schema: + type: array + items: + type: boolean + maxItems: 32 + minItems: 32 +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/IGNORE_INVALID_VSATP_MODE_WRITES_WHEN_V_EQ_ZERO.yaml b/spec/std/isa/param/H/IGNORE_INVALID_VSATP_MODE_WRITES_WHEN_V_EQ_ZERO.yaml new file mode 100644 index 000000000..023df8528 --- /dev/null +++ b/spec/std/isa/param/H/IGNORE_INVALID_VSATP_MODE_WRITES_WHEN_V_EQ_ZERO.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: IGNORE_INVALID_VSATP_MODE_WRITES_WHEN_V_EQ_ZERO +description: | + Whether writes from M-mode, U-mode, or S-mode to vsatp with an illegal mode setting are + ignored (as they are with satp), or if they are treated as WARL, leading to undpredictable + behavior. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/MUTABLE_MISA_H.yaml b/spec/std/isa/param/H/MUTABLE_MISA_H.yaml new file mode 100644 index 000000000..8be2972f5 --- /dev/null +++ b/spec/std/isa/param/H/MUTABLE_MISA_H.yaml @@ -0,0 +1,26 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_H +description: + "Indicates whether or not the `H` extension can be disabled with the + `misa.H` bit. + + " +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "MUTABLE_MISA_S -> MUTABLE_MISA_H; + + " + reason: | + If S mode can be disabled, then H mode must also be disabled since you can't be in H mode + without S mode (and thus MUTABLE_MISA_H is not an option -- it's always true) +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/NUM_EXTERNAL_GUEST_INTERRUPTS.yaml b/spec/std/isa/param/H/NUM_EXTERNAL_GUEST_INTERRUPTS.yaml new file mode 100644 index 000000000..241ec9de1 --- /dev/null +++ b/spec/std/isa/param/H/NUM_EXTERNAL_GUEST_INTERRUPTS.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: NUM_EXTERNAL_GUEST_INTERRUPTS +description: | + Number of supported virtualized guest interrupts + + Corresponds to the `GEILEN` parameter in the RVI specs +long_name: TODO +schema: + RV32: + type: integer + minimum: 1 + maximum: 63 + RV64: + type: integer + minimum: 1 + maximum: 31 +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION.yaml b/spec/std/isa/param/H/REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION.yaml new file mode 100644 index 000000000..58f0dbf55 --- /dev/null +++ b/spec/std/isa/param/H/REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION +description: | + When true, `vstval` is written with the encoding of an instruction that causes an + `IllegalInstruction` exception. + + When false `vstval` is written with 0 when an `IllegalInstruction` exception occurs. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_GPA_IN_HTVAL_ON_GUEST_PAGE_FAULT.yaml b/spec/std/isa/param/H/REPORT_GPA_IN_HTVAL_ON_GUEST_PAGE_FAULT.yaml new file mode 100644 index 000000000..09e53a561 --- /dev/null +++ b/spec/std/isa/param/H/REPORT_GPA_IN_HTVAL_ON_GUEST_PAGE_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_GPA_IN_HTVAL_ON_GUEST_PAGE_FAULT +description: | + When true, `htval` is written with the Guest Physical Address, shifted right by 2, that + caused a `GuestPageFault` exception. + + When false, `htval` is written with 0 when a `GuestPageFault` exception occurs. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_INSTRUCTION_GUEST_PAGE_FAULT.yaml b/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_INSTRUCTION_GUEST_PAGE_FAULT.yaml new file mode 100644 index 000000000..82314717c --- /dev/null +++ b/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_INSTRUCTION_GUEST_PAGE_FAULT.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_GPA_IN_TVAL_ON_INSTRUCTION_GUEST_PAGE_FAULT +description: | + Whether or not GPA >> 2 is written into htval/mtval2 when an instruction guest page fault occurs. + + If false, 0 will be written into htval/mtval2 on an instruction guest page fault. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_INTERMEDIATE_GUEST_PAGE_FAULT.yaml b/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_INTERMEDIATE_GUEST_PAGE_FAULT.yaml new file mode 100644 index 000000000..5c9e7fadd --- /dev/null +++ b/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_INTERMEDIATE_GUEST_PAGE_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_GPA_IN_TVAL_ON_INTERMEDIATE_GUEST_PAGE_FAULT +description: | + Whether or not GPA >> 2 is written into htval/mtval2 when a guest page fault occurs while + walking a VS-mode page table. + + If false, 0 will be written into htval/mtval2 on an intermediate guest page fault. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_LOAD_GUEST_PAGE_FAULT.yaml b/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_LOAD_GUEST_PAGE_FAULT.yaml new file mode 100644 index 000000000..0918c6034 --- /dev/null +++ b/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_LOAD_GUEST_PAGE_FAULT.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_GPA_IN_TVAL_ON_LOAD_GUEST_PAGE_FAULT +description: | + Whether or not GPA >> 2 is written into htval/mtval2 when a load guest page fault occurs. + + If false, 0 will be written into htval/mtval2 on a load guest page fault. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_STORE_AMO_GUEST_PAGE_FAULT.yaml b/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_STORE_AMO_GUEST_PAGE_FAULT.yaml new file mode 100644 index 000000000..53bcbe4ea --- /dev/null +++ b/spec/std/isa/param/H/REPORT_GPA_IN_TVAL_ON_STORE_AMO_GUEST_PAGE_FAULT.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_GPA_IN_TVAL_ON_STORE_AMO_GUEST_PAGE_FAULT +description: | + Whether or not GPA >> 2 is written into htval/mtval2 when a store/amo guest page fault occurs. + + If false, 0 will be written into htval/mtval2 on a store/amo guest page fault. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_BREAKPOINT.yaml b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_BREAKPOINT.yaml new file mode 100644 index 000000000..330100515 --- /dev/null +++ b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_BREAKPOINT.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_VSTVAL_ON_BREAKPOINT +description: | + When true, `vstval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`). + + When false, `vstval` is written with 0 on an EBREAK instruction. + + Regardless, `vstval` is always written with a virtual PC when an external breakpoint is generated. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml new file mode 100644 index 000000000..fe05bdef3 --- /dev/null +++ b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_ACCESS_FAULT +description: | + When true, `vstval` is written with the virtual PC of an instructino when fetch causes an + `InstructionAccessFault`. + + WHen false, `vstval` is written with 0 when an instruction fetch causes an + `InstructionAccessFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_MISALIGNED.yaml b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_MISALIGNED.yaml new file mode 100644 index 000000000..eb903f93a --- /dev/null +++ b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_MISALIGNED.yaml @@ -0,0 +1,21 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_MISALIGNED +description: | + When true, `vstval` is written with the virtual PC when an instruction fetch is misaligned. + + When false, `vstval` is written with 0 when an instruction fetch is misaligned. + + Note that when IALIGN=16 (i.e., when the `C` or one of the `Zc*` extensions are implemented), + it is impossible to generate a misaligned fetch, and so this parameter has no effect. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT.yaml b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT.yaml new file mode 100644 index 000000000..e4ff11bfa --- /dev/null +++ b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT +description: | + When true, `vstval` is written with the virtual PC of an instructino when fetch causes an + `InstructionPageFault`. + + WHen false, `vstval` is written with 0 when an instruction fetch causes an + `InstructionPageFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT.yaml b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT.yaml new file mode 100644 index 000000000..5d9fad8e4 --- /dev/null +++ b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT +description: | + When true, `vstval` is written with the virtual address of a load when it causes a + `LoadAccessFault`. + + WHen false, `vstval` is written with 0 when a load causes a `LoadAccessFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED.yaml b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED.yaml new file mode 100644 index 000000000..fdec26750 --- /dev/null +++ b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED +description: | + When true, `vstval` is written with the virtual address of a load instruction when the + address is misaligned and MISALIGNED_LDST is false. + + When false, `vstval` is written with 0 when a load address is misaligned and + MISALIGNED_LDST is false. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_PAGE_FAULT.yaml b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_PAGE_FAULT.yaml new file mode 100644 index 000000000..389a83a3f --- /dev/null +++ b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_LOAD_PAGE_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_VSTVAL_ON_LOAD_PAGE_FAULT +description: | + When true, `vstval` is written with the virtual address of a load when it causes a + `LoadPageFault`. + + WHen false, `vstval` is written with 0 when a load causes a `LoadPageFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_ACCESS_FAULT.yaml b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_ACCESS_FAULT.yaml new file mode 100644 index 000000000..e09f966ef --- /dev/null +++ b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_ACCESS_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_VSTVAL_ON_STORE_AMO_ACCESS_FAULT +description: | + When true, `vstval` is written with the virtual address of a store when it causes a + `StoreAmoAccessFault`. + + WHen false, `vstval` is written with 0 when a store causes a `StoreAmoAccessFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED.yaml b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED.yaml new file mode 100644 index 000000000..5001f13f9 --- /dev/null +++ b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED +description: | + When true, `vstval` is written with the virtual address of a store instruction when the + address is misaligned and MISALIGNED_LDST is false. + + When false, `vstval` is written with 0 when a store address is misaligned and + MISALIGNED_LDST is false. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT.yaml b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT.yaml new file mode 100644 index 000000000..409afc9b9 --- /dev/null +++ b/spec/std/isa/param/H/REPORT_VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT +description: | + When true, `vstval` is written with the virtual address of a store when it causes a + `StoreAmoPageFault`. + + WHen false, `vstval` is written with 0 when a store causes a `StoreAmoPageFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/SV39X4_TRANSLATION.yaml b/spec/std/isa/param/H/SV39X4_TRANSLATION.yaml new file mode 100644 index 000000000..8b2d59969 --- /dev/null +++ b/spec/std/isa/param/H/SV39X4_TRANSLATION.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: SV39X4_TRANSLATION +description: "Whether or not Sv39x4 translation mode is supported. + + " +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "!$ary_includes?(SXLEN, 64) -> !SV39X4_VSMODE_TRANSLATION;\n" + reason: Sv39x4 is only valid if S-mode can get into RV64 mode +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/SV39_VSMODE_TRANSLATION.yaml b/spec/std/isa/param/H/SV39_VSMODE_TRANSLATION.yaml new file mode 100644 index 000000000..44d9d3115 --- /dev/null +++ b/spec/std/isa/param/H/SV39_VSMODE_TRANSLATION.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: SV39_VSMODE_TRANSLATION +description: | + Whether or not Sv39 translation is supported in first-stage (VS-stage) + translation. +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "!$ary_includes?(VSXLEN, 64) -> !SV39_VSMODE_TRANSLATION;\n" + reason: Sv39 in VS-mode is only valid if VS-mode can get into RV64 mode +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/SV48X4_TRANSLATION.yaml b/spec/std/isa/param/H/SV48X4_TRANSLATION.yaml new file mode 100644 index 000000000..e99e4bd5e --- /dev/null +++ b/spec/std/isa/param/H/SV48X4_TRANSLATION.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: SV48X4_TRANSLATION +description: "Whether or not Sv48x4 translation mode is supported. + + " +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "!$ary_includes?(SXLEN, 64) -> !SV48X4_VSMODE_TRANSLATION;\n" + reason: Sv48x4 is only valid if S-mode can get into RV64 mode +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/SV48_VSMODE_TRANSLATION.yaml b/spec/std/isa/param/H/SV48_VSMODE_TRANSLATION.yaml new file mode 100644 index 000000000..0aec116bb --- /dev/null +++ b/spec/std/isa/param/H/SV48_VSMODE_TRANSLATION.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: SV48_VSMODE_TRANSLATION +description: | + Whether or not Sv48 translation is supported in first-stage (VS-stage) + translation. +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "!$ary_includes?(VSXLEN, 64) -> !SV48_VSMODE_TRANSLATION;\n" + reason: Sv48 in VS-mode is only valid if VS-mode can get into RV64 mode +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/SV57X4_TRANSLATION.yaml b/spec/std/isa/param/H/SV57X4_TRANSLATION.yaml new file mode 100644 index 000000000..af5b9b751 --- /dev/null +++ b/spec/std/isa/param/H/SV57X4_TRANSLATION.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: SV57X4_TRANSLATION +description: "Whether or not Sv57x4 translation mode is supported. + + " +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "!$ary_includes?(SXLEN, 64) -> !SV57X4_VSMODE_TRANSLATION;\n" + reason: Sv48x4 is only valid if S-mode can get into RV64 mode +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/SV57_VSMODE_TRANSLATION.yaml b/spec/std/isa/param/H/SV57_VSMODE_TRANSLATION.yaml new file mode 100644 index 000000000..5e770a86f --- /dev/null +++ b/spec/std/isa/param/H/SV57_VSMODE_TRANSLATION.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: SV57_VSMODE_TRANSLATION +description: | + Whether or not Sv57 translation is supported in first-stage (VS-stage) + translation. +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "!$ary_includes?(VSXLEN, 64) -> !SV57_VSMODE_TRANSLATION;\n" + reason: Sv57 in VS-mode is only valid if VS-mode can get into RV64 mode +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_BREAKPOINT.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_BREAKPOINT.yaml new file mode 100644 index 000000000..3a94ed13b --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_BREAKPOINT.yaml @@ -0,0 +1,23 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_BREAKPOINT +description: | + Value written into htinst/mtinst on a Breakpoint exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT.yaml new file mode 100644 index 000000000..5fe2f2d9e --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT.yaml @@ -0,0 +1,23 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT +description: | + Value to write into htval/mtval2 when there is a guest page fault on a final translation. + + Possible values: + * "always zero": Always write the value zero + * "always pseudoinstruction": Always write the pseudoinstruction +long_name: TODO +schema: + type: string + enum: + - always zero + - always pseudoinstruction +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT.yaml new file mode 100644 index 000000000..906ed5864 --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT.yaml @@ -0,0 +1,27 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT +description: | + Value to write into htval/mtval2 when there is a guest page fault on a final translation. + + Possible values: + * "always zero": Always write the value zero + * "always pseudoinstruction": Always write the pseudoinstruction + * "always transformed standard instruction": Always write the transformation of the standard instruction encoding + * "custom": A custom value, which will cause an UNPREDICTABLE event. +long_name: TODO +schema: + type: string + enum: + - always zero + - always pseudoinstruction + - always transformed standard instruction + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT.yaml new file mode 100644 index 000000000..19a1f5d2b --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT.yaml @@ -0,0 +1,27 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT +description: | + Value to write into htval/mtval2 when there is a guest page fault on a final translation. + + Possible values: + * "always zero": Always write the value zero + * "always pseudoinstruction": Always write the pseudoinstruction + * "always transformed standard instruction": Always write the transformation of the standard instruction encoding + * "custom": A custom value, which will cause an UNPREDICTABLE event. +long_name: TODO +schema: + type: string + enum: + - always zero + - always pseudoinstruction + - always transformed standard instruction + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_INSTRUCTION_ADDRESS_MISALIGNED.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_INSTRUCTION_ADDRESS_MISALIGNED.yaml new file mode 100644 index 000000000..d69b80bd2 --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_INSTRUCTION_ADDRESS_MISALIGNED.yaml @@ -0,0 +1,23 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_INSTRUCTION_ADDRESS_MISALIGNED +description: | + Value written into htinst/mtinst when there is an instruction address misaligned exception. + + Possible values: + * "always zero": Always write the value zero + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_LOAD_ACCESS_FAULT.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_LOAD_ACCESS_FAULT.yaml new file mode 100644 index 000000000..33f53cca3 --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_LOAD_ACCESS_FAULT.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_LOAD_ACCESS_FAULT +description: | + Value written into htinst/mtinst on an AccessFault exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "always transformed standard instruction": Always write a transformed standard instruction as defined by H + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - always transformed standard instruction + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED.yaml new file mode 100644 index 000000000..dc06de180 --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED +description: | + Value written into htinst/mtinst on a VirtualInstruction exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "always transformed standard instruction": Always write a transformed standard instruction as defined by H + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - always transformed standard instruction + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_LOAD_PAGE_FAULT.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_LOAD_PAGE_FAULT.yaml new file mode 100644 index 000000000..8cf284a30 --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_LOAD_PAGE_FAULT.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_LOAD_PAGE_FAULT +description: | + Value written into htinst/mtinst on a LoadPageFault exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "always transformed standard instruction": Always write a transformed standard instruction as defined by H + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - always transformed standard instruction + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_MCALL.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_MCALL.yaml new file mode 100644 index 000000000..3ef90659a --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_MCALL.yaml @@ -0,0 +1,23 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_MCALL +description: | + Value written into htinst/mtinst on a MCall exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_SCALL.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_SCALL.yaml new file mode 100644 index 000000000..e31c5366f --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_SCALL.yaml @@ -0,0 +1,23 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_SCALL +description: | + Value written into htinst/mtinst on a SCall exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_ACCESS_FAULT.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_ACCESS_FAULT.yaml new file mode 100644 index 000000000..f42f0c2ba --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_ACCESS_FAULT.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_STORE_AMO_ACCESS_FAULT +description: | + Value written into htinst/mtinst on an AccessFault exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "always transformed standard instruction": Always write a transformed standard instruction as defined by H + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - always transformed standard instruction + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED.yaml new file mode 100644 index 000000000..650f25fc0 --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED +description: | + Value written into htinst/mtinst on a VirtualInstruction exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "always transformed standard instruction": Always write a transformed standard instruction as defined by H + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - always transformed standard instruction + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_PAGE_FAULT.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_PAGE_FAULT.yaml new file mode 100644 index 000000000..087fe2473 --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_STORE_AMO_PAGE_FAULT.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_STORE_AMO_PAGE_FAULT +description: | + Value written into htinst/mtinst on a StoreAmoPageFault exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "always transformed standard instruction": Always write a transformed standard instruction as defined by H + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - always transformed standard instruction + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_UCALL.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_UCALL.yaml new file mode 100644 index 000000000..1712e1620 --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_UCALL.yaml @@ -0,0 +1,23 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_UCALL +description: | + Value written into htinst/mtinst on a UCall exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_VIRTUAL_INSTRUCTION.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_VIRTUAL_INSTRUCTION.yaml new file mode 100644 index 000000000..ac5ef7e44 --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_VIRTUAL_INSTRUCTION.yaml @@ -0,0 +1,23 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_VIRTUAL_INSTRUCTION +description: | + Value written into htinst/mtinst on a VirtualInstruction exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TINST_VALUE_ON_VSCALL.yaml b/spec/std/isa/param/H/TINST_VALUE_ON_VSCALL.yaml new file mode 100644 index 000000000..a5bfee92a --- /dev/null +++ b/spec/std/isa/param/H/TINST_VALUE_ON_VSCALL.yaml @@ -0,0 +1,23 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TINST_VALUE_ON_VSCALL +description: | + Value written into htinst/mtinst on a VSCall exception from VU/VS-mode. + + Possible values: + * "always zero": Always write the value zero + * "custom": Write a custom value, which results in UNPREDICTABLE +long_name: TODO +schema: + type: string + enum: + - always zero + - custom +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/TRAP_ON_ECALL_FROM_VS.yaml b/spec/std/isa/param/H/TRAP_ON_ECALL_FROM_VS.yaml new file mode 100644 index 000000000..c7f779c2a --- /dev/null +++ b/spec/std/isa/param/H/TRAP_ON_ECALL_FROM_VS.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TRAP_ON_ECALL_FROM_VS +description: | + Whether or not an ECALL-from-VS-mode causes a synchronous exception. + + The spec states that implementations may handle ECALLs transparently + without raising a trap, in which case the EEI must provide a builtin. +long_name: TODO +schema: + type: boolean + default: true +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/VMID_WIDTH.yaml b/spec/std/isa/param/H/VMID_WIDTH.yaml new file mode 100644 index 000000000..bf0df2f70 --- /dev/null +++ b/spec/std/isa/param/H/VMID_WIDTH.yaml @@ -0,0 +1,26 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: VMID_WIDTH +description: + "Number of bits supported in `hgatp.VMID` (i.e., the supported width + of a virtual machine ID). + + " +long_name: TODO +schema: + RV32: + type: integer + minimum: 0 + maximum: 7 + RV64: + type: integer + minimum: 0 + maximum: 14 +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/VSTVEC_MODE_DIRECT.yaml b/spec/std/isa/param/H/VSTVEC_MODE_DIRECT.yaml new file mode 100644 index 000000000..fb48b70bb --- /dev/null +++ b/spec/std/isa/param/H/VSTVEC_MODE_DIRECT.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: VSTVEC_MODE_DIRECT +description: "Whether or not `vstvec.MODE` supports Direct (0). + + " +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "!VSTVEC_MODE_VECTORED -> VSTVEC_MODE_DIRECT;\n" + reason: At least one vstvec mode must be supported +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/VSTVEC_MODE_VECTORED.yaml b/spec/std/isa/param/H/VSTVEC_MODE_VECTORED.yaml new file mode 100644 index 000000000..1296afbff --- /dev/null +++ b/spec/std/isa/param/H/VSTVEC_MODE_VECTORED.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: VSTVEC_MODE_VECTORED +description: "Whether or not `stvec.MODE` supports Vectored (1). + + " +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "!VSTVEC_MODE_DIRECT -> VSTVEC_MODE_VECTORED;\n" + reason: At least one vstvec mode must be supported +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/VSXLEN.yaml b/spec/std/isa/param/H/VSXLEN.yaml new file mode 100644 index 000000000..36dc3f068 --- /dev/null +++ b/spec/std/isa/param/H/VSXLEN.yaml @@ -0,0 +1,32 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: VSXLEN +description: | + Set of XLENs supported in VS-mode. Can be one of: + + * 32: VSXLEN is always 32 + * 64: VSXLEN is always 64 + * 3264: VSXLEN can be changed (via `hstatus.VSXL`) between 32 and 64 +long_name: TODO +schema: + type: array + items: + enum: + - 32 + - 64 + minItems: 1 + maxItems: 2 + uniqueItems: true +restrictions: + constraint(): "!$ary_includes?(SXLEN, 64) -> !$ary_includes?(VSXLEN, 64)\n" + reason: | + XLEN in VS-mode can never be larger than XLEN in S-mode + (and, transitively, cannot be larger than XLEN in M-mode). +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/VS_MODE_ENDIANNESS.yaml b/spec/std/isa/param/H/VS_MODE_ENDIANNESS.yaml new file mode 100644 index 000000000..c0d13fa84 --- /dev/null +++ b/spec/std/isa/param/H/VS_MODE_ENDIANNESS.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: VS_MODE_ENDIANNESS +description: | + Endianness of data in VS-mode. Can be one of: + + * little: VS-mode data is always little endian + * big: VS-mode data is always big endian + * dynamic: VS-mode data can be either little or big endian, + depending on the CSR field `hstatus.VSBE` +long_name: TODO +schema: + type: string + enum: + - little + - big + - dynamic +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/VUXLEN.yaml b/spec/std/isa/param/H/VUXLEN.yaml new file mode 100644 index 000000000..8ffabfac2 --- /dev/null +++ b/spec/std/isa/param/H/VUXLEN.yaml @@ -0,0 +1,29 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: VUXLEN +description: | + Set of XLENs supported in VU-mode. When both 32 and 64 are supported, VUXLEN can be changed + via `vsstatus.UXL`. +long_name: TODO +schema: + type: array + items: + enum: + - 32 + - 64 + minItems: 1 + maxItems: 2 + uniqueItems: true +restrictions: + constraint(): "!$ary_includes?(VSXLEN, 64) -> !$ary_includes?(VUXLEN, 64)\n" + reason: | + XLEN in VU-mode can never be larger than XLEN in VS-mode + (and, transitively, cannot be larger than XLEN in S-mode or M-mode). +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/H/VU_MODE_ENDIANNESS.yaml b/spec/std/isa/param/H/VU_MODE_ENDIANNESS.yaml new file mode 100644 index 000000000..4bce3069d --- /dev/null +++ b/spec/std/isa/param/H/VU_MODE_ENDIANNESS.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: VU_MODE_ENDIANNESS +description: | + Endianness of data in VU-mode. Can be one of: + + * little: VU-mode data is always little endian + * big: VU-mode data is always big endian + * dynamic: VU-mode data can be either little or big endian, + depending on the CSR field `vsstatus.UBE` +long_name: TODO +schema: + type: string + enum: + - little + - big + - dynamic +definedBy: + extension: + name: H diff --git a/spec/std/isa/param/M/MUTABLE_MISA_M.yaml b/spec/std/isa/param/M/MUTABLE_MISA_M.yaml new file mode 100644 index 000000000..c388110d5 --- /dev/null +++ b/spec/std/isa/param/M/MUTABLE_MISA_M.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_M +description: + "Indicates whether or not the `M` extension can be disabled with the + `misa.M` bit. + + " +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: M diff --git a/spec/std/isa/param/Q/MUTABLE_MISA_Q.yaml b/spec/std/isa/param/Q/MUTABLE_MISA_Q.yaml new file mode 100644 index 000000000..b2c03209f --- /dev/null +++ b/spec/std/isa/param/Q/MUTABLE_MISA_Q.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_Q +description: + "Indicates whether or not the `Q` extension can be disabled with the + `misa.Q` bit. + + " +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Q diff --git a/spec/std/isa/param/S/ASID_WIDTH.yaml b/spec/std/isa/param/S/ASID_WIDTH.yaml new file mode 100644 index 000000000..5f48409b2 --- /dev/null +++ b/spec/std/isa/param/S/ASID_WIDTH.yaml @@ -0,0 +1,26 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: ASID_WIDTH +description: + "Number of implemented ASID bits. Maximum is 16 for XLEN==64, and 9 for + XLEN==32 + + " +long_name: TODO +schema: + RV32: + type: integer + minimum: 0 + maximum: 9 + RV64: + type: integer + minimum: 0 + maximum: 16 +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/HSTATEEN_ENVCFG_TYPE.yaml b/spec/std/isa/param/S/HSTATEEN_ENVCFG_TYPE.yaml new file mode 100644 index 000000000..5c2366f63 --- /dev/null +++ b/spec/std/isa/param/S/HSTATEEN_ENVCFG_TYPE.yaml @@ -0,0 +1,46 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HSTATEEN_ENVCFG_TYPE +description: | + Behavior of the hstateen0.ENVCFG bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +restrictions: + allOf: + - constraint(): + 'MSTATEEN_ENVCFG_TYPE == "read-only-0" -> HSTATEEN_ENVCFG_TYPE == + "read-only-0"; + + ' + reason: When mstateen0.ENVCFG is read-only-0, hstateen0.ENVCFG must also be read-only-0 + - constraint(): + 'MSTATEEN_ENVCFG_TYPE == "read-only-1" -> HSTATEEN_ENVCFG_TYPE == + "read-only-1"; + + ' + reason: When mstateen1.ENVCFG is read-only-1, hstateen0.ENVCFG must also be read-only-1 +definedBy: + allOf: + - extension: + :name: S + - allOf: + - extension: + name: H + version: "~> 1.0" + - extension: + name: Ssstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/S/MSTATEEN_ENVCFG_TYPE.yaml b/spec/std/isa/param/S/MSTATEEN_ENVCFG_TYPE.yaml new file mode 100644 index 000000000..87d56f118 --- /dev/null +++ b/spec/std/isa/param/S/MSTATEEN_ENVCFG_TYPE.yaml @@ -0,0 +1,28 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATEEN_ENVCFG_TYPE +description: | + Behavior of the mstateen0.ENVCFG bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +definedBy: + allOf: + - extension: + :name: S + - extension: + name: Smstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/S/MSTATUS_TVM_IMPLEMENTED.yaml b/spec/std/isa/param/S/MSTATUS_TVM_IMPLEMENTED.yaml new file mode 100644 index 000000000..f118ec0c5 --- /dev/null +++ b/spec/std/isa/param/S/MSTATUS_TVM_IMPLEMENTED.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATUS_TVM_IMPLEMENTED +description: | + Whether or not mstatus.TVM is implemented. + + When not implemented mstatus.TVM will be read-only-zero. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/MSTATUS_VS_LEGAL_VALUES.yaml b/spec/std/isa/param/S/MSTATUS_VS_LEGAL_VALUES.yaml new file mode 100644 index 000000000..83181d603 --- /dev/null +++ b/spec/std/isa/param/S/MSTATUS_VS_LEGAL_VALUES.yaml @@ -0,0 +1,35 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATUS_VS_LEGAL_VALUES +description: + "The set of values that mstatus.VS will accept from a software write. + + " +long_name: TODO +schema: + type: array + items: + type: integer + enum: + - 0 + - 1 + - 2 + - 3 + minItems: 1 + maxItems: 4 + uniqueItems: true +restrictions: + constraint(): | + implemented?(ExtensionName::V) && HW_MSTATUS_VS_DIRTY_UPDATE == "never" + -> $ary_includes?(MSTATUS_VS_LEGAL_VALUES, 3); + reason: + If there is a hardware update to mstatus.VS, then the Dirty state must be + supported +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/MSTATUS_VS_WRITABLE.yaml b/spec/std/isa/param/S/MSTATUS_VS_WRITABLE.yaml new file mode 100644 index 000000000..71a06dd43 --- /dev/null +++ b/spec/std/isa/param/S/MSTATUS_VS_WRITABLE.yaml @@ -0,0 +1,23 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATUS_VS_WRITABLE +description: + "When `S` is enabled but `V` is not, mstatus.VS is optionally writable. + + " +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "implemented?(ExtensionName::V) -> MSTATUS_VS_WRITABLE; + + " + reason: mstatus.VS must be writeable if V is present +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/MUTABLE_MISA_S.yaml b/spec/std/isa/param/S/MUTABLE_MISA_S.yaml new file mode 100644 index 000000000..05dc46f42 --- /dev/null +++ b/spec/std/isa/param/S/MUTABLE_MISA_S.yaml @@ -0,0 +1,26 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_S +description: + "Indicates whether or not the `S` extension can be disabled with the + `misa.S` bit. + + " +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "MUTABLE_MISA_U -> MUTABLE_MISA_S; + + " + reason: + If U-mode can be disabled, then S must also be disabled since S cannot exist + without U (and thus there is no option for MUTABLE_MISA_S). +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION.yaml b/spec/std/isa/param/S/REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION.yaml new file mode 100644 index 000000000..f4c996601 --- /dev/null +++ b/spec/std/isa/param/S/REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION +description: | + When true, `stval` is written with the encoding of an instruction that causes an + `IllegalInstruction` exception. + + When false `stval` is written with 0 when an `IllegalInstruction` exception occurs. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT.yaml b/spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT.yaml new file mode 100644 index 000000000..c8dcffe11 --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT +description: | + When true, `mtval` is written with the virtual PC of an instructino when fetch causes an + `InstructionPageFault`. + + WHen false, `mtval` is written with 0 when an instruction fetch causes an + `InstructionPageFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT.yaml b/spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT.yaml new file mode 100644 index 000000000..8aa88cacc --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT +description: | + When true, `mtval` is written with the virtual address of a load when it causes a + `LoadPageFault`. + + WHen false, `mtval` is written with 0 when a load causes a `LoadPageFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT.yaml b/spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT.yaml new file mode 100644 index 000000000..34a11d767 --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT +description: | + When true, `mtval` is written with the virtual address of a store when it causes a + `StoreAmoPageFault`. + + WHen false, `mtval` is written with 0 when a store causes a `StoreAmoPageFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_BREAKPOINT.yaml b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_BREAKPOINT.yaml new file mode 100644 index 000000000..e1a6ebaad --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_BREAKPOINT.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_STVAL_ON_BREAKPOINT +description: | + When true, `stval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`). + + When false, `stval` is written with 0 on an EBREAK instruction. + + Regardless, `stval` is always written with a virtual PC when an external breakpoint is generated +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml new file mode 100644 index 000000000..215d659a1 --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_STVAL_ON_INSTRUCTION_ACCESS_FAULT +description: | + When true, `stval` is written with the virtual PC of an instructino when fetch causes an + `InstructionAccessFault`. + + WHen false, `stval` is written with 0 when an instruction fetch causes an + `InstructionAccessFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED.yaml b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED.yaml new file mode 100644 index 000000000..6ff68a980 --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED.yaml @@ -0,0 +1,21 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED +description: | + When true, `stval` is written with the virtual PC when an instruction fetch is misaligned. + + When false, `stval` is written with 0 when an instruction fetch is misaligned. + + Note that when IALIGN=16 (i.e., when the `C` or one of the `Zc*` extensions are implemented), + it is impossible to generate a misaligned fetch, and so this parameter has no effect. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT.yaml b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT.yaml new file mode 100644 index 000000000..fe5c74336 --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT +description: | + When true, `stval` is written with the virtual PC of an instructino when fetch causes an + `InstructionPageFault`. + + WHen false, `stval` is written with 0 when an instruction fetch causes an + `InstructionPageFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT.yaml b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT.yaml new file mode 100644 index 000000000..83cf3eb53 --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT +description: | + When true, `stval` is written with the virtual address of a load when it causes a + `LoadAccessFault`. + + WHen false, `stval` is written with 0 when a load causes a `LoadAccessFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED.yaml b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED.yaml new file mode 100644 index 000000000..dbe6c9826 --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED +description: | + When true, `stval` is written with the virtual address of a load instruction when the + address is misaligned and MISALIGNED_LDST is false. + + When false, `stval` is written with 0 when a load address is misaligned and + MISALIGNED_LDST is false. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_PAGE_FAULT.yaml b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_PAGE_FAULT.yaml new file mode 100644 index 000000000..e38ce09a4 --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_LOAD_PAGE_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_STVAL_ON_LOAD_PAGE_FAULT +description: | + When true, `stval` is written with the virtual address of a load when it causes a + `LoadPageFault`. + + WHen false, `stval` is written with 0 when a load causes a `LoadPageFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_ACCESS_FAULT.yaml b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_ACCESS_FAULT.yaml new file mode 100644 index 000000000..8dd810074 --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_ACCESS_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_STVAL_ON_STORE_AMO_ACCESS_FAULT +description: | + When true, `stval` is written with the virtual address of a store when it causes a + `StoreAmoAccessFault`. + + WHen false, `stval` is written with 0 when a store causes a `StoreAmoAccessFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED.yaml b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED.yaml new file mode 100644 index 000000000..205b28eca --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED +description: | + When true, `stval` is written with the virtual address of a store instruction when the + address is misaligned and MISALIGNED_LDST is false. + + When false, `stval` is written with 0 when a store address is misaligned and + MISALIGNED_LDST is false. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT.yaml b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT.yaml new file mode 100644 index 000000000..69319001a --- /dev/null +++ b/spec/std/isa/param/S/REPORT_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT +description: | + When true, `stval` is written with the virtual address of a store when it causes a + `StoreAmoPageFault`. + + WHen false, `stval` is written with 0 when a store causes a `StoreAmoPageFault`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/SATP_MODE_BARE.yaml b/spec/std/isa/param/S/SATP_MODE_BARE.yaml new file mode 100644 index 000000000..3f0764b6a --- /dev/null +++ b/spec/std/isa/param/S/SATP_MODE_BARE.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: SATP_MODE_BARE +description: "Whether or not satp.MODE == Bare is supported. + + " +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/SCOUNTENABLE_EN.yaml b/spec/std/isa/param/S/SCOUNTENABLE_EN.yaml new file mode 100644 index 000000000..8d4b047e5 --- /dev/null +++ b/spec/std/isa/param/S/SCOUNTENABLE_EN.yaml @@ -0,0 +1,49 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: SCOUNTENABLE_EN +description: | + Indicates which counters can delegated via `scounteren` + + An unimplemented counter cannot be specified, i.e., if + HPM_COUNTER_EN[3] is false, it would be illegal to set + SCOUNTENABLE_EN[3] to true. + + SCOUNTENABLE_EN[0:2] must all be false if `Zicntr` is not implemented. + SCOUNTENABLE_EN[3:31] must all be false if `Zihpm` is not implemented. +long_name: TODO +schema: + type: array + items: + type: boolean + maxItems: 32 + minItems: 32 +restrictions: + allOf: + - constraint(): | + for (U32 i = 0; i < 3; i++) { + !implemented?(ExtensionName::Zicntr) -> !SCOUNTENABLE_EN[i]; + } + reason: Counters 0-2 are defined by Zicntr + - constraint(): | + for (U32 i = 3; i < 32; i++) { + !implemented?(ExtensionName::Zihpm) -> !SCOUNTENABLE_EN[i]; + } + reason: Counters 3..31 are defined by Zihpm + - constraint(): | + for (U32 i = 3; i < 32; i++) { + !HPM_COUNTER_EN -> !SCOUNTENABLE_EN[i]; + } + reason: When mhpmcounter[i] does not exist, it cannot be enabled. +definedBy: + allOf: + - extension: + :name: S + - extension: + anyOf: + - name: Zicntr + - name: Zihpm diff --git a/spec/std/isa/param/S/STVAL_WIDTH.yaml b/spec/std/isa/param/S/STVAL_WIDTH.yaml new file mode 100644 index 000000000..d7938a219 --- /dev/null +++ b/spec/std/isa/param/S/STVAL_WIDTH.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: STVAL_WIDTH +description: | + The number of implemented bits in `stval`. + + Must be greater than or equal to _max_(`PHYS_ADDR_WIDTH`, `VA_SIZE`) +long_name: TODO +schema: + type: integer + maximum: 18446744073709551615 +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/STVEC_MODE_DIRECT.yaml b/spec/std/isa/param/S/STVEC_MODE_DIRECT.yaml new file mode 100644 index 000000000..0b66d7174 --- /dev/null +++ b/spec/std/isa/param/S/STVEC_MODE_DIRECT.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: STVEC_MODE_DIRECT +description: "Whether or not `stvec.MODE` supports Direct (0). + + " +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "!STVEC_MODE_VECTORED -> STVEC_MODE_DIRECT;\n" + reason: stvec must support at least one mode +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/STVEC_MODE_VECTORED.yaml b/spec/std/isa/param/S/STVEC_MODE_VECTORED.yaml new file mode 100644 index 000000000..86a2f0a1f --- /dev/null +++ b/spec/std/isa/param/S/STVEC_MODE_VECTORED.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: STVEC_MODE_VECTORED +description: "Whether or not `stvec.MODE` supports Vectored (1). + + " +long_name: TODO +schema: + type: boolean +restrictions: + constraint(): "!STVEC_MODE_DIRECT -> STVEC_MODE_VECTORED;\n" + reason: stvec must support at least one mode +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/SXLEN.yaml b/spec/std/isa/param/S/SXLEN.yaml new file mode 100644 index 000000000..6f80a578e --- /dev/null +++ b/spec/std/isa/param/S/SXLEN.yaml @@ -0,0 +1,32 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: SXLEN +description: | + Set of XLENs supported in S-mode. Can be one of: + + * 32: SXLEN is always 32 + * 64: SXLEN is always 64 + * 3264: SXLEN can be changed (via mstatus.SXL) between 32 and 64 +long_name: TODO +schema: + type: array + items: + enum: + - 32 + - 64 + minItems: 1 + maxItems: 2 + uniqueItems: true +restrictions: + constraint(): "!$ary_includes?(MXLEN, 64) -> !$ary_includes?(SXLEN, 64);\n" + reason: "XLEN in S-mode can never be larger than XLEN in M-mode + + " +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/S_MODE_ENDIANNESS.yaml b/spec/std/isa/param/S/S_MODE_ENDIANNESS.yaml new file mode 100644 index 000000000..40ef0cdc7 --- /dev/null +++ b/spec/std/isa/param/S/S_MODE_ENDIANNESS.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: S_MODE_ENDIANNESS +description: | + Endianness of data in S-mode. Can be one of: + + * little: S-mode data is always little endian + * big: S-mode data is always big endian + * dynamic: S-mode data can be either little or big endian, + depending on the CSR field `mstatus.SBE` +long_name: TODO +schema: + type: string + enum: + - little + - big + - dynamic +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/TRAP_ON_ECALL_FROM_S.yaml b/spec/std/isa/param/S/TRAP_ON_ECALL_FROM_S.yaml new file mode 100644 index 000000000..136adaec8 --- /dev/null +++ b/spec/std/isa/param/S/TRAP_ON_ECALL_FROM_S.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TRAP_ON_ECALL_FROM_S +description: | + Whether or not an ECALL-from-S-mode causes a synchronous exception. + + The spec states that implementations may handle ECALLs transparently + without raising a trap, in which case the EEI must provide a builtin. +long_name: TODO +schema: + type: boolean + default: true +definedBy: + extension: + name: S diff --git a/spec/std/isa/param/S/TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml b/spec/std/isa/param/S/TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml new file mode 100644 index 000000000..168ba1e59 --- /dev/null +++ b/spec/std/isa/param/S/TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml @@ -0,0 +1,32 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY +description: | + For implementations that make `satp`.MODE read-only zero + (always Bare, _i.e._, no virtual translation is implemented), + attempts to execute an SFENCE.VMA instruction might raise an + illegal-instruction exception. + + TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY indicates whether + or not that exception occurs. + + TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY has no effect when + some virtual translation mode is supported. +long_name: TODO +schema: + type: boolean +definedBy: + allOf: + - extension: + :name: S + - extension: + noneOf: + - name: Sv32 + - name: Sv39 + - name: Sv48 + - name: Sv57 diff --git a/spec/std/isa/param/Sdtrig/HSTATEEN_CONTEXT_TYPE.yaml b/spec/std/isa/param/Sdtrig/HSTATEEN_CONTEXT_TYPE.yaml new file mode 100644 index 000000000..2df2c791d --- /dev/null +++ b/spec/std/isa/param/Sdtrig/HSTATEEN_CONTEXT_TYPE.yaml @@ -0,0 +1,50 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HSTATEEN_CONTEXT_TYPE +description: | + Behavior of the hstateen0.CONTEXT bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +restrictions: + allOf: + - constraint(): + 'MSTATEEN_CONTEXT_TYPE == "read-only-0" -> HSTATEEN_CONTEXT_TYPE + == "read-only-0"; + + ' + reason: + When mstateen0.CONTEXT is read-only-0, hstateen0.CONTEXT must also be + read-only-0 + - constraint(): + 'MSTATEEN_CONTEXT_TYPE == "read-only-1" -> HSTATEEN_CONTEXT_TYPE + == "read-only-1"; + + ' + reason: + When mstateen0.CONTEXT is read-only-1, hstateen0.CONTEXT must also be + read-only-1 +definedBy: + allOf: + - extension: + :name: Sdtrig + - allOf: + - extension: + name: H + version: "~> 1.0" + - extension: + name: Ssstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/Sdtrig/MSTATEEN_CONTEXT_TYPE.yaml b/spec/std/isa/param/Sdtrig/MSTATEEN_CONTEXT_TYPE.yaml new file mode 100644 index 000000000..80d5cc24c --- /dev/null +++ b/spec/std/isa/param/Sdtrig/MSTATEEN_CONTEXT_TYPE.yaml @@ -0,0 +1,28 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATEEN_CONTEXT_TYPE +description: | + Behavior of the mstateen0.CONTEXT bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +definedBy: + allOf: + - extension: + :name: Sdtrig + - extension: + name: Smstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/Sm/ARCH_ID_VALUE.yaml b/spec/std/isa/param/Sm/ARCH_ID_VALUE.yaml new file mode 100644 index 000000000..ec2bc5c4b --- /dev/null +++ b/spec/std/isa/param/Sm/ARCH_ID_VALUE.yaml @@ -0,0 +1,35 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: ARCH_ID_VALUE +long_name: Vendor-specific architecture ID in `marchid` +definedBy: + allOf: + - extension: + name: Sm + - param: + name: ARCH_ID_IMPLEMENTED + equal: true + reason: When `marchid` is not implemented, its value is not relevant. +description: | + The value of `marchid` + The combination of mvendorid and marchid should uniquely identify the type of hart microarchitecture that is implemented. +schema: + rv32: + allOf: + - $ref: schema_defs.json#/$defs/uint32 + - not: + anyOf: + - const: 0 + - const: 0x80000000 # "Commercial architecture IDs are allocated by each commercial vendor independently, but must have the MSB set and cannot contain zero in the remaining MXLEN-1 bits." + rv64: + allOf: + - $ref: schema_defs.json#/$defs/uint64 + - not: + anyOf: + - const: 0 + - const: 0x8000000000000000 # "Commercial architecture IDs are allocated by each commercial vendor independently, but must have the MSB set and cannot contain zero in the remaining MXLEN-1 bits." diff --git a/spec/std/isa/param/Sm/CONFIG_PTR_ADDRESS.yaml b/spec/std/isa/param/Sm/CONFIG_PTR_ADDRESS.yaml new file mode 100644 index 000000000..25c147b37 --- /dev/null +++ b/spec/std/isa/param/Sm/CONFIG_PTR_ADDRESS.yaml @@ -0,0 +1,31 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: CONFIG_PTR_ADDRESS +long_name: | + Physical address in `mconfigptr` +definedBy: + allOf: + - extension: + name: Sm + version: ">= 1.12.0" +description: | + The value returned from `mconfigptr` + +schema: + rv32: + $ref: schema_defs.json#/$defs/uint32 + rv64: + $ref: schema_defs.json#/$defs/uint64 + +restrictions: + constraint(): | + (MXLEN == 32) -> (CONFIG_PTR_ADDRESS[2:0] == 0); + (MXLEN == 64) -> (CONFIG_PTR_ADDRESS[3:0] == 0); + reason: | + The pointer alignment in bits must be no smaller than MXLEN: + i.e., if MXLEN is 8 x n, then mconfigptr[(log2(n)-1:0] must be zero. diff --git a/spec/std/isa/param/Sm/IMP_ID_VALUE.yaml b/spec/std/isa/param/Sm/IMP_ID_VALUE.yaml new file mode 100644 index 000000000..0fcf67647 --- /dev/null +++ b/spec/std/isa/param/Sm/IMP_ID_VALUE.yaml @@ -0,0 +1,24 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: IMP_ID_VALUE +long_name: Vendor-specific implementation ID in `mimpid` +definedBy: + allOf: + - extension: + name: Sm + - param: + name: MIMPID_IMPLEMENTED + equal: true + reason: IMP_ID_VALUE is not needed if `mimpid` is not implemented. +description: | + A unique encoding of the version of the processor implementation. +schema: + rv32: + $ref: schema_defs.json#/$defs/uint32 + rv64: + $ref: schema_defs.json#/$defs/uint64 diff --git a/spec/std/isa/param/Sm/MARCHID_IMPLEMENTED.yaml b/spec/std/isa/param/Sm/MARCHID_IMPLEMENTED.yaml new file mode 100644 index 000000000..48b8c3ee4 --- /dev/null +++ b/spec/std/isa/param/Sm/MARCHID_IMPLEMENTED.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MARCHID_IMPLEMENTED +long_name: Whether or not the `marchid` CSR is implemented. +definedBy: + extension: + name: Sm +description: | + * false: `marchid` is not implemented, and must be read-only-0 + * true: `marchid` is implemented, and the value is determined by `ARCH_ID_VALUE` +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/MIMPID_IMPLEMENTED.yaml b/spec/std/isa/param/Sm/MIMPID_IMPLEMENTED.yaml new file mode 100644 index 000000000..4a3f8bb26 --- /dev/null +++ b/spec/std/isa/param/Sm/MIMPID_IMPLEMENTED.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MIMPID_IMPLEMENTED +long_name: Whether or not the `mimpid` CSR is implemented. +definedBy: + extension: + name: Sm +description: | + * false: `mimpid` is not implemented, and must be read-only-0 + * true: `mimpid` is implemented, and the value is determined by `IMP_ID_VALUE` +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/MISALIGNED_LDST.yaml b/spec/std/isa/param/Sm/MISALIGNED_LDST.yaml new file mode 100644 index 000000000..dedc22205 --- /dev/null +++ b/spec/std/isa/param/Sm/MISALIGNED_LDST.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MISALIGNED_LDST +long_name: Support for misaligned loads and stores to main memory. +definedBy: + allOf: + - extension: + name: Sm +description: | + Does the implementation perform non-atomic misaligned loads and stores to main memory + (does *not* affect misaligned support to device memory)? + If not, the implementation always throws a misaligned exception. +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/MISALIGNED_LDST_EXCEPTION_PRIORITY.yaml b/spec/std/isa/param/Sm/MISALIGNED_LDST_EXCEPTION_PRIORITY.yaml new file mode 100644 index 000000000..06435a0dd --- /dev/null +++ b/spec/std/isa/param/Sm/MISALIGNED_LDST_EXCEPTION_PRIORITY.yaml @@ -0,0 +1,40 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MISALIGNED_LDST_EXCEPTION_PRIORITY +long_name: | + The relative priority of a load/store/AMO exception vs. load/store/AMO page-fault + or access-fault exceptions. +definedBy: + allOf: + - extension: + name: Sm +description: | + The relative priority of a load/store/AMO exception vs. load/store/AMO page-fault + or access-fault exceptions. + + May be one of: + + [separator="!"] + !=== + ! low ! Misaligned load/store/AMO exceptions are always lower priority than load/store/AMO page-fault and access-fault exceptions. + ! high ! Misaligned load/store/AMO exceptions are always higher priority than load/store/AMO page-fault and access-fault exceptions. + !=== + + MISALIGNED_LDST_EXCEPTION_PRIORITY cannot be "high" when MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE + is non-zero, since the atomicity of an access cannot be determined in that case until after + address translation. +schema: + type: string + enum: ["low", "high"] +restrictions: + constraint(): | + (MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE > 1) -> (MISALIGNED_LDST_EXCEPTION_PRIORITY == "low"); + reason: + MISALIGNED_LDST_EXCEPTION_PRIORITY cannot be "high" when MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE + is non-zero, since the atomicity of an access cannot be determined in that case until after + address translation. diff --git a/spec/std/isa/param/Sm/MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE.yaml b/spec/std/isa/param/Sm/MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE.yaml new file mode 100644 index 000000000..bc9a83a29 --- /dev/null +++ b/spec/std/isa/param/Sm/MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE.yaml @@ -0,0 +1,40 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE +long_name: | + The maximum granule size, in bytes, that the hart can atomically perform a + misaligned load/store/AMO without raising a Misaligned exception +definedBy: + allOf: + - extension: + name: Sm + - param: + name: MISALIGNED_LDST + equal: true + reason: Granule size is only relevant when misaligned load/stores might execute without an exception. +description: | + When MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE is 0, the hart + cannot atomically perform a misaligned load/store/AMO. When a power of two, the hart can + atomically load/store/AMO a misaligned access that is fully contained in a + MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE-aligned region. + + [NOTE] + Even if the hart is capable of performing a misaligned load/store/AMO atomically, + a misaligned exception may still occur if the access does not have the appropriate + Misaligned Atomicity Granule PMA set. +schema: + type: integer + # can't be larger than a page, since there is no way to reconcile that with virtual memory + enum: [0, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096] +restrictions: + constraint(): | + (MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE > 1) -> (MISALIGNED_LDST_EXCEPTION_PRIORITY == "low"); + reason: + MISALIGNED_LDST_EXCEPTION_PRIORITY cannot be "high" when MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE + is non-zero, since the atomicity of an access cannot be determined in that case until after + address translation. diff --git a/spec/std/isa/param/Sm/MISALIGNED_SPLIT_STRATEGY.yaml b/spec/std/isa/param/Sm/MISALIGNED_SPLIT_STRATEGY.yaml new file mode 100644 index 000000000..06bfddc1a --- /dev/null +++ b/spec/std/isa/param/Sm/MISALIGNED_SPLIT_STRATEGY.yaml @@ -0,0 +1,29 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MISALIGNED_SPLIT_STRATEGY +long_name: | + The *order* the implementation appears + to process a non-atomic misaligned load/store, which determines how/which + exceptions will be reported. +definedBy: + allOf: + - extension: + name: Sm + - param: + name: MISALIGNED_LDST + equal: true + reason: Granule size is only relevant when misaligned load/stores might execute without an exception. +description: | + Options: + + * sequential_bytes: The load/store appears to be broken into byte-sized accesses that processed sequentially from smallest address to largest address + * custom: Something else. Will result in a call to unpredictable() in the execution + +schema: + type: string + enum: [sequential_bytes, custom] diff --git a/spec/std/isa/param/Sm/MISA_CSR_IMPLEMENTED.yaml b/spec/std/isa/param/Sm/MISA_CSR_IMPLEMENTED.yaml new file mode 100644 index 000000000..2ec5374cb --- /dev/null +++ b/spec/std/isa/param/Sm/MISA_CSR_IMPLEMENTED.yaml @@ -0,0 +1,24 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MISA_CSR_IMPLEMENTED +long_name: | + Whether or not the `misa` CSR is implemented +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + true:: + The `misa` CSR returns a non-zero value. + + false:: + The `misa` CSR is read-only-0. +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/MTVAL_WIDTH.yaml b/spec/std/isa/param/Sm/MTVAL_WIDTH.yaml new file mode 100644 index 000000000..092d8fa59 --- /dev/null +++ b/spec/std/isa/param/Sm/MTVAL_WIDTH.yaml @@ -0,0 +1,63 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MTVAL_WIDTH +long_name: | + Width of the `mtval` CSR +definedBy: + allOf: + - extension: + name: Sm +description: | + The number of implemented bits in the `mtval` CSR. + This is the CSR that may be written when a trap is taken into M-mode with exception-specific information to + assist software in handling the trap (e.g., address associated with exception). + + Must be greater than or equal to _max_(`PHYS_ADDR_WIDTH`, `VA_SIZE`) + +schema: + rv32: + type: integer + minimum: 0 + maximum: 32 + rv64: + type: integer + minimum: 0 + maximum: 64 + +restrictions: + constraint(): | + ( + implemented?(ExtensionName::Sdext) || + REPORT_VA_IN_MTVAL_ON_BREAKPOINT || + REPORT_VA_IN_MTVAL_ON_ILLEGAL_INSTRUCTION || + REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED || + REPORT_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED || + REPORT_VA_IN_MTVAL_ON_INSTRUCTION_MISALIGNED || + REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT || + REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT || + REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT || + ) -> (MTVAL_WIDTH >= PHYS_ADDR_WIDTH); + + ( + implemented?(ExtensionName::S) && + ( + implemented?(ExtensionName::Sdext) || + REPORT_VA_IN_MTVAL_ON_BREAKPOINT || + REPORT_VA_IN_MTVAL_ON_ILLEGAL_INSTRUCTION || + REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED || + REPORT_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED || + REPORT_VA_IN_MTVAL_ON_INSTRUCTION_MISALIGNED || + REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT || + REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT || + REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT + ) + ) -> (MTVAL_WIDTH >= VA_SIZE); + + REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION -> (MTVAL_WIDTH >= INSTR_ENC_SIZE); + reason: | + `mtval` must be able to hold physical and/or virtual addresses diff --git a/spec/std/isa/param/Sm/MTVEC_ACCESS.yaml b/spec/std/isa/param/Sm/MTVEC_ACCESS.yaml new file mode 100644 index 000000000..d934180b1 --- /dev/null +++ b/spec/std/isa/param/Sm/MTVEC_ACCESS.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MTVEC_ACCESS +long_name: | + Acess type of the `mtvec` CSR (read-only or read-write). +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + read-only:: + `mtvec` is read-only. + + read-write:: + `mtvec` is read-write, but may not accept all values. +schema: + type: string + enum: ["read-only", "read-write"] diff --git a/spec/std/isa/param/Sm/MTVEC_BASE_ALIGNMENT_DIRECT.yaml b/spec/std/isa/param/Sm/MTVEC_BASE_ALIGNMENT_DIRECT.yaml new file mode 100644 index 000000000..c72d9e9f4 --- /dev/null +++ b/spec/std/isa/param/Sm/MTVEC_BASE_ALIGNMENT_DIRECT.yaml @@ -0,0 +1,38 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MTVEC_BASE_ALIGNMENT_DIRECT +long_name: | + Minumum alignment of `mtvec.BASE` when `mtvec.MODE` is 0 (direct) +definedBy: + allOf: + - extension: + name: Sm + - param: + allOf: + - name: MTVEC_MODES + includes: 0 + reason: Only relevant when direct mode is supported + - name: MTVEC_ACCESS + equal: read-write + reason: Base address is hard-coded when MTVEC_ACCESS is read-only +description: | + Minimum alignement of the base pointer. Because `mtvec` excludes the two least-significant bits of + the base, the minimum alignment cannot be less than 4. +schema: + rv32: + # power of 2 between 4 and 2^31 + allOf: + - $ref: schema_defs.json#/$defs/32bit_unsigned_pow2 + - not: + enum: [1, 2] + rv64: + # power of 2 between 4 and 2^63 + allOf: + - $ref: schema_defs.json#/$defs/64bit_unsigned_pow2 + - not: + enum: [1, 2] diff --git a/spec/std/isa/param/Sm/MTVEC_BASE_ALIGNMENT_VECTORED.yaml b/spec/std/isa/param/Sm/MTVEC_BASE_ALIGNMENT_VECTORED.yaml new file mode 100644 index 000000000..e05ba532d --- /dev/null +++ b/spec/std/isa/param/Sm/MTVEC_BASE_ALIGNMENT_VECTORED.yaml @@ -0,0 +1,38 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MTVEC_BASE_ALIGNMENT_VECTORED +long_name: | + Minumum alignment of `mtvec.BASE` when `mtvec.MODE` is 1 (vectored) +definedBy: + allOf: + - extension: + name: Sm + - param: + allOf: + - name: MTVEC_MODES + includes: 1 + reason: Only relevant when vectored mode is supported + - name: MTVEC_ACCESS + equal: read-write + reason: Base address is hard-coded when MTVEC_ACCESS is read-only +description: | + Because `mtvec` excludes the two least-significant bits of + the base, the minimum alignment cannot be less than 4. +schema: + rv32: + # power of 2 between 4 and 2^31 + allOf: + - $ref: schema_defs.json#/$defs/32bit_unsigned_pow2 + - not: + enum: [1, 2] + rv64: + # power of 2 between 4 and 2^63 + allOf: + - $ref: schema_defs.json#/$defs/64bit_unsigned_pow2 + - not: + enum: [1, 2] diff --git a/spec/std/isa/param/Sm/MTVEC_ILLEGAL_WRITE_BEHAVIOR.yaml b/spec/std/isa/param/Sm/MTVEC_ILLEGAL_WRITE_BEHAVIOR.yaml new file mode 100644 index 000000000..aa9875336 --- /dev/null +++ b/spec/std/isa/param/Sm/MTVEC_ILLEGAL_WRITE_BEHAVIOR.yaml @@ -0,0 +1,27 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: ILLEGAL_MTVEC_BEHAVIOR +long_name: | + What happens when `mtvec` is written with an illegal value +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + retain:: + When either `mtvec.MODE` or `mtvec.BASE` is illegal, `mtvec` will retain its curent value + + custom:: + When either `mtvec.MODE` or `mtvec.BASE` is illegal, `mtvec` will obtain an unpredictable value + + Other values may be added over time once other common behaviors are identified. +schema: + type: array + enum: [retain, custom] diff --git a/spec/std/isa/param/Sm/MTVEC_MODES.yaml b/spec/std/isa/param/Sm/MTVEC_MODES.yaml new file mode 100644 index 000000000..bf63fa6c5 --- /dev/null +++ b/spec/std/isa/param/Sm/MTVEC_MODES.yaml @@ -0,0 +1,36 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MTVEC_MODES +long_name: | + Modes supported by `mtvec.MODE` +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + 0:: + Direct; All traps set `pc` to `mtvec.BASE` + 1:: + Vectored; Asynchronous interrupts set `pc` to `mtvec.BASE` + 4 x cause. + + If only one mode is given, `mtvec.MODE` is assumed to be read-only with that value. + Otherwise, `mtvec.MODE` is read-write. +schema: + type: array + items: + type: integer + enum: [0, 1] + minItems: 1 + maxItems: 2 + uniqueItems: true +restrictions: + constraint(): | + (MTVEC_ACCESS == "read-only") -> ($ary_size(MTVEC_MODES) == 1); + reason: If `mtvec` is read-only, the mode cannot be changed. diff --git a/spec/std/isa/param/Sm/MXLEN.yaml b/spec/std/isa/param/Sm/MXLEN.yaml new file mode 100644 index 000000000..b6b5500da --- /dev/null +++ b/spec/std/isa/param/Sm/MXLEN.yaml @@ -0,0 +1,16 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MXLEN +long_name: XLEN in machine mode +definedBy: + extension: + name: Sm +description: XLEN in machine mode, specified in bits +schema: + type: integer + enum: [32, 64] diff --git a/spec/std/isa/param/Sm/M_MODE_ENDIANESS.yaml b/spec/std/isa/param/Sm/M_MODE_ENDIANESS.yaml new file mode 100644 index 000000000..5a1ac9f0b --- /dev/null +++ b/spec/std/isa/param/Sm/M_MODE_ENDIANESS.yaml @@ -0,0 +1,27 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: M_MODE_ENDIANNESS +long_name: | + Endianness of data in M-mode +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + [separator="!"] + !=== + h! little ! M-mode data is always little endian + h! big ! M-mode data is always big endian + h! dynamic ! M-mode data can be either little or big endian, + depending on the CSR field `mstatus.MBE` + !=== +schema: + type: string + enum: [little, big, dynamic] diff --git a/spec/std/isa/param/Sm/PHYS_ADDR_WIDTH.yaml b/spec/std/isa/param/Sm/PHYS_ADDR_WIDTH.yaml new file mode 100644 index 000000000..e33cc98c9 --- /dev/null +++ b/spec/std/isa/param/Sm/PHYS_ADDR_WIDTH.yaml @@ -0,0 +1,29 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: PHYS_ADDR_WIDTH +long_name: | + Number of bits in a physical address +definedBy: + allOf: + - extension: + name: Sm +description: | + Implementation-defined size of the physical address space. +schema: + rv32: + type: integer + minimum: 1 + maximum: 34 + rv64: + type: integer + minimum: 1 + maximum: 64 +restrictions: + constraint(): | + (MXLEN == 32) && !implemented?(ExtensionName::Sv32) -> (PHYS_ADDR_WIDTH <= 32); + reason: without Sv32 translation, there is no way to create an address > 32 bits diff --git a/spec/std/isa/param/Sm/PMA_GRANULARITY.yaml b/spec/std/isa/param/Sm/PMA_GRANULARITY.yaml new file mode 100644 index 000000000..1c0aa0669 --- /dev/null +++ b/spec/std/isa/param/Sm/PMA_GRANULARITY.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: PMP_GRANULARITY +long_name: | + log2 of the smallest supported PMA region +definedBy: + allOf: + - extension: + name: Sm +description: | + Generally, for systems with an MMU, should not be smaller than 12, + as that would preclude caching PMP results in the TLB along with + virtual memory translations +schema: + type: integer + minimum: 2 + maximum: 66 diff --git a/spec/std/isa/param/Sm/PRECISE_SYNCHRONOUS_EXCEPTIONS.yaml b/spec/std/isa/param/Sm/PRECISE_SYNCHRONOUS_EXCEPTIONS.yaml new file mode 100644 index 000000000..00d242621 --- /dev/null +++ b/spec/std/isa/param/Sm/PRECISE_SYNCHRONOUS_EXCEPTIONS.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: PRECISE_SYNCHRONOUS_EXCEPTIONS +long_name: Whether or not all synchronous exceptions are precise. +definedBy: + extension: + name: Sm +description: | + If false, any exception not otherwise mandated to precise (e.g., PMP violation) + will cause execution to enter an unpredictable state. +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION.yaml b/spec/std/isa/param/Sm/REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION.yaml new file mode 100644 index 000000000..ababb8222 --- /dev/null +++ b/spec/std/isa/param/Sm/REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_ILLEGAL_INSTRUCTION +long_name: | + Whether or not `mtval` is written with the encoding of an instruction causing an IllegalInstruction exception +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: `mtval` is written with the encoding of an instruction causing an IllegalInstruction exception + * false: `mtval` is written with 0 when an instruction causes an IllegalInstruction exception. + +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_BREAKPOINT.yaml b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_BREAKPOINT.yaml new file mode 100644 index 000000000..4ba4521e2 --- /dev/null +++ b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_BREAKPOINT.yaml @@ -0,0 +1,24 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_BREAKPOINT +long_name: | + Whether or not `mtval` is written with the virtual PC of an EBREAK instruction. +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: `mtval` is written with the virtual PC of an EBREAK instruction (same information as `mepc`). + * false: `mtval` is written with 0 on an EBREAK instruction. + + Regardless, `mtval` is always written with a virtual PC when an external breakpoint is generated + +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml new file mode 100644 index 000000000..158145a12 --- /dev/null +++ b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS +long_name: | + Whether or not `mtval` is written with the virtual address of a fetch causing an access fault +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: `mtval` is written with the virtual address of a fetch causing the access fault + * false: `mtval` is written with 0 when a fetch causes an access fault + +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT.yaml b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT.yaml new file mode 100644 index 000000000..cb83011a8 --- /dev/null +++ b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS +long_name: | + Whether or not `mtval` is written with the virtual address of a load causing an access fault +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: `mtval` is written with the virtual address of a load causing the access fault + * false: `mtval` is written with 0 when a load causes an access fault + +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED.yaml b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED.yaml new file mode 100644 index 000000000..feb913a1a --- /dev/null +++ b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED +long_name: | + Whether or not `mtval` is written with the virtual address of a misaligned load +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: `mtval` is written with the virtual address of a trapping misaligned load. + * false: `mtval` is written with 0 when a misaligned load traps. + +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT.yaml b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT.yaml new file mode 100644 index 000000000..18ed8c6b3 --- /dev/null +++ b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS +long_name: | + Whether or not `mtval` is written with the virtual address of a store or AMO causing an access fault +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: `mtval` is written with the virtual address of a store or AMO causing the access fault + * false: `mtval` is written with 0 when a store or AMO causes an access fault + +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED.yaml b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED.yaml new file mode 100644 index 000000000..a1d59ffc9 --- /dev/null +++ b/spec/std/isa/param/Sm/REPORT_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED +long_name: | + Whether or not `mtval` is written with the virtual address of a misaligned store or AMO +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: `mtval` is written with the virtual address of a trapping misaligned store or AMO. + * false: `mtval` is written with 0 when a misaligned store or AMO traps. + +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/REPORT_VS_IN_MTVAL_ON_INSTRUCTION_MISALIGNED.yaml b/spec/std/isa/param/Sm/REPORT_VS_IN_MTVAL_ON_INSTRUCTION_MISALIGNED.yaml new file mode 100644 index 000000000..2a8f07999 --- /dev/null +++ b/spec/std/isa/param/Sm/REPORT_VS_IN_MTVAL_ON_INSTRUCTION_MISALIGNED.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_VA_IN_MTVAL_ON_INSTRUCTION_MISALIGNED +long_name: | + Whether or not `mtval` is written with the virtual address of a misaligned fetch +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: `mtval` is written with the virtual address of a trapping misaligned fetch + * false: `mtval` is written with 0 when a misaligned fetch traps + +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/TRAP_ON_EBREAK.yaml b/spec/std/isa/param/Sm/TRAP_ON_EBREAK.yaml new file mode 100644 index 000000000..1d93cdf97 --- /dev/null +++ b/spec/std/isa/param/Sm/TRAP_ON_EBREAK.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TRAP_ON_EBREAK +long_name: Whether or not an EBREAK causes a synchronous exception. +definedBy: + extension: + name: Sm +description: | + The spec states that implementations may handle EBREAKs transparently + without raising a trap, in which case the EEI must provide a builtin. +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/TRAP_ON_ECALL_FROM_M.yaml b/spec/std/isa/param/Sm/TRAP_ON_ECALL_FROM_M.yaml new file mode 100644 index 000000000..a3c5efc2d --- /dev/null +++ b/spec/std/isa/param/Sm/TRAP_ON_ECALL_FROM_M.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TRAP_ON_ECALL_FROM_M +long_name: Whether or not an ECALL-from-M-mode causes a synchronous exception. +definedBy: + extension: + name: Sm +description: | + The spec states that implementations may handle ECALLs transparently + without raising a trap, in which case the EEI must provide a builtin. +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/TRAP_ON_ILLEGAL_WLRL.yaml b/spec/std/isa/param/Sm/TRAP_ON_ILLEGAL_WLRL.yaml new file mode 100644 index 000000000..f100ee62e --- /dev/null +++ b/spec/std/isa/param/Sm/TRAP_ON_ILLEGAL_WLRL.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TRAP_ON_ILLEGAL_WLRL +long_name: | + Whether or not writing an illegal value to a WLRL CSR field causes a trap. +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: Writing an illegal value to a WLRL CSR field will cause an IllegalInstruction exception. + * false: Writing an illegal value to a WLRL CSR field causes unpredictable behavior. + +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/TRAP_ON_RESERVED_INSTRUCTION.yaml b/spec/std/isa/param/Sm/TRAP_ON_RESERVED_INSTRUCTION.yaml new file mode 100644 index 000000000..156b40ed4 --- /dev/null +++ b/spec/std/isa/param/Sm/TRAP_ON_RESERVED_INSTRUCTION.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TRAP_ON_RESERVED_INSTRUCTION +long_name: | + Whether or not fetching an unimplemented standard instruction and/or an undefined standard + instruction from the standard/reserved opcode space causes a trap +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: Fetching an unimplemented and/or undefined instruction from the standard/reserved opcode space will cause an IllegalInstruction exception. + * false: Fetching an unimplemented and/or undefined instruction from the standard/reserved opcose space causes unpredictable behavior. + + TRAP_ON_RESERVED_INSTRUCTION may be false while TRAP_ON_UNIMPLEMENTED_INSTRUCTION is true + when a custom instruction is implemented in the standard/reserved opcode space. +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/TRAP_ON_UNIMPLEMENTED_INSTRUCTION.yaml b/spec/std/isa/param/Sm/TRAP_ON_UNIMPLEMENTED_INSTRUCTION.yaml new file mode 100644 index 000000000..03d97b0c9 --- /dev/null +++ b/spec/std/isa/param/Sm/TRAP_ON_UNIMPLEMENTED_INSTRUCTION.yaml @@ -0,0 +1,24 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TRAP_ON_UNIMPLEMENTED_INSTRUCTION +long_name: | + Whether or not fetching an unimplemented instruction causes a trap +definedBy: + allOf: + - extension: + name: Sm +description: | + Options: + + * true: Fetching an unimplemented instruction will cause an IllegalInstruction exception. + * false: Fetching an unimplemented instruction causes unpredictable behavior. + + An unimplemented instruction is any instruction encoding that is not defined by the implementation. + Custom instructions are considered implemented. +schema: + type: boolean diff --git a/spec/std/isa/param/Sm/VENDOR_ID_BANK.yaml b/spec/std/isa/param/Sm/VENDOR_ID_BANK.yaml new file mode 100644 index 000000000..2adf94be8 --- /dev/null +++ b/spec/std/isa/param/Sm/VENDOR_ID_BANK.yaml @@ -0,0 +1,21 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: VENDOR_ID_BANK +long_name: JEDEC Vendor ID bank, for `mvendorid`. +definedBy: + allOf: + - extension: + name: Sm +description: | + Encodes the number of one-byte continuation codes in the Bank field of `mvendorid`. + + iN JEDEC’s parlance, the bank number is one greater than the number of continuation codes; hence, the mvendorid Bank field encodes a value that is one less than the JEDEC bank number. +schema: + type: integer + minimum: 0 + maximum: 33554431 # 25-bit unsigned integer diff --git a/spec/std/isa/param/Sm/VENDOR_ID_OFFSET.yaml b/spec/std/isa/param/Sm/VENDOR_ID_OFFSET.yaml new file mode 100644 index 000000000..7e3fd2ab2 --- /dev/null +++ b/spec/std/isa/param/Sm/VENDOR_ID_OFFSET.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: VENDOR_ID_OFFSET +long_name: JEDEC Vendor ID offset, for `mvendorid`. +definedBy: + allOf: + - extension: + name: Sm +description: | + Encodes the final byte of a JEDEC manufactor ID, discarding the parity bit. +schema: + type: integer + minimum: 0 + maximum: 127 # 7-bit unsigned integer diff --git a/spec/std/isa/param/Smhpm/COUNTINHIBIT_EN.yaml b/spec/std/isa/param/Smhpm/COUNTINHIBIT_EN.yaml new file mode 100644 index 000000000..32bdfd39f --- /dev/null +++ b/spec/std/isa/param/Smhpm/COUNTINHIBIT_EN.yaml @@ -0,0 +1,32 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: COUNTINHIBIT_EN +description: | + Indicates which hardware performance monitor counters can be disabled from `mcountinhibit`. + + An unimplemented counter cannot be specified, i.e., if HPM_COUNTER_EN[3] is false, + it would be illegal to set COUNTINHIBIT_EN[3] to true. + + COUNTINHIBIT_EN[1] can never be true, since it corresponds to `mcountinhibit.TM`, + which is always read-only-0. + + COUNTINHIBIT_EN[3:31] must all be false if `Zihpm` is not implemented. +long_name: TODO +schema: + type: array + items: + - type: boolean + - const: false + - type: boolean + additionalItems: + type: boolean + maxItems: 32 + minItems: 32 +definedBy: + extension: + name: Smhpm diff --git a/spec/std/isa/param/Smhpm/HPM_COUNTER_EN.yaml b/spec/std/isa/param/Smhpm/HPM_COUNTER_EN.yaml new file mode 100644 index 000000000..ce91d0f83 --- /dev/null +++ b/spec/std/isa/param/Smhpm/HPM_COUNTER_EN.yaml @@ -0,0 +1,29 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HPM_COUNTER_EN +description: | + List of HPM counters that are enabled. + There is one entry for each hpmcounter. + + The first three entries *must* be false (as they correspond to CY, IR, TM in, _e.g._ `mhmpcountinhibit`) + Index 3 in HPM_COUNTER_EN corresponds to hpmcounter3. + Index 31 in HPM_COUNTER_EN corresponds to hpmcounter31. +long_name: TODO +schema: + type: array + items: + - const: false + - const: false + - const: false + additionalItems: + type: boolean + maxItems: 32 + minItems: 32 +definedBy: + extension: + name: Smhpm diff --git a/spec/std/isa/param/Smhpm/HPM_EVENTS.yaml b/spec/std/isa/param/Smhpm/HPM_EVENTS.yaml new file mode 100644 index 000000000..5ff679fca --- /dev/null +++ b/spec/std/isa/param/Smhpm/HPM_EVENTS.yaml @@ -0,0 +1,21 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HPM_EVENTS +description: "List of defined event numbers that can be written into hpmeventN + + " +long_name: TODO +schema: + type: array + items: + type: integer + minimum: 0 + maximum: 288230376151711743 +definedBy: + extension: + name: Smhpm diff --git a/spec/std/isa/param/Smhpm/MCOUNTENABLE_EN.yaml b/spec/std/isa/param/Smhpm/MCOUNTENABLE_EN.yaml new file mode 100644 index 000000000..153116ddd --- /dev/null +++ b/spec/std/isa/param/Smhpm/MCOUNTENABLE_EN.yaml @@ -0,0 +1,27 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MCOUNTENABLE_EN +description: | + Indicates which counters can be delegated via `mcounteren`. + + An unimplemented counter cannot be specified, i.e., if + HPM_COUNTER_EN[3] is false, it would be illegal to set + MCOUNTENABLE_EN[3] to true. + + MCOUNTENABLE_EN[0:2] must all be false if `Zicntr` is not implemented. + MCOUNTENABLE_EN[3:31] must all be false if `Zihpm` is not implemented. +long_name: TODO +schema: + type: array + items: + type: boolean + maxItems: 32 + minItems: 32 +definedBy: + extension: + name: Smhpm diff --git a/spec/std/isa/param/Smmpm/PMLEN.yaml b/spec/std/isa/param/Smmpm/PMLEN.yaml new file mode 100644 index 000000000..9da3209d6 --- /dev/null +++ b/spec/std/isa/param/Smmpm/PMLEN.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: PMLEN +description: | + The number of high-order bits of an address that are masked by the + pointer masking facility. +long_name: TODO +schema: + type: integer +definedBy: + extension: + anyOf: + - name: Smmpm + - name: Smnpm + - name: Ssnpm diff --git a/spec/std/isa/param/Smpmp/NUM_PMP_ENTRIES.yaml b/spec/std/isa/param/Smpmp/NUM_PMP_ENTRIES.yaml new file mode 100644 index 000000000..1ad6d1d50 --- /dev/null +++ b/spec/std/isa/param/Smpmp/NUM_PMP_ENTRIES.yaml @@ -0,0 +1,42 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: NUM_PMP_ENTRIES +description: | + Number of implemented PMP entries. Can be any value between 0-64, inclusive. + + The architecture mandates that the number of implemented PMP registers + must appear to be 0, 16, or 64. + + Therefore, pmp registers will behave as follows according to NUN_PMP_ENTRIES: + + [separator="!"] + !=== + ! NUM_PMP_ENTRIES ! pmpaddr<0-15> / pmpcfg<0-3> ! pmpaddr<16-63> / pmpcfg<4-15> + ! 0 ! N ! N + ! 1-16 ! Y ! N + ! 17-64 ! Y ! Y + !=== + + ** N = Not implemented; access will cause `IllegalInstruction` + if TRAP_ON_UNIMPLEMENTED_CSR is true + ** Y = Implemented; access will not cause an exception (from M-mode), but register + may be read-only-zero if NUM_PMP_ENTRIES is less than the corresponding register + + [NOTE] + `pmpcfgN` for an odd N never exists when XLEN == 64 + + When NUM_PMP_ENTRIES is not exactly 0, 16, or 64, some extant pmp registers, + and associated pmpNcfg, will be read-only zero (but will never cause an exception). +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 64 +definedBy: + extension: + name: Smpmp diff --git a/spec/std/isa/param/Smpmp/PMP_GRANULARITY.yaml b/spec/std/isa/param/Smpmp/PMP_GRANULARITY.yaml new file mode 100644 index 000000000..f41dfacb2 --- /dev/null +++ b/spec/std/isa/param/Smpmp/PMP_GRANULARITY.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: PMP_GRANULARITY +description: | + log2 of the smallest supported PMP region. + + Generally, for systems with an MMU, should not be smaller than 12, + as that would preclude caching PMP results in the TLB along with + virtual memory translations + + Note that PMP_GRANULARITY is equal to G+2 (not G) as described in + the privileged architecture. +long_name: TODO +schema: + type: integer + minimum: 2 + maximum: 66 +definedBy: + extension: + name: Smpmp diff --git a/spec/std/isa/param/Ssaia/HSTATEEN_AIA_TYPE.yaml b/spec/std/isa/param/Ssaia/HSTATEEN_AIA_TYPE.yaml new file mode 100644 index 000000000..4b36d2430 --- /dev/null +++ b/spec/std/isa/param/Ssaia/HSTATEEN_AIA_TYPE.yaml @@ -0,0 +1,43 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HSTATEEN_AIA_TYPE +description: | + Behavior of the hstateen0.AIA bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +restrictions: + allOf: + - constraint(): + 'MSTATEEN_AIA_TYPE == "read-only-0" -> HSTATEEN_AIA_TYPE == "read-only-0"; + + ' + reason: HSTATEEN cannot have more options that MSTATEEN + - constraint(): + 'MSTATEEN_AIA_TYPE == "read-only-1" -> HSTATEEN_AIA_TYPE == "read-only-1"; + + ' + reason: HSTATEEN cannot have more options that MSTATEEN +definedBy: + allOf: + - extension: + :name: Ssaia + - extension: + allOf: + - name: H + version: "~> 1.0" + - name: Ssstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/Ssaia/HSTATEEN_IMSIC_TYPE.yaml b/spec/std/isa/param/Ssaia/HSTATEEN_IMSIC_TYPE.yaml new file mode 100644 index 000000000..7fc4a4147 --- /dev/null +++ b/spec/std/isa/param/Ssaia/HSTATEEN_IMSIC_TYPE.yaml @@ -0,0 +1,46 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HSTATEEN_IMSIC_TYPE +description: | + Behavior of the hstateen0.IMSIC bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +restrictions: + allOf: + - constraint(): + 'MSTATEEN_IMSIC_TYPE == "read-only-0" -> HSTATEEN_IMSIC_TYPE == + "read-only-0"; + + ' + reason: HSTATEEN cannot have more options that MSTATEEN + - constraint(): + 'MSTATEEN_IMSIC_TYPE == "read-only-1" -> HSTATEEN_IMSIC_TYPE == + "read-only-1"; + + ' + reason: HSTATEEN cannot have more options that MSTATEEN +definedBy: + allOf: + - extension: + :name: Ssaia + - allOf: + - extension: + name: Ssaia + - extension: + name: H + - extension: + name: Ssstateen diff --git a/spec/std/isa/param/Ssaia/MSTATEEN_AIA_TYPE.yaml b/spec/std/isa/param/Ssaia/MSTATEEN_AIA_TYPE.yaml new file mode 100644 index 000000000..20cf3389d --- /dev/null +++ b/spec/std/isa/param/Ssaia/MSTATEEN_AIA_TYPE.yaml @@ -0,0 +1,28 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATEEN_AIA_TYPE +description: | + Behavior of the mstateen0.AIA bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +definedBy: + allOf: + - extension: + :name: Ssaia + - extension: + name: Smstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/Ssaia/MSTATEEN_IMSIC_TYPE.yaml b/spec/std/isa/param/Ssaia/MSTATEEN_IMSIC_TYPE.yaml new file mode 100644 index 000000000..593e614e2 --- /dev/null +++ b/spec/std/isa/param/Ssaia/MSTATEEN_IMSIC_TYPE.yaml @@ -0,0 +1,28 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATEEN_IMSIC_TYPE +description: | + Behavior of the mstateen0.IMSIC bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +definedBy: + allOf: + - extension: + :name: Ssaia + - extension: + name: Smstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/Sscsrind/HSTATEEN_CSRIND_TYPE.yaml b/spec/std/isa/param/Sscsrind/HSTATEEN_CSRIND_TYPE.yaml new file mode 100644 index 000000000..0ef12c7cc --- /dev/null +++ b/spec/std/isa/param/Sscsrind/HSTATEEN_CSRIND_TYPE.yaml @@ -0,0 +1,45 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HSTATEEN_CSRIND_TYPE +description: | + Behavior of the hstateen0.CSRIND bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +restrictions: + allOf: + - constraint(): + 'MSTATEEN_CSRIND_TYPE == "read-only-0" -> HSTATEEN_CSRIND_TYPE == + "read-only-0" + + ' + reason: HSTATEEN cannot have more options that MSTATEEN + - constraint(): + 'MSTATEEN_CSRIND_TYPE == "read-only-1" -> HSTATEEN_CSRIND_TYPE == + "read-only-1" + + ' + reason: HSTATEEN cannot have more options that MSTATEEN +definedBy: + allOf: + - extension: + :name: Sscsrind + - extension: + allOf: + - name: H + version: "~> 1.0" + - name: Ssstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/Sscsrind/MSTATEEN_CSRIND_TYPE.yaml b/spec/std/isa/param/Sscsrind/MSTATEEN_CSRIND_TYPE.yaml new file mode 100644 index 000000000..18b8cc0bb --- /dev/null +++ b/spec/std/isa/param/Sscsrind/MSTATEEN_CSRIND_TYPE.yaml @@ -0,0 +1,30 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATEEN_CSRIND_TYPE +description: | + Behavior of the mstateen0.CSRIND bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +definedBy: + allOf: + - extension: + :name: Sscsrind + - allOf: + - extension: + name: Sscsrind + - extension: + name: Smstateen diff --git a/spec/std/isa/param/Ssqosid/MCID_WIDTH.yaml b/spec/std/isa/param/Ssqosid/MCID_WIDTH.yaml new file mode 100644 index 000000000..1ffe834d4 --- /dev/null +++ b/spec/std/isa/param/Ssqosid/MCID_WIDTH.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MCID_WIDTH +description: | + Number of bits used for the Monitoring Counter ID field (MCID). + Default is 12. +long_name: TODO +schema: + type: integer + minimum: 1 + maximum: 12 +definedBy: + extension: + name: Ssqosid diff --git a/spec/std/isa/param/Ssqosid/RCID_WIDTH.yaml b/spec/std/isa/param/Ssqosid/RCID_WIDTH.yaml new file mode 100644 index 000000000..10c9415d4 --- /dev/null +++ b/spec/std/isa/param/Ssqosid/RCID_WIDTH.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: RCID_WIDTH +description: | + Number of bits used for the Resource Control ID field (RCID). + Default is 12. +long_name: TODO +schema: + type: integer + minimum: 1 + maximum: 12 +definedBy: + extension: + name: Ssqosid diff --git a/spec/std/isa/param/U/MUTABLE_MISA_U.yaml b/spec/std/isa/param/U/MUTABLE_MISA_U.yaml new file mode 100644 index 000000000..aa5c58f1d --- /dev/null +++ b/spec/std/isa/param/U/MUTABLE_MISA_U.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_U +description: + "Indicates whether or not the `U` extension can be disabled with the + `misa.U` bit. + + " +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: U diff --git a/spec/std/isa/param/U/TRAP_ON_ECALL_FROM_U.yaml b/spec/std/isa/param/U/TRAP_ON_ECALL_FROM_U.yaml new file mode 100644 index 000000000..938abea91 --- /dev/null +++ b/spec/std/isa/param/U/TRAP_ON_ECALL_FROM_U.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TRAP_ON_ECALL_FROM_U +description: | + Whether or not an ECALL-from-U-mode causes a synchronous exception. + + The spec states that implementations may handle ECALLs transparently + without raising a trap, in which case the EEI must provide a builtin. +long_name: TODO +schema: + type: boolean + default: true +definedBy: + extension: + name: U diff --git a/spec/std/isa/param/U/UXLEN.yaml b/spec/std/isa/param/U/UXLEN.yaml new file mode 100644 index 000000000..f9f898ee9 --- /dev/null +++ b/spec/std/isa/param/U/UXLEN.yaml @@ -0,0 +1,34 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: UXLEN +description: | + Set of XLENs supported in U-mode. When both 32 and 64 are supported, SXLEN can be changed, + via mstatus.UXL, between 32 and 64. +long_name: TODO +schema: + type: array + items: + enum: + - 32 + - 64 + minItems: 1 + maxItems: 2 + uniqueItems: true +restrictions: + allOf: + - constraint(): "!$ary_includes?(MXLEN, 64) -> !$ary_includes?(UXLEN, 64);\n" + reason: "XLEN in U-mode can never be larger than XLEN in M-mode + + " + - constraint(): "$ary_includes?(SXLEN, 32) -> $ary_includes?(UXLEN, 32);\n" + reason: "If S-mode supports RV32, then U mode must also support it. + + " +definedBy: + extension: + name: U diff --git a/spec/std/isa/param/U/U_MODE_ENDIANNESS.yaml b/spec/std/isa/param/U/U_MODE_ENDIANNESS.yaml new file mode 100644 index 000000000..6986971b6 --- /dev/null +++ b/spec/std/isa/param/U/U_MODE_ENDIANNESS.yaml @@ -0,0 +1,25 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: U_MODE_ENDIANNESS +description: | + Endianness of data in U-mode. Can be one of: + + * little: U-mode data is always little endian + * big: U-mode data is always big endian + * dynamic: U-mode data can be either little or big endian, + depending on the CSR field `mstatus.UBE` +long_name: TODO +schema: + type: string + enum: + - little + - big + - dynamic +definedBy: + extension: + name: U diff --git a/spec/std/isa/param/V/HW_MSTATUS_VS_DIRTY_UPDATE.yaml b/spec/std/isa/param/V/HW_MSTATUS_VS_DIRTY_UPDATE.yaml new file mode 100644 index 000000000..8684df4ec --- /dev/null +++ b/spec/std/isa/param/V/HW_MSTATUS_VS_DIRTY_UPDATE.yaml @@ -0,0 +1,28 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HW_MSTATUS_VS_DIRTY_UPDATE +description: | + Indicates whether or not hardware will write to `mstatus.VS` + + Values are: + [separator="!"] + !=== + h! never ! Hardware never writes `mstatus.VS` + h! precise ! Hardware writes `mstatus.VS` to the Dirty (3) state precisely when V registers are modified + h! imprecise ! Hardware writes `mstatus.VS` imprecisely. This will result in a call to unpredictable() on any attempt to read `mstatus` or write vector state. + !=== +long_name: TODO +schema: + type: string + enum: + - never + - precise + - imprecise +definedBy: + extension: + name: V diff --git a/spec/std/isa/param/V/MSTATUS_VS_LEGAL_VALUES.yaml b/spec/std/isa/param/V/MSTATUS_VS_LEGAL_VALUES.yaml new file mode 100644 index 000000000..9db4103aa --- /dev/null +++ b/spec/std/isa/param/V/MSTATUS_VS_LEGAL_VALUES.yaml @@ -0,0 +1,43 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATUS_VS_LEGAL_VALUES +description: + "The set of values that mstatus.VS will accept from a software write. + + " +long_name: TODO +schema: + type: array + items: + type: integer + enum: + - 0 + - 1 + - 2 + - 3 + minItems: 1 + maxItems: 4 + uniqueItems: true +restrictions: + allOf: + - constraint(): | + implemented?(ExtensionName::V) -> + ary_includes?(MSTATUS_VS_LEGAL_VALUES, 0) && + ary_includes?(MSTATUS_VS_LEGAL_VALUES, 1); + reason: If V is supported, both Off (0) and Dirty (3) must be supported + - constraint(): | + HW_MSTATUS_VS_DIRTY_UPDATE == "precise" || HW_MSTATUS_VS_DIRTY_UPDATE == "imprecise" -> + ary_includes?(MSTATUS_VS_LEGAL_VALUES, 3) + reason: + If there is a hardware update to mstatus.VS, then the Dirty state must + be supported +definedBy: + extension: + anyOf: + - name: V + - name: S diff --git a/spec/std/isa/param/V/MUTABLE_MISA_V.yaml b/spec/std/isa/param/V/MUTABLE_MISA_V.yaml new file mode 100644 index 000000000..0b830a2eb --- /dev/null +++ b/spec/std/isa/param/V/MUTABLE_MISA_V.yaml @@ -0,0 +1,19 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MUTABLE_MISA_V +description: + "Indicates whether or not the `V` extension can be disabled with the + `misa.V` bit. + + " +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: V diff --git a/spec/std/isa/param/Xmock/MOCK_1_BIT_INT.yaml b/spec/std/isa/param/Xmock/MOCK_1_BIT_INT.yaml new file mode 100644 index 000000000..7503757c8 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_1_BIT_INT.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_1_BIT_INT +description: foo +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 1 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_25_BIT_INT.yaml b/spec/std/isa/param/Xmock/MOCK_25_BIT_INT.yaml new file mode 100644 index 000000000..a23aa9f7e --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_25_BIT_INT.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_25_BIT_INT +description: foo +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 33554431 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_2_BIT_INT.yaml b/spec/std/isa/param/Xmock/MOCK_2_BIT_INT.yaml new file mode 100644 index 000000000..89770b870 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_2_BIT_INT.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_2_BIT_INT +description: foo +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 3 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_32_BIT_INT.yaml b/spec/std/isa/param/Xmock/MOCK_32_BIT_INT.yaml new file mode 100644 index 000000000..990fe751a --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_32_BIT_INT.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_32_BIT_INT +description: foo +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 4294967295 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_64_BIT_INT.yaml b/spec/std/isa/param/Xmock/MOCK_64_BIT_INT.yaml new file mode 100644 index 000000000..dd0c1526f --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_64_BIT_INT.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_64_BIT_INT +description: foo +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 18446744073709551615 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_ARRAY_BOOL_ARRAY_OF_8_FIRST_2_FALSE.yaml b/spec/std/isa/param/Xmock/MOCK_ARRAY_BOOL_ARRAY_OF_8_FIRST_2_FALSE.yaml new file mode 100644 index 000000000..c76eb3726 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_ARRAY_BOOL_ARRAY_OF_8_FIRST_2_FALSE.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_ARRAY_BOOL_ARRAY_OF_8_FIRST_2_FALSE +description: foo +long_name: TODO +schema: + type: array + items: + - const: false + - const: false + additionalItems: + type: boolean + maxItems: 8 + minItems: 8 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_ARRAY_INT_ENUM.yaml b/spec/std/isa/param/Xmock/MOCK_ARRAY_INT_ENUM.yaml new file mode 100644 index 000000000..823048fea --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_ARRAY_INT_ENUM.yaml @@ -0,0 +1,23 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_ARRAY_INT_ENUM +description: foo +long_name: TODO +schema: + type: array + items: + type: integer + enum: + - 0 + - 1 + minItems: 1 + maxItems: 2 + uniqueItems: true +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_ARRAY_MAX_ONLY.yaml b/spec/std/isa/param/Xmock/MOCK_ARRAY_MAX_ONLY.yaml new file mode 100644 index 000000000..404e75b23 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_ARRAY_MAX_ONLY.yaml @@ -0,0 +1,21 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_ARRAY_MAX_ONLY +description: foo +long_name: TODO +schema: + type: array + items: + type: integer + enum: + - 0 + - 1 + maxItems: 10 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_ARRAY_MIN_ONLY.yaml b/spec/std/isa/param/Xmock/MOCK_ARRAY_MIN_ONLY.yaml new file mode 100644 index 000000000..1a60b317c --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_ARRAY_MIN_ONLY.yaml @@ -0,0 +1,21 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_ARRAY_MIN_ONLY +description: foo +long_name: TODO +schema: + type: array + items: + type: integer + enum: + - 0 + - 1 + minItems: 3 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_ARRAY_STRING_ENUM1.yaml b/spec/std/isa/param/Xmock/MOCK_ARRAY_STRING_ENUM1.yaml new file mode 100644 index 000000000..2bdcbc402 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_ARRAY_STRING_ENUM1.yaml @@ -0,0 +1,21 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_ARRAY_STRING_ENUM1 +description: foo +long_name: TODO +schema: + type: array + items: + type: string + enum: + - ABC + - DEF + - GHI +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_ARRAY_STRING_ENUM2.yaml b/spec/std/isa/param/Xmock/MOCK_ARRAY_STRING_ENUM2.yaml new file mode 100644 index 000000000..49a7b9a5e --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_ARRAY_STRING_ENUM2.yaml @@ -0,0 +1,21 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_ARRAY_STRING_ENUM2 +description: foo +long_name: TODO +schema: + type: array + items: + type: string + enum: + - ABC + - DEF + - GHI +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_BOOL_1.yaml b/spec/std/isa/param/Xmock/MOCK_BOOL_1.yaml new file mode 100644 index 000000000..ce2f0dbd4 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_BOOL_1.yaml @@ -0,0 +1,15 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_BOOL_1 +description: foo +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_BOOL_2.yaml b/spec/std/isa/param/Xmock/MOCK_BOOL_2.yaml new file mode 100644 index 000000000..e042d2597 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_BOOL_2.yaml @@ -0,0 +1,15 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_BOOL_2 +description: foo +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_ENUM_2_INTS.yaml b/spec/std/isa/param/Xmock/MOCK_ENUM_2_INTS.yaml new file mode 100644 index 000000000..a0f4a3f50 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_ENUM_2_INTS.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_ENUM_2_INTS +description: foo +long_name: TODO +schema: + type: integer + enum: + - 32 + - 64 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_ENUM_2_STRINGS.yaml b/spec/std/isa/param/Xmock/MOCK_ENUM_2_STRINGS.yaml new file mode 100644 index 000000000..f58987ef7 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_ENUM_2_STRINGS.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_ENUM_2_STRINGS +description: foo +long_name: TODO +schema: + type: string + enum: + - low + - high +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_1023.yaml b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_1023.yaml new file mode 100644 index 000000000..a65c1e5e3 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_1023.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_INT_RANGE_0_TO_1023 +description: foo +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 1023 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_127.yaml b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_127.yaml new file mode 100644 index 000000000..07b7fcf1d --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_127.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_INT_RANGE_0_TO_127 +description: foo +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 127 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_128.yaml b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_128.yaml new file mode 100644 index 000000000..c8470ad30 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_128.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_INT_RANGE_0_TO_128 +description: foo +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 128 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_2.yaml b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_2.yaml new file mode 100644 index 000000000..0ccca24e3 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_2.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_INT_RANGE_0_TO_2 +description: foo +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 2 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_999.yaml b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_999.yaml new file mode 100644 index 000000000..8bf18c592 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_0_TO_999.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_INT_RANGE_0_TO_999 +description: foo +long_name: TODO +schema: + type: integer + minimum: 0 + maximum: 999 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_INT_RANGE_1000_TO_2048.yaml b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_1000_TO_2048.yaml new file mode 100644 index 000000000..9ff79c867 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_1000_TO_2048.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_INT_RANGE_1000_TO_2048 +description: foo +long_name: TODO +schema: + type: integer + minimum: 1000 + maximum: 2048 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Xmock/MOCK_INT_RANGE_1_TO_128.yaml b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_1_TO_128.yaml new file mode 100644 index 000000000..a5ebe6c74 --- /dev/null +++ b/spec/std/isa/param/Xmock/MOCK_INT_RANGE_1_TO_128.yaml @@ -0,0 +1,17 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MOCK_INT_RANGE_1_TO_128 +description: foo +long_name: TODO +schema: + type: integer + minimum: 1 + maximum: 128 +definedBy: + extension: + name: Xmock diff --git a/spec/std/isa/param/Zcmt/HSTATEEN_JVT_TYPE.yaml b/spec/std/isa/param/Zcmt/HSTATEEN_JVT_TYPE.yaml new file mode 100644 index 000000000..3c269bcf0 --- /dev/null +++ b/spec/std/isa/param/Zcmt/HSTATEEN_JVT_TYPE.yaml @@ -0,0 +1,44 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: HSTATEEN_JVT_TYPE +description: | + Behavior of the hstateen0.JVT bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +restrictions: + allOf: + - constraint(): + 'MSTATEEN_JVT_TYPE == "read-only-0" -> HSTATEEN_JVT_TYPE == "read-only-0"; + + ' + reason: HSTATEEN cannot have more options that MSTATEEN + - constraint(): + 'MSTATEEN_JVT_TYPE == "read-only-1" -> HSTATEEN_JVT_TYPE == "read-only-1"; + + ' + reason: HSTATEEN cannot have more options that MSTATEEN +definedBy: + allOf: + - extension: + :name: Zcmt + - extension: + allOf: + - name: Zcmt + - name: H + version: "~> 1.0" + - name: Ssstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/Zcmt/MSTATEEN_JVT_TYPE.yaml b/spec/std/isa/param/Zcmt/MSTATEEN_JVT_TYPE.yaml new file mode 100644 index 000000000..b827ca90b --- /dev/null +++ b/spec/std/isa/param/Zcmt/MSTATEEN_JVT_TYPE.yaml @@ -0,0 +1,30 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: MSTATEEN_JVT_TYPE +description: | + Behavior of the mstateen0.JVT bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +definedBy: + allOf: + - extension: + :name: Zcmt + - extension: + allOf: + - name: Zcmt + - name: Smstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/Zcmt/SSTATEEN_JVT_TYPE.yaml b/spec/std/isa/param/Zcmt/SSTATEEN_JVT_TYPE.yaml new file mode 100644 index 000000000..bddac7aaa --- /dev/null +++ b/spec/std/isa/param/Zcmt/SSTATEEN_JVT_TYPE.yaml @@ -0,0 +1,53 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: SSTATEEN_JVT_TYPE +description: | + Behavior of the sstateen0.JVT bit: + + * 'rw': read-write + * 'read-only-0': read-only, fixed to 0 + * 'read-only-1': read-only, fixed to 1 +long_name: TODO +schema: + type: string + enum: + - rw + - read-only-0 + - read-only-1 +restrictions: + allOf: + - constraint(): + 'MSTATEEN_JVT_TYPE == "read-only-0" -> SSTATEEN_JVT_TYPE == "read-only-0"; + + ' + reason: SSTATEEN cannot have more options that MSTATEEN + - constraint(): + 'MSTATEEN_JVT_TYPE == "read-only-1" -> SSTATEEN_JVT_TYPE == "read-only-1"; + + ' + reason: SSTATEEN cannot have more options that MSTATEEN + - constraint(): + 'HSTATEEN_JVT_TYPE == "read-only-0" -> SSTATEEN_JVT_TYPE == "read-only-0"; + + ' + reason: SSTATEEN cannot have more options that HSTATEEN + - constraint(): + 'HSTATEEN_JVT_TYPE == "read-only-1" -> SSTATEEN_JVT_TYPE == "read-only-1"; + + ' + reason: SSTATEEN cannot have more options that HSTATEEN +definedBy: + allOf: + - extension: + :name: Zcmt + - extension: + allOf: + - name: S + version: "~> 1.0" + - name: Ssstateen + version: "~> 1.0" diff --git a/spec/std/isa/param/Zicbom/CACHE_BLOCK_SIZE.yaml b/spec/std/isa/param/Zicbom/CACHE_BLOCK_SIZE.yaml new file mode 100644 index 000000000..603193f41 --- /dev/null +++ b/spec/std/isa/param/Zicbom/CACHE_BLOCK_SIZE.yaml @@ -0,0 +1,22 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: CACHE_BLOCK_SIZE +description: "The observable size of a cache block, in bytes + + " +long_name: TODO +schema: + type: integer + minimum: 1 + maximum: 18446744073709551615 +definedBy: + extension: + anyOf: + - name: Zicbom + - name: Zicbop + - name: Zicboz diff --git a/spec/std/isa/param/Zicbom/FORCE_UPGRADE_CBO_INVAL_TO_FLUSH.yaml b/spec/std/isa/param/Zicbom/FORCE_UPGRADE_CBO_INVAL_TO_FLUSH.yaml new file mode 100644 index 000000000..48339e92f --- /dev/null +++ b/spec/std/isa/param/Zicbom/FORCE_UPGRADE_CBO_INVAL_TO_FLUSH.yaml @@ -0,0 +1,20 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: FORCE_UPGRADE_CBO_INVAL_TO_FLUSH +description: | + When true, an implementation prohibits setting `menvcfg.CBIE` == `11` such that all `cbo.inval` + instructions either trap (when `menvcfg.CBIE` == '00') or flush (when `menvcfg.CBIE` == '01'). + + When false, an implementation allows a true INVAL operation for `cbo.inval`, and thus supports + the setting `menvcfg.CBIE` == `11`. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Zicbom diff --git a/spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml b/spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml new file mode 100644 index 000000000..0e908d605 --- /dev/null +++ b/spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_CAUSE_IN_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK +description: | + When true, `mtval` is written with the shadow stack cause (code=18) when a SoftwareCheck exception is raised into M-mode due to a landing pad error. + + When false, `mtval` is written with 0. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Zicfilp diff --git a/spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml b/spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml new file mode 100644 index 000000000..f5ce117b1 --- /dev/null +++ b/spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_CAUSE_IN_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK +description: | + When true, `stval` is written with the shadow stack cause (code=18) when a SoftwareCheck exception is raised into S-mode due to a landing pad error. + + When false, `stval` is written with 0. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Zicfilp diff --git a/spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml b/spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml new file mode 100644 index 000000000..ccba6ac64 --- /dev/null +++ b/spec/std/isa/param/Zicfilp/REPORT_CAUSE_IN_VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_CAUSE_IN_VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK +description: | + When true, `vstval` is written with the shadow stack cause (code=18) when a SoftwareCheck exception is raised into VS-mode due to a landing pad error. + + When false, `vstval` is written with 0. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Zicfilp diff --git a/spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_MTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml b/spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_MTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml new file mode 100644 index 000000000..0dc5fb9a8 --- /dev/null +++ b/spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_MTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_CAUSE_IN_MTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK +description: | + When true, `mtval` is written with the shadow stack cause (code=3) when a SoftwareCheck exception is raised into M-mode due to a shadow stack pop check instruction. + + When false, `mtval` is written with 0. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Zicfiss diff --git a/spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_STVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml b/spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_STVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml new file mode 100644 index 000000000..f4712e2d4 --- /dev/null +++ b/spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_STVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_CAUSE_IN_STVAL_ON_SHADOW_STACK_SOFTWARE_CHECK +description: | + When true, `stval` is written with the shadow stack cause (code=3) when a SoftwareCheck exception is raised into S-mode due to a shadow stack pop check instruction. + + When false, `stval` is written with 0. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Zicfiss diff --git a/spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_VSTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml b/spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_VSTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml new file mode 100644 index 000000000..91591de5d --- /dev/null +++ b/spec/std/isa/param/Zicfiss/REPORT_CAUSE_IN_VSTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK.yaml @@ -0,0 +1,18 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: REPORT_CAUSE_IN_VSTVAL_ON_SHADOW_STACK_SOFTWARE_CHECK +description: | + When true, `vstval` is written with the shadow stack cause (code=3) when a SoftwareCheck exception is raised into VS-mode due to a shadow stack pop check instruction. + + When false, `vstval` is written with 0. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Zicfiss diff --git a/spec/std/isa/param/Zicntr/TIME_CSR_IMPLEMENTED.yaml b/spec/std/isa/param/Zicntr/TIME_CSR_IMPLEMENTED.yaml new file mode 100644 index 000000000..295ae8cb1 --- /dev/null +++ b/spec/std/isa/param/Zicntr/TIME_CSR_IMPLEMENTED.yaml @@ -0,0 +1,28 @@ +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. +# SPDX-License-Identifier: BSD-3-Clause-Clear + +# yaml-language-server: $schema=../../../../schemas/param_schema.json + +$schema: param_schema.json# +kind: parameter +name: TIME_CSR_IMPLEMENTED +description: | + Whether or not a real hardware `time` CSR exists. Implementations can either provide a real + CSR or emulate access at M-mode. + + Possible values: + + true:: + `time`/`timeh` exists, and accessing it will not cause an IllegalInstruction trap + + false:: + `time`/`timeh` does not exist. + Accessing the CSR will cause an IllegalInstruction trap or enter an unpredictable state, + depending on TRAP_ON_UNIMPLEMENTED_CSR. + Privileged software may emulate the `time` CSR, or may pass the exception to a lower level. +long_name: TODO +schema: + type: boolean +definedBy: + extension: + name: Zicntr