docs: remove "This instruction" from inst.description (#764)

kbroch-rivosinc · web-flow · commit c232bf072abe · 2025-05-19T20:47:02.000Z
Currently the grammar of many inst.descriptions is inconsistent this tries to reduce that problem relates to #744
diff --git a/arch/inst/B/andn.yaml b/arch/inst/B/andn.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: andn
 long_name: AND with inverted operand
 description: |
-  This instruction performs the bitwise logical AND operation between `rs1` and the
+  Performs the bitwise logical AND operation between `rs1` and the
   bitwise inversion of `rs2`.
 definedBy:
   anyOf: [Zbb, Zbkb]
diff --git a/arch/inst/B/orn.yaml b/arch/inst/B/orn.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: orn
 long_name: OR with inverted operand
 description: |
-  This instruction performs the bitwise logical OR operation between rs1 and the bitwise inversion of rs2.
+  Performs the bitwise logical OR operation between rs1 and the bitwise inversion of rs2.
 definedBy:
   anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
diff --git a/arch/inst/B/rev8.yaml b/arch/inst/B/rev8.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: rev8
 long_name: Byte-reverse register (RV64 encoding)
 description: |
-  This instruction reverses the order of the bytes in rs1.
+  Reverses the order of the bytes in rs1.
 
   [NOTE]
   The rev8 mnemonic corresponds to different instruction encodings in RV32 and RV64.
diff --git a/arch/inst/B/rol.yaml b/arch/inst/B/rol.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: rol
 long_name: Rotate left (Register)
 description: |
-  This instruction performs a rotate left of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2.
+  Performs a rotate left of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2.
 definedBy:
   anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
diff --git a/arch/inst/B/rolw.yaml b/arch/inst/B/rolw.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: rolw
 long_name: Rotate left word (Register)
 description: |
-  This instruction performs a rotate left of the least-significant word of rs1 by the amount in least-significant 5 bits of rs2.
+  Performs a rotate left of the least-significant word of rs1 by the amount in least-significant 5 bits of rs2.
   The resulting word value is sign-extended by copying bit 31 to all of the more-significant bits.
 definedBy:
   anyOf: [Zbb, Zbkb]
diff --git a/arch/inst/B/ror.yaml b/arch/inst/B/ror.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: ror
 long_name: Rotate right (Register)
 description: |
-  This instruction performs a rotate right of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2.
+  Performs a rotate right of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2.
 definedBy:
   anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
diff --git a/arch/inst/B/rori.yaml b/arch/inst/B/rori.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: rori
 long_name: Rotate right (Immediate)
 description: |
-  This instruction performs a rotate right of rs1 by the amount in the least-significant log2(XLEN) bits of shamt.
+  Performs a rotate right of rs1 by the amount in the least-significant log2(XLEN) bits of shamt.
   For RV32, the encodings corresponding to shamt[5]=1 are reserved.
 definedBy:
   anyOf: [Zbb, Zbkb]
diff --git a/arch/inst/B/roriw.yaml b/arch/inst/B/roriw.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: roriw
 long_name: Rotate right word (Immediate)
 description: |
-  This instruction performs a rotate right on the least-significant word of rs1 by the amount in
+  Performs a rotate right on the least-significant word of rs1 by the amount in
   the least-significant log2(XLEN) bits of shamt. The resulting word value is sign-extended by
   copying bit 31 to all of the more-significant bits.
 definedBy:
diff --git a/arch/inst/B/rorw.yaml b/arch/inst/B/rorw.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: rorw
 long_name: Rotate right word (Register)
 description: |
-  This instruction performs a rotate right on the least-significant word of rs1 by the amount in
+  Performs a rotate right on the least-significant word of rs1 by the amount in
   least-significant 5 bits of rs2. The resultant word is sign-extended by copying bit 31 to all
   of the more-significant bits.
 definedBy:
diff --git a/arch/inst/B/xnor.yaml b/arch/inst/B/xnor.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: xnor
 long_name: Exclusive NOR
 description: |
-  This instruction performs the bit-wise exclusive-NOR operation on rs1 and rs2.
+  Performs the bit-wise exclusive-NOR operation on rs1 and rs2.
 definedBy:
   anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
diff --git a/arch/inst/I/addi.yaml b/arch/inst/I/addi.yaml
@@ -4,7 +4,7 @@ $schema: "inst_schema.json#"
 kind: instruction
 name: addi
 long_name: Add immediate
-description: Add an immediate to the value in xs1, and store the result in xd
+description: Adds an immediate value to the value in xs1, and store the result in xd
 definedBy: I
 assembly: xd, xs1, imm
 encoding:
diff --git a/arch/inst/I/ecall.yaml b/arch/inst/I/ecall.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: ecall
 long_name: Environment call
 description: |
-  The ECALL instruction is used to make a request to the supporting execution environment.
+  Makes a request to the supporting execution environment.
   When executed in U-mode, S-mode, or M-mode, it generates an environment-call-from-U-mode
   exception, environment-call-from-S-mode exception, or environment-call-from-M-mode
   exception, respectively, and performs no other operation.
diff --git a/arch/inst/Zba/add.uw.yaml b/arch/inst/Zba/add.uw.yaml
@@ -6,7 +6,7 @@ name: add.uw
 long_name: Add unsigned word
 base: 64
 description: |
-  This instruction performs an XLEN-wide addition between rs2 and the
+  Performs an XLEN-wide addition between rs2 and the
   zero-extended least-significant word of rs1.
 definedBy: Zba
 assembly: xd, xs1, xs2
diff --git a/arch/inst/Zba/sh1add.uw.yaml b/arch/inst/Zba/sh1add.uw.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: sh1add.uw
 long_name: Shift unsigned word left by 1 and add
 description: |
-  This instruction performs an XLEN-wide addition of two addends. The first addend is rs2.
+  Performs an XLEN-wide addition of two addends. The first addend is rs2.
   The second addend is the unsigned value formed by extracting the least-significant word of rs1
   and shifting it left by 1 place.
 definedBy: Zba
diff --git a/arch/inst/Zba/sh1add.yaml b/arch/inst/Zba/sh1add.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: sh1add
 long_name: Shift left by 1 and add
 description: |
-  This instruction shifts `rs1` to the left by 1 bit and adds it to `rs2`.
+  Shifts `rs1` to the left by 1 bit and adds it to `rs2`.
 definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zba/sh2add.uw.yaml b/arch/inst/Zba/sh2add.uw.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: sh2add.uw
 long_name: Shift unsigned word left by 2 and add
 description: |
-  This instruction performs an XLEN-wide addition of two addends. The first addend is rs2.
+  Performs an XLEN-wide addition of two addends. The first addend is rs2.
   The second addend is the unsigned value formed by extracting the least-significant word of rs1
   and shifting it left by 2 places.
 definedBy: Zba
diff --git a/arch/inst/Zba/sh2add.yaml b/arch/inst/Zba/sh2add.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: sh2add
 long_name: Shift left by 2 and add
 description: |
-  This instruction shifts `rs1` to the left by 2 places and adds it to `rs2`.
+  Shifts `rs1` to the left by 2 places and adds it to `rs2`.
 definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zba/sh3add.uw.yaml b/arch/inst/Zba/sh3add.uw.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: sh3add.uw
 long_name: Shift unsigned word left by 3 and add
 description: |
-  This instruction performs an XLEN-wide addition of two addends. The first addend is rs2.
+  Performs an XLEN-wide addition of two addends. The first addend is rs2.
   The second addend is the unsigned value formed by extracting the least-significant word of rs1
   and shifting it left by 3 places.
 definedBy: Zba
diff --git a/arch/inst/Zba/sh3add.yaml b/arch/inst/Zba/sh3add.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: sh3add
 long_name: Shift left by 3 and add
 description: |
-  This instruction shifts `rs1` to the left by 3 places and adds it to `rs2`.
+  Shifts `rs1` to the left by 3 places and adds it to `rs2`.
 definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zba/slli.uw.yaml b/arch/inst/Zba/slli.uw.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: slli.uw
 long_name: Shift left unsigned word (Immediate)
 description: |
-  This instruction takes the least-significant word of rs1, zero-extends it, and shifts it
+  Takes the least-significant word of rs1, zero-extends it, and shifts it
   left by the immediate.
 
   [NOTE]
diff --git a/arch/inst/Zbb/clz.yaml b/arch/inst/Zbb/clz.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: clz
 long_name: Count leading zero bits
 description: |
-  This instruction counts the number of 0's before the first 1,
+  Counts the number of 0's before the first 1,
   starting at the most-significant bit (i.e., XLEN-1) and progressing to bit 0.
   Accordingly, if the input is 0, the output is XLEN, and if the most-significant
   bit of the input is a 1, the output is 0.
diff --git a/arch/inst/Zbb/clzw.yaml b/arch/inst/Zbb/clzw.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: clzw
 long_name: Count leading zero bits in word
 description: |
-  This instruction counts the number of 0's before the first 1 starting at bit 31 and progressing to bit 0.
+  Counts the number of 0's before the first 1 starting at bit 31 and progressing to bit 0.
   Accordingly, if the least-significant word is 0, the output is 32, and if the most-significant
   bit of the word (_i.e._, bit 31) is a 1, the output is 0.
 base: 64
diff --git a/arch/inst/Zbb/cpop.yaml b/arch/inst/Zbb/cpop.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: cpop
 long_name: Count set bits
 description: |
-  This instructions counts the number of 1's (i.e., set bits) in the source register.
+  Counts the number of 1's (i.e., set bits) in the source register.
 
   .Software Hint
   [NOTE]
diff --git a/arch/inst/Zbb/cpopw.yaml b/arch/inst/Zbb/cpopw.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: cpopw
 long_name: Count set bits in word
 description: |
-  This instructions counts the number of 1's (i.e., set bits) in the least-significant word of the source register.
+  Counts the number of 1's (i.e., set bits) in the least-significant word of the source register.
 
   .Software Hint
   [NOTE]
diff --git a/arch/inst/Zbb/ctz.yaml b/arch/inst/Zbb/ctz.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: ctz
 long_name: Count trailing zero bits
 description: |
-  This instruction counts the number of 0's before the first 1,
+  Counts the number of 0's before the first 1,
   starting at the least-significant bit (i.e., 0) and progressing
   to the most-significant bit (i.e., XLEN-1). Accordingly, if the
   input is 0, the output is XLEN, and if the least-significant bit
diff --git a/arch/inst/Zbb/ctzw.yaml b/arch/inst/Zbb/ctzw.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: ctzw
 long_name: Count trailing zero bits in word
 description: |
-  This instruction counts the number of 0's before the first 1,
+  Counts the number of 0's before the first 1,
   starting at the least-significant bit (i.e., 0) and progressing
   to the most-significant bit of the least-significant word (i.e., 31). Accordingly, if the
   least-significant word is 0, the output is 32, and if the least-significant bit
diff --git a/arch/inst/Zbb/max.yaml b/arch/inst/Zbb/max.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: max
 long_name: Maximum
 description: |
-  This instruction returns the larger of two signed integers.
+  Returns the larger of two signed integers.
 
   .Software Hint
   [NOTE]
diff --git a/arch/inst/Zbb/maxu.yaml b/arch/inst/Zbb/maxu.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: maxu
 long_name: Unsigned maximum
 description: |
-  This instruction returns the larger of two unsigned integers.
+  Returns the larger of two unsigned integers.
 definedBy: Zbb
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zbb/min.yaml b/arch/inst/Zbb/min.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: min
 long_name: Minimum
 description: |
-  This instruction returns the smaller of two signed integers.
+  Returns the smaller of two signed integers.
 definedBy: Zbb
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zbb/minu.yaml b/arch/inst/Zbb/minu.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: minu
 long_name: Unsigned minimum
 description: |
-  This instruction returns the smaller of two unsigned integers.
+  Returns the smaller of two unsigned integers.
 definedBy: Zbb
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zbb/sext.b.yaml b/arch/inst/Zbb/sext.b.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: sext.b
 long_name: Sign-extend byte
 description: |
-  This instruction sign-extends the least-significant byte in the source to XLEN by copying the
+  Sign-extends the least-significant byte in the source to XLEN by copying the
   most-significant bit in the byte (i.e., bit 7) to all of the more-significant bits.
 definedBy: Zbb
 assembly: xd, xs1
diff --git a/arch/inst/Zbb/sext.h.yaml b/arch/inst/Zbb/sext.h.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: sext.h
 long_name: Sign-extend halfword
 description: |
-  This instruction sign-extends the least-significant halfword in the source to XLEN by copying the
+  Sign-extends the least-significant halfword in the source to XLEN by copying the
   most-significant bit in the halfword (i.e., bit 15) to all of the more-significant bits.
 definedBy: Zbb
 assembly: xd, xs1
diff --git a/arch/inst/Zbb/zext.h.yaml b/arch/inst/Zbb/zext.h.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: zext.h
 long_name: Zero-extend halfword
 description: |
-  This instruction zero-extends the least-significant halfword of the source to XLEN by inserting
+  Zero-extends the least-significant halfword of the source to XLEN by inserting
   0's into all of the bits more significant than 15.
 
   [NOTE]
diff --git a/arch/inst/Zbkb/brev8.yaml b/arch/inst/Zbkb/brev8.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: brev8
 long_name: Reverse bits in bytes
 description: |
-  This instruction reverses the order of the bits in every byte of a register.
+  Reverses the order of the bits in every byte of a register.
 definedBy: Zbkb
 assembly: xd, xs1
 encoding:
diff --git a/arch/inst/Zbkb/unzip.yaml b/arch/inst/Zbkb/unzip.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: unzip
 long_name: Bit deinterleave
 description: |
-  This instruction gathers bits from the high and low halves of the source word into odd/even bit
+  Gathers bits from the high and low halves of the source word into odd/even bit
   positions in the destination word. It is the inverse of the zip instruction. This instruction is
   available only on RV32.
 definedBy: Zbkb
diff --git a/arch/inst/Zbkb/zip.yaml b/arch/inst/Zbkb/zip.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: zip
 long_name: Bit interleave
 description: |
-  This instruction scatters all of the odd and even bits of a source word into the high and low halves
+  Scatters all of the odd and even bits of a source word into the high and low halves
   of a destination word. It is the inverse of the unzip instruction. This instruction is available only on
   RV32.
 definedBy: Zbkb
diff --git a/arch/inst/Zbs/bclr.yaml b/arch/inst/Zbs/bclr.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: bclr
 long_name: Single-Bit clear (Register)
 description: |
-  This instruction returns rs1 with a single bit cleared at the index specified in rs2.
+  Returns rs1 with a single bit cleared at the index specified in rs2.
   The index is read from the lower log2(XLEN) bits of rs2.
 definedBy: Zbs
 assembly: xd, xs1, xs2
diff --git a/arch/inst/Zbs/bclri.yaml b/arch/inst/Zbs/bclri.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: bclri
 long_name: Single-Bit clear (Immediate)
 description: |
-  This instruction returns rs1 with a single bit cleared at the index specified in shamt. The
+  Returns rs1 with a single bit cleared at the index specified in shamt. The
   index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings corresponding
   to shamt[5]=1 are reserved.
 definedBy: Zbs
diff --git a/arch/inst/Zbs/bext.yaml b/arch/inst/Zbs/bext.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: bext
 long_name: Single-Bit extract (Register)
 description: |
-  This instruction returns a single bit extracted from rs1 at the index specified in rs2.
+  Returns a single bit extracted from rs1 at the index specified in rs2.
   The index is read from the lower log2(XLEN) bits of rs2.
 definedBy: Zbs
 assembly: xd, xs1, xs2
diff --git a/arch/inst/Zbs/bexti.yaml b/arch/inst/Zbs/bexti.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: bexti
 long_name: Single-Bit extract (Immediate)
 description: |
-  This instruction returns a single bit extracted from rs1 at the index specified in rs2.
+  Returns a single bit extracted from rs1 at the index specified in rs2.
   The index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings
   corresponding to shamt[5]=1 are reserved.
 definedBy: Zbs
diff --git a/arch/inst/Zbs/binv.yaml b/arch/inst/Zbs/binv.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: binv
 long_name: Single-Bit invert (Register)
 description: |
-  This instruction returns rs1 with a single bit inverted at the index specified in rs2.
+  Returns rs1 with a single bit inverted at the index specified in rs2.
   The index is read from the lower log2(XLEN) bits of rs2.
 definedBy: Zbs
 assembly: xd, xs1, xs2
diff --git a/arch/inst/Zbs/binvi.yaml b/arch/inst/Zbs/binvi.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: binvi
 long_name: Single-Bit invert (Immediate)
 description: |
-  This instruction returns rs1 with a single bit inverted at the index specified in shamt.
+  Returns rs1 with a single bit inverted at the index specified in shamt.
   The index is read from the lower log2(XLEN) bits of shamt.
   For RV32, the encodings corresponding to shamt[5]=1 are reserved.
 definedBy: Zbs
diff --git a/arch/inst/Zbs/bset.yaml b/arch/inst/Zbs/bset.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: bset
 long_name: Single-Bit set (Register)
 description: |
-  This instruction returns rs1 with a single bit set at the index specified in rs2.
+  Returns rs1 with a single bit set at the index specified in rs2.
   The index is read from the lower log2(XLEN) bits of rs2.
 definedBy: Zbs
 assembly: xd, xs1, xs2
diff --git a/arch/inst/Zbs/bseti.yaml b/arch/inst/Zbs/bseti.yaml
@@ -5,7 +5,7 @@ kind: instruction
 name: bseti
 long_name: Single-Bit set (Immediate)
 description: |
-  This instruction returns rs1 with a single bit set at the index specified in shamt.
+  Returns rs1 with a single bit set at the index specified in shamt.
   The index is read from the lower log2(XLEN) bits of shamt.
   For RV32, the encodings corresponding to shamt[5]=1 are reserved.
 definedBy: Zbs
diff --git a/arch/inst/Zcb/c.mul.yaml b/arch/inst/Zcb/c.mul.yaml
diff --git a/arch/inst/Zcb/c.not.yaml b/arch/inst/Zcb/c.not.yaml
diff --git a/arch/inst/Zcb/c.sext.b.yaml b/arch/inst/Zcb/c.sext.b.yaml
diff --git a/arch/inst/Zcb/c.sext.h.yaml b/arch/inst/Zcb/c.sext.h.yaml
diff --git a/arch/inst/Zcb/c.zext.b.yaml b/arch/inst/Zcb/c.zext.b.yaml
diff --git a/arch/inst/Zcb/c.zext.h.yaml b/arch/inst/Zcb/c.zext.h.yaml
diff --git a/arch/inst/Zcb/c.zext.w.yaml b/arch/inst/Zcb/c.zext.w.yaml
diff --git a/arch/inst/Zcmp/cm.mva01s.yaml b/arch/inst/Zcmp/cm.mva01s.yaml
diff --git a/arch/inst/Zcmp/cm.mvsa01.yaml b/arch/inst/Zcmp/cm.mvsa01.yaml
diff --git a/arch/inst/Zcmp/cm.pop.yaml b/arch/inst/Zcmp/cm.pop.yaml
diff --git a/arch/inst/Zcmp/cm.popret.yaml b/arch/inst/Zcmp/cm.popret.yaml
diff --git a/arch/inst/Zcmp/cm.popretz.yaml b/arch/inst/Zcmp/cm.popretz.yaml
diff --git a/arch/inst/Zcmp/cm.push.yaml b/arch/inst/Zcmp/cm.push.yaml
diff --git a/arch/inst/Zknd/aes32dsi.yaml b/arch/inst/Zknd/aes32dsi.yaml
diff --git a/arch/inst/Zknd/aes32dsmi.yaml b/arch/inst/Zknd/aes32dsmi.yaml
diff --git a/backends/instructions_appendix/all_instructions.golden.adoc b/backends/instructions_appendix/all_instructions.golden.adoc
