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ayosherdhower-qc
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Fix mret and mnret instructions (#588)
* Fix mret and mnret instructions to support correctly Smdbltrp (MDT bit) and MPRV bit Before his fix IDL code reset mstatus.MPRV bit only in case if S mode is implemented for both mret and mnret. This seems wrong, since spec states that MPRV should be reset by both mret and mnret for case when mode processor is returning is different from Machine mode (2b'11). As well, Smdbltrp spec requires that such case (returning to non-machine mode), the mnret instruction should reset MDT bit. According to the spec mnret instruction should set mnstatus.NMIE=1. Also, mnret should use mnstatus.MNPP bit field for previous mode storage. Signed-off-by: Albert Yosher <quic_ayosher@quicinc.com> * MNRET instruction: improving long name and description to match Smrnmi and Smdbltrp extensions documentation Signed-off-by: Albert Yosher <quic_ayosher@quicinc.com> --------- Signed-off-by: Albert Yosher <quic_ayosher@quicinc.com> Co-authored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com>
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-4
lines changed

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arch/inst/I/mret.yaml

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,9 +14,16 @@ access:
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encoding:
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match: "00110000001000000000000001110011"
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operation(): |
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if (implemented?(ExtensionName::S) && CSR[mstatus].MPP != 2'b11) {
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if (CSR[mstatus].MPP != 2'b11) {
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CSR[mstatus].MPRV = 0;
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}
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if (implemented?(ExtensionName::Smdbltrp)) {
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if (xlen() == 64) {
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CSR[mstatus].MDT = 1'b0;
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} else {
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CSR[mstatush].MDT = 1'b0;
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}
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}
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CSR[mstatus].MIE = CSR[mstatus].MPIE;
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CSR[mstatus].MPIE = 1;
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if (CSR[mstatus].MPP == 2'b00) {

arch/inst/Smrnmi/mnret.yaml

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,13 @@
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$schema: inst_schema.json#
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kind: instruction
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name: mnret
6-
long_name: No synopsis available.
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long_name: Machine mode resume from the RNMI or Double Trap handler.
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description: |
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No description available.
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MNRET is an M-mode-only instruction that uses the values in mnepc and mnstatus to return to the
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program counter, privilege mode, and virtualization mode of the interrupted context. This instruction
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also sets mnstatus.NMIE. If MNRET changes the privilege mode to a mode less privileged than M, it
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also sets mstatus.MPRV to 0. If the Zicfilp extension is implemented, then if the new privileged mode is
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y, MNRET sets ELP to the logical AND of yLPE (see Section 22.1.1) and mnstatus.MNPELP.
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definedBy: Smrnmi
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assembly: mnret
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encoding:
@@ -18,9 +22,17 @@ access:
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vu: always
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data_independent_timing: false
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operation(): |
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if (implemented?(ExtensionName::S) && CSR[mstatus].MPP != 2'b11) {
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if (CSR[mnstatus].MNPP != 2'b11) {
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CSR[mstatus].MPRV = 0;
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if (implemented?(ExtensionName::Smdbltrp)) {
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if (xlen() == 64) {
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CSR[mstatus].MDT = 1'b0;
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} else {
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CSR[mstatush].MDT = 1'b0;
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}
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}
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}
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CSR[mnstatus].NMIE = 1'b1;
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if (CSR[mnstatus].MNPP == 2'b00) {
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set_mode(PrivilegeMode::U);
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} else if (CSR[mnstatus].MNPP == 2'b01) {

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