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kbroch-rivosinckbroch-rivosinc
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task: fix typo and put 2 N's in endianness (#627)
relates to #625
1 parent 16fdbd1 commit 2974f27

20 files changed

+54
-54
lines changed

‎arch/certificate_model/MC100-32.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -133,7 +133,7 @@ extensions:
133133
TRAP_ON_EBREAK:
134134
schema:
135135
const: true
136-
M_MODE_ENDIANESS:
136+
M_MODE_ENDIANNESS:
137137
schema:
138138
const: little
139139
MXLEN:

‎arch/certificate_model/MockCertificateModel.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -132,7 +132,7 @@ extensions:
132132
REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION:
133133
schema:
134134
const: true
135-
M_MODE_ENDIANESS:
135+
M_MODE_ENDIANNESS:
136136
schema:
137137
const: little
138138
# TODO: Uncomment when GitHub issue # is fixed.

‎arch/csr/hstatus.yaml

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -244,26 +244,26 @@ fields:
244244
normative: false
245245
text: |
246246
Since the CPU does not support big endian in VS-mode, this is hardwired to 0.
247-
when(): return VS_MODE_ENDIANESS == "little";
247+
when(): return VS_MODE_ENDIANNESS == "little";
248248

249249
- id: csr-hstatus-vgein-big-endian
250250
normative: false
251251
text: |
252252
Since the CPU does not support little endian in VS-mode, this is hardwired to 1.
253-
when(): return VS_MODE_ENDIANESS == "big";
253+
when(): return VS_MODE_ENDIANNESS == "big";
254254
type(): |
255-
if (VS_MODE_ENDIANESS == "dynamic") {
255+
if (VS_MODE_ENDIANNESS == "dynamic") {
256256
# mode is mutable
257257
return CsrFieldType::RW;
258258
} else {
259259
# mode is fixed as either little or big endian
260260
return CsrFieldType::RO;
261261
}
262262
reset_value(): |
263-
if (VS_MODE_ENDIANESS == "little") {
263+
if (VS_MODE_ENDIANNESS == "little") {
264264
# little endian
265265
return 0;
266-
} else if (VS_MODE_ENDIANESS == "big") {
266+
} else if (VS_MODE_ENDIANNESS == "big") {
267267
# big endian
268268
return 1;
269269
} else {

‎arch/csr/mstatus.yaml

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -91,17 +91,17 @@ fields:
9191
Controls the endianness of data M-mode (0 = little, 1 = big).
9292
Instructions are always little endian, regardless of the data setting.
9393
94-
[when,"M_MODE_ENDIANESS == little"]
94+
[when,"M_MODE_ENDIANNESS == little"]
9595
Since the CPU does not support big endian, this is hardwired to 0.
9696
97-
[when,"M_MODE_ENDIANESS == big"]
97+
[when,"M_MODE_ENDIANNESS == big"]
9898
Since the CPU does not support little endian, this is hardwired to 1.
9999
type(): |
100-
return (M_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;
100+
return (M_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;
101101
102102
# if endianness is mutable, MBE comes out of reset in little-endian mode
103103
reset_value(): |
104-
return (M_MODE_ENDIANESS == "big") ? 1 : 0;
104+
return (M_MODE_ENDIANNESS == "big") ? 1 : 0;
105105
106106
SBE:
107107
location: 36
@@ -113,19 +113,19 @@ fields:
113113
Controls the endianness of S-mode (0 = little, 1 = big).
114114
Instructions are always little endian, regardless of the data setting.
115115
116-
[when,"S_MODE_ENDIANESS == little"]
116+
[when,"S_MODE_ENDIANNESS == little"]
117117
Since the CPU does not support big endian, this is hardwired to 0.
118118
119-
[when,"S_MODE_ENDIANESS == big"]
119+
[when,"S_MODE_ENDIANNESS == big"]
120120
Since the CPU does not support little endian, this is hardwired to 1.
121121
type(): |
122-
return (S_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;
122+
return (S_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;
123123
124124
# if endianness is mutable, MBE comes out of reset in little-endian mode
125125
reset_value(): |
126-
if (S_MODE_ENDIANESS == "little") {
126+
if (S_MODE_ENDIANNESS == "little") {
127127
return 0;
128-
} else if (S_MODE_ENDIANESS == "big") {
128+
} else if (S_MODE_ENDIANNESS == "big") {
129129
return 1;
130130
} else {
131131
return UNDEFINED_LEGAL;
@@ -532,18 +532,18 @@ fields:
532532
Controls the endianness of U-mode (0 = little, 1 = big).
533533
Instructions are always little endian, regardless of the data setting.
534534
535-
[when,"U_MODE_ENDIANESS == 'little'"]
535+
[when,"U_MODE_ENDIANNESS == 'little'"]
536536
Since the CPU does not support big endian in U-mode, this is hardwired to 0.
537537
538-
[when,"U_MODE_ENDIANESS == 'big'"]
538+
[when,"U_MODE_ENDIANNESS == 'big'"]
539539
Since the CPU does not support little endian in U-mode, this is hardwired to 1.
540540
type(): |
541-
return (U_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;
541+
return (U_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;
542542
543543
reset_value(): |
544-
if (U_MODE_ENDIANESS == "little") {
544+
if (U_MODE_ENDIANNESS == "little") {
545545
return 0;
546-
} else if (U_MODE_ENDIANESS == "big") {
546+
} else if (U_MODE_ENDIANNESS == "big") {
547547
return 1;
548548
} else {
549549
return UNDEFINED_LEGAL;

‎arch/csr/mstatush.yaml

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -50,19 +50,19 @@ fields:
5050
location: 5
5151
description: |
5252
see `mstatus.MBE`
53-
type(): 'return (M_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;'
54-
reset_value(): 'return (M_MODE_ENDIANESS == "big") ? 1 : 0;'
53+
type(): 'return (M_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;'
54+
reset_value(): 'return (M_MODE_ENDIANNESS == "big") ? 1 : 0;'
5555
alias: mstatus.MBE
5656
SBE:
5757
location: 4
5858
definedBy: S
5959
description: |
6060
see `mstatus.SBE`
61-
type(): 'return (S_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;'
61+
type(): 'return (S_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;'
6262
reset_value(): |
63-
if (S_MODE_ENDIANESS == "little") {
63+
if (S_MODE_ENDIANNESS == "little") {
6464
return 0;
65-
} else if (S_MODE_ENDIANESS == "big") {
65+
} else if (S_MODE_ENDIANNESS == "big") {
6666
return 1;
6767
} else {
6868
return UNDEFINED_LEGAL;

‎arch/csr/vsstatus.yaml

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -160,19 +160,19 @@ fields:
160160
161161
Controls the endianness of VU-mode (0 = little, 1 = big).
162162
163-
[when,"VU_MODE_ENDIANESS == 'little'"]
163+
[when,"VU_MODE_ENDIANNESS == 'little'"]
164164
Since the CPU does not support big endian, this is hardwired to 0.
165165
166-
[when,"VU_MODE_ENDIANESS == 'big'"]
166+
[when,"VU_MODE_ENDIANNESS == 'big'"]
167167
Since the CPU does not support big endian, this is hardwired to 1.
168168
type(): |
169-
return (VU_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;
169+
return (VU_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;
170170
definedBy: S
171171
reset_value(): |
172-
if (VU_MODE_ENDIANESS == "little") {
172+
if (VU_MODE_ENDIANNESS == "little") {
173173
# little endian
174174
return 0;
175-
} else if (VU_MODE_ENDIANESS == "big") {
175+
} else if (VU_MODE_ENDIANNESS == "big") {
176176
# big endian
177177
return 1;
178178
} else {

‎arch/ext/H.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -170,7 +170,7 @@ params:
170170
extra_validation: |
171171
# GEILEN must be <= 31 for RV32
172172
assert NUM_EXTERNAL_GUEST_INTERRUPTS <= 31 if SXLEN == 32
173-
VS_MODE_ENDIANESS:
173+
VS_MODE_ENDIANNESS:
174174
description: |
175175
Endianness of data in VS-mode. Can be one of:
176176
@@ -181,7 +181,7 @@ params:
181181
schema:
182182
type: string
183183
enum: [little, big, dynamic]
184-
VU_MODE_ENDIANESS:
184+
VU_MODE_ENDIANNESS:
185185
description: |
186186
Endianness of data in VU-mode. Can be one of:
187187

‎arch/ext/S.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -60,7 +60,7 @@ params:
6060
maximum: 16
6161
extra_validation: |
6262
assert ASID_WIDTH <= 9 if XLEN == 32
63-
S_MODE_ENDIANESS:
63+
S_MODE_ENDIANNESS:
6464
description: |
6565
Endianness of data in S-mode. Can be one of:
6666

‎arch/ext/Sm.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -423,7 +423,7 @@ params:
423423
type: integer
424424
minimum: 1
425425
maximum: 64
426-
M_MODE_ENDIANESS:
426+
M_MODE_ENDIANNESS:
427427
description: |
428428
Endianness of data in M-mode. Can be one of:
429429

‎arch/ext/U.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ params:
1818
Indicates whether or not the `U` extension can be disabled with the `misa.U` bit.
1919
schema:
2020
type: boolean
21-
U_MODE_ENDIANESS:
21+
U_MODE_ENDIANNESS:
2222
description: |
2323
Endianness of data in U-mode. Can be one of:
2424

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