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Only implement one solution for native triggers.
When S-mode is present, use option 1 (disable triggers in M-mode unless MIE is set) from the Debug Spec. When S-mode is not present, use option 2 (implement mte and mpte bits in tcontrol). See discussion in #1777.
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3 files changed

+29
-15
lines changed

3 files changed

+29
-15
lines changed

riscv/csr_init.cc

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -205,7 +205,9 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
205205
add_csr(CSR_TDATA2, tdata2 = std::make_shared<tdata2_csr_t>(proc, CSR_TDATA2));
206206
add_csr(CSR_TDATA3, std::make_shared<tdata3_csr_t>(proc, CSR_TDATA3));
207207
add_csr(CSR_TINFO, std::make_shared<tinfo_csr_t>(proc, CSR_TINFO));
208-
add_csr(CSR_TCONTROL, tcontrol = std::make_shared<masked_csr_t>(proc, CSR_TCONTROL, CSR_TCONTROL_MPTE | CSR_TCONTROL_MTE, 0));
208+
if (!proc->extension_enabled_const('S')) {
209+
add_csr(CSR_TCONTROL, tcontrol = std::make_shared<masked_csr_t>(proc, CSR_TCONTROL, CSR_TCONTROL_MPTE | CSR_TCONTROL_MTE, 0));
210+
}
209211
} else {
210212
add_csr(CSR_TDATA1, std::make_shared<const_csr_t>(proc, CSR_TDATA1, 0));
211213
add_csr(CSR_TDATA2, tdata2 = std::make_shared<const_csr_t>(proc, CSR_TDATA2, 0));

riscv/triggers.cc

Lines changed: 25 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -110,17 +110,29 @@ bool trigger_t::textra_match(processor_t * const proc) const noexcept
110110
return true;
111111
}
112112

113-
bool trigger_t::allow_action(const state_t * const state) const
113+
bool trigger_t::allow_action(processor_t * const proc) const
114114
{
115+
const state_t *state = proc->get_state();
115116
if (get_action() == ACTION_DEBUG_EXCEPTION) {
116-
const bool mstatus_mie = state->mstatus->read() & MSTATUS_MIE;
117-
const bool sstatus_sie = state->sstatus->read() & MSTATUS_SIE;
118-
const bool vsstatus_sie = state->vsstatus->read() & MSTATUS_SIE;
119-
const bool medeleg_breakpoint = (state->medeleg->read() >> CAUSE_BREAKPOINT) & 1;
120-
const bool hedeleg_breakpoint = (state->hedeleg->read() >> CAUSE_BREAKPOINT) & 1;
121-
return (state->prv != PRV_M || mstatus_mie) &&
122-
(state->prv != PRV_S || state->v || !medeleg_breakpoint || sstatus_sie) &&
123-
(state->prv != PRV_S || !state->v || !medeleg_breakpoint || !hedeleg_breakpoint || vsstatus_sie);
117+
if (proc->extension_enabled('S')) {
118+
// The hardware prevents triggers with action=0 from matching or firing
119+
// while in M-mode and while MIE in mstatus is 0. If medeleg [3]=1 then it
120+
// prevents triggers with action=0 from matching or firing while in S-mode
121+
// and while SIE in sstatus is 0. If medeleg [3]=1 and hedeleg [3]=1 then
122+
// it prevents triggers with action=0 from matching or firing while in
123+
// VS-mode and while SIE in vstatus is 0.
124+
const bool mstatus_mie = state->mstatus->read() & MSTATUS_MIE;
125+
const bool sstatus_sie = state->sstatus->read() & MSTATUS_SIE;
126+
const bool vsstatus_sie = state->vsstatus->read() & MSTATUS_SIE;
127+
const bool medeleg_breakpoint = (state->medeleg->read() >> CAUSE_BREAKPOINT) & 1;
128+
const bool hedeleg_breakpoint = (state->hedeleg->read() >> CAUSE_BREAKPOINT) & 1;
129+
return (state->prv != PRV_M || mstatus_mie) &&
130+
(state->prv != PRV_S || state->v || !medeleg_breakpoint || sstatus_sie) &&
131+
(state->prv != PRV_S || !state->v || !medeleg_breakpoint || !hedeleg_breakpoint || vsstatus_sie);
132+
} else {
133+
// mte and mpte in tcontrol is implemented. medeleg [3] is hard-wired to 0.
134+
return (state->prv != PRV_M) || (state->tcontrol->read() & CSR_TCONTROL_MTE);
135+
}
124136
}
125137
return true;
126138
}
@@ -235,7 +247,7 @@ std::optional<match_result_t> mcontrol_common_t::detect_memory_access_match(proc
235247
value &= 0xffffffff;
236248
}
237249

238-
if (simple_match(xlen, value) && allow_action(proc->get_state())) {
250+
if (simple_match(xlen, value) && allow_action(proc)) {
239251
/* This is OK because this function is only called if the trigger was not
240252
* inhibited by the previous trigger in the chain. */
241253
set_hit(timing ? HIT_IMMEDIATELY_AFTER : HIT_BEFORE);
@@ -324,7 +336,7 @@ void mcontrol6_t::tdata1_write(processor_t * const proc, const reg_t val, const
324336

325337
std::optional<match_result_t> icount_t::detect_icount_fire(processor_t * const proc) noexcept
326338
{
327-
if (!common_match(proc) || !allow_action(proc->get_state()))
339+
if (!common_match(proc) || !allow_action(proc))
328340
return std::nullopt;
329341

330342
std::optional<match_result_t> ret = std::nullopt;
@@ -339,7 +351,7 @@ std::optional<match_result_t> icount_t::detect_icount_fire(processor_t * const p
339351

340352
void icount_t::detect_icount_decrement(processor_t * const proc) noexcept
341353
{
342-
if (!common_match(proc) || !allow_action(proc->get_state()))
354+
if (!common_match(proc) || !allow_action(proc))
343355
return;
344356

345357
if (count >= 1) {
@@ -431,7 +443,7 @@ std::optional<match_result_t> trap_common_t::detect_trap_match(processor_t * con
431443
bool interrupt = (t.cause() & ((reg_t)1 << (xlen - 1))) != 0;
432444
reg_t bit = t.cause() & ~((reg_t)1 << (xlen - 1));
433445
assert(bit < xlen);
434-
if (simple_match(interrupt, bit) && allow_action(proc->get_state())) {
446+
if (simple_match(interrupt, bit) && allow_action(proc)) {
435447
hit = true;
436448
return match_result_t(TIMING_AFTER, action);
437449
}

riscv/triggers.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@ class trigger_t {
9999
protected:
100100
static action_t legalize_action(reg_t val, reg_t action_mask, reg_t dmode_mask) noexcept;
101101
bool common_match(processor_t * const proc, bool use_prev_prv = false) const noexcept;
102-
bool allow_action(const state_t * const state) const;
102+
bool allow_action(processor_t * const proc) const;
103103
reg_t tdata2;
104104

105105
bool vs = false;

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