AIA: add mtopei/stopei/vstopei CSRs

Author: i2h2

riscv/csr_init.cc

@@ -550,6 +550,7 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
   mvip = std::make_shared<mvip_csr_t>(proc, CSR_MVIP, 0);
   if (proc->extension_enabled_const(EXT_SMAIA)) {
     add_csr(CSR_MTOPI, std::make_shared<mtopi_csr_t>(proc, CSR_MTOPI));
+    add_csr(CSR_MTOPEI, std::make_shared<topei_csr_t>(proc, CSR_MTOPEI, proc->imsic->m));
     if (xlen == 32) {
       add_supervisor_csr(CSR_MVIEN, std::make_shared<rv32_low_csr_t>(proc, CSR_MVIEN, mvien));
       add_supervisor_csr(CSR_MVIENH, std::make_shared<rv32_high_csr_t>(proc, CSR_MVIENH, mvien));
@@ -566,7 +567,9 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
   if (proc->extension_enabled_const(EXT_SSAIA)) { // Included by EXT_SMAIA
     csr_t_p nonvirtual_stopi = std::make_shared<nonvirtual_stopi_csr_t>(proc, CSR_STOPI);
     add_supervisor_csr(CSR_STOPI, std::make_shared<virtualized_with_special_permission_csr_t>(proc, nonvirtual_stopi, vstopi));
-    add_supervisor_csr(CSR_STOPEI, std::make_shared<inaccessible_csr_t>(proc, CSR_STOPEI));
+    auto vstopei = std::make_shared<vstopei_csr_t>(proc, CSR_VSTOPEI);
+    auto nonvirtual_stopei = std::make_shared<nonvirtual_stopei_csr_t>(proc, CSR_STOPEI, proc->imsic->s);
+    add_supervisor_csr(CSR_STOPEI, std::make_shared<virtualized_with_special_permission_csr_t>(proc, nonvirtual_stopei, vstopei));
     auto hvien = std::make_shared<aia_csr_t>(proc, CSR_HVIEN, 0, 0);
     auto hviprio1 = std::make_shared<aia_csr_t>(proc, CSR_HVIPRIO1, 0, 0);
     auto hviprio2 = std::make_shared<aia_csr_t>(proc, CSR_HVIPRIO2, 0, 0);
@@ -584,5 +587,6 @@ void state_t::csr_init(processor_t* const proc, reg_t max_isa)
     }
     add_hypervisor_csr(CSR_HVICTL, hvictl);
     add_hypervisor_csr(CSR_VSTOPI, vstopi);
+    add_hypervisor_csr(CSR_VSTOPEI, vstopei);
   }
 }

riscv/csrs.cc

@@ -2368,3 +2368,71 @@ csrmap_t_p aia_ireg_proxy_csr_t::get_csrmap(reg_t vgein) {
     return csrmap;
   return proc->imsic->get_vs_csrmap(vgein ? vgein : get_field(state->hstatus->read(), HSTATUS_VGEIN));
 }
+
+topei_csr_t::topei_csr_t(processor_t* const proc, const reg_t addr, imsic_file_t_p const imsic) : csr_t(proc, addr), imsic(imsic) {
+}
+
+imsic_file_t_p topei_csr_t::get_imsic() const noexcept {
+  // non-virtualized registers have pointers to IMSIC
+  if (imsic)
+    return imsic;
+
+  // Virtualized IMSIC depends on hstatus.vgein
+  reg_t vgein = get_field(state->hstatus->read(), HSTATUS_VGEIN);
+  if (!vgein || !proc->imsic->vgein_valid(vgein))
+    return nullptr;
+  return proc->imsic->vs[vgein];
+}
+
+reg_t topei_csr_t::read() const noexcept {
+  imsic_file_t_p p = get_imsic();
+  if (!p)
+    return 0;
+
+  reg_t iid = p->topei();
+  reg_t v = 0;
+  v = set_field(v, IMSIC_TOPI_IPRIO, iid);
+  v = set_field(v, IMSIC_TOPI_IID, iid);
+  return v;
+}
+
+bool topei_csr_t::unlogged_write(const reg_t val) noexcept {
+  imsic_file_t_p p = get_imsic();
+  if (!p)
+    return false;
+  p->claimei(p->topei());
+  return true;
+}
+
+void nonvirtual_stopei_csr_t::verify_permissions(insn_t insn, bool write) const {
+  if (proc->extension_enabled(EXT_SMSTATEEN)) {
+    if ((state->prv < PRV_M) && !(state->mstateen[0]->read() & MSTATEEN0_IMSIC))
+      throw trap_illegal_instruction(insn.bits());
+
+    if (state->v && !(state->hstateen[0]->read() & HSTATEEN0_IMSIC))
+      throw trap_virtual_instruction(insn.bits());
+  }
+
+  csr_t::verify_permissions(insn, write);
+}
+
+void vstopei_csr_t::verify_permissions(insn_t insn, bool write) const {
+  if (proc->extension_enabled(EXT_SMSTATEEN)) {
+    if ((state->prv < PRV_M) && !(state->mstateen[0]->read() & MSTATEEN0_IMSIC))
+      throw trap_illegal_instruction(insn.bits());
+
+    if (state->v && !(state->hstateen[0]->read() & HSTATEEN0_IMSIC))
+      throw trap_virtual_instruction(insn.bits());
+  }
+
+  csr_t::verify_permissions(insn, write);
+
+  // VGEIN must be valid
+  reg_t vgein = get_field(state->hstatus->read(), HSTATUS_VGEIN);
+  if (!vgein || !proc->imsic->vgein_valid(vgein)) {
+    if (state->v)
+      throw trap_virtual_instruction(insn.bits());
+    else
+      throw trap_illegal_instruction(insn.bits());
+  }
+}

riscv/csrs.h

@@ -1028,4 +1028,28 @@ class aia_ireg_proxy_csr_t: public csr_t {
   bool vs;
   csrmap_t_p csrmap;
 };
+
+class imsic_file_t;
+typedef std::shared_ptr<imsic_file_t> imsic_file_t_p;
+class topei_csr_t: public csr_t {
+ public:
+  topei_csr_t(processor_t* const proc, const reg_t addr, imsic_file_t_p const imsic);
+  virtual reg_t read() const noexcept override;
+ protected:
+  virtual bool unlogged_write(const reg_t val) noexcept override;
+  imsic_file_t_p get_imsic() const noexcept;
+  imsic_file_t_p const imsic;
+};
+
+class nonvirtual_stopei_csr_t: public topei_csr_t {
+ public:
+  nonvirtual_stopei_csr_t(processor_t* const proc, const reg_t addr, imsic_file_t_p const imsic) : topei_csr_t(proc, addr, imsic) {}
+  virtual void verify_permissions(insn_t insn, bool write) const override;
+};
+
+class vstopei_csr_t: public topei_csr_t {
+ public:
+  vstopei_csr_t(processor_t* const proc, const reg_t addr) : topei_csr_t(proc, addr, nullptr) {}
+  virtual void verify_permissions(insn_t insn, bool write) const override;
+};
 #endif