Skip to content

Commit abb2d55

Browse files
committed
Fix insn interactive command (catch/print trap, use proper access func)
1 parent ed5f817 commit abb2d55

File tree

1 file changed

+30
-29
lines changed

1 file changed

+30
-29
lines changed

riscv/interactive.cc

Lines changed: 30 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -452,37 +452,16 @@ void sim_t::interactive_pc(const std::string& cmd, const std::vector<std::string
452452
<< zext(get_pc(args), max_xlen) << std::endl;
453453
}
454454

455-
static reg_t load(mmu_t* mmu, reg_t addr) {
456-
reg_t val;
457-
458-
switch (addr % 8)
459-
{
460-
case 0:
461-
val = mmu->load<uint64_t>(addr);
462-
break;
463-
case 4:
464-
val = mmu->load<uint32_t>(addr);
465-
break;
466-
case 2:
467-
case 6:
468-
val = mmu->load<uint16_t>(addr);
469-
break;
470-
default:
471-
val = mmu->load<uint8_t>(addr);
472-
break;
473-
}
474-
return val;
475-
}
476-
477455
reg_t sim_t::get_insn(const std::vector<std::string>& args)
478456
{
479457
if (args.size() != 1)
480458
throw trap_interactive();
481459

482460
processor_t *p = get_core(args[0]);
483-
reg_t addr = p->get_state()->pc;
461+
reg_t pc = p->get_state()->pc;
484462
mmu_t* mmu = p->get_mmu();
485-
return load(mmu, addr);
463+
icache_entry_t* ic_entry = mmu->access_icache(pc);
464+
return ic_entry->data.insn.bits();
486465
}
487466

488467
void sim_t::interactive_insn(const std::string& cmd, const std::vector<std::string>& args)
@@ -493,11 +472,16 @@ void sim_t::interactive_insn(const std::string& cmd, const std::vector<std::stri
493472
processor_t *p = get_core(args[0]);
494473
int max_xlen = p->get_isa().get_max_xlen();
495474

496-
insn_t insn(get_insn(args));
497-
498475
std::ostream out(sout_.rdbuf());
499-
out << std::hex << std::setfill('0') << "0x" << std::setw(max_xlen/4)
500-
<< zext(insn.bits(), max_xlen) << " " << p->get_disassembler()->disassemble(insn) << std::endl;
476+
try
477+
{
478+
insn_t insn(get_insn(args));
479+
out << std::hex << std::setfill('0') << "0x" << std::setw(max_xlen/4)
480+
<< zext(insn.bits(), max_xlen) << " " << p->get_disassembler()->disassemble(insn) << std::endl;
481+
}
482+
catch (trap_t& t) {
483+
out << "Unable to obtain insn due to " << t.name() << std::endl;
484+
}
501485
}
502486

503487
void sim_t::interactive_priv(const std::string& cmd, const std::vector<std::string>& args)
@@ -703,7 +687,24 @@ reg_t sim_t::get_mem(const std::vector<std::string>& args)
703687
if (addr == LONG_MAX)
704688
addr = strtoul(addr_str.c_str(),NULL,16);
705689

706-
return load(mmu, addr);
690+
reg_t val;
691+
switch (addr % 8)
692+
{
693+
case 0:
694+
val = mmu->load<uint64_t>(addr);
695+
break;
696+
case 4:
697+
val = mmu->load<uint32_t>(addr);
698+
break;
699+
case 2:
700+
case 6:
701+
val = mmu->load<uint16_t>(addr);
702+
break;
703+
default:
704+
val = mmu->load<uint8_t>(addr);
705+
break;
706+
}
707+
return val;
707708
}
708709

709710
void sim_t::interactive_mem(const std::string& cmd, const std::vector<std::string>& args)

0 commit comments

Comments
 (0)