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Merge pull request #1991 from arrv-sc/arrv-sc/const-get-isa
feat: mark processor_t getters as const
2 parents 7a16d71 + 9414785 commit 615e47d

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3 files changed

+7
-7
lines changed

3 files changed

+7
-7
lines changed

riscv/execute.cc

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -201,7 +201,7 @@ static inline reg_t execute_insn_logged(processor_t* p, reg_t pc, insn_fetch_t f
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return npc;
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}
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204-
bool processor_t::slow_path()
204+
bool processor_t::slow_path() const
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{
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return debug || state.single_step != state.STEP_NONE || state.debug_mode ||
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log_commits_enabled || histogram_enabled || in_wfi || check_triggers_icount;

riscv/processor.cc

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -328,7 +328,7 @@ void processor_t::set_privilege(reg_t prv, bool virt)
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state.v_changed = state.v != state.prev_v;
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}
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331-
const char* processor_t::get_privilege_string()
331+
const char* processor_t::get_privilege_string() const
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{
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if (state.debug_mode)
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return "D";

riscv/processor.h

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -249,8 +249,8 @@ class processor_t : public abstract_device_t
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FILE *log_file, std::ostream& sout_); // because of command line option --log and -s we need both
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~processor_t();
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252-
const isa_parser_t &get_isa() { return isa; }
253-
const cfg_t &get_cfg() { return *cfg; }
252+
const isa_parser_t &get_isa() const & { return isa; }
253+
const cfg_t &get_cfg() const & { return *cfg; }
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void set_debug(bool value);
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void set_histogram(bool value);
@@ -327,7 +327,7 @@ class processor_t : public abstract_device_t
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}
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reg_t legalize_privilege(reg_t);
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void set_privilege(reg_t, bool);
330-
const char* get_privilege_string();
330+
const char* get_privilege_string() const;
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void update_histogram(reg_t pc);
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const disassembler_t* get_disassembler() { return disassembler; }
333333

@@ -349,8 +349,8 @@ class processor_t : public abstract_device_t
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// When true, display disassembly of each instruction that's executed.
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bool debug;
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// When true, take the slow simulation path.
352-
bool slow_path();
353-
bool halted() { return state.debug_mode; }
352+
bool slow_path() const;
353+
bool halted() const { return state.debug_mode; }
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enum {
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HR_NONE, /* Halt request is inactive. */
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HR_REGULAR, /* Regular halt request/debug interrupt. */

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