@@ -193,6 +193,47 @@ struct : public arg_t {
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}
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} v_zimm6;
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+ struct : public arg_t {
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+ std::string to_string (insn_t insn) const {
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+ static const char * table[32 ] = {
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+ " -1.0" ,
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+ " min" ,
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+ " 1.52587890625e-05" ,
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+ " 3.0517578125e-05" ,
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+ " 0.00390625" ,
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+ " 0.0078125" ,
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+ " 0.0625" ,
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+ " 0.125" ,
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+ " 0.25" ,
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+ " 0.3125" ,
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+ " 0.375" ,
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+ " 0.4375" ,
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+ " 0.5" ,
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+ " 0.625" ,
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+ " 0.75" ,
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+ " 0.875" ,
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+ " 1.0" ,
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+ " 1.25" ,
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+ " 1.5" ,
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+ " 1.75" ,
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+ " 2.0" ,
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+ " 2.5" ,
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+ " 3.0" ,
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+ " 4.0" ,
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+ " 8.0" ,
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+ " 16.0" ,
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+ " 128.0" ,
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+ " 256.0" ,
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+ " 32768.0" ,
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+ " 65536.0" ,
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+ " inf" ,
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+ " nan"
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+ };
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+
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+ return table[insn.rs1 ()];
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+ }
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+ } fli_imm;
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+
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struct : public arg_t {
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std::string to_string (insn_t insn) const {
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int32_t target = insn.sb_imm ();
@@ -644,11 +685,21 @@ static void NOINLINE add_xftype_insn(disassembler_t* d, const char* name, uint32
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d->add_insn (new disasm_insn_t (name, match, mask, {&frd, &xrs1}));
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}
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+ static void NOINLINE add_xf2type_insn (disassembler_t * d, const char * name, uint32_t match, uint32_t mask)
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+ {
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+ d->add_insn (new disasm_insn_t (name, match, mask, {&frd, &xrs1, &xrs2}));
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+ }
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+
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static void NOINLINE add_fx2type_insn (disassembler_t * d, const char * name, uint32_t match, uint32_t mask)
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{
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d->add_insn (new disasm_insn_t (name, match, mask, {&xrd, &frs1, &frs2}));
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}
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+ static void NOINLINE add_flitype_insn (disassembler_t * d, const char * name, uint32_t match, uint32_t mask)
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+ {
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+ d->add_insn (new disasm_insn_t (name, match, mask, {&xrd, &fli_imm}));
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+ }
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+
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static void NOINLINE add_sfence_insn (disassembler_t * d, const char * name, uint32_t match, uint32_t mask)
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{
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d->add_insn (new disasm_insn_t (name, match, mask, {&xrs1, &xrs2}));
@@ -794,7 +845,9 @@ void disassembler_t::add_instructions(const isa_parser_t* isa)
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#define DEFINE_FR3TYPE (code ) add_fr3type_insn(this , #code, match_##code, mask_##code);
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#define DEFINE_FXTYPE (code ) add_fxtype_insn(this , #code, match_##code, mask_##code);
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#define DEFINE_FX2TYPE (code ) add_fx2type_insn(this , #code, match_##code, mask_##code);
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+ #define DEFINE_FLITYPE (code ) add_flitype_insn(this , #code, match_##code, mask_##code);
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#define DEFINE_XFTYPE (code ) add_xftype_insn(this , #code, match_##code, mask_##code);
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+ #define DEFINE_XF2TYPE (code ) add_xf2type_insn(this , #code, match_##code, mask_##code);
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#define DEFINE_SFENCE_TYPE (code ) add_sfence_insn(this , #code, match_##code, mask_##code);
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add_insn (new disasm_insn_t (" unimp" , match_csrrw|(CSR_CYCLE<<20 ), 0xffffffff , {}));
@@ -1179,6 +1232,56 @@ void disassembler_t::add_instructions(const isa_parser_t* isa)
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DEFINE_FX2TYPE (fle_d);
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}
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+ if (isa->extension_enabled (EXT_ZFA)) {
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+ DEFINE_FLITYPE (fli_s);
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+ DEFINE_FRTYPE (fminm_s);
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+ DEFINE_FRTYPE (fmaxm_s);
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+ DEFINE_FR1TYPE (fround_s);
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+ DEFINE_FR1TYPE (froundnx_s);
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+ DEFINE_FX2TYPE (fleq_s);
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+ DEFINE_FX2TYPE (fltq_s);
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+
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+ if (isa->extension_enabled (EXT_ZFH) || isa->extension_enabled (EXT_ZVFH)) {
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+ DEFINE_FLITYPE (fli_h);
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+ DEFINE_FRTYPE (fminm_h);
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+ DEFINE_FRTYPE (fmaxm_h);
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+ DEFINE_FR1TYPE (fround_h);
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+ DEFINE_FR1TYPE (froundnx_h);
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+ DEFINE_FX2TYPE (fleq_h);
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+ DEFINE_FX2TYPE (fltq_h);
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+ }
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+
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+ if (isa->extension_enabled (' D' )) {
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+ DEFINE_FLITYPE (fli_d);
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+ DEFINE_FRTYPE (fminm_d);
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+ DEFINE_FRTYPE (fmaxm_d);
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+ DEFINE_FR1TYPE (fround_d);
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+ DEFINE_FR1TYPE (froundnx_d);
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+ DEFINE_FX2TYPE (fleq_d);
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+ DEFINE_FX2TYPE (fltq_d);
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+
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+ if (isa->get_max_xlen () == 32 ) {
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+ DEFINE_XF2TYPE (fmvp_d_x);
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+ DEFINE_FXTYPE (fmvh_x_d);
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+ }
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+ }
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+
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+ if (isa->extension_enabled (' Q' )) {
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+ DEFINE_FLITYPE (fli_q);
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+ DEFINE_FRTYPE (fminm_q);
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+ DEFINE_FRTYPE (fmaxm_q);
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+ DEFINE_FR1TYPE (fround_q);
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+ DEFINE_FR1TYPE (froundnx_q);
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+ DEFINE_FX2TYPE (fleq_q);
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+ DEFINE_FX2TYPE (fltq_q);
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+
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+ if (isa->get_max_xlen () == 64 ) {
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+ DEFINE_XF2TYPE (fmvp_q_x);
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+ DEFINE_FXTYPE (fmvh_x_q);
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+ }
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+ }
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+ }
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+
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if (isa->extension_enabled (EXT_ZDINX)) {
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DEFINE_RTYPE (fadd_d);
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DEFINE_RTYPE (fsub_d);
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