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Use svd2rust 0.34.0
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6 files changed

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‎e310x-hal/CHANGELOG.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
1717
- Use `portable-atomic` with `zaamo` feature to use native `amo*` operations.
1818
- Official target is now `riscv32imc-unknown-none-elf`, as it does not fully support the A extension.
1919
- Update `e310x` dependency and adapt code
20-
- Bump MSRV to 1.76.0 to ensure a correct behavior of portable-atomic
20+
- Bump MSRV to 1.76.0
2121

2222
## [v0.10.0] - 2023-03-28
2323

‎e310x-hal/src/pwm.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -165,7 +165,7 @@ impl<PWM: PwmX> Pwm<PWM> {
165165
CmpIndex::Cmp1 => self.pwm.cmp1().write(|w| unsafe { w.bits(duty) }),
166166
CmpIndex::Cmp2 => self.pwm.cmp2().write(|w| unsafe { w.bits(duty) }),
167167
CmpIndex::Cmp3 => self.pwm.cmp3().write(|w| unsafe { w.bits(duty) }),
168-
}
168+
};
169169
}
170170

171171
/// Enables the PWM channel
@@ -174,7 +174,7 @@ impl<PWM: PwmX> Pwm<PWM> {
174174
CmpIndex::Cmp1 => self.pwm.cmp1().write(|w| unsafe { w.bits(u32::MAX) }),
175175
CmpIndex::Cmp2 => self.pwm.cmp2().write(|w| unsafe { w.bits(u32::MAX) }),
176176
CmpIndex::Cmp3 => self.pwm.cmp3().write(|w| unsafe { w.bits(u32::MAX) }),
177-
}
177+
};
178178
}
179179

180180
/// Disables the PWM channel

‎e310x/CHANGELOG.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
1111

1212
- Now CLINT and PLIC are provided by `riscv-peripheral` 0.2
1313
- Adapt crate to work with `riscv` 0.12 and `riscv-rt` 0.13
14-
- Bump MSRV to 1.76.0 to ensure a correct behavior of portable-atomic
15-
- Regenerate code with `svd2rust` 8b809ac2c1e1a13f30af59ee41f4d66a4995d625 (unreleased)
14+
- Bump MSRV to 1.76.0 required by `riscv-peripheral`
15+
- Regenerate code with `svd2rust` 0.34.0
1616

1717
## [v0.11.0]
1818

‎e310x/src/generic.rs

Lines changed: 155 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -687,18 +687,63 @@ impl<REG: Resettable + Writable> Reg<REG> {
687687
/// ```
688688
/// In the latter case, other fields will be set to their reset value.
689689
#[inline(always)]
690-
pub fn write<F>(&self, f: F)
690+
pub fn write<F>(&self, f: F) -> REG::Ux
691691
where
692692
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
693693
{
694-
self.register.set(
695-
f(&mut W {
696-
bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
697-
| REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
698-
_reg: marker::PhantomData,
699-
})
700-
.bits,
701-
);
694+
let value = f(&mut W {
695+
bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
696+
| REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
697+
_reg: marker::PhantomData,
698+
})
699+
.bits;
700+
self.register.set(value);
701+
value
702+
}
703+
704+
/// Writes bits to a `Writable` register and produce a value.
705+
///
706+
/// You can write raw bits into a register:
707+
/// ```ignore
708+
/// periph.reg.write_and(|w| unsafe { w.bits(rawbits); });
709+
/// ```
710+
/// or write only the fields you need:
711+
/// ```ignore
712+
/// periph.reg.write_and(|w| {
713+
/// w.field1().bits(newfield1bits)
714+
/// .field2().set_bit()
715+
/// .field3().variant(VARIANT);
716+
/// });
717+
/// ```
718+
/// or an alternative way of saying the same:
719+
/// ```ignore
720+
/// periph.reg.write_and(|w| {
721+
/// w.field1().bits(newfield1bits);
722+
/// w.field2().set_bit();
723+
/// w.field3().variant(VARIANT);
724+
/// });
725+
/// ```
726+
/// In the latter case, other fields will be set to their reset value.
727+
///
728+
/// Values can be returned from the closure:
729+
/// ```ignore
730+
/// let state = periph.reg.write_and(|w| State::set(w.field1()));
731+
/// ```
732+
#[inline(always)]
733+
pub fn from_write<F, T>(&self, f: F) -> T
734+
where
735+
F: FnOnce(&mut W<REG>) -> T,
736+
{
737+
let mut writer = W {
738+
bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
739+
| REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
740+
_reg: marker::PhantomData,
741+
};
742+
let result = f(&mut writer);
743+
744+
self.register.set(writer.bits);
745+
746+
result
702747
}
703748
}
704749

@@ -711,17 +756,41 @@ impl<REG: Writable> Reg<REG> {
711756
///
712757
/// Unsafe to use with registers which don't allow to write 0.
713758
#[inline(always)]
714-
pub unsafe fn write_with_zero<F>(&self, f: F)
759+
pub unsafe fn write_with_zero<F>(&self, f: F) -> REG::Ux
715760
where
716761
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
717762
{
718-
self.register.set(
719-
f(&mut W {
720-
bits: REG::Ux::default(),
721-
_reg: marker::PhantomData,
722-
})
723-
.bits,
724-
);
763+
let value = f(&mut W {
764+
bits: REG::Ux::default(),
765+
_reg: marker::PhantomData,
766+
})
767+
.bits;
768+
self.register.set(value);
769+
value
770+
}
771+
772+
/// Writes 0 to a `Writable` register and produces a value.
773+
///
774+
/// Similar to `write`, but unused bits will contain 0.
775+
///
776+
/// # Safety
777+
///
778+
/// Unsafe to use with registers which don't allow to write 0.
779+
#[inline(always)]
780+
pub unsafe fn from_write_with_zero<F, T>(&self, f: F) -> T
781+
where
782+
F: FnOnce(&mut W<REG>) -> T,
783+
{
784+
let mut writer = W {
785+
bits: REG::Ux::default(),
786+
_reg: marker::PhantomData,
787+
};
788+
789+
let result = f(&mut writer);
790+
791+
self.register.set(writer.bits);
792+
793+
result
725794
}
726795
}
727796

@@ -752,25 +821,80 @@ impl<REG: Readable + Writable> Reg<REG> {
752821
/// ```
753822
/// Other fields will have the value they had before the call to `modify`.
754823
#[inline(always)]
755-
pub fn modify<F>(&self, f: F)
824+
pub fn modify<F>(&self, f: F) -> REG::Ux
756825
where
757826
for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> &'w mut W<REG>,
758827
{
759828
let bits = self.register.get();
760-
self.register.set(
761-
f(
762-
&R {
763-
bits,
764-
_reg: marker::PhantomData,
765-
},
766-
&mut W {
767-
bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
768-
| REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
769-
_reg: marker::PhantomData,
770-
},
771-
)
772-
.bits,
829+
let value = f(
830+
&R {
831+
bits,
832+
_reg: marker::PhantomData,
833+
},
834+
&mut W {
835+
bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
836+
_reg: marker::PhantomData,
837+
},
838+
)
839+
.bits;
840+
self.register.set(value);
841+
value
842+
}
843+
844+
/// Modifies the contents of the register by reading and then writing it
845+
/// and produces a value.
846+
///
847+
/// E.g. to do a read-modify-write sequence to change parts of a register:
848+
/// ```ignore
849+
/// let bits = periph.reg.modify(|r, w| {
850+
/// let new_bits = r.bits() | 3;
851+
/// unsafe {
852+
/// w.bits(new_bits);
853+
/// }
854+
///
855+
/// new_bits
856+
/// });
857+
/// ```
858+
/// or
859+
/// ```ignore
860+
/// periph.reg.modify(|_, w| {
861+
/// w.field1().bits(newfield1bits)
862+
/// .field2().set_bit()
863+
/// .field3().variant(VARIANT);
864+
/// });
865+
/// ```
866+
/// or an alternative way of saying the same:
867+
/// ```ignore
868+
/// periph.reg.modify(|_, w| {
869+
/// w.field1().bits(newfield1bits);
870+
/// w.field2().set_bit();
871+
/// w.field3().variant(VARIANT);
872+
/// });
873+
/// ```
874+
/// Other fields will have the value they had before the call to `modify`.
875+
#[inline(always)]
876+
pub fn from_modify<F, T>(&self, f: F) -> T
877+
where
878+
for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> T,
879+
{
880+
let bits = self.register.get();
881+
882+
let mut writer = W {
883+
bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
884+
_reg: marker::PhantomData,
885+
};
886+
887+
let result = f(
888+
&R {
889+
bits,
890+
_reg: marker::PhantomData,
891+
},
892+
&mut writer,
773893
);
894+
895+
self.register.set(writer.bits);
896+
897+
result
774898
}
775899
}
776900

‎e310x/src/lib.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
#![doc = "Peripheral access API for FE310 microcontrollers (generated using svd2rust v0.33.5 (90ef2a6 2024-10-21))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
2-
svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.5/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
1+
#![doc = "Peripheral access API for FE310 microcontrollers (generated using svd2rust v0.34.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
2+
svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.34.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
33
#![allow(non_camel_case_types)]
44
#![allow(non_snake_case)]
55
#![no_std]

‎e310x/update.sh

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,10 +2,10 @@
22
set -x
33
set -e
44

5-
# used svd2rust 8b809ac2c1e1a13f30af59ee41f4d66a4995d625 (unreleased)
5+
# used svd2rust 0.34.0
66
rm -rf src
77
mkdir src
8-
../../svd2rust/target/release/svd2rust --target riscv --settings settings.yaml -g -i e310x.svd
8+
svd2rust --target riscv --settings settings.yaml -g -i e310x.svd
99
mv generic.rs src/
1010
form -i lib.rs -o src/
1111
rm lib.rs

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