Skip to content

Commit 9944a52

Browse files
committed
release v0.11.0
1 parent e89750e commit 9944a52

File tree

2 files changed

+5
-2
lines changed

2 files changed

+5
-2
lines changed

CHANGELOG.md

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,8 +7,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
77

88
## [Unreleased]
99

10+
## [v0.11.0]
11+
1012
### Changed
1113
- Update `riscv` dependency to version 0.10
14+
- Regenerate code with `svd2rust` v0.26.0
1215

1316
## [v0.10.0] - 2022-09-04
1417

Cargo.toml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
[package]
22
name = "e310x"
3-
version = "0.10.0"
3+
version = "0.11.0"
44
repository = "https://github.com/riscv-rust/e310x"
55
authors = ["David Craven <david@craven.ch>", "The RISC-V Team <risc-v@teams.rust-embedded.org>"]
66
categories = ["embedded", "hardware-support", "no-std"]
@@ -18,4 +18,4 @@ rt = []
1818
g002 = []
1919

2020
[package.metadata.docs.rs]
21-
features = ["rt", "g002"]
21+
features = ["rt", "g002", "critical-section"]

0 commit comments

Comments
 (0)