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Release v0.10.0
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CHANGELOG.md

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# Change Log
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All notable changes to this project will be documented in this file.
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The format is based on [Keep a Changelog](http://keepachangelog.com/)
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and this project adheres to [Semantic Versioning](http://semver.org/).
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## [Unreleased]
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## [v0.10.0] - 2022-09-04
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### Added
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### Changed
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- Update `riscv` dependency to version 0.8
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- Update Minimum Supported Rust Version to 1.59
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- Regenerate code with `svd2rust` v0.19.0
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### Fixed
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- Fix QSPI `delay0` and `delay1` reset values
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## [v0.9.0] - 2020-11-01
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### Changed
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- Update `riscv` dependency to version 0.6
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- Rename QSPI registers and fields to match the datasheet
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### Fixed
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- Fix QSPI `ffmt.pad_cnt` field definition
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[Unreleased]: https://github.com/riscv-rust/e310x/compare/v0.10.0..HEAD
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[v0.10.0]: https://github.com/rust-embedded/riscv-rt/compare/v0.9.0...v0.10.0
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[v0.9.0]: https://github.com/riscv-rust/e310x/compare/v0.8.1...v0.9.0

Cargo.toml

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[package]
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name = "e310x"
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version = "0.9.1"
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version = "0.10.0"
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repository = "https://github.com/riscv-rust/e310x"
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authors = ["David Craven <david@craven.ch>"]
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authors = ["David Craven <david@craven.ch>", "The RISC-V Team <risc-v@teams.rust-embedded.org>"]
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categories = ["embedded", "hardware-support", "no-std"]
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description = "With svd2rust generated peripherals for Freedom E310 MCU's."
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keywords = ["riscv", "register", "peripheral"]
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license = "ISC"
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rust-version = "1.59"
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[dependencies]
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bare-metal = "1.0.0"
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vcell = "0.1.3"
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riscv = "0.8.0"
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README.md

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## License
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Copyright 2018-2019 [RISC-V team][team]
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Copyright 2018-2022 [RISC-V team][team]
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Permission to use, copy, modify, and/or distribute this software for any purpose
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with or without fee is hereby granted, provided that the above copyright notice

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