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Locality for prefetch built-in proposal
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riscv-c-api.md

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@@ -400,6 +400,25 @@ enum {
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| `__RISCV_NTLH_INNERMOST_SHARED` | `ntl.s1` |
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| `__RISCV_NTLH_ALL` | `ntl.all` |
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### Prefetch Intrinsics
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The zicbop extension provide the prefetch instruction to allow users to optimize data access patterns by providing hints to the hardware regarding future data accesses. It is supported through a compiler-defined built-in function with three arguments that specify its behavior.
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```
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void __builtin_prefetch(const void *addr, int rw, int locality)
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```
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The locality for the built-in __builtin_prefetch function in RISC-V can be achieved using the Non-Temporal Locality Hints (NTLH) extension. According to Non-Temporal Locality Hints extension, it indicates that a cache line should be prefetched into a cache that is outer from the level specified by the NTL when a NTL instruction is applied to prefetch instruction.
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The following table presents the mapping from the __builtin_prefetch function to the corresponding assembly instructions using the NTL extension.
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| Prefetch function | Assembly |
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| ----------------------------------------------- | ---------------------------- |
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| `__builtin_prefetch(ptr, 0, 0 /* locality */);` | `ntl.all + prefetch.r (ptr)` |
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| `__builtin_prefetch(ptr, 0, 1 /* locality */);` | `ntl.pall + prefetch.r (ptr)`|
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| `__builtin_prefetch(ptr, 0, 2 /* locality */);` | `ntl.p1 + prefetch.r (ptr)` |
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| `__builtin_prefetch(ptr, 0, 3 /* locality */);` | `prefetch.r (ptr)` |
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### Scalar Bit Manipulation Extension Intrinsics
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In order to access the RISC-V scalar bit manipulation intrinsics, it is
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| `uint32_t __riscv_sm4ed(uint32_t rs1, uint32_t rs2, const int bs);` | `sm4ed` | Zksed | `bs`=[0..3] |
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| `uint32_t __riscv_sm4ks(uint32_t rs1, uint32_t rs2, const int bs);` | `sm4ks` | Zksed | `bs`=[0..3] |
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## Constraints on Operands of Inline Assembly Statements
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This section lists operand constraints that can be used with inline assembly

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