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2 parents 59ae6e7 + 676007d commit 1498e95Copy full SHA for 1498e95
CHANGELOG.md
@@ -1,5 +1,8 @@
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# CHANGELOG
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+## [3.8.15] - 2024-04-20
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+Corrected missing 32 string in RVTEST_CASE macros for Zcb rv32i_m/C/clh-01.S
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+
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## [3.8.14] - 2024-04-16
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Add missing `Zfh` ISA in RVTEST_CASE for `Zfh` fdiv related tests
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riscv-test-suite/rv32i_m/C/src/clh-01.S
@@ -30,7 +30,7 @@ RVTEST_CODE_BEGIN
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#ifdef TEST_CASE_1
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-RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zca.*Zcb.*);def TEST_CASE_1=True;",clh)
+RVTEST_CASE(0,"//check ISA:=regex(.*32.*I.*Zca.*Zcb.*);def TEST_CASE_1=True;",clh)
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RVTEST_SIGBASE(x1,signature_x1_1)
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