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Merge pull request #5 from phoeniX-Digital-Design/phoeniX-V0.4.1
phoeniX V0.4.1
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‎AssembleX.py

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# AssembleX V3.0
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# RISC-V Assembly Software Assistant for the phoeniX project (https://github.com/phoeniX-Digital-Design/phoeniX)
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# Description: AssembleX main code
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# Copyright 2024 Iran University of Science and Technology. <phoenix.digital.electronics@gmail.com>
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# Permission to use, copy, modify, and/or distribute this software for any
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# purpose with or without fee is hereby granted, provided that the above
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# copyright notice and this permission notice appear in all copies.
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import sys
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import os
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import glob
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from Software.AssembleX.variables import *
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from Software.AssembleX.assembler import assembler
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from Software.AssembleX.address_mapping import address_mapping
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from Software.AssembleX.address_mapping import label_mapping
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from Software.AssembleX.address_mapping import define_reset_address
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from Software.AssembleX.data_conversion import binary_to_hex
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from Software.AssembleX.data_conversion import ascii_to_hex
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testbench_file = "phoeniX_Testbench.v"
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option = sys.argv[1]
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project_name = sys.argv[2]
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output_name = project_name + "_firmware" + ".hex"
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if option == 'sample':
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directory = "Sample_Assembly_Codes"
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elif option == 'code':
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directory = "User_Codes"
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else:
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raise ValueError("Options are: sample, code")
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print("\nAssembleX V3.0 - RV32IM Assembly Code Executant Software")
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print("Iran University of Science and Technology - Summer 2024")
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print("--------------------------------------------------------")
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try:
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source_path = list(glob.iglob(os.path.join("Software", directory, project_name, '*' + ".s")))[0]
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firmware_hex_path = os.path.join("Software", directory, project_name, output_name)
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print(source_path)
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print(firmware_hex_path)
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#source_path = sys.argv[1]
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#firmware_hex_path = sys.argv[1].rstrip('.s') + '_firmware.hex'
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except:
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print('INFO: No arguments/unsupported arguments\n')
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try:
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source_file = open(source_path, "r")
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source_code_unformatted = source_file.read().splitlines()
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print("INFO: Source file opened successfully\n")
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except:
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print("FATAL ERROR: Unable to open source file\n")
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exit(1)
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print('Assembly code pre-processing')
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print('----------------------------')
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source_code = []
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for line in source_code_unformatted:
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instruction_format_space = " ".join(line.split())
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instruction_format_comments = " #".join(instruction_format_space.split('#', 2))
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instruction_format_leadspace = instruction_format_comments.lstrip()
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source_code.append(instruction_format_leadspace)
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# Re-format immediate expressions
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processed_code_1 = []
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for line in source_code:
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arguments = line.split(',')
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try:
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if arguments[0][0] == '#':
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processed_code_1.append(line)
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continue
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elif arguments[0] == '.RESET_ADDRESS':
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processed_code_1.append(line)
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continue
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except:
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processed_code_1.append(line)
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continue
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# Check for 2 argument immediate expressions: 'x(y)' -> parse: 'y x'
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# Check for ASCII: char -> hex
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parse_ascii = [False]
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try:
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arguement_2_wc = arguments[1]
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arguement_2_wc = arguement_2_wc.split('#', 2)
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len_arguement_2_wc = len(arguement_2_wc)
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arguement_2 = [arguement_2_wc[0]]
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ascii_to_hex(arguement_2)
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arguement_2_pp = arguement_2[0].replace(')', '(')
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arguement_2_pp = "".join(arguement_2_pp.split())
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arguement_2_list = arguement_2_pp.split('(')
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if len_arguement_2_wc == 2:
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arguments[1] = ' ' + arguement_2_list[1] + ', ' + arguement_2_list[0] + ' ' + '#' + arguement_2_wc[1] # Modified expression
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else: # No inline comment
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arguments[1] = ' ' + arguement_2_list[1] + ', ' + arguement_2_list[0] # Modified expression
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processed_code_1.append(",".join(arguments))
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except:
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if parse_ascii[0]:
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if len_arguement_2_wc == 2:
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arguments[1] = arguement_2[0] + ' ' + '#' + arguement_2_wc[1] # Modified expression
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else:
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arguments[1] = arguement_2[0] # Modified expression
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processed_code_1.append(",".join(arguments))
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else:
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processed_code_1.append(line)
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continue
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# Remove "," change "," -> " "
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processed_code_2 = []
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for line in processed_code_1:
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line = line.replace(',', ' ')
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processed_code_2.append(" ".join(line.split()))
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lines_of_code = len(processed_code_2)
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print('Lines of code =', lines_of_code, '\n')
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start_address = define_reset_address(processed_code_2[0])
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for line in source_code:
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label_state = label_mapping(start_address, line, instruction_counter,
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expected_instructions_count, lable_counter,
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label_list, label_address_list)
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address_mapping(lable_counter, label_list, label_address_list)
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# Parser
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print('')
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print('Parser')
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print('------')
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pc[0] = start_address
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for line in processed_code_2:
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instruction_sts = assembler(pc, line, line_number, error_flag, error_counter, bin_instruction)
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line_number = line_number + 1
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# Summary
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print('\nSummary')
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print('-------')
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if error_flag[0] == 0:
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print('- Lines of code (source) = ', lines_of_code)
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print('- Assembled instructions = ', instruction_counter[0])
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print('- Instructions with ERRORS = ', error_counter[0])
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binary_to_hex(bin_instruction, hex_instruction)
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try:
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# HEX firmware file write
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file = open(firmware_hex_path, "w")
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for line in hex_instruction:
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file.write(line + '\n')
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print('\nDONE: Successfully created FIRMWARE file\n')
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file.close()
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except:
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print('\nFATAL ERROR: Unable to create FIRMWARE file\n')
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else:
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print('- Lines of code (source) = ', lines_of_code)
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print('- Assembled instructions = ', instruction_counter[0])
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print('- Instructions with ERRORS = ', error_counter[0])
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print('\nFAIL:Failed to parse the assembly code due to errors')
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# Change firmware in the testbench file
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with open(testbench_file, 'r') as file:
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lines = file.readlines()
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# Edit source files of testbench names
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with open(testbench_file, 'w') as file:
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for line in lines:
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# Change instruction memory source file
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if line.startswith(" `define FIRMWARE "):
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print("Line found!")
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# Modify the input file name
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firmware_hex_path = firmware_hex_path.replace("\\", "\\\\")
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print(firmware_hex_path)
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modified_line = line.replace(line,' `define FIRMWARE '+ '"' + firmware_hex_path + '"' +'\n' )
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print(modified_line)
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file.write(modified_line)
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else:
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file.write(line)
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# OS: cmd commands to execute Verilog simulations:
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os.system("iverilog -IModules -o phoeniX.vvp phoeniX_Testbench.v")
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os.system("vvp phoeniX.vvp")
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os.system("gtkwave phoeniX.gtkw")

‎AssembleX_V1.0.py

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This file was deleted.

‎README.md

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![License](https://img.shields.io/github/license/phoeniX-Digital-Design/AssembleX?color=dark-green)
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![GCC Test](https://img.shields.io/badge/GCC_tests-passed-dark_green)
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![Version](https://img.shields.io/badge/Version-0.4-blue)
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![Version](https://img.shields.io/badge/Version-0.4.1-blue)
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![ISA](https://img.shields.io/badge/RV32-IEM_extension-blue)
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<picture>
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- A. Delavari, F. Ghoreishy, H. S. Shahhoseini and S. Mirzakuchaki (2023), “phoeniX: A RISC-V Platform for Approximate Computing Technical Specifications,” [Online]. Available: http://www.iust.ac.ir/content/76158/phoeniX-POINTS--A-RISC-V-Platform-for-Approximate-Computing
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Permission to use, copy, modify, and/or distribute this software for any purpose with or without fee is hereby granted, provided that the above copyright notice and this permission notice appear in all copies.
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- Designed By: [Arvin Delavari](https://github.com/ArvinDelavari) and [Faraz Ghoreishy](https://github.com/FarazGhoreishy)
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- Contact us: arvin_delavari@elec.iust.ac.ir - faraz_ghoreishy@elec.iust.ac.ir
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This tool enhances the efficiency of the code execution process, offering a streamlined experience for users seeking to enter the realm of assembly programming on pheoniX processor in a very simple and user-friendly way.
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Before running the script, note that the assembly output of the Venus Simulator for the code must be also saved in the project directory.
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To run any of these sample projects simply run python `AssembleX_V1.0.py sample` followed by the name of the project passed as a variable named project to the Python script.
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To run any of these sample projects simply run python `AssembleX.py sample` followed by the name of the project passed as a variable named project to the Python script.
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The input command format for the terminal follows the structure illustrated below:
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```shell
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python AssembleX_V1.0.py sample {project_name}
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python AssembleX.py sample {project_name}
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```
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For example:
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```shell
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python AssembleX_V1.0.py sample fibonacci
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python AssembleX.py sample fibonacci
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```
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After execution of this script, firmware file will be generated and this final file can be directly fed to our Verilog testbench. AssembleX automatically runs the testbench and calls upon gtkwave to display the selected signals in the waveform viewer application, gtkwave.
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</div>
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In order to run your own code on phoeniX, create a directory named to your project such as `/my_project` in `/Software/User_Codes`. Put all your `user_code.s` files in my_project and run the following command from the main directory:
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```shell
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python AssembleX_V1.0.py code my_project
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python AssembleX.py code my_project
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```
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Provided that you name your project sub-directory correctly the AssembleX software will create `my_project_firmware.hex` and fed it directly to the testbench of phoeniX processor. After that, iverilog and GTKWave are used to compile the design and view the selected waveforms.

‎Software/AssembleX/address_mapping.py

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# AssembleX V3.0
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# RISC-V Assembly Software Assistant for the phoeniX project (https://github.com/phoeniX-Digital-Design/phoeniX)
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# Description: Address mapping and translation functions
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# Copyright 2024 Iran University of Science and Technology. <phoenix.digital.electronics@gmail.com>
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# Permission to use, copy, modify, and/or distribute this software for any
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# purpose with or without fee is hereby granted, provided that the above
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# copyright notice and this permission notice appear in all copies.
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def define_reset_address(first_line):
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start_address = first_line.split()
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try:
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if start_address[0] == '.RESET_ADDRESS':
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address_pre = start_address[1]
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if address_pre[0:2] == '0x' or address_pre[0:2] == '0X':
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address = (int(address_pre, base=16) >> 2) * 4
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else:
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address = (int(address_pre) >> 2) * 4
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print('INFO: .RESET_ADDRESS set to', "0x{:08x}".format(address))
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return address
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else:
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print('WARNING: .RESET_ADDRESS not defined. -> .RESET_ADDRESS overridden to 0x00000000\n')
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return 0
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except:
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print('WARNING: .RESET_ADDRESS not defined. -> .RESET_ADDRESS overridden to 0x00000000\n')
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return 0
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def label_mapping(base_address, line, instrcnt, expected_instructions_count, label_counter, label_list, label_address_list):
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words = line.split()
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# Check if blank line or comment or start_address
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try:
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if words[0][0] == '#':
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# Ignore comment and move on
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return 0
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elif words[0] == '.RESET_ADDRESS':
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# Ignore start_address
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return 0
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except:
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# Ignore blank line and move on
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return 0
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if len(words) == 1 and line[-1] == ':':
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label = line.split(':')[0]
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label_counter[0] = label_counter[0] + 1
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label_list.append(label)
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label_address_list.append(base_address + int(expected_instructions_count[0]) * 4)
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elif len(words) > 1 and words[0][-1] == ':' and words[1][0] == '#': # Decodes labels with comments
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label = line.split(':')[0]
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label_counter[0] = label_counter[0] + 1
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label_list.append(label)
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label_address_list.append(base_address + int(expected_instructions_count[0]) * 4)
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else:
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# It is an instruction
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instrcnt[0] = instrcnt[0] + 1
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if words[0] == 'LI' or words[0] == 'li' or words[0] == 'LA' or words[0] == 'la':
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offset = 2 # Because LI = expands to two instructions
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else:
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offset = 1
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expected_instructions_count[0] = expected_instructions_count[0] + offset
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def address_mapping(label_counter, label_list, label_address_list):
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print('Address Mapping')
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print('---------------')
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for i in range(label_counter[0]):
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print('%+-8s' % label_list[i], ": 0x{:08x}".format(label_address_list[i]))

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