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Merge tag 'pull-loongarch-20250124' of https://gitlab.com/bibo-mao/qemu into staging
loongarch queue # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQNhkKjomWfgLCz0aQfewwSUazn0QUCZ5M4AwAKCRAfewwSUazn # 0aJAAP45/9qfbGSYiMCrBXpRFlyvtRN+GEXHEsERfk9Q1V+tQgEA/mMiUEcyc/xc # Z1Z27cDoqUFRhPmxbd6/KyTGHzo2+As= # =Zanw # -----END PGP SIGNATURE----- # gpg: Signature made Fri 24 Jan 2025 01:49:39 EST # gpg: using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1 # gpg: Good signature from "bibo mao <maobibo@loongson.cn>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 7044 3A00 19C0 E97A 31C7 13C4 8E86 8FB7 A176 9D4C # Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3 D1A4 1F7B 0C12 51AC E7D1 * tag 'pull-loongarch-20250124' of https://gitlab.com/bibo-mao/qemu: target/loongarch: Dump all generic CSR registers target/loongarch: Set unused flag with CSR registers target/loongarch: Add common source file for CSR register target/loongarch: Add common header file for CSR registers target/loongarch: Add generic csr function type target/loongarch: Remove static CSR function setting target/loongarch: Add dynamic function access with CSR register Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 parents cf86770 + 3215fe8 commit 8f9cb50

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7 files changed

+294
-139
lines changed

7 files changed

+294
-139
lines changed

‎target/loongarch/cpu.c

Lines changed: 79 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919
#include "cpu.h"
2020
#include "internals.h"
2121
#include "fpu/softfloat-helpers.h"
22-
#include "cpu-csr.h"
22+
#include "csr.h"
2323
#ifndef CONFIG_USER_ONLY
2424
#include "system/reset.h"
2525
#endif
@@ -375,6 +375,33 @@ static int loongarch_cpu_mmu_index(CPUState *cs, bool ifetch)
375375
return MMU_DA_IDX;
376376
}
377377

378+
static void loongarch_la464_init_csr(Object *obj)
379+
{
380+
#ifndef CONFIG_USER_ONLY
381+
static bool initialized;
382+
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
383+
CPULoongArchState *env = &cpu->env;
384+
int i, num;
385+
386+
if (!initialized) {
387+
initialized = true;
388+
num = FIELD_EX64(env->CSR_PRCFG1, CSR_PRCFG1, SAVE_NUM);
389+
for (i = num; i < 16; i++) {
390+
set_csr_flag(LOONGARCH_CSR_SAVE(i), CSRFL_UNUSED);
391+
}
392+
set_csr_flag(LOONGARCH_CSR_IMPCTL1, CSRFL_UNUSED);
393+
set_csr_flag(LOONGARCH_CSR_IMPCTL2, CSRFL_UNUSED);
394+
set_csr_flag(LOONGARCH_CSR_MERRCTL, CSRFL_UNUSED);
395+
set_csr_flag(LOONGARCH_CSR_MERRINFO1, CSRFL_UNUSED);
396+
set_csr_flag(LOONGARCH_CSR_MERRINFO2, CSRFL_UNUSED);
397+
set_csr_flag(LOONGARCH_CSR_MERRENTRY, CSRFL_UNUSED);
398+
set_csr_flag(LOONGARCH_CSR_MERRERA, CSRFL_UNUSED);
399+
set_csr_flag(LOONGARCH_CSR_MERRSAVE, CSRFL_UNUSED);
400+
set_csr_flag(LOONGARCH_CSR_CTAG, CSRFL_UNUSED);
401+
}
402+
#endif
403+
}
404+
378405
static void loongarch_la464_initfn(Object *obj)
379406
{
380407
LoongArchCPU *cpu = LOONGARCH_CPU(obj);
@@ -470,6 +497,7 @@ static void loongarch_la464_initfn(Object *obj)
470497
env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_WAYS, 7);
471498
env->CSR_PRCFG3 = FIELD_DP64(env->CSR_PRCFG3, CSR_PRCFG3, STLB_SETS, 8);
472499

500+
loongarch_la464_init_csr(obj);
473501
loongarch_cpu_post_init(obj);
474502
}
475503

@@ -765,6 +793,54 @@ static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model)
765793
return oc;
766794
}
767795

796+
static void loongarch_cpu_dump_csr(CPUState *cs, FILE *f)
797+
{
798+
#ifndef CONFIG_USER_ONLY
799+
CPULoongArchState *env = cpu_env(cs);
800+
CSRInfo *csr_info;
801+
int64_t *addr;
802+
int i, j, len, col = 0;
803+
804+
qemu_fprintf(f, "\n");
805+
806+
/* Dump all generic CSR register */
807+
for (i = 0; i < LOONGARCH_CSR_DBG; i++) {
808+
csr_info = get_csr(i);
809+
if (!csr_info || (csr_info->flags & CSRFL_UNUSED)) {
810+
if (i == (col + 3)) {
811+
qemu_fprintf(f, "\n");
812+
}
813+
814+
continue;
815+
}
816+
817+
if ((i > (col + 3)) || (i == col)) {
818+
col = i & ~3;
819+
qemu_fprintf(f, " CSR%03d:", col);
820+
}
821+
822+
addr = (void *)env + csr_info->offset;
823+
qemu_fprintf(f, " %s ", csr_info->name);
824+
len = strlen(csr_info->name);
825+
for (; len < 6; len++) {
826+
qemu_fprintf(f, " ");
827+
}
828+
829+
qemu_fprintf(f, "%" PRIx64, *addr);
830+
j = find_last_bit((void *)addr, BITS_PER_LONG) & (BITS_PER_LONG - 1);
831+
len += j / 4 + 1;
832+
for (; len < 22; len++) {
833+
qemu_fprintf(f, " ");
834+
}
835+
836+
if (i == (col + 3)) {
837+
qemu_fprintf(f, "\n");
838+
}
839+
}
840+
qemu_fprintf(f, "\n");
841+
#endif
842+
}
843+
768844
static void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
769845
{
770846
CPULoongArchState *env = cpu_env(cs);
@@ -784,22 +860,8 @@ static void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
784860
}
785861
}
786862

787-
qemu_fprintf(f, "CRMD=%016" PRIx64 "\n", env->CSR_CRMD);
788-
qemu_fprintf(f, "PRMD=%016" PRIx64 "\n", env->CSR_PRMD);
789-
qemu_fprintf(f, "EUEN=%016" PRIx64 "\n", env->CSR_EUEN);
790-
qemu_fprintf(f, "ESTAT=%016" PRIx64 "\n", env->CSR_ESTAT);
791-
qemu_fprintf(f, "ERA=%016" PRIx64 "\n", env->CSR_ERA);
792-
qemu_fprintf(f, "BADV=%016" PRIx64 "\n", env->CSR_BADV);
793-
qemu_fprintf(f, "BADI=%016" PRIx64 "\n", env->CSR_BADI);
794-
qemu_fprintf(f, "EENTRY=%016" PRIx64 "\n", env->CSR_EENTRY);
795-
qemu_fprintf(f, "PRCFG1=%016" PRIx64 ", PRCFG2=%016" PRIx64 ","
796-
" PRCFG3=%016" PRIx64 "\n",
797-
env->CSR_PRCFG1, env->CSR_PRCFG2, env->CSR_PRCFG3);
798-
qemu_fprintf(f, "TLBRENTRY=%016" PRIx64 "\n", env->CSR_TLBRENTRY);
799-
qemu_fprintf(f, "TLBRBADV=%016" PRIx64 "\n", env->CSR_TLBRBADV);
800-
qemu_fprintf(f, "TLBRERA=%016" PRIx64 "\n", env->CSR_TLBRERA);
801-
qemu_fprintf(f, "TCFG=%016" PRIx64 "\n", env->CSR_TCFG);
802-
qemu_fprintf(f, "TVAL=%016" PRIx64 "\n", env->CSR_TVAL);
863+
/* csr */
864+
loongarch_cpu_dump_csr(cs, f);
803865

804866
/* fpr */
805867
if (flags & CPU_DUMP_FPU) {

‎target/loongarch/csr.c

Lines changed: 129 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,129 @@
1+
/* SPDX-License-Identifier: GPL-2.0-or-later */
2+
/*
3+
* Copyright (c) 2025 Loongson Technology Corporation Limited
4+
*/
5+
#include <stddef.h>
6+
#include "qemu/osdep.h"
7+
#include "cpu.h"
8+
#include "csr.h"
9+
10+
#define CSR_OFF_FUNCS(NAME, FL, RD, WR) \
11+
[LOONGARCH_CSR_##NAME] = { \
12+
.name = (stringify(NAME)), \
13+
.offset = offsetof(CPULoongArchState, CSR_##NAME), \
14+
.flags = FL, .readfn = RD, .writefn = WR \
15+
}
16+
17+
#define CSR_OFF_ARRAY(NAME, N) \
18+
[LOONGARCH_CSR_##NAME(N)] = { \
19+
.name = (stringify(NAME##N)), \
20+
.offset = offsetof(CPULoongArchState, CSR_##NAME[N]), \
21+
.flags = 0, .readfn = NULL, .writefn = NULL \
22+
}
23+
24+
#define CSR_OFF_FLAGS(NAME, FL) CSR_OFF_FUNCS(NAME, FL, NULL, NULL)
25+
#define CSR_OFF(NAME) CSR_OFF_FLAGS(NAME, 0)
26+
27+
static CSRInfo csr_info[] = {
28+
CSR_OFF_FLAGS(CRMD, CSRFL_EXITTB),
29+
CSR_OFF(PRMD),
30+
CSR_OFF_FLAGS(EUEN, CSRFL_EXITTB),
31+
CSR_OFF_FLAGS(MISC, CSRFL_READONLY),
32+
CSR_OFF(ECFG),
33+
CSR_OFF_FLAGS(ESTAT, CSRFL_EXITTB),
34+
CSR_OFF(ERA),
35+
CSR_OFF(BADV),
36+
CSR_OFF_FLAGS(BADI, CSRFL_READONLY),
37+
CSR_OFF(EENTRY),
38+
CSR_OFF(TLBIDX),
39+
CSR_OFF(TLBEHI),
40+
CSR_OFF(TLBELO0),
41+
CSR_OFF(TLBELO1),
42+
CSR_OFF_FLAGS(ASID, CSRFL_EXITTB),
43+
CSR_OFF(PGDL),
44+
CSR_OFF(PGDH),
45+
CSR_OFF_FLAGS(PGD, CSRFL_READONLY),
46+
CSR_OFF(PWCL),
47+
CSR_OFF(PWCH),
48+
CSR_OFF(STLBPS),
49+
CSR_OFF(RVACFG),
50+
CSR_OFF_FLAGS(CPUID, CSRFL_READONLY),
51+
CSR_OFF_FLAGS(PRCFG1, CSRFL_READONLY),
52+
CSR_OFF_FLAGS(PRCFG2, CSRFL_READONLY),
53+
CSR_OFF_FLAGS(PRCFG3, CSRFL_READONLY),
54+
CSR_OFF_ARRAY(SAVE, 0),
55+
CSR_OFF_ARRAY(SAVE, 1),
56+
CSR_OFF_ARRAY(SAVE, 2),
57+
CSR_OFF_ARRAY(SAVE, 3),
58+
CSR_OFF_ARRAY(SAVE, 4),
59+
CSR_OFF_ARRAY(SAVE, 5),
60+
CSR_OFF_ARRAY(SAVE, 6),
61+
CSR_OFF_ARRAY(SAVE, 7),
62+
CSR_OFF_ARRAY(SAVE, 8),
63+
CSR_OFF_ARRAY(SAVE, 9),
64+
CSR_OFF_ARRAY(SAVE, 10),
65+
CSR_OFF_ARRAY(SAVE, 11),
66+
CSR_OFF_ARRAY(SAVE, 12),
67+
CSR_OFF_ARRAY(SAVE, 13),
68+
CSR_OFF_ARRAY(SAVE, 14),
69+
CSR_OFF_ARRAY(SAVE, 15),
70+
CSR_OFF(TID),
71+
CSR_OFF_FLAGS(TCFG, CSRFL_IO),
72+
CSR_OFF_FLAGS(TVAL, CSRFL_READONLY | CSRFL_IO),
73+
CSR_OFF(CNTC),
74+
CSR_OFF_FLAGS(TICLR, CSRFL_IO),
75+
CSR_OFF(LLBCTL),
76+
CSR_OFF(IMPCTL1),
77+
CSR_OFF(IMPCTL2),
78+
CSR_OFF(TLBRENTRY),
79+
CSR_OFF(TLBRBADV),
80+
CSR_OFF(TLBRERA),
81+
CSR_OFF(TLBRSAVE),
82+
CSR_OFF(TLBRELO0),
83+
CSR_OFF(TLBRELO1),
84+
CSR_OFF(TLBREHI),
85+
CSR_OFF(TLBRPRMD),
86+
CSR_OFF(MERRCTL),
87+
CSR_OFF(MERRINFO1),
88+
CSR_OFF(MERRINFO2),
89+
CSR_OFF(MERRENTRY),
90+
CSR_OFF(MERRERA),
91+
CSR_OFF(MERRSAVE),
92+
CSR_OFF(CTAG),
93+
CSR_OFF_ARRAY(DMW, 0),
94+
CSR_OFF_ARRAY(DMW, 1),
95+
CSR_OFF_ARRAY(DMW, 2),
96+
CSR_OFF_ARRAY(DMW, 3),
97+
CSR_OFF(DBG),
98+
CSR_OFF(DERA),
99+
CSR_OFF(DSAVE),
100+
};
101+
102+
CSRInfo *get_csr(unsigned int csr_num)
103+
{
104+
CSRInfo *csr;
105+
106+
if (csr_num >= ARRAY_SIZE(csr_info)) {
107+
return NULL;
108+
}
109+
110+
csr = &csr_info[csr_num];
111+
if (csr->offset == 0) {
112+
return NULL;
113+
}
114+
115+
return csr;
116+
}
117+
118+
bool set_csr_flag(unsigned int csr_num, int flag)
119+
{
120+
CSRInfo *csr;
121+
122+
csr = get_csr(csr_num);
123+
if (!csr) {
124+
return false;
125+
}
126+
127+
csr->flags |= flag;
128+
return true;
129+
}

‎target/loongarch/csr.h

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
/* SPDX-License-Identifier: GPL-2.0-or-later */
2+
/*
3+
* Copyright (c) 2025 Loongson Technology Corporation Limited
4+
*/
5+
6+
#ifndef TARGET_LOONGARCH_CSR_H
7+
#define TARGET_LOONGARCH_CSR_H
8+
9+
#include "cpu-csr.h"
10+
11+
typedef void (*GenCSRFunc)(void);
12+
enum {
13+
CSRFL_READONLY = (1 << 0),
14+
CSRFL_EXITTB = (1 << 1),
15+
CSRFL_IO = (1 << 2),
16+
CSRFL_UNUSED = (1 << 3),
17+
};
18+
19+
typedef struct {
20+
const char *name;
21+
int offset;
22+
int flags;
23+
GenCSRFunc readfn;
24+
GenCSRFunc writefn;
25+
} CSRInfo;
26+
27+
CSRInfo *get_csr(unsigned int csr_num);
28+
bool set_csr_flag(unsigned int csr_num, int flag);
29+
#endif /* TARGET_LOONGARCH_CSR_H */

‎target/loongarch/meson.build

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ loongarch_system_ss = ss.source_set()
1010
loongarch_system_ss.add(files(
1111
'arch_dump.c',
1212
'cpu_helper.c',
13+
'csr.c',
1314
'loongarch-qmp-cmds.c',
1415
'machine.c',
1516
))

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