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lines changed- .github/workflows/build.yml+79-52
- .github/workflows/docker.yml+6-7
- .github/workflows/format.yaml+6-3
- .github/workflows/install_dependencies_build_ubuntu20p04.sh
- .github/workflows/install_dependencies_build_ubuntu22p04.sh+4-1
- .github/workflows/install_dependencies_run_ubuntu20p04.sh
- Makefile+1-1
- VERSION.md+1-1
- cmake/modules/FindTBB.cmake-303
- docker/Dockerfile.base+2-2
- docker/Dockerfile.clang-10-2
- docker/Dockerfile.clang-11+2
- docker/Dockerfile.clang-12+2
- docker/Dockerfile.clang-13+2
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- docker/Dockerfile.clang-6.0-2
- docker/Dockerfile.clang-7-2
- docker/Dockerfile.clang-8-2
- docker/Dockerfile.env+5-7
- docker/Dockerfile.gcc-12+2
- docker/Dockerfile.gcc-7-2
- docker/Dockerfile.gcc-8-2
- docs/source/manual/file_formats/fabric_hierarchy_file.rst+62
- docs/source/manual/file_formats/index.rst+2
- docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst+15-2
- docs/source/tutorials/getting_started/compile.rst+4-5
- docs/source/tutorials/getting_started/regtest_dependencies.sh+1-1
- docs/source/tutorials/getting_started/ubuntu20p04_dependencies.sh+1-1
- docs/source/tutorials/getting_started/ubuntu20p04_regtest_dependencies.sh+1
- docs/source/tutorials/getting_started/ubuntu22p04_regtest_dependencies.sh+1
- libs/libarchopenfpga/src/ql_memory_bank_config_setting.h+1
- libs/libnamemanager/src/base/io_name_map.h+3
- openfpga/src/base/openfpga_build_fabric_template.h+18-1
- openfpga/src/base/openfpga_setup_command_template.h+17
- openfpga/src/fabric/fabric_hierarchy_writer.cpp+139-49
- openfpga/src/fabric/fabric_hierarchy_writer.h+5-5
- openfpga/src/fpga_bitstream/fabric_bitstream.h+1
- openfpga_flow/openfpga_shell_scripts/global_tile_clock_full_testbench_fix_routeW_example_script.openfpga+73
- openfpga_flow/openfpga_shell_scripts/group_config_block_preconfig_testbench_example_script.openfpga+2-1
- openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga+1-1
- openfpga_flow/regression_test_scripts/basic_reg_test.sh-1
- openfpga_flow/regression_test_scripts/basic_reg_yosys_only_test.sh-1
- openfpga_flow/regression_test_scripts/fpga_bitstream_reg_test.sh-1
- openfpga_flow/regression_test_scripts/fpga_sdc_reg_test.sh-1
- openfpga_flow/regression_test_scripts/fpga_spice_reg_test.sh-1
- openfpga_flow/regression_test_scripts/fpga_verilog_reg_test.sh-1
- openfpga_flow/regression_test_scripts/iwls_benchmark_reg_test.sh-1
- openfpga_flow/regression_test_scripts/micro_benchmark_reg_test.sh-1
- openfpga_flow/regression_test_scripts/quicklogic_reg_test.sh-1
- openfpga_flow/regression_test_scripts/vtr_benchmark_reg_test.sh-1
- openfpga_flow/tasks/basic_tests/global_tile_ports/global_tile_clock/config/task.conf+3-2
- openfpga_flow/tasks/basic_tests/global_tile_ports/global_tile_clock_subtile/config/task.conf+2-1
- openfpga_flow/tasks/basic_tests/global_tile_ports/global_tile_clock_subtile_port_merge/config/task.conf+2-1
- openfpga_flow/tasks/basic_tests/no_time_stamp/device_1x1/golden_outputs_no_time_stamp/and2_formal_random_top_tb.v+2-2
- openfpga_flow/tasks/basic_tests/no_time_stamp/device_1x1/golden_outputs_no_time_stamp/and2_fpga_top_analysis.sdc+4-4
- openfpga_flow/tasks/basic_tests/no_time_stamp/device_1x1/golden_outputs_no_time_stamp/global_ports.sdc+1-1
- openfpga_flow/tasks/basic_tests/no_time_stamp/device_1x1/golden_outputs_no_time_stamp/mux_modules.yaml+24
- openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/and2_formal_random_top_tb.v+2-2
- openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/and2_fpga_top_analysis.sdc+4-4
- openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/global_ports.sdc+1-1
- openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/mux_modules.yaml+55
- openfpga_flow/tasks/basic_tests/no_time_stamp/dump_waveform/golden_outputs_no_time_stamp/and2_formal_random_top_tb.v+2-2
- openfpga_flow/tasks/basic_tests/no_time_stamp/dump_waveform/golden_outputs_no_time_stamp/and2_fpga_top_analysis.sdc+4-4
- openfpga_flow/tasks/basic_tests/no_time_stamp/dump_waveform/golden_outputs_no_time_stamp/global_ports.sdc+1-1
- openfpga_flow/tasks/basic_tests/no_time_stamp/dump_waveform/golden_outputs_no_time_stamp/mux_modules.yaml+24
- openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/and2_formal_random_top_tb.v+2-2
- openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/and2_fpga_top_analysis.sdc+4-4
- openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/global_ports.sdc+1-1
- openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/mux_modules.yaml+54
- openfpga_flow/vpr_arch/k4_frac_N4_tileable_adder_chain_mem1K_L124X_L12Y_ChanWidth0p8_40nm.xml+1-1
- vtr-verilog-to-routing+1-1
- yosys+1-1
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