Merge pull request #777 from os-fpga/checker_DB_primitive_inputs

checker: added input pins to primitive-DB for clock-data

Author: serge-dsa

planning/src/file_readers/pln_blif_file.cpp

@@ -562,8 +562,8 @@ uint BLIF_file::printPrimitives(std::ostream& os, bool instCounts) const noexcep
       if (n_clocks) {
         ::sprintf(ncs_buf, "   #clock_pins= %u", n_clocks);
       }
-      os_printf(os, "    [%u]  %s   #outputs= %u%s\n",
-                t, pn, n_outputs, ncs_buf);
+      os_printf(os, "    [%u]  %s    i:%u  o:%u   %s\n",
+                t, pn, pr_num_inputs(pt), n_outputs, ncs_buf);
     }
   }
 
@@ -1097,6 +1097,35 @@ string BLIF_file::Node::firstInputPin() const noexcept {
   return {};
 }
 
+void BLIF_file::Node::allInputPins(vector<string>& V) const noexcept {
+  V.clear();
+
+  if (data_.size() < 2) return;
+  if (kw_ == ".names") {
+    if (data_[0] != out_) {
+      V.push_back(data_[0]);
+      return;
+    }
+  }
+  if (kw_ == ".latch") {
+    if (data_[1] != out_) {
+      V.push_back(data_[1]);
+      return;
+    }
+  }
+  if (data_.size() < 3) return;
+  if (kw_ == ".subckt" or kw_ == ".gate") {
+    CStr dat1 = data_[1].c_str();
+    if (starts_w_I_eq(dat1)) {
+      V.push_back(dat1 + 2); // TMP. WRONG.
+      return;
+    }
+  }
+  return;
+}
+
+// void BLIF_file::Node:: allInputSignals(vector<string>& V) const noexcept;
+
 BLIF_file::Node* BLIF_file::findOutputPort(const string& contact) noexcept {
   assert(not contact.empty());
   if (topOutputs_.empty()) return nullptr;
@@ -1312,7 +1341,9 @@ bool BLIF_file::linkNodes() noexcept {
 }
 
 bool BLIF_file::checkClockSepar(vector<const Node*>& clocked) noexcept {
-  if (1|| clocked.empty())
+  if (not ::getenv("pln_check_clock_separation"))
+    return true;
+  if (clocked.empty())
     return true;
 
   bool ok = createPinGraph();
@@ -1388,6 +1419,7 @@ bool BLIF_file::createPinGraph() noexcept {
   err_msg_.clear();
   uint64_t key = 0;
   uint nid = 0, kid = 0, eid = 0;
+  vector<string> INP;
 
   // -- create pg-nodes for topInputs_
   for (const Node* p : topInputs_) {
@@ -1408,14 +1440,33 @@ bool BLIF_file::createPinGraph() noexcept {
   }
 
   // -- link from input ports to fabric
+  lputs9();
   for (Node* p : topInputs_) {
+    INP.clear();
     Node& port = *p;
     assert(!port.out_.empty());
+
+    if (trace_ >= 5) {
+      lprintf("    TopInput:  lnum_= %u   %s\n",
+              port.lnum_, port.out_.c_str());
+    }
+
     int pinIndex = -1;
     Node* par = findFabricParent(port.id_, port.out_, pinIndex);
     if (!par) {
       continue;
     }
+
+    pr_get_inputs(par->ptype_, INP);
+
+    if (trace_ >= 5) {
+      lprintf("    FabricParent par:  lnum_= %u  kw_= %s  ptype_= %s  #inputs= %u\n",
+              par->lnum_, par->kw_.c_str(), par->cPrimType(),
+              pr_num_inputs(par->ptype_));
+      logVec(INP, "    [par_inputs] ");
+      lputs();
+    }
+
     assert(par->cell_hc_);
     key = hashComb(par->cell_hc_, pinIndex);
     assert(key);

planning/src/file_readers/pln_blif_file.h

@@ -117,6 +117,10 @@ struct BLIF_file : public fio::MMapReader
 
     string firstInputPin() const noexcept;
 
+    void allInputPins(vector<string>& V) const noexcept;
+
+    void allInputSignals(vector<string>& V) const noexcept;
+
     CStr cOut() const noexcept { return out_.empty() ? "{e}" : out_.c_str(); }
 
     CStr cPrimType() const noexcept {

planning/src/file_readers/pln_primitives.cpp

@@ -126,6 +126,89 @@ using std::string;
     {}
   }; // _id2outputs
 
+  static vector<string> _id2inputs[] = {
+    {}, // 0
+
+    {  },                // BOOT_CLOCK
+    { "P", "G", "CIN" }, // CARRY
+
+    { "I" }, // CLK_BUF
+
+    { "D", "R", "E", "C" }, // DFFNRE
+
+    { "D", "R", "E", "C" }, // DFFRE
+
+    // DSP19X2
+    { "CLK", "RESET", "LOAD_ACC", "UNSIGNED_A", "UNSIGNED_B",
+      "SATURATE", "ROUND", "SUBTRACT" }, // TMP. INCOMPLETE.
+
+    {  },    // DSP38
+
+    // FIFO18KX2
+    {  },
+
+    // FIFO36K
+    {  },
+
+    { "I", "EN" },           // I_BUF
+    { "I_P", "I_N", "EN" },  // I_BUF_DS
+
+    { "D", "R", "E", "C" },  // I_DDR
+
+    // I_DELAY
+    { "I", "DLY_LOAD", "DLY_ADJ",
+      "DLY_INCDEC", "CLK_IN" },
+
+    { "I" }, // IO_BUF
+    { "I" }, // IO_BUF_DS
+
+    // I_SERDES
+    { "D", "RST", "BITSLIP_ADJ", "EN", "CLK_IN",
+      "PLL_LOCK", "PLL_CLK" },
+
+    { "A" },                     // LUT1
+    { "A[1]", "A[0]" },          // LUT2
+    { "A[2]", "A[1]", "A[0]"},   // LUT3
+    { "A[3]", "A[2]", "A[1]", "A[0]" },                 // LUT4
+    { "A[4]", "A[3]", "A[2]", "A[1]", "A[0]" },         // LUT5
+    { "A[5]", "A[4]", "A[3]", "A[2]", "A[1]", "A[0]" }, // LUT6
+
+    { "I" },   // O_BUF
+    { "I" },   // O_BUF_DS
+
+    { "I", "T" },   // O_BUFT
+    { "I", "T" },   // O_BUFT_DS
+
+    // O_DDR
+    { "D[1]", "D[0]", "R", "E", "C" },
+
+    // O_DELAY
+    { "I", "DLY_LOAD", "DLY_ADJ",
+      "DLY_INCDEC", "CLK_IN" },
+
+    // O_SERDES  // TMP. INCOMPLETE: D is a bus
+    { "D", "RST", "DATA_VALID", "CLK_IN", "OE_IN",
+      "CHANNEL_BOND_SYNC_IN", "PLL_LOCK", "PLL_CLK" },
+
+    // O_SERDES_CLK
+    { "CLK_EN", "PLL_LOCK", "PLL_CLK" },
+
+    // PLL
+    { "PLL_EN", "CLK_IN" },
+
+    // TDP_RAM18KX2  // TMP. INCOMPLETE
+    { "WEN_A1", "WEN_B1", "REN_A1", "REN_B1",
+      "CLK_A1", "CLK_B1" },
+
+    // TDP_RAM36K  // TMP. INCOMPLETE
+    { "WEN_A", "WEN_B", "REN_A", "REN_B",
+      "CLK_A", "CLK_B" },
+
+    {}, // X_UNKNOWN
+    {}, // Y_UPPER_GUARD
+    {}
+  }; // _id2inputs
+
   static vector<string> _id2clocks[] = {
     {}, // 0
 
@@ -204,17 +287,17 @@ static inline bool _vec_contains(const vector<string>& V, CStr name) noexcept {
   return false;
 }
 
-bool pr_cpin_is_output(Prim_t primId, CStr pinName) noexcept {
-  uint i = primId;
+bool pr_cpin_is_output(Prim_t pt, CStr pinName) noexcept {
+  uint i = pt;
   assert(i <= Prim_MAX_ID);
   if (i == 0 or !pinName or !pinName[0] or i > Prim_MAX_ID)
     return false;
   const vector<string>& V = _id2outputs[i];
   return _vec_contains(V, pinName);
 }
 
-bool pr_cpin_is_clock(Prim_t primId, CStr pinName) noexcept {
-  uint i = primId;
+bool pr_cpin_is_clock(Prim_t pt, CStr pinName) noexcept {
+  uint i = pt;
   assert(i <= Prim_MAX_ID);
   if (i == 0 or !pinName or !pinName[0] or i > Prim_MAX_ID)
     return false;
@@ -229,24 +312,42 @@ CStr pr_enum2str(Prim_t enu) noexcept {
   return _enumNames[i];
 }
 
-uint pr_num_outputs(Prim_t primId) noexcept {
-  uint i = primId;
+uint pr_num_outputs(Prim_t pt) noexcept {
+  uint i = pt;
   assert(i <= Prim_MAX_ID);
   if (i == 0 or i > Prim_MAX_ID)
     return 0;
   const vector<string>& V = _id2outputs[i];
   return V.size();
 }
 
-uint pr_num_clocks(Prim_t primId) noexcept {
-  uint i = primId;
+uint pr_num_inputs(Prim_t pt) noexcept {
+  uint i = pt;
+  assert(i <= Prim_MAX_ID);
+  if (i == 0 or i > Prim_MAX_ID)
+    return 0;
+  const vector<string>& V = _id2inputs[i];
+  return V.size();
+}
+
+uint pr_num_clocks(Prim_t pt) noexcept {
+  uint i = pt;
   assert(i <= Prim_MAX_ID);
   if (i == 0 or i > Prim_MAX_ID)
     return 0;
   const vector<string>& V = _id2clocks[i];
   return V.size();
 }
 
+void pr_get_inputs(Prim_t pt, std::vector<std::string>& INP) {
+  INP.clear();
+  uint i = pt;
+  assert(i <= Prim_MAX_ID);
+  if (i == 0 or i > Prim_MAX_ID)
+    return;
+  INP = _id2inputs[i];
+}
+
 // "A_"
 static inline bool starts_w_A(CStr z) noexcept {
   assert(z);

planning/src/file_readers/pln_primitives.h

@@ -66,18 +66,21 @@ CStr pr_enum2str(Prim_t enu) noexcept;
 Prim_t pr_str2enum(CStr name) noexcept;
 
 
-bool pr_cpin_is_output(Prim_t primId, CStr pinName) noexcept;
-bool pr_cpin_is_clock(Prim_t primId, CStr pinName) noexcept;
+bool pr_cpin_is_output(Prim_t pt, CStr pinName) noexcept;
+bool pr_cpin_is_clock(Prim_t pt, CStr pinName) noexcept;
 
-inline bool pr_pin_is_output(Prim_t primId, const std::string& pinName) noexcept {
-  return pr_cpin_is_output(primId, pinName.c_str());
+inline bool pr_pin_is_output(Prim_t pt, const std::string& pinName) noexcept {
+  return pr_cpin_is_output(pt, pinName.c_str());
 }
-inline bool pr_pin_is_clock(Prim_t primId, const std::string& pinName) noexcept {
-  return pr_cpin_is_clock(primId, pinName.c_str());
+inline bool pr_pin_is_clock(Prim_t pt, const std::string& pinName) noexcept {
+  return pr_cpin_is_clock(pt, pinName.c_str());
 }
 
-uint pr_num_outputs(Prim_t primId) noexcept;
-uint pr_num_clocks(Prim_t primId) noexcept;
+uint pr_num_inputs(Prim_t pt) noexcept;
+uint pr_num_outputs(Prim_t pt) noexcept;
+uint pr_num_clocks(Prim_t pt) noexcept;
+
+void pr_get_inputs(Prim_t pt, std::vector<std::string>& INP);
 
 bool is_I_SERDES_output_term(const std::string& term) noexcept;
 bool is_O_SERDES_output_term(const std::string& term) noexcept;

planning/src/main.cpp

@@ -1,4 +1,4 @@
-static const char* _pln_VERSION_STR = "pln0289";
+static const char* _pln_VERSION_STR = "pln0291";
 
 #include "RS/rsEnv.h"
 #include "util/pln_log.h"