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Merge pull request #905 from os-fpga/revert_OpenFPGA_to_Oct10_2de9864eeb8
revert OpenFPGA to Oct10 2de9864eeb8
2 parents 85f5ae6 + bbfc21f commit 409e4a4

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13 files changed

+542
-532
lines changed

13 files changed

+542
-532
lines changed

‎CMakeLists.txt

Lines changed: 18 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -130,30 +130,25 @@ FILE(COPY ${EBLIF_TRANSFORM_SRC_H}
130130
DESTINATION
131131
${EBLIF_TRANSFORM_DEST})
132132

133-
message(STATUS "NOTE: PATCHING VPR pack/pb_pin_fixup\n")
134-
FILE(COPY ${PACKER_SRC_DIR}/post_routing_pb_pin_fixup.cpp
133+
# patch VPR
134+
FILE(COPY ${PACKER_SRC_DIR}/cluster.cpp
135+
${PACKER_SRC_DIR}/cluster_util.cpp
136+
${PACKER_SRC_DIR}/cluster_util.h
137+
${PACKER_SRC_DIR}/output_clustering.cpp
138+
${PACKER_SRC_DIR}/output_clustering.h
139+
${PACKER_SRC_DIR}/cluster_router.cpp
140+
${PACKER_SRC_DIR}/post_routing_pb_pin_fixup.cpp
135141
DESTINATION
136142
${VPR_DEST_DIR}/src/pack)
137143

138-
# patch VPR
139-
#FILE(COPY ${PACKER_SRC_DIR}/cluster.cpp
140-
# ${PACKER_SRC_DIR}/cluster_util.cpp
141-
# ${PACKER_SRC_DIR}/cluster_util.h
142-
# ${PACKER_SRC_DIR}/output_clustering.cpp
143-
# ${PACKER_SRC_DIR}/output_clustering.h
144-
# ${PACKER_SRC_DIR}/cluster_router.cpp
145-
# ${PACKER_SRC_DIR}/post_routing_pb_pin_fixup.cpp
146-
# DESTINATION
147-
# ${VPR_DEST_DIR}/src/pack)
148-
149144
# add to VPR/pack
150-
#FILE(COPY ${PACKER_SRC_DIR}/nl_Par.h
151-
# ${PACKER_SRC_DIR}/nl_Par.cpp
152-
# ${PACKER_SRC_DIR}/pinc_log.h
153-
# ${PACKER_SRC_DIR}/pinc_log.cpp
154-
# DESTINATION
155-
# ${VPR_DEST_DIR}/src/pack)
156-
#message(STATUS "NOTE: ADDED to VPR src/pack: nl_Par.cpp,h pinc_log.cpp,h")
145+
FILE(COPY ${PACKER_SRC_DIR}/nl_Par.h
146+
${PACKER_SRC_DIR}/nl_Par.cpp
147+
${PACKER_SRC_DIR}/pinc_log.h
148+
${PACKER_SRC_DIR}/pinc_log.cpp
149+
DESTINATION
150+
${VPR_DEST_DIR}/src/pack)
151+
message(STATUS "NOTE: ADDED to VPR src/pack: nl_Par.cpp,h pinc_log.cpp,h")
157152

158153
# add to VPR/base
159154
file(COPY
@@ -174,7 +169,7 @@ message(STATUS "NOTE: OVERWRITING netlist_writer.cpp")
174169
file(COPY ${PATCH_DIR}/base_fix/PATCHED/netlist_writer.cpp DESTINATION ${TARGET_DIR})
175170
message(STATUS "NOTE: COPIED ${PATCH_DIR}/base_fix/PATCHED/netlist_writer.cpp\n to ${TARGET_DIR}/\n")
176171

177-
#message(STATUS "NOTE: PATCHING base/vpr_api.cpp ..")
172+
message(STATUS "NOTE: PATCHING-COPYING base/vpr_api.cpp ..")
178173
#set(DIFF_FILE ${PATCH_DIR}/base_fix/DIFF/vpr_api_cpp.diff)
179174
#apply_patch(${DIFF_FILE} ${TARGET_DIR} "base/vpr_api.cpp")
180175

@@ -213,26 +208,9 @@ set(DIFF_FILE ${PATCH_DIR}/libpugiutil_fix/DIFF/pugixml_util_cpp.diff)
213208
apply_patch(${DIFF_FILE} ${CMAKE_CURRENT_SOURCE_DIR}/OpenFPGA/vtr-verilog-to-routing/libs/libpugiutil/src "pugixml_util.cpp")
214209

215210
# copy RS additions and patch CMakefiles
216-
message(STATUS "NOTE: COPYING/PATCHING OpenFPGA CMakefiles..")
211+
message(STATUS "NOTE: COPYING OpenFPGA CMakefile..")
217212
#set(DIFF_FILE ${PATCH_DIR}/CMAKE_fix/OpenFPGA_CMake.diff)
218213
#apply_patch(${DIFF_FILE} ${CMAKE_CURRENT_SOURCE_DIR}/OpenFPGA "OpenFPGA CMakefile")
219-
set(DIFF_FILE ${PATCH_DIR}/CMAKE_fix/PATCHED_OpenFPGA/libs_cmakefile.diff)
220-
apply_patch(${DIFF_FILE} ${CMAKE_CURRENT_SOURCE_DIR}/OpenFPGA/libs "OpenFPGA/libs CMakefile")
221-
222-
set(DIFF_FILE ${PATCH_DIR}/CMAKE_fix/PATCHED_OpenFPGA/openfpga_src_CMakefile.diff)
223-
apply_patch(${DIFF_FILE} ${CMAKE_CURRENT_SOURCE_DIR}/OpenFPGA/openfpga "OpenFPGA/openfpga CMakefile")
224-
225-
file(COPY
226-
${PATCH_DIR}/openfpga/annotation/unique_blocks_uxsdcxx.capnp
227-
${PATCH_DIR}/openfpga/annotation/unique_blocks_uxsdcxx.capnp.c++
228-
${PATCH_DIR}/openfpga/annotation/unique_blocks_uxsdcxx.capnp.h
229-
${PATCH_DIR}/openfpga/annotation/unique_blocks_uxsdcxx_capnp.h
230-
${PATCH_DIR}/openfpga/annotation/unique_blocks_uxsdcxx_capnp_impl.h
231-
${PATCH_DIR}/openfpga/annotation/unique_blocks_uxsdcxx.cpp
232-
${PATCH_DIR}/openfpga/annotation/unique_blocks_uxsdcxx.h
233-
${PATCH_DIR}/openfpga/annotation/unique_blocks_uxsdcxx_interface.h
234-
DESTINATION
235-
${CMAKE_CURRENT_SOURCE_DIR}/OpenFPGA/openfpga/src/annotation)
236214

237215
# temporarily swithed to copying because of "partial patch" issue in Raptor build.
238216
file(COPY
@@ -298,7 +276,7 @@ FILE(COPY ${TATUM_SRC_DIR}/TimingReporter.hpp
298276
${OPENFPGA_DEST_DIR}/vtr-verilog-to-routing/libs/EXTERNAL/libtatum/libtatum/tatum
299277
)
300278

301-
# Logical Levels
279+
## Logical Levels
302280
FILE(COPY ${UTIL_SRC_DIR}/rsbe_utils.cpp
303281
${UTIL_SRC_DIR}/rsbe_utils.h
304282
DESTINATION

‎OpenFPGA

Submodule OpenFPGA updated 127 files

‎include/CMAKE_fix/PATCHED_VPR/CMakeLists.txt

Lines changed: 16 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -99,26 +99,15 @@ add_library(libvpr STATIC
9999
target_include_directories(libvpr PUBLIC ${LIB_INCLUDE_DIRS})
100100
target_include_directories(libvpr PUBLIC ${READ_EDIF_SRC_DIR})
101101

102-
# Find if Eigen is installed. Eigen is used within the Analytical Solver of the
103-
# Analytical Placement flow. If Eigen is not installed, certain solvers cannot
104-
# be used.
105-
find_package(Eigen3 3.3 NO_MODULE)
106-
if (TARGET Eigen3::Eigen)
107-
target_link_libraries (libvpr Eigen3::Eigen)
108-
target_compile_definitions(libvpr PUBLIC -DEIGEN_INSTALLED)
109-
message(STATUS "Eigen3: Found")
110-
else ()
111-
message(STATUS "Eigen3: Not Found. Some features may be disabled.")
112-
endif (TARGET Eigen3::Eigen)
113-
114102
#VPR_ANALYTIC_PLACE is initialized in the root CMakeLists
115-
# NOTE: This is the cluster-level Analytical Placement which existed before the
116-
# flat Analytical Placement flow.
103+
#Check Eigen dependency
117104
if(${VPR_ANALYTIC_PLACE})
118105
message(STATUS "VPR Analytic Placement: Requested")
106+
find_package(Eigen3 3.3 NO_MODULE)
119107
if (TARGET Eigen3::Eigen)
120108
message(STATUS "VPR Analytic Placement dependency (Eigen3): Found")
121109
message(STATUS "VPR Analytic Placement: Enabled")
110+
target_link_libraries (libvpr Eigen3::Eigen)
122111
target_compile_definitions(libvpr PUBLIC -DENABLE_ANALYTIC_PLACE)
123112
else ()
124113
message(STATUS "VPR Analytic Placement dependency (Eigen3): Not Found (Download manually with sudo apt install libeigen3-dev, and rebuild)")
@@ -143,21 +132,19 @@ endif ()
143132
set_target_properties(libvpr PROPERTIES PREFIX "") #Avoid extra 'lib' prefix
144133

145134
#Specify link-time dependencies
146-
find_package(ZLIB)
147135
target_link_libraries(libvpr
148-
libvtrutil
149-
libarchfpga
150-
libsdcparse
151-
libblifparse
152-
libtatum
153-
libargparse
154-
libpugixml
155-
librrgraph
156-
libreadedif
157-
${OPENSSL_LIBRARIES}
158-
${VERIFIC_LIBS}
159-
ZLIB::ZLIB dl
160-
)
136+
libvtrutil
137+
libarchfpga
138+
libsdcparse
139+
libblifparse
140+
libtatum
141+
libargparse
142+
libpugixml
143+
librrgraph
144+
libreadedif
145+
${OPENSSL_LIBRARIES}
146+
${VERIFIC_LIBS} dl
147+
)
161148

162149
if(VPR_USE_SERVER)
163150
target_link_libraries(libvpr
@@ -343,7 +330,7 @@ file(GLOB_RECURSE TEST_SOURCES test/*.cpp)
343330
add_executable(test_vpr ${TEST_SOURCES})
344331
target_link_libraries(test_vpr
345332
Catch2::Catch2WithMain
346-
libvpr -lz)
333+
libvpr)
347334

348335
#Suppress IPO link warnings if IPO is enabled
349336
get_target_property(TEST_VPR_USES_IPO vpr INTERPROCEDURAL_OPTIMIZATION)

‎include/analysis_fix/timing_reports.cpp

Lines changed: 4 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -12,18 +12,13 @@
1212

1313
#include "VprTimingGraphResolver.h"
1414

15-
void generate_setup_timing_stats(const std::string& prefix,
16-
const SetupTimingInfo& timing_info,
17-
const AnalysisDelayCalculator& delay_calc,
18-
const t_analysis_opts& analysis_opts,
19-
bool is_flat,
20-
const BlkLocRegistry& blk_loc_registry) {
15+
void generate_setup_timing_stats(const std::string& prefix, const SetupTimingInfo& timing_info, const AnalysisDelayCalculator& delay_calc, const t_analysis_opts& analysis_opts, bool is_flat) {
2116
auto& timing_ctx = g_vpr_ctx.timing();
2217
auto& atom_ctx = g_vpr_ctx.atom();
2318

2419
print_setup_timing_summary(*timing_ctx.constraints, *timing_info.setup_analyzer(), "Final ", analysis_opts.write_timing_summary);
2520

26-
VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat, blk_loc_registry);
21+
VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat);
2722
resolver.set_detail_level(analysis_opts.timing_report_detail);
2823

2924
tatum::TimingReporter timing_reporter(resolver, *timing_ctx.graph, *timing_ctx.constraints);
@@ -37,18 +32,13 @@ void generate_setup_timing_stats(const std::string& prefix,
3732
timing_reporter.report_unconstrained_setup(prefix + "report_unconstrained_timing.setup.rpt", *timing_info.setup_analyzer());
3833
}
3934

40-
void generate_hold_timing_stats(const std::string& prefix,
41-
const HoldTimingInfo& timing_info,
42-
const AnalysisDelayCalculator& delay_calc,
43-
const t_analysis_opts& analysis_opts,
44-
bool is_flat,
45-
const BlkLocRegistry& blk_loc_registry) {
35+
void generate_hold_timing_stats(const std::string& prefix, const HoldTimingInfo& timing_info, const AnalysisDelayCalculator& delay_calc, const t_analysis_opts& analysis_opts, bool is_flat) {
4636
auto& timing_ctx = g_vpr_ctx.timing();
4737
auto& atom_ctx = g_vpr_ctx.atom();
4838

4939
print_hold_timing_summary(*timing_ctx.constraints, *timing_info.hold_analyzer(), "Final ");
5040

51-
VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat, blk_loc_registry);
41+
VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat);
5242
resolver.set_detail_level(analysis_opts.timing_report_detail);
5343

5444
tatum::TimingReporter timing_reporter(resolver, *timing_ctx.graph, *timing_ctx.constraints);

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