Combine register stark with preserving ecalls

[matthiasgoergens]

We have 32 registers in our Risc-V VM. Our CPU table has 4 columns per register: one for the value, two for instruction's read selectors, one for instruction's write selector. #487 describes the idea of re-using the idea of an external table we had for memory for our CPU registers. And thus getting rid of 128 = 4 * 32 columns, in exchange for only a handful of columns.

The big blocker was thought to be that some of our ecalls require reading more than two registers, so we wouldn't have a uniform 3 lookups per CPU cycle (ie per CPU table row). So we thought we would replace our ecalls with suitably pre-initialised memory.

That worked out reasonably well for IO. But we are struggling a bit with making the design work for Poseidon2. (And we are also deliberately restricting our design to a single call tape to make this work.)

Here's an idea to preserve ecalls that read more than 2 registers, like posedoin2's ecall does, and still get rid of the 132 register columns: we can add the extra register-read lookups into the Poseidon2 table!

This would even work without any register lookups at all for the ecall, not even the one we use to determine the type of ecall. Whether that's a good idea or not remains to be seen.

We can even consider using the ideas from Polynomial IOPs for Memory Consistency
Checks in Zero-Knowledge Virtual Machines to check our register's consistency. (Using their ideas for memory is blocked on the distinctiveness check being expensive for non-consecutive memory addresses. But our registers just have addresses 0 to 31.)