Bug Description

The CV32E20 Specification lists the following CSR's as implemented:

0xc00 cycle // unprivileged mode cycle, lower 32b
0xc02 instret // unprivileged mode instret, lower 32b
0xc80 cycleh // unprivileged mode cycle, upper 32b
0xc82 instreth // unprivileged mode instret, upper 32b

Attempting to read any of these CSR's in machine mode causes an illegal instruction exception. (User mode access has not yet been tested.) This is consistent with Ibex and CV32E40 handling of unimplemented CSR's.

If the desire is to implement these CSR's then functionality needs to be added to properly return data. If that is not desired, then the documentation should be updated to remove them.