How to get the design files separately to use for verification and synthesis in cadence or other tools

[RakeshpatilLB]

I am a student and new to cva6. I wanted to flatten the cva6 design in cadence genus for synthesis, also to do verification in cadence tools, for that i need all the required source files. But as per the given info the source files have set of parameters that differ of each variant. And it is quite difficult to trace how the target value is being used to transfer the corresponding parameters to the hdl files. Is there anyway that i can do this instead of manually tracing and finding the parameters ?