Simulation of the core itself?

[YiminGao0113]

Hi,

I wanted to ask if it's possible to simulate the SERV core using the provided software but without involving the System-on-Chip. I've been working on integrating SPI/I2C with the core and am looking for ways to verify my work. Could you give me any suggestions on how to proceed with this verification?

Thanks for your help! :)

[filmil]

Not sure what exactly you mean but I simulated this design in many contexts.