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cwabbott0robclark
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drm/msm: Add devcoredump support for a750
Add an a750 case to the various places where we choose a list of registers. Patchwork: https://patchwork.freedesktop.org/patch/592519/ Signed-off-by: Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/592519 Signed-off-by: Rob Clark <robdclark@chromium.org>
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‎drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

Lines changed: 46 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -13,9 +13,11 @@
1313
*/
1414
#pragma GCC diagnostic push
1515
#pragma GCC diagnostic ignored "-Wunused-variable"
16+
#pragma GCC diagnostic ignored "-Wunused-const-variable"
1617

1718
#include "adreno_gen7_0_0_snapshot.h"
1819
#include "adreno_gen7_2_0_snapshot.h"
20+
#include "adreno_gen7_9_0_snapshot.h"
1921

2022
#pragma GCC diagnostic pop
2123

@@ -384,21 +386,29 @@ static void a7xx_get_debugbus_blocks(struct msm_gpu *gpu,
384386
struct a6xx_gpu_state *a6xx_state)
385387
{
386388
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
387-
int debugbus_blocks_count, total_debugbus_blocks;
388-
const u32 *debugbus_blocks;
389+
int debugbus_blocks_count, gbif_debugbus_blocks_count, total_debugbus_blocks;
390+
const u32 *debugbus_blocks, *gbif_debugbus_blocks;
389391
int i;
390392

391393
if (adreno_is_a730(adreno_gpu)) {
392394
debugbus_blocks = gen7_0_0_debugbus_blocks;
393395
debugbus_blocks_count = ARRAY_SIZE(gen7_0_0_debugbus_blocks);
394-
} else {
395-
BUG_ON(!adreno_is_a740_family(adreno_gpu));
396+
gbif_debugbus_blocks = a7xx_gbif_debugbus_blocks;
397+
gbif_debugbus_blocks_count = ARRAY_SIZE(a7xx_gbif_debugbus_blocks);
398+
} else if (adreno_is_a740_family(adreno_gpu)) {
396399
debugbus_blocks = gen7_2_0_debugbus_blocks;
397400
debugbus_blocks_count = ARRAY_SIZE(gen7_2_0_debugbus_blocks);
401+
gbif_debugbus_blocks = a7xx_gbif_debugbus_blocks;
402+
gbif_debugbus_blocks_count = ARRAY_SIZE(a7xx_gbif_debugbus_blocks);
403+
} else {
404+
BUG_ON(!adreno_is_a750(adreno_gpu));
405+
debugbus_blocks = gen7_9_0_debugbus_blocks;
406+
debugbus_blocks_count = ARRAY_SIZE(gen7_9_0_debugbus_blocks);
407+
gbif_debugbus_blocks = gen7_9_0_gbif_debugbus_blocks;
408+
gbif_debugbus_blocks_count = ARRAY_SIZE(gen7_9_0_gbif_debugbus_blocks);
398409
}
399410

400-
total_debugbus_blocks = debugbus_blocks_count +
401-
ARRAY_SIZE(a7xx_gbif_debugbus_blocks);
411+
total_debugbus_blocks = debugbus_blocks_count + gbif_debugbus_blocks_count;
402412

403413
a6xx_state->debugbus = state_kcalloc(a6xx_state, total_debugbus_blocks,
404414
sizeof(*a6xx_state->debugbus));
@@ -410,9 +420,9 @@ static void a7xx_get_debugbus_blocks(struct msm_gpu *gpu,
410420
&a6xx_state->debugbus[i]);
411421
}
412422

413-
for (i = 0; i < ARRAY_SIZE(a7xx_gbif_debugbus_blocks); i++) {
423+
for (i = 0; i < gbif_debugbus_blocks_count; i++) {
414424
a6xx_get_debugbus_block(gpu,
415-
a6xx_state, &a7xx_debugbus_blocks[a7xx_gbif_debugbus_blocks[i]],
425+
a6xx_state, &a7xx_debugbus_blocks[gbif_debugbus_blocks[i]],
416426
&a6xx_state->debugbus[i + debugbus_blocks_count]);
417427
}
418428
}
@@ -813,10 +823,13 @@ static void a7xx_get_clusters(struct msm_gpu *gpu,
813823
if (adreno_is_a730(adreno_gpu)) {
814824
clusters = gen7_0_0_clusters;
815825
clusters_size = ARRAY_SIZE(gen7_0_0_clusters);
816-
} else {
817-
BUG_ON(!adreno_is_a740_family(adreno_gpu));
826+
} else if (adreno_is_a740_family(adreno_gpu)) {
818827
clusters = gen7_2_0_clusters;
819828
clusters_size = ARRAY_SIZE(gen7_2_0_clusters);
829+
} else {
830+
BUG_ON(!adreno_is_a750(adreno_gpu));
831+
clusters = gen7_9_0_clusters;
832+
clusters_size = ARRAY_SIZE(gen7_9_0_clusters);
820833
}
821834

822835
a6xx_state->clusters = state_kcalloc(a6xx_state,
@@ -948,10 +961,13 @@ static void a7xx_get_shaders(struct msm_gpu *gpu,
948961
if (adreno_is_a730(adreno_gpu)) {
949962
shader_blocks = gen7_0_0_shader_blocks;
950963
num_shader_blocks = ARRAY_SIZE(gen7_0_0_shader_blocks);
951-
} else {
952-
BUG_ON(!adreno_is_a740_family(adreno_gpu));
964+
} else if (adreno_is_a740_family(adreno_gpu)) {
953965
shader_blocks = gen7_2_0_shader_blocks;
954966
num_shader_blocks = ARRAY_SIZE(gen7_2_0_shader_blocks);
967+
} else {
968+
BUG_ON(!adreno_is_a750(adreno_gpu));
969+
shader_blocks = gen7_9_0_shader_blocks;
970+
num_shader_blocks = ARRAY_SIZE(gen7_9_0_shader_blocks);
955971
}
956972

957973
a6xx_state->shaders = state_kcalloc(a6xx_state,
@@ -1337,10 +1353,13 @@ static void a7xx_get_registers(struct msm_gpu *gpu,
13371353
if (adreno_is_a730(adreno_gpu)) {
13381354
reglist = gen7_0_0_reg_list;
13391355
pre_crashdumper_regs = gen7_0_0_pre_crashdumper_gpu_registers;
1340-
} else {
1341-
BUG_ON(!adreno_is_a740_family(adreno_gpu));
1356+
} else if (adreno_is_a740_family(adreno_gpu)) {
13421357
reglist = gen7_2_0_reg_list;
13431358
pre_crashdumper_regs = gen7_0_0_pre_crashdumper_gpu_registers;
1359+
} else {
1360+
BUG_ON(!adreno_is_a750(adreno_gpu));
1361+
reglist = gen7_9_0_reg_list;
1362+
pre_crashdumper_regs = gen7_9_0_pre_crashdumper_gpu_registers;
13441363
}
13451364

13461365
count = A7XX_PRE_CRASHDUMPER_SIZE + A7XX_POST_CRASHDUMPER_SIZE;
@@ -1388,7 +1407,8 @@ static void a7xx_get_post_crashdumper_registers(struct msm_gpu *gpu,
13881407
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
13891408
const u32 *regs;
13901409

1391-
BUG_ON(!(adreno_is_a730(adreno_gpu) || adreno_is_a740_family(adreno_gpu)));
1410+
BUG_ON(!(adreno_is_a730(adreno_gpu) || adreno_is_a740_family(adreno_gpu) ||
1411+
adreno_is_a750(adreno_gpu)));
13921412
regs = gen7_0_0_post_crashdumper_registers;
13931413

13941414
a7xx_get_ahb_gpu_registers(gpu,
@@ -1491,10 +1511,18 @@ static void a7xx_get_indexed_registers(struct msm_gpu *gpu,
14911511
struct a6xx_gpu_state *a6xx_state)
14921512
{
14931513
struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
1514+
const struct a6xx_indexed_registers *indexed_regs;
14941515
int i, indexed_count, mempool_count;
14951516

1496-
BUG_ON(!(adreno_is_a730(adreno_gpu) || adreno_is_a740_family(adreno_gpu)));
1497-
indexed_count = ARRAY_SIZE(a7xx_indexed_reglist);
1517+
if (adreno_is_a730(adreno_gpu) || adreno_is_a740_family(adreno_gpu)) {
1518+
indexed_regs = a7xx_indexed_reglist;
1519+
indexed_count = ARRAY_SIZE(a7xx_indexed_reglist);
1520+
} else {
1521+
BUG_ON(!adreno_is_a750(adreno_gpu));
1522+
indexed_regs = gen7_9_0_cp_indexed_reg_list;
1523+
indexed_count = ARRAY_SIZE(gen7_9_0_cp_indexed_reg_list);
1524+
}
1525+
14981526
mempool_count = ARRAY_SIZE(a7xx_cp_bv_mempool_indexed);
14991527

15001528
a6xx_state->indexed_regs = state_kcalloc(a6xx_state,
@@ -1507,7 +1535,7 @@ static void a7xx_get_indexed_registers(struct msm_gpu *gpu,
15071535

15081536
/* First read the common regs */
15091537
for (i = 0; i < indexed_count; i++)
1510-
a6xx_get_indexed_regs(gpu, a6xx_state, &a7xx_indexed_reglist[i],
1538+
a6xx_get_indexed_regs(gpu, a6xx_state, &indexed_regs[i],
15111539
&a6xx_state->indexed_regs[i]);
15121540

15131541
gpu_rmw(gpu, REG_A6XX_CP_CHICKEN_DBG, 0, BIT(2));

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