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spi: dt-bindings: cdns,qspi-nor: Improve
Merge series from Miquel Raynal <miquel.raynal@bootlin.com>: While working with this controller I figured out a couple of small issues which I propose to fix. They are not super impacting, but I believe this goes into the right direction.
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Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml

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@@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/spi/cdns,qspi-nor.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence Quad SPI controller
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title: Cadence Quad/Octal SPI controller
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maintainers:
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- Vaishnav Achath <vaishnav.a@ti.com>
@@ -76,8 +76,12 @@ properties:
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- ti,am654-ospi
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- ti,k2g-qspi
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- xlnx,versal-ospi-1.0
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# The compatible is qspi-nor for historical reasons but such
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# controllers are meant to be used with flashes of all kinds,
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# ie. also NAND flashes, not only NOR flashes.
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- const: cdns,qspi-nor
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- const: cdns,qspi-nor
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deprecated: true
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reg:
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items:
@@ -142,6 +146,18 @@ properties:
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items:
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enum: [ qspi, qspi-ocp, rstc_ref ]
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patternProperties:
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"^flash@[0-9a-f]+$":
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type: object
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$ref: cdns,qspi-nor-peripheral-props.yaml
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additionalProperties: true
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required:
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- cdns,read-delay
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- cdns,tshsl-ns
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- cdns,tsd2d-ns
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- cdns,tchsh-ns
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- cdns,tslch-ns
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required:
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- compatible
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- reg
@@ -157,7 +173,7 @@ unevaluatedProperties: false
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examples:
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- |
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qspi: spi@ff705000 {
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compatible = "cdns,qspi-nor";
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compatible = "intel,socfpga-qspi", "cdns,qspi-nor";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xff705000 0x1000>,
@@ -173,5 +189,10 @@ examples:
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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cdns,read-delay = <4>;
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cdns,tshsl-ns = <60>;
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cdns,tsd2d-ns = <60>;
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cdns,tchsh-ns = <60>;
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cdns,tslch-ns = <60>;
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};
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};

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