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HoratiuVulturlinusw
HoratiuVultur
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linusw
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pinctrl: ocelot: Fix pincfg for lan966x
The blamed commit introduce support for lan966x which use the same pinconf_ops as sparx5. The problem is that pinconf_ops is specific to sparx5. More precisely the offset of the bits in the pincfg register are different and also lan966x doesn't have support for PIN_CONFIG_INPUT_SCHMITT_ENABLE. Fix this by making pinconf_ops more generic such that it can be also used by lan966x. This is done by introducing 'ocelot_pincfg_data' which contains the offset and what is supported for each SOC. Fixes: 531d6ab ("pinctrl: ocelot: Extend support for lan966x") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220713193750.4079621-2-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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‎drivers/pinctrl/pinctrl-ocelot.c

Lines changed: 124 additions & 71 deletions
Original file line numberDiff line numberDiff line change
@@ -29,19 +29,12 @@
2929
#define ocelot_clrsetbits(addr, clear, set) \
3030
writel((readl(addr) & ~(clear)) | (set), (addr))
3131

32-
/* PINCONFIG bits (sparx5 only) */
3332
enum {
3433
PINCONF_BIAS,
3534
PINCONF_SCHMITT,
3635
PINCONF_DRIVE_STRENGTH,
3736
};
3837

39-
#define BIAS_PD_BIT BIT(4)
40-
#define BIAS_PU_BIT BIT(3)
41-
#define BIAS_BITS (BIAS_PD_BIT|BIAS_PU_BIT)
42-
#define SCHMITT_BIT BIT(2)
43-
#define DRIVE_BITS GENMASK(1, 0)
44-
4538
/* GPIO standard registers */
4639
#define OCELOT_GPIO_OUT_SET 0x0
4740
#define OCELOT_GPIO_OUT_CLR 0x4
@@ -321,17 +314,30 @@ struct ocelot_pin_caps {
321314
unsigned char a_functions[OCELOT_FUNC_PER_PIN]; /* Additional functions */
322315
};
323316

317+
struct ocelot_pincfg_data {
318+
u8 pd_bit;
319+
u8 pu_bit;
320+
u8 drive_bits;
321+
u8 schmitt_bit;
322+
};
323+
324324
struct ocelot_pinctrl {
325325
struct device *dev;
326326
struct pinctrl_dev *pctl;
327327
struct gpio_chip gpio_chip;
328328
struct regmap *map;
329329
struct regmap *pincfg;
330330
struct pinctrl_desc *desc;
331+
const struct ocelot_pincfg_data *pincfg_data;
331332
struct ocelot_pmx_func func[FUNC_MAX];
332333
u8 stride;
333334
};
334335

336+
struct ocelot_match_data {
337+
struct pinctrl_desc desc;
338+
struct ocelot_pincfg_data pincfg_data;
339+
};
340+
335341
#define LUTON_P(p, f0, f1) \
336342
static struct ocelot_pin_caps luton_pin_##p = { \
337343
.pin = p, \
@@ -1325,6 +1331,7 @@ static int ocelot_hw_get_value(struct ocelot_pinctrl *info,
13251331
int ret = -EOPNOTSUPP;
13261332

13271333
if (info->pincfg) {
1334+
const struct ocelot_pincfg_data *opd = info->pincfg_data;
13281335
u32 regcfg;
13291336

13301337
ret = regmap_read(info->pincfg, pin, &regcfg);
@@ -1334,15 +1341,15 @@ static int ocelot_hw_get_value(struct ocelot_pinctrl *info,
13341341
ret = 0;
13351342
switch (reg) {
13361343
case PINCONF_BIAS:
1337-
*val = regcfg & BIAS_BITS;
1344+
*val = regcfg & (opd->pd_bit | opd->pu_bit);
13381345
break;
13391346

13401347
case PINCONF_SCHMITT:
1341-
*val = regcfg & SCHMITT_BIT;
1348+
*val = regcfg & opd->schmitt_bit;
13421349
break;
13431350

13441351
case PINCONF_DRIVE_STRENGTH:
1345-
*val = regcfg & DRIVE_BITS;
1352+
*val = regcfg & opd->drive_bits;
13461353
break;
13471354

13481355
default:
@@ -1379,23 +1386,27 @@ static int ocelot_hw_set_value(struct ocelot_pinctrl *info,
13791386
int ret = -EOPNOTSUPP;
13801387

13811388
if (info->pincfg) {
1389+
const struct ocelot_pincfg_data *opd = info->pincfg_data;
13821390

13831391
ret = 0;
13841392
switch (reg) {
13851393
case PINCONF_BIAS:
1386-
ret = ocelot_pincfg_clrsetbits(info, pin, BIAS_BITS,
1394+
ret = ocelot_pincfg_clrsetbits(info, pin,
1395+
opd->pd_bit | opd->pu_bit,
13871396
val);
13881397
break;
13891398

13901399
case PINCONF_SCHMITT:
1391-
ret = ocelot_pincfg_clrsetbits(info, pin, SCHMITT_BIT,
1400+
ret = ocelot_pincfg_clrsetbits(info, pin,
1401+
opd->schmitt_bit,
13921402
val);
13931403
break;
13941404

13951405
case PINCONF_DRIVE_STRENGTH:
13961406
if (val <= 3)
13971407
ret = ocelot_pincfg_clrsetbits(info, pin,
1398-
DRIVE_BITS, val);
1408+
opd->drive_bits,
1409+
val);
13991410
else
14001411
ret = -EINVAL;
14011412
break;
@@ -1425,17 +1436,20 @@ static int ocelot_pinconf_get(struct pinctrl_dev *pctldev,
14251436
if (param == PIN_CONFIG_BIAS_DISABLE)
14261437
val = (val == 0);
14271438
else if (param == PIN_CONFIG_BIAS_PULL_DOWN)
1428-
val = (val & BIAS_PD_BIT ? true : false);
1439+
val = !!(val & info->pincfg_data->pd_bit);
14291440
else /* PIN_CONFIG_BIAS_PULL_UP */
1430-
val = (val & BIAS_PU_BIT ? true : false);
1441+
val = !!(val & info->pincfg_data->pu_bit);
14311442
break;
14321443

14331444
case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
1445+
if (!info->pincfg_data->schmitt_bit)
1446+
return -EOPNOTSUPP;
1447+
14341448
err = ocelot_hw_get_value(info, pin, PINCONF_SCHMITT, &val);
14351449
if (err)
14361450
return err;
14371451

1438-
val = (val & SCHMITT_BIT ? true : false);
1452+
val = !!(val & info->pincfg_data->schmitt_bit);
14391453
break;
14401454

14411455
case PIN_CONFIG_DRIVE_STRENGTH:
@@ -1479,6 +1493,7 @@ static int ocelot_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
14791493
unsigned long *configs, unsigned int num_configs)
14801494
{
14811495
struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
1496+
const struct ocelot_pincfg_data *opd = info->pincfg_data;
14821497
u32 param, arg, p;
14831498
int cfg, err = 0;
14841499

@@ -1491,8 +1506,8 @@ static int ocelot_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
14911506
case PIN_CONFIG_BIAS_PULL_UP:
14921507
case PIN_CONFIG_BIAS_PULL_DOWN:
14931508
arg = (param == PIN_CONFIG_BIAS_DISABLE) ? 0 :
1494-
(param == PIN_CONFIG_BIAS_PULL_UP) ? BIAS_PU_BIT :
1495-
BIAS_PD_BIT;
1509+
(param == PIN_CONFIG_BIAS_PULL_UP) ?
1510+
opd->pu_bit : opd->pd_bit;
14961511

14971512
err = ocelot_hw_set_value(info, pin, PINCONF_BIAS, arg);
14981513
if (err)
@@ -1501,7 +1516,10 @@ static int ocelot_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
15011516
break;
15021517

15031518
case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
1504-
arg = arg ? SCHMITT_BIT : 0;
1519+
if (!opd->schmitt_bit)
1520+
return -EOPNOTSUPP;
1521+
1522+
arg = arg ? opd->schmitt_bit : 0;
15051523
err = ocelot_hw_set_value(info, pin, PINCONF_SCHMITT,
15061524
arg);
15071525
if (err)
@@ -1562,69 +1580,94 @@ static const struct pinctrl_ops ocelot_pctl_ops = {
15621580
.dt_free_map = pinconf_generic_dt_free_map,
15631581
};
15641582

1565-
static struct pinctrl_desc luton_desc = {
1566-
.name = "luton-pinctrl",
1567-
.pins = luton_pins,
1568-
.npins = ARRAY_SIZE(luton_pins),
1569-
.pctlops = &ocelot_pctl_ops,
1570-
.pmxops = &ocelot_pmx_ops,
1571-
.owner = THIS_MODULE,
1583+
static struct ocelot_match_data luton_desc = {
1584+
.desc = {
1585+
.name = "luton-pinctrl",
1586+
.pins = luton_pins,
1587+
.npins = ARRAY_SIZE(luton_pins),
1588+
.pctlops = &ocelot_pctl_ops,
1589+
.pmxops = &ocelot_pmx_ops,
1590+
.owner = THIS_MODULE,
1591+
},
15721592
};
15731593

1574-
static struct pinctrl_desc serval_desc = {
1575-
.name = "serval-pinctrl",
1576-
.pins = serval_pins,
1577-
.npins = ARRAY_SIZE(serval_pins),
1578-
.pctlops = &ocelot_pctl_ops,
1579-
.pmxops = &ocelot_pmx_ops,
1580-
.owner = THIS_MODULE,
1594+
static struct ocelot_match_data serval_desc = {
1595+
.desc = {
1596+
.name = "serval-pinctrl",
1597+
.pins = serval_pins,
1598+
.npins = ARRAY_SIZE(serval_pins),
1599+
.pctlops = &ocelot_pctl_ops,
1600+
.pmxops = &ocelot_pmx_ops,
1601+
.owner = THIS_MODULE,
1602+
},
15811603
};
15821604

1583-
static struct pinctrl_desc ocelot_desc = {
1584-
.name = "ocelot-pinctrl",
1585-
.pins = ocelot_pins,
1586-
.npins = ARRAY_SIZE(ocelot_pins),
1587-
.pctlops = &ocelot_pctl_ops,
1588-
.pmxops = &ocelot_pmx_ops,
1589-
.owner = THIS_MODULE,
1605+
static struct ocelot_match_data ocelot_desc = {
1606+
.desc = {
1607+
.name = "ocelot-pinctrl",
1608+
.pins = ocelot_pins,
1609+
.npins = ARRAY_SIZE(ocelot_pins),
1610+
.pctlops = &ocelot_pctl_ops,
1611+
.pmxops = &ocelot_pmx_ops,
1612+
.owner = THIS_MODULE,
1613+
},
15901614
};
15911615

1592-
static struct pinctrl_desc jaguar2_desc = {
1593-
.name = "jaguar2-pinctrl",
1594-
.pins = jaguar2_pins,
1595-
.npins = ARRAY_SIZE(jaguar2_pins),
1596-
.pctlops = &ocelot_pctl_ops,
1597-
.pmxops = &ocelot_pmx_ops,
1598-
.owner = THIS_MODULE,
1616+
static struct ocelot_match_data jaguar2_desc = {
1617+
.desc = {
1618+
.name = "jaguar2-pinctrl",
1619+
.pins = jaguar2_pins,
1620+
.npins = ARRAY_SIZE(jaguar2_pins),
1621+
.pctlops = &ocelot_pctl_ops,
1622+
.pmxops = &ocelot_pmx_ops,
1623+
.owner = THIS_MODULE,
1624+
},
15991625
};
16001626

1601-
static struct pinctrl_desc servalt_desc = {
1602-
.name = "servalt-pinctrl",
1603-
.pins = servalt_pins,
1604-
.npins = ARRAY_SIZE(servalt_pins),
1605-
.pctlops = &ocelot_pctl_ops,
1606-
.pmxops = &ocelot_pmx_ops,
1607-
.owner = THIS_MODULE,
1627+
static struct ocelot_match_data servalt_desc = {
1628+
.desc = {
1629+
.name = "servalt-pinctrl",
1630+
.pins = servalt_pins,
1631+
.npins = ARRAY_SIZE(servalt_pins),
1632+
.pctlops = &ocelot_pctl_ops,
1633+
.pmxops = &ocelot_pmx_ops,
1634+
.owner = THIS_MODULE,
1635+
},
16081636
};
16091637

1610-
static struct pinctrl_desc sparx5_desc = {
1611-
.name = "sparx5-pinctrl",
1612-
.pins = sparx5_pins,
1613-
.npins = ARRAY_SIZE(sparx5_pins),
1614-
.pctlops = &ocelot_pctl_ops,
1615-
.pmxops = &ocelot_pmx_ops,
1616-
.confops = &ocelot_confops,
1617-
.owner = THIS_MODULE,
1638+
static struct ocelot_match_data sparx5_desc = {
1639+
.desc = {
1640+
.name = "sparx5-pinctrl",
1641+
.pins = sparx5_pins,
1642+
.npins = ARRAY_SIZE(sparx5_pins),
1643+
.pctlops = &ocelot_pctl_ops,
1644+
.pmxops = &ocelot_pmx_ops,
1645+
.confops = &ocelot_confops,
1646+
.owner = THIS_MODULE,
1647+
},
1648+
.pincfg_data = {
1649+
.pd_bit = BIT(4),
1650+
.pu_bit = BIT(3),
1651+
.drive_bits = GENMASK(1, 0),
1652+
.schmitt_bit = BIT(2),
1653+
},
16181654
};
16191655

1620-
static struct pinctrl_desc lan966x_desc = {
1621-
.name = "lan966x-pinctrl",
1622-
.pins = lan966x_pins,
1623-
.npins = ARRAY_SIZE(lan966x_pins),
1624-
.pctlops = &ocelot_pctl_ops,
1625-
.pmxops = &lan966x_pmx_ops,
1626-
.confops = &ocelot_confops,
1627-
.owner = THIS_MODULE,
1656+
static struct ocelot_match_data lan966x_desc = {
1657+
.desc = {
1658+
.name = "lan966x-pinctrl",
1659+
.pins = lan966x_pins,
1660+
.npins = ARRAY_SIZE(lan966x_pins),
1661+
.pctlops = &ocelot_pctl_ops,
1662+
.pmxops = &lan966x_pmx_ops,
1663+
.confops = &ocelot_confops,
1664+
.owner = THIS_MODULE,
1665+
},
1666+
.pincfg_data = {
1667+
.pd_bit = BIT(3),
1668+
.pu_bit = BIT(2),
1669+
.drive_bits = GENMASK(1, 0),
1670+
},
16281671
};
16291672

16301673
static int ocelot_create_group_func_map(struct device *dev,
@@ -1913,6 +1956,7 @@ static struct regmap *ocelot_pinctrl_create_pincfg(struct platform_device *pdev)
19131956

19141957
static int ocelot_pinctrl_probe(struct platform_device *pdev)
19151958
{
1959+
const struct ocelot_match_data *data;
19161960
struct device *dev = &pdev->dev;
19171961
struct ocelot_pinctrl *info;
19181962
struct reset_control *reset;
@@ -1929,7 +1973,16 @@ static int ocelot_pinctrl_probe(struct platform_device *pdev)
19291973
if (!info)
19301974
return -ENOMEM;
19311975

1932-
info->desc = (struct pinctrl_desc *)device_get_match_data(dev);
1976+
data = device_get_match_data(dev);
1977+
if (!data)
1978+
return -EINVAL;
1979+
1980+
info->desc = devm_kmemdup(dev, &data->desc, sizeof(*info->desc),
1981+
GFP_KERNEL);
1982+
if (!info->desc)
1983+
return -ENOMEM;
1984+
1985+
info->pincfg_data = &data->pincfg_data;
19331986

19341987
reset = devm_reset_control_get_optional_shared(dev, "switch");
19351988
if (IS_ERR(reset))

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