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Perry Yuanrafaeljw
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cpufreq: amd-pstate: fix the highest frequency issue which limits performance
To address the performance drop issue, an optimization has been implemented. The incorrect highest performance value previously set by the low-level power firmware for AMD CPUs with Family ID 0x19 and Model ID ranging from 0x70 to 0x7F series has been identified as the cause. To resolve this, a check has been implemented to accurately determine the CPU family and model ID. The correct highest performance value is now set and the performance drop caused by the incorrect highest performance value are eliminated. Before the fix, the highest frequency was set to 4200MHz, now it is set to 4971MHz which is correct. CPU NODE SOCKET CORE L1d:L1i:L2:L3 ONLINE MAXMHZ MINMHZ MHZ 0 0 0 0 0:0:0:0 yes 4971.0000 400.0000 400.0000 1 0 0 0 0:0:0:0 yes 4971.0000 400.0000 400.0000 2 0 0 1 1:1:1:0 yes 4971.0000 400.0000 4865.8140 3 0 0 1 1:1:1:0 yes 4971.0000 400.0000 400.0000 Fixes: f3a0523 ("cpufreq: amd-pstate: Enable amd-pstate preferred core support") Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218759 Signed-off-by: Perry Yuan <perry.yuan@amd.com> Co-developed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Tested-by: Gaha Bana <gahabana@gmail.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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drivers/cpufreq/amd-pstate.c

Lines changed: 19 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,8 @@
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#define AMD_PSTATE_TRANSITION_LATENCY 20000
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#define AMD_PSTATE_TRANSITION_DELAY 1000
53-
#define AMD_PSTATE_PREFCORE_THRESHOLD 166
53+
#define CPPC_HIGHEST_PERF_PERFORMANCE 196
54+
#define CPPC_HIGHEST_PERF_DEFAULT 166
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/*
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* TODO: We need more time to fine tune processors with shared memory solution
@@ -326,6 +327,21 @@ static inline int amd_pstate_enable(bool enable)
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return static_call(amd_pstate_enable)(enable);
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}
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330+
static u32 amd_pstate_highest_perf_set(struct amd_cpudata *cpudata)
331+
{
332+
struct cpuinfo_x86 *c = &cpu_data(0);
333+
334+
/*
335+
* For AMD CPUs with Family ID 19H and Model ID range 0x70 to 0x7f,
336+
* the highest performance level is set to 196.
337+
* https://bugzilla.kernel.org/show_bug.cgi?id=218759
338+
*/
339+
if (c->x86 == 0x19 && (c->x86_model >= 0x70 && c->x86_model <= 0x7f))
340+
return CPPC_HIGHEST_PERF_PERFORMANCE;
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342+
return CPPC_HIGHEST_PERF_DEFAULT;
343+
}
344+
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static int pstate_init_perf(struct amd_cpudata *cpudata)
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{
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u64 cap1;
@@ -342,7 +358,7 @@ static int pstate_init_perf(struct amd_cpudata *cpudata)
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* the default max perf.
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*/
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if (cpudata->hw_prefcore)
345-
highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
361+
highest_perf = amd_pstate_highest_perf_set(cpudata);
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else
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highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);
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@@ -366,7 +382,7 @@ static int cppc_init_perf(struct amd_cpudata *cpudata)
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return ret;
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368384
if (cpudata->hw_prefcore)
369-
highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
385+
highest_perf = amd_pstate_highest_perf_set(cpudata);
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else
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highest_perf = cppc_perf.highest_perf;
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