@@ -355,7 +355,9 @@ struct cdns_torrent_phy {
355
355
struct reset_control * apb_rst ;
356
356
struct device * dev ;
357
357
struct clk * clk ;
358
+ struct clk * clk1 ;
358
359
enum cdns_torrent_ref_clk ref_clk_rate ;
360
+ enum cdns_torrent_ref_clk ref_clk1_rate ;
359
361
struct cdns_torrent_inst phys [MAX_NUM_LANES ];
360
362
int nsubnodes ;
361
363
const struct cdns_torrent_data * init_data ;
@@ -2460,9 +2462,11 @@ int cdns_torrent_phy_configure_multilink(struct cdns_torrent_phy *cdns_phy)
2460
2462
{
2461
2463
const struct cdns_torrent_data * init_data = cdns_phy -> init_data ;
2462
2464
struct cdns_torrent_vals * cmn_vals , * tx_ln_vals , * rx_ln_vals ;
2465
+ enum cdns_torrent_ref_clk ref_clk1 = cdns_phy -> ref_clk1_rate ;
2463
2466
enum cdns_torrent_ref_clk ref_clk = cdns_phy -> ref_clk_rate ;
2464
2467
struct cdns_torrent_vals * link_cmn_vals , * xcvr_diag_vals ;
2465
2468
enum cdns_torrent_phy_type phy_t1 , phy_t2 ;
2469
+ struct cdns_torrent_vals * phy_pma_cmn_vals ;
2466
2470
struct cdns_torrent_vals * pcs_cmn_vals ;
2467
2471
int i , j , node , mlane , num_lanes , ret ;
2468
2472
struct cdns_reg_pairs * reg_pairs ;
@@ -2489,6 +2493,7 @@ int cdns_torrent_phy_configure_multilink(struct cdns_torrent_phy *cdns_phy)
2489
2493
* Get the array values as [phy_t2][phy_t1][ssc].
2490
2494
*/
2491
2495
swap (phy_t1 , phy_t2 );
2496
+ swap (ref_clk , ref_clk1 );
2492
2497
}
2493
2498
2494
2499
mlane = cdns_phy -> phys [node ].mlane ;
@@ -2552,9 +2557,22 @@ int cdns_torrent_phy_configure_multilink(struct cdns_torrent_phy *cdns_phy)
2552
2557
reg_pairs [i ].val );
2553
2558
}
2554
2559
2560
+ /* PHY PMA common registers configurations */
2561
+ phy_pma_cmn_vals = cdns_torrent_get_tbl_vals (& init_data -> phy_pma_cmn_vals_tbl ,
2562
+ CLK_ANY , CLK_ANY ,
2563
+ phy_t1 , phy_t2 , ANY_SSC );
2564
+ if (phy_pma_cmn_vals ) {
2565
+ reg_pairs = phy_pma_cmn_vals -> reg_pairs ;
2566
+ num_regs = phy_pma_cmn_vals -> num_regs ;
2567
+ regmap = cdns_phy -> regmap_phy_pma_common_cdb ;
2568
+ for (i = 0 ; i < num_regs ; i ++ )
2569
+ regmap_write (regmap , reg_pairs [i ].off ,
2570
+ reg_pairs [i ].val );
2571
+ }
2572
+
2555
2573
/* PMA common registers configurations */
2556
2574
cmn_vals = cdns_torrent_get_tbl_vals (& init_data -> cmn_vals_tbl ,
2557
- ref_clk , ref_clk ,
2575
+ ref_clk , ref_clk1 ,
2558
2576
phy_t1 , phy_t2 , ssc );
2559
2577
if (cmn_vals ) {
2560
2578
reg_pairs = cmn_vals -> reg_pairs ;
@@ -2567,7 +2585,7 @@ int cdns_torrent_phy_configure_multilink(struct cdns_torrent_phy *cdns_phy)
2567
2585
2568
2586
/* PMA TX lane registers configurations */
2569
2587
tx_ln_vals = cdns_torrent_get_tbl_vals (& init_data -> tx_ln_vals_tbl ,
2570
- ref_clk , ref_clk ,
2588
+ ref_clk , ref_clk1 ,
2571
2589
phy_t1 , phy_t2 , ssc );
2572
2590
if (tx_ln_vals ) {
2573
2591
reg_pairs = tx_ln_vals -> reg_pairs ;
@@ -2582,7 +2600,7 @@ int cdns_torrent_phy_configure_multilink(struct cdns_torrent_phy *cdns_phy)
2582
2600
2583
2601
/* PMA RX lane registers configurations */
2584
2602
rx_ln_vals = cdns_torrent_get_tbl_vals (& init_data -> rx_ln_vals_tbl ,
2585
- ref_clk , ref_clk ,
2603
+ ref_clk , ref_clk1 ,
2586
2604
phy_t1 , phy_t2 , ssc );
2587
2605
if (rx_ln_vals ) {
2588
2606
reg_pairs = rx_ln_vals -> reg_pairs ;
@@ -2684,9 +2702,11 @@ static int cdns_torrent_reset(struct cdns_torrent_phy *cdns_phy)
2684
2702
static int cdns_torrent_clk (struct cdns_torrent_phy * cdns_phy )
2685
2703
{
2686
2704
struct device * dev = cdns_phy -> dev ;
2705
+ unsigned long ref_clk1_rate ;
2687
2706
unsigned long ref_clk_rate ;
2688
2707
int ret ;
2689
2708
2709
+ /* refclk: Input reference clock for PLL0 */
2690
2710
cdns_phy -> clk = devm_clk_get (dev , "refclk" );
2691
2711
if (IS_ERR (cdns_phy -> clk )) {
2692
2712
dev_err (dev , "phy ref clock not found\n" );
@@ -2695,15 +2715,15 @@ static int cdns_torrent_clk(struct cdns_torrent_phy *cdns_phy)
2695
2715
2696
2716
ret = clk_prepare_enable (cdns_phy -> clk );
2697
2717
if (ret ) {
2698
- dev_err (cdns_phy -> dev , "Failed to prepare ref clock\n" );
2718
+ dev_err (cdns_phy -> dev , "Failed to prepare ref clock: %d \n" , ret );
2699
2719
return ret ;
2700
2720
}
2701
2721
2702
2722
ref_clk_rate = clk_get_rate (cdns_phy -> clk );
2703
2723
if (!ref_clk_rate ) {
2704
2724
dev_err (cdns_phy -> dev , "Failed to get ref clock rate\n" );
2705
- clk_disable_unprepare ( cdns_phy -> clk ) ;
2706
- return - EINVAL ;
2725
+ ret = - EINVAL ;
2726
+ goto disable_clk ;
2707
2727
}
2708
2728
2709
2729
switch (ref_clk_rate ) {
@@ -2720,12 +2740,62 @@ static int cdns_torrent_clk(struct cdns_torrent_phy *cdns_phy)
2720
2740
cdns_phy -> ref_clk_rate = CLK_156_25_MHZ ;
2721
2741
break ;
2722
2742
default :
2723
- dev_err (cdns_phy -> dev , "Invalid Ref Clock Rate\n" );
2724
- clk_disable_unprepare (cdns_phy -> clk );
2725
- return - EINVAL ;
2743
+ dev_err (cdns_phy -> dev , "Invalid ref clock rate\n" );
2744
+ ret = - EINVAL ;
2745
+ goto disable_clk ;
2746
+ }
2747
+
2748
+ /* refclk1: Input reference clock for PLL1 */
2749
+ cdns_phy -> clk1 = devm_clk_get_optional (dev , "pll1_refclk" );
2750
+ if (IS_ERR (cdns_phy -> clk1 )) {
2751
+ dev_err (dev , "phy PLL1 ref clock not found\n" );
2752
+ ret = PTR_ERR (cdns_phy -> clk1 );
2753
+ goto disable_clk ;
2754
+ }
2755
+
2756
+ if (cdns_phy -> clk1 ) {
2757
+ ret = clk_prepare_enable (cdns_phy -> clk1 );
2758
+ if (ret ) {
2759
+ dev_err (cdns_phy -> dev , "Failed to prepare PLL1 ref clock: %d\n" , ret );
2760
+ goto disable_clk ;
2761
+ }
2762
+
2763
+ ref_clk1_rate = clk_get_rate (cdns_phy -> clk1 );
2764
+ if (!ref_clk1_rate ) {
2765
+ dev_err (cdns_phy -> dev , "Failed to get PLL1 ref clock rate\n" );
2766
+ ret = - EINVAL ;
2767
+ goto disable_clk1 ;
2768
+ }
2769
+
2770
+ switch (ref_clk1_rate ) {
2771
+ case REF_CLK_19_2MHZ :
2772
+ cdns_phy -> ref_clk1_rate = CLK_19_2_MHZ ;
2773
+ break ;
2774
+ case REF_CLK_25MHZ :
2775
+ cdns_phy -> ref_clk1_rate = CLK_25_MHZ ;
2776
+ break ;
2777
+ case REF_CLK_100MHZ :
2778
+ cdns_phy -> ref_clk1_rate = CLK_100_MHZ ;
2779
+ break ;
2780
+ case REF_CLK_156_25MHZ :
2781
+ cdns_phy -> ref_clk1_rate = CLK_156_25_MHZ ;
2782
+ break ;
2783
+ default :
2784
+ dev_err (cdns_phy -> dev , "Invalid PLL1 ref clock rate\n" );
2785
+ ret = - EINVAL ;
2786
+ goto disable_clk1 ;
2787
+ }
2788
+ } else {
2789
+ cdns_phy -> ref_clk1_rate = cdns_phy -> ref_clk_rate ;
2726
2790
}
2727
2791
2728
2792
return 0 ;
2793
+
2794
+ disable_clk1 :
2795
+ clk_disable_unprepare (cdns_phy -> clk1 );
2796
+ disable_clk :
2797
+ clk_disable_unprepare (cdns_phy -> clk );
2798
+ return ret ;
2729
2799
}
2730
2800
2731
2801
static int cdns_torrent_phy_probe (struct platform_device * pdev )
@@ -2980,6 +3050,7 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
2980
3050
reset_control_put (cdns_phy -> phys [i ].lnk_rst );
2981
3051
of_node_put (child );
2982
3052
reset_control_assert (cdns_phy -> apb_rst );
3053
+ clk_disable_unprepare (cdns_phy -> clk1 );
2983
3054
clk_disable_unprepare (cdns_phy -> clk );
2984
3055
clk_cleanup :
2985
3056
cdns_torrent_clk_cleanup (cdns_phy );
@@ -2998,6 +3069,7 @@ static void cdns_torrent_phy_remove(struct platform_device *pdev)
2998
3069
reset_control_put (cdns_phy -> phys [i ].lnk_rst );
2999
3070
}
3000
3071
3072
+ clk_disable_unprepare (cdns_phy -> clk1 );
3001
3073
clk_disable_unprepare (cdns_phy -> clk );
3002
3074
cdns_torrent_clk_cleanup (cdns_phy );
3003
3075
}
@@ -3034,6 +3106,100 @@ static struct cdns_torrent_vals dp_usb_xcvr_diag_ln_vals = {
3034
3106
.num_regs = ARRAY_SIZE (dp_usb_xcvr_diag_ln_regs ),
3035
3107
};
3036
3108
3109
+ /* PCIe and USXGMII link configuration */
3110
+ static struct cdns_reg_pairs pcie_usxgmii_link_cmn_regs [] = {
3111
+ {0x0003 , PHY_PLL_CFG },
3112
+ {0x0601 , CMN_PDIAG_PLL0_CLK_SEL_M0 },
3113
+ {0x0400 , CMN_PDIAG_PLL0_CLK_SEL_M1 },
3114
+ {0x0400 , CMN_PDIAG_PLL1_CLK_SEL_M0 }
3115
+ };
3116
+
3117
+ static struct cdns_reg_pairs pcie_usxgmii_xcvr_diag_ln_regs [] = {
3118
+ {0x0000 , XCVR_DIAG_HSCLK_SEL },
3119
+ {0x0001 , XCVR_DIAG_HSCLK_DIV },
3120
+ {0x0012 , XCVR_DIAG_PLLDRC_CTRL }
3121
+ };
3122
+
3123
+ static struct cdns_reg_pairs usxgmii_pcie_xcvr_diag_ln_regs [] = {
3124
+ {0x0011 , XCVR_DIAG_HSCLK_SEL },
3125
+ {0x0001 , XCVR_DIAG_HSCLK_DIV },
3126
+ {0x0089 , XCVR_DIAG_PLLDRC_CTRL }
3127
+ };
3128
+
3129
+ static struct cdns_torrent_vals pcie_usxgmii_link_cmn_vals = {
3130
+ .reg_pairs = pcie_usxgmii_link_cmn_regs ,
3131
+ .num_regs = ARRAY_SIZE (pcie_usxgmii_link_cmn_regs ),
3132
+ };
3133
+
3134
+ static struct cdns_torrent_vals pcie_usxgmii_xcvr_diag_ln_vals = {
3135
+ .reg_pairs = pcie_usxgmii_xcvr_diag_ln_regs ,
3136
+ .num_regs = ARRAY_SIZE (pcie_usxgmii_xcvr_diag_ln_regs ),
3137
+ };
3138
+
3139
+ static struct cdns_torrent_vals usxgmii_pcie_xcvr_diag_ln_vals = {
3140
+ .reg_pairs = usxgmii_pcie_xcvr_diag_ln_regs ,
3141
+ .num_regs = ARRAY_SIZE (usxgmii_pcie_xcvr_diag_ln_regs ),
3142
+ };
3143
+
3144
+ /*
3145
+ * Multilink USXGMII, using PLL1, 156.25 MHz Ref clk, no SSC
3146
+ */
3147
+ static struct cdns_reg_pairs ml_usxgmii_pll1_156_25_no_ssc_cmn_regs [] = {
3148
+ {0x0028 , CMN_PDIAG_PLL1_CP_PADJ_M0 },
3149
+ {0x0014 , CMN_PLL1_DSM_FBH_OVRD_M0 },
3150
+ {0x0005 , CMN_PLL1_DSM_FBL_OVRD_M0 },
3151
+ {0x061B , CMN_PLL1_VCOCAL_INIT_TMR },
3152
+ {0x0019 , CMN_PLL1_VCOCAL_ITER_TMR },
3153
+ {0x1354 , CMN_PLL1_VCOCAL_REFTIM_START },
3154
+ {0x1354 , CMN_PLL1_VCOCAL_PLLCNT_START },
3155
+ {0x0003 , CMN_PLL1_VCOCAL_TCTRL },
3156
+ {0x0138 , CMN_PLL1_LOCK_REFCNT_START },
3157
+ {0x0138 , CMN_PLL1_LOCK_PLLCNT_START },
3158
+ {0x007F , CMN_TXPUCAL_TUNE },
3159
+ {0x007F , CMN_TXPDCAL_TUNE }
3160
+ };
3161
+
3162
+ static struct cdns_reg_pairs ml_usxgmii_156_25_no_ssc_tx_ln_regs [] = {
3163
+ {0x00F3 , TX_PSC_A0 },
3164
+ {0x04A2 , TX_PSC_A2 },
3165
+ {0x04A2 , TX_PSC_A3 },
3166
+ {0x0000 , TX_TXCC_CPOST_MULT_00 },
3167
+ {0x0000 , XCVR_DIAG_PSC_OVRD }
3168
+ };
3169
+
3170
+ static struct cdns_reg_pairs ml_usxgmii_156_25_no_ssc_rx_ln_regs [] = {
3171
+ {0x091D , RX_PSC_A0 },
3172
+ {0x0900 , RX_PSC_A2 },
3173
+ {0x0100 , RX_PSC_A3 },
3174
+ {0x0030 , RX_REE_SMGM_CTRL1 },
3175
+ {0x03C7 , RX_REE_GCSM1_EQENM_PH1 },
3176
+ {0x01C7 , RX_REE_GCSM1_EQENM_PH2 },
3177
+ {0x0000 , RX_DIAG_DFE_CTRL },
3178
+ {0x0019 , RX_REE_TAP1_CLIP },
3179
+ {0x0019 , RX_REE_TAP2TON_CLIP },
3180
+ {0x00B9 , RX_DIAG_NQST_CTRL },
3181
+ {0x0C21 , RX_DIAG_DFE_AMP_TUNE_2 },
3182
+ {0x0002 , RX_DIAG_DFE_AMP_TUNE_3 },
3183
+ {0x0033 , RX_DIAG_PI_RATE },
3184
+ {0x0001 , RX_DIAG_ACYA },
3185
+ {0x018C , RX_CDRLF_CNFG }
3186
+ };
3187
+
3188
+ static struct cdns_torrent_vals ml_usxgmii_pll1_156_25_no_ssc_cmn_vals = {
3189
+ .reg_pairs = ml_usxgmii_pll1_156_25_no_ssc_cmn_regs ,
3190
+ .num_regs = ARRAY_SIZE (ml_usxgmii_pll1_156_25_no_ssc_cmn_regs ),
3191
+ };
3192
+
3193
+ static struct cdns_torrent_vals ml_usxgmii_156_25_no_ssc_tx_ln_vals = {
3194
+ .reg_pairs = ml_usxgmii_156_25_no_ssc_tx_ln_regs ,
3195
+ .num_regs = ARRAY_SIZE (ml_usxgmii_156_25_no_ssc_tx_ln_regs ),
3196
+ };
3197
+
3198
+ static struct cdns_torrent_vals ml_usxgmii_156_25_no_ssc_rx_ln_vals = {
3199
+ .reg_pairs = ml_usxgmii_156_25_no_ssc_rx_ln_regs ,
3200
+ .num_regs = ARRAY_SIZE (ml_usxgmii_156_25_no_ssc_rx_ln_regs ),
3201
+ };
3202
+
3037
3203
/* TI USXGMII configuration: Enable cmn_refclk_rcv_out_en */
3038
3204
static struct cdns_reg_pairs ti_usxgmii_phy_pma_cmn_regs [] = {
3039
3205
{0x0040 , PHY_PMA_CMN_CTRL1 },
@@ -4166,6 +4332,7 @@ static struct cdns_torrent_vals_entry link_cmn_vals_entries[] = {
4166
4332
{CDNS_TORRENT_KEY_ANYCLK (TYPE_PCIE , TYPE_QSGMII ), & pcie_sgmii_link_cmn_vals },
4167
4333
{CDNS_TORRENT_KEY_ANYCLK (TYPE_PCIE , TYPE_USB ), & pcie_usb_link_cmn_vals },
4168
4334
{CDNS_TORRENT_KEY_ANYCLK (TYPE_PCIE , TYPE_DP ), & pcie_dp_link_cmn_vals },
4335
+ {CDNS_TORRENT_KEY_ANYCLK (TYPE_PCIE , TYPE_USXGMII ), & pcie_usxgmii_link_cmn_vals },
4169
4336
4170
4337
{CDNS_TORRENT_KEY_ANYCLK (TYPE_SGMII , TYPE_NONE ), & sl_sgmii_link_cmn_vals },
4171
4338
{CDNS_TORRENT_KEY_ANYCLK (TYPE_SGMII , TYPE_PCIE ), & pcie_sgmii_link_cmn_vals },
@@ -4182,6 +4349,7 @@ static struct cdns_torrent_vals_entry link_cmn_vals_entries[] = {
4182
4349
{CDNS_TORRENT_KEY_ANYCLK (TYPE_USB , TYPE_DP ), & usb_dp_link_cmn_vals },
4183
4350
4184
4351
{CDNS_TORRENT_KEY_ANYCLK (TYPE_USXGMII , TYPE_NONE ), & sl_usxgmii_link_cmn_vals },
4352
+ {CDNS_TORRENT_KEY_ANYCLK (TYPE_USXGMII , TYPE_PCIE ), & pcie_usxgmii_link_cmn_vals },
4185
4353
};
4186
4354
4187
4355
static struct cdns_torrent_vals_entry xcvr_diag_vals_entries [] = {
@@ -4194,6 +4362,7 @@ static struct cdns_torrent_vals_entry xcvr_diag_vals_entries[] = {
4194
4362
{CDNS_TORRENT_KEY_ANYCLK (TYPE_PCIE , TYPE_QSGMII ), & pcie_sgmii_xcvr_diag_ln_vals },
4195
4363
{CDNS_TORRENT_KEY_ANYCLK (TYPE_PCIE , TYPE_USB ), & pcie_usb_xcvr_diag_ln_vals },
4196
4364
{CDNS_TORRENT_KEY_ANYCLK (TYPE_PCIE , TYPE_DP ), & pcie_dp_xcvr_diag_ln_vals },
4365
+ {CDNS_TORRENT_KEY_ANYCLK (TYPE_PCIE , TYPE_USXGMII ), & pcie_usxgmii_xcvr_diag_ln_vals },
4197
4366
4198
4367
{CDNS_TORRENT_KEY_ANYCLK (TYPE_SGMII , TYPE_NONE ), & sl_sgmii_xcvr_diag_ln_vals },
4199
4368
{CDNS_TORRENT_KEY_ANYCLK (TYPE_SGMII , TYPE_PCIE ), & sgmii_pcie_xcvr_diag_ln_vals },
@@ -4210,6 +4379,7 @@ static struct cdns_torrent_vals_entry xcvr_diag_vals_entries[] = {
4210
4379
{CDNS_TORRENT_KEY_ANYCLK (TYPE_USB , TYPE_DP ), & usb_dp_xcvr_diag_ln_vals },
4211
4380
4212
4381
{CDNS_TORRENT_KEY_ANYCLK (TYPE_USXGMII , TYPE_NONE ), & sl_usxgmii_xcvr_diag_ln_vals },
4382
+ {CDNS_TORRENT_KEY_ANYCLK (TYPE_USXGMII , TYPE_PCIE ), & usxgmii_pcie_xcvr_diag_ln_vals },
4213
4383
};
4214
4384
4215
4385
static struct cdns_torrent_vals_entry pcs_cmn_vals_entries [] = {
@@ -4285,6 +4455,11 @@ static struct cdns_torrent_vals_entry cmn_vals_entries[] = {
4285
4455
{CDNS_TORRENT_KEY (CLK_100_MHZ , CLK_100_MHZ , TYPE_USB , TYPE_DP , NO_SSC ), & usb_100_no_ssc_cmn_vals },
4286
4456
4287
4457
{CDNS_TORRENT_KEY (CLK_156_25_MHZ , CLK_156_25_MHZ , TYPE_USXGMII , TYPE_NONE , NO_SSC ), & sl_usxgmii_156_25_no_ssc_cmn_vals },
4458
+
4459
+ /* Dual refclk */
4460
+ {CDNS_TORRENT_KEY (CLK_100_MHZ , CLK_156_25_MHZ , TYPE_PCIE , TYPE_USXGMII , NO_SSC ), NULL },
4461
+
4462
+ {CDNS_TORRENT_KEY (CLK_156_25_MHZ , CLK_100_MHZ , TYPE_USXGMII , TYPE_PCIE , NO_SSC ), & ml_usxgmii_pll1_156_25_no_ssc_cmn_vals },
4288
4463
};
4289
4464
4290
4465
static struct cdns_torrent_vals_entry cdns_tx_ln_vals_entries [] = {
@@ -4352,6 +4527,11 @@ static struct cdns_torrent_vals_entry cdns_tx_ln_vals_entries[] = {
4352
4527
{CDNS_TORRENT_KEY (CLK_100_MHZ , CLK_100_MHZ , TYPE_USB , TYPE_DP , NO_SSC ), & usb_100_no_ssc_tx_ln_vals },
4353
4528
4354
4529
{CDNS_TORRENT_KEY (CLK_156_25_MHZ , CLK_156_25_MHZ , TYPE_USXGMII , TYPE_NONE , NO_SSC ), & usxgmii_156_25_no_ssc_tx_ln_vals },
4530
+
4531
+ /* Dual refclk */
4532
+ {CDNS_TORRENT_KEY (CLK_100_MHZ , CLK_156_25_MHZ , TYPE_PCIE , TYPE_USXGMII , NO_SSC ), NULL },
4533
+
4534
+ {CDNS_TORRENT_KEY (CLK_156_25_MHZ , CLK_100_MHZ , TYPE_USXGMII , TYPE_PCIE , NO_SSC ), & ml_usxgmii_156_25_no_ssc_tx_ln_vals },
4355
4535
};
4356
4536
4357
4537
static struct cdns_torrent_vals_entry cdns_rx_ln_vals_entries [] = {
@@ -4419,6 +4599,11 @@ static struct cdns_torrent_vals_entry cdns_rx_ln_vals_entries[] = {
4419
4599
{CDNS_TORRENT_KEY (CLK_100_MHZ , CLK_100_MHZ , TYPE_USB , TYPE_DP , NO_SSC ), & usb_100_no_ssc_rx_ln_vals },
4420
4600
4421
4601
{CDNS_TORRENT_KEY (CLK_156_25_MHZ , CLK_156_25_MHZ , TYPE_USXGMII , TYPE_NONE , NO_SSC ), & usxgmii_156_25_no_ssc_rx_ln_vals },
4602
+
4603
+ /* Dual refclk */
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+ {CDNS_TORRENT_KEY (CLK_100_MHZ , CLK_156_25_MHZ , TYPE_PCIE , TYPE_USXGMII , NO_SSC ), & pcie_100_no_ssc_rx_ln_vals },
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+
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+ {CDNS_TORRENT_KEY (CLK_156_25_MHZ , CLK_100_MHZ , TYPE_USXGMII , TYPE_PCIE , NO_SSC ), & ml_usxgmii_156_25_no_ssc_rx_ln_vals },
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};
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static const struct cdns_torrent_data cdns_map_torrent = {
@@ -4452,6 +4637,7 @@ static const struct cdns_torrent_data cdns_map_torrent = {
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static struct cdns_torrent_vals_entry j721e_phy_pma_cmn_vals_entries [] = {
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{CDNS_TORRENT_KEY_ANYCLK (TYPE_USXGMII , TYPE_NONE ), & ti_usxgmii_phy_pma_cmn_vals },
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+ {CDNS_TORRENT_KEY_ANYCLK (TYPE_USXGMII , TYPE_PCIE ), & ti_usxgmii_phy_pma_cmn_vals },
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};
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static struct cdns_torrent_vals_entry ti_tx_ln_vals_entries [] = {
@@ -4519,6 +4705,11 @@ static struct cdns_torrent_vals_entry ti_tx_ln_vals_entries[] = {
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{CDNS_TORRENT_KEY (CLK_100_MHZ , CLK_100_MHZ , TYPE_USB , TYPE_DP , NO_SSC ), & usb_100_no_ssc_tx_ln_vals },
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{CDNS_TORRENT_KEY (CLK_156_25_MHZ , CLK_156_25_MHZ , TYPE_USXGMII , TYPE_NONE , NO_SSC ), & usxgmii_156_25_no_ssc_tx_ln_vals },
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+
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+ /* Dual refclk */
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+ {CDNS_TORRENT_KEY (CLK_100_MHZ , CLK_156_25_MHZ , TYPE_PCIE , TYPE_USXGMII , NO_SSC ), NULL },
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+
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+ {CDNS_TORRENT_KEY (CLK_156_25_MHZ , CLK_100_MHZ , TYPE_USXGMII , TYPE_PCIE , NO_SSC ), & ml_usxgmii_156_25_no_ssc_tx_ln_vals },
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};
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static const struct cdns_torrent_data ti_j721e_map_torrent = {
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