Skip to content

Commit 9abd613

Browse files
TaumilleConchuOD
authored andcommitted
riscv: dts: thead: Fix node ordering in TH1520 device tree
According to the device tree coding style, nodes shall be ordered by unit address in ascending order. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
1 parent 4cece76 commit 9abd613

File tree

1 file changed

+27
-27
lines changed

1 file changed

+27
-27
lines changed

arch/riscv/boot/dts/thead/th1520.dtsi

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -193,6 +193,33 @@
193193
status = "disabled";
194194
};
195195

196+
emmc: mmc@ffe7080000 {
197+
compatible = "thead,th1520-dwcmshc";
198+
reg = <0xff 0xe7080000 0x0 0x10000>;
199+
interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
200+
clocks = <&sdhci_clk>;
201+
clock-names = "core";
202+
status = "disabled";
203+
};
204+
205+
sdio0: mmc@ffe7090000 {
206+
compatible = "thead,th1520-dwcmshc";
207+
reg = <0xff 0xe7090000 0x0 0x10000>;
208+
interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
209+
clocks = <&sdhci_clk>;
210+
clock-names = "core";
211+
status = "disabled";
212+
};
213+
214+
sdio1: mmc@ffe70a0000 {
215+
compatible = "thead,th1520-dwcmshc";
216+
reg = <0xff 0xe70a0000 0x0 0x10000>;
217+
interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
218+
clocks = <&sdhci_clk>;
219+
clock-names = "core";
220+
status = "disabled";
221+
};
222+
196223
uart1: serial@ffe7f00000 {
197224
compatible = "snps,dw-apb-uart";
198225
reg = <0xff 0xe7f00000 0x0 0x100>;
@@ -311,33 +338,6 @@
311338
status = "disabled";
312339
};
313340

314-
emmc: mmc@ffe7080000 {
315-
compatible = "thead,th1520-dwcmshc";
316-
reg = <0xff 0xe7080000 0x0 0x10000>;
317-
interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
318-
clocks = <&sdhci_clk>;
319-
clock-names = "core";
320-
status = "disabled";
321-
};
322-
323-
sdio0: mmc@ffe7090000 {
324-
compatible = "thead,th1520-dwcmshc";
325-
reg = <0xff 0xe7090000 0x0 0x10000>;
326-
interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
327-
clocks = <&sdhci_clk>;
328-
clock-names = "core";
329-
status = "disabled";
330-
};
331-
332-
sdio1: mmc@ffe70a0000 {
333-
compatible = "thead,th1520-dwcmshc";
334-
reg = <0xff 0xe70a0000 0x0 0x10000>;
335-
interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
336-
clocks = <&sdhci_clk>;
337-
clock-names = "core";
338-
status = "disabled";
339-
};
340-
341341
timer0: timer@ffefc32000 {
342342
compatible = "snps,dw-apb-timer";
343343
reg = <0xff 0xefc32000 0x0 0x14>;

0 commit comments

Comments
 (0)