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Merge tag 'drm-next-2024-03-22' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "Fixes from the last week (or 3 weeks in amdgpu case), after amdgpu, it's xe and nouveau then a few scattered core fixes. core: - fix rounding in drm_fixp2int_round() bridge: - fix documentation for DRM_BRIDGE_OP_EDID sun4i: - fix 64-bit division on 32-bit architectures tests: - fix dependency on DRM_KMS_HELPER probe-helper: - never return negative values from .get_modes() plus driver fixes xe: - invalidate userptr vma on page pin fault - fail early on sysfs file creation error - skip VMA pinning on xe_exec if no batches nouveau: - clear bo resource bus after eviction - documentation fixes - don't check devinit disable on GSP amdgpu: - Freesync fixes - UAF IOCTL fixes - Fix mmhub client ID mapping - IH 7.0 fix - DML2 fixes - VCN 4.0.6 fix - GART bind fix - GPU reset fix - SR-IOV fix - OD table handling fixes - Fix TA handling on boards without display hardware - DML1 fix - ABM fix - eDP panel fix - DPPCLK fix - HDCP fix - Revert incorrect error case handling in ioremap - VPE fix - HDMI fixes - SDMA 4.4.2 fix - Other misc fixes amdkfd: - Fix duplicate BO handling in process restore" * tag 'drm-next-2024-03-22' of https://gitlab.freedesktop.org/drm/kernel: (50 commits) drm/amdgpu/pm: Don't use OD table on Arcturus drm/amdgpu: drop setting buffer funcs in sdma442 drm/amd/display: Fix noise issue on HDMI AV mute drm/amd/display: Revert Remove pixle rate limit for subvp Revert "drm/amdgpu/vpe: don't emit cond exec command under collaborate mode" Revert "drm/amd/amdgpu: Fix potential ioremap() memory leaks in amdgpu_device_init()" drm/amd/display: Add a dc_state NULL check in dc_state_release drm/amd/display: Return the correct HDCP error code drm/amd/display: Implement wait_for_odm_update_pending_complete drm/amd/display: Lock all enabled otg pipes even with no planes drm/amd/display: Amend coasting vtotal for replay low hz drm/amd/display: Fix idle check for shared firmware state drm/amd/display: Update odm when ODM combine is changed on an otg master pipe with no plane drm/amd/display: Init DPPCLK from SMU on dcn32 drm/amd/display: Add monitor patch for specific eDP drm/amd/display: Allow dirty rects to be sent to dmub when abm is active drm/amd/display: Override min required DCFCLK in dml1_validate drm/amdgpu: Bypass display ta if display hw is not available drm/amdgpu: correct the KGQ fallback message drm/amdgpu/pm: Check the validity of overdiver power limit ...
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drivers/gpu/drm/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,7 @@ config DRM_USE_DYNAMIC_DEBUG
6868
config DRM_KUNIT_TEST_HELPERS
6969
tristate
7070
depends on DRM && KUNIT
71+
select DRM_KMS_HELPER
7172
help
7273
KUnit Helpers for KMS drivers.
7374

@@ -80,7 +81,6 @@ config DRM_KUNIT_TEST
8081
select DRM_EXEC
8182
select DRM_EXPORT_FOR_TESTS if m
8283
select DRM_GEM_SHMEM_HELPER
83-
select DRM_KMS_HELPER
8484
select DRM_KUNIT_TEST_HELPERS
8585
select DRM_LIB_RANDOM
8686
select PRIME_NUMBERS

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -146,7 +146,7 @@ int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev)
146146
{
147147
int ret;
148148

149-
if (!adev->kfd.init_complete)
149+
if (!adev->kfd.init_complete || adev->kfd.client.dev)
150150
return 0;
151151

152152
ret = drm_client_init(&adev->ddev, &adev->kfd.client, "kfd",

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2869,14 +2869,16 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence __rcu *
28692869

28702870
mutex_lock(&process_info->lock);
28712871

2872-
drm_exec_init(&exec, 0, 0);
2872+
drm_exec_init(&exec, DRM_EXEC_IGNORE_DUPLICATES, 0);
28732873
drm_exec_until_all_locked(&exec) {
28742874
list_for_each_entry(peer_vm, &process_info->vm_list_head,
28752875
vm_list_node) {
28762876
ret = amdgpu_vm_lock_pd(peer_vm, &exec, 2);
28772877
drm_exec_retry_on_contention(&exec);
2878-
if (unlikely(ret))
2878+
if (unlikely(ret)) {
2879+
pr_err("Locking VM PD failed, ret: %d\n", ret);
28792880
goto ttm_reserve_fail;
2881+
}
28802882
}
28812883

28822884
/* Reserve all BOs and page tables/directory. Add all BOs from
@@ -2889,8 +2891,10 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence __rcu *
28892891
gobj = &mem->bo->tbo.base;
28902892
ret = drm_exec_prepare_obj(&exec, gobj, 1);
28912893
drm_exec_retry_on_contention(&exec);
2892-
if (unlikely(ret))
2894+
if (unlikely(ret)) {
2895+
pr_err("drm_exec_prepare_obj failed, ret: %d\n", ret);
28932896
goto ttm_reserve_fail;
2897+
}
28942898
}
28952899
}
28962900

@@ -2950,8 +2954,10 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence __rcu *
29502954
* validations above would invalidate DMABuf imports again.
29512955
*/
29522956
ret = process_validate_vms(process_info, &exec.ticket);
2953-
if (ret)
2957+
if (ret) {
2958+
pr_debug("Validating VMs failed, ret: %d\n", ret);
29542959
goto validate_map_fail;
2960+
}
29552961

29562962
/* Update mappings not managed by KFD */
29572963
list_for_each_entry(peer_vm, &process_info->vm_list_head,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 6 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -4040,10 +4040,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
40404040
* early on during init and before calling to RREG32.
40414041
*/
40424042
adev->reset_domain = amdgpu_reset_create_reset_domain(SINGLE_DEVICE, "amdgpu-reset-dev");
4043-
if (!adev->reset_domain) {
4044-
r = -ENOMEM;
4045-
goto unmap_memory;
4046-
}
4043+
if (!adev->reset_domain)
4044+
return -ENOMEM;
40474045

40484046
/* detect hw virtualization here */
40494047
amdgpu_detect_virtualization(adev);
@@ -4053,20 +4051,20 @@ int amdgpu_device_init(struct amdgpu_device *adev,
40534051
r = amdgpu_device_get_job_timeout_settings(adev);
40544052
if (r) {
40554053
dev_err(adev->dev, "invalid lockup_timeout parameter syntax\n");
4056-
goto unmap_memory;
4054+
return r;
40574055
}
40584056

40594057
amdgpu_device_set_mcbp(adev);
40604058

40614059
/* early init functions */
40624060
r = amdgpu_device_ip_early_init(adev);
40634061
if (r)
4064-
goto unmap_memory;
4062+
return r;
40654063

40664064
/* Get rid of things like offb */
40674065
r = drm_aperture_remove_conflicting_pci_framebuffers(adev->pdev, &amdgpu_kms_driver);
40684066
if (r)
4069-
goto unmap_memory;
4067+
return r;
40704068

40714069
/* Enable TMZ based on IP_VERSION */
40724070
amdgpu_gmc_tmz_set(adev);
@@ -4076,7 +4074,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
40764074
if (adev->gmc.xgmi.supported) {
40774075
r = adev->gfxhub.funcs->get_xgmi_info(adev);
40784076
if (r)
4079-
goto unmap_memory;
4077+
return r;
40804078
}
40814079

40824080
/* enable PCIE atomic ops */
@@ -4345,8 +4343,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
43454343
failed:
43464344
amdgpu_vf_error_trans_all(adev);
43474345

4348-
unmap_memory:
4349-
iounmap(adev->rmmio);
43504346
return r;
43514347
}
43524348

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2479,8 +2479,11 @@ static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work)
24792479
}
24802480
for (i = 0; i < mgpu_info.num_dgpu; i++) {
24812481
adev = mgpu_info.gpu_ins[i].adev;
2482-
if (!adev->kfd.init_complete)
2482+
if (!adev->kfd.init_complete) {
2483+
kgd2kfd_init_zone_device(adev);
24832484
amdgpu_amdkfd_device_init(adev);
2485+
amdgpu_amdkfd_drm_client_create(adev);
2486+
}
24842487
amdgpu_ttm_set_buffer_funcs_status(adev, true);
24852488
}
24862489
}

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -687,7 +687,7 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id)
687687
r = amdgpu_ring_test_helper(kiq_ring);
688688
spin_unlock(&kiq->ring_lock);
689689
if (r)
690-
DRM_ERROR("KCQ enable failed\n");
690+
DRM_ERROR("KGQ enable failed\n");
691691

692692
return r;
693693
}

drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c

Lines changed: 16 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -129,13 +129,25 @@ static const struct mmu_interval_notifier_ops amdgpu_hmm_hsa_ops = {
129129
*/
130130
int amdgpu_hmm_register(struct amdgpu_bo *bo, unsigned long addr)
131131
{
132+
int r;
133+
132134
if (bo->kfd_bo)
133-
return mmu_interval_notifier_insert(&bo->notifier, current->mm,
135+
r = mmu_interval_notifier_insert(&bo->notifier, current->mm,
134136
addr, amdgpu_bo_size(bo),
135137
&amdgpu_hmm_hsa_ops);
136-
return mmu_interval_notifier_insert(&bo->notifier, current->mm, addr,
137-
amdgpu_bo_size(bo),
138-
&amdgpu_hmm_gfx_ops);
138+
else
139+
r = mmu_interval_notifier_insert(&bo->notifier, current->mm, addr,
140+
amdgpu_bo_size(bo),
141+
&amdgpu_hmm_gfx_ops);
142+
if (r)
143+
/*
144+
* Make sure amdgpu_hmm_unregister() doesn't call
145+
* mmu_interval_notifier_remove() when the notifier isn't properly
146+
* initialized.
147+
*/
148+
bo->notifier.mm = NULL;
149+
150+
return r;
139151
}
140152

141153
/**

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1830,6 +1830,10 @@ static int psp_hdcp_initialize(struct psp_context *psp)
18301830
if (amdgpu_sriov_vf(psp->adev))
18311831
return 0;
18321832

1833+
/* bypass hdcp initialization if dmu is harvested */
1834+
if (!amdgpu_device_has_display_hardware(psp->adev))
1835+
return 0;
1836+
18331837
if (!psp->hdcp_context.context.bin_desc.size_bytes ||
18341838
!psp->hdcp_context.context.bin_desc.start_addr) {
18351839
dev_info(psp->adev->dev, "HDCP: optional hdcp ta ucode is not available\n");
@@ -1862,6 +1866,9 @@ int psp_hdcp_invoke(struct psp_context *psp, uint32_t ta_cmd_id)
18621866
if (amdgpu_sriov_vf(psp->adev))
18631867
return 0;
18641868

1869+
if (!psp->hdcp_context.context.initialized)
1870+
return 0;
1871+
18651872
return psp_ta_invoke(psp, ta_cmd_id, &psp->hdcp_context.context);
18661873
}
18671874

@@ -1897,6 +1904,10 @@ static int psp_dtm_initialize(struct psp_context *psp)
18971904
if (amdgpu_sriov_vf(psp->adev))
18981905
return 0;
18991906

1907+
/* bypass dtm initialization if dmu is harvested */
1908+
if (!amdgpu_device_has_display_hardware(psp->adev))
1909+
return 0;
1910+
19001911
if (!psp->dtm_context.context.bin_desc.size_bytes ||
19011912
!psp->dtm_context.context.bin_desc.start_addr) {
19021913
dev_info(psp->adev->dev, "DTM: optional dtm ta ucode is not available\n");
@@ -1929,6 +1940,9 @@ int psp_dtm_invoke(struct psp_context *psp, uint32_t ta_cmd_id)
19291940
if (amdgpu_sriov_vf(psp->adev))
19301941
return 0;
19311942

1943+
if (!psp->dtm_context.context.initialized)
1944+
return 0;
1945+
19321946
return psp_ta_invoke(psp, ta_cmd_id, &psp->dtm_context.context);
19331947
}
19341948

@@ -2063,6 +2077,10 @@ static int psp_securedisplay_initialize(struct psp_context *psp)
20632077
if (amdgpu_sriov_vf(psp->adev))
20642078
return 0;
20652079

2080+
/* bypass securedisplay initialization if dmu is harvested */
2081+
if (!amdgpu_device_has_display_hardware(psp->adev))
2082+
return 0;
2083+
20662084
if (!psp->securedisplay_context.context.bin_desc.size_bytes ||
20672085
!psp->securedisplay_context.context.bin_desc.start_addr) {
20682086
dev_info(psp->adev->dev, "SECUREDISPLAY: securedisplay ta ucode is not available\n");

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -864,6 +864,7 @@ static void amdgpu_ttm_gart_bind(struct amdgpu_device *adev,
864864
amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages,
865865
gtt->ttm.dma_address, flags);
866866
}
867+
gtt->bound = true;
867868
}
868869

869870
/*

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

Lines changed: 25 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,7 @@
6060
#define FIRMWARE_VCN4_0_4 "amdgpu/vcn_4_0_4.bin"
6161
#define FIRMWARE_VCN4_0_5 "amdgpu/vcn_4_0_5.bin"
6262
#define FIRMWARE_VCN4_0_6 "amdgpu/vcn_4_0_6.bin"
63+
#define FIRMWARE_VCN4_0_6_1 "amdgpu/vcn_4_0_6_1.bin"
6364
#define FIRMWARE_VCN5_0_0 "amdgpu/vcn_5_0_0.bin"
6465

6566
MODULE_FIRMWARE(FIRMWARE_RAVEN);
@@ -85,6 +86,7 @@ MODULE_FIRMWARE(FIRMWARE_VCN4_0_3);
8586
MODULE_FIRMWARE(FIRMWARE_VCN4_0_4);
8687
MODULE_FIRMWARE(FIRMWARE_VCN4_0_5);
8788
MODULE_FIRMWARE(FIRMWARE_VCN4_0_6);
89+
MODULE_FIRMWARE(FIRMWARE_VCN4_0_6_1);
8890
MODULE_FIRMWARE(FIRMWARE_VCN5_0_0);
8991

9092
static void amdgpu_vcn_idle_work_handler(struct work_struct *work);
@@ -93,14 +95,22 @@ int amdgpu_vcn_early_init(struct amdgpu_device *adev)
9395
{
9496
char ucode_prefix[30];
9597
char fw_name[40];
96-
int r;
98+
int r, i;
9799

98-
amdgpu_ucode_ip_version_decode(adev, UVD_HWIP, ucode_prefix, sizeof(ucode_prefix));
99-
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s.bin", ucode_prefix);
100-
r = amdgpu_ucode_request(adev, &adev->vcn.fw, fw_name);
101-
if (r)
102-
amdgpu_ucode_release(&adev->vcn.fw);
100+
for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
101+
amdgpu_ucode_ip_version_decode(adev, UVD_HWIP, ucode_prefix, sizeof(ucode_prefix));
102+
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s.bin", ucode_prefix);
103+
if (amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(4, 0, 6) &&
104+
i == 1) {
105+
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_%d.bin", ucode_prefix, i);
106+
}
103107

108+
r = amdgpu_ucode_request(adev, &adev->vcn.fw[i], fw_name);
109+
if (r) {
110+
amdgpu_ucode_release(&adev->vcn.fw[i]);
111+
return r;
112+
}
113+
}
104114
return r;
105115
}
106116

@@ -141,7 +151,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
141151
}
142152
}
143153

144-
hdr = (const struct common_firmware_header *)adev->vcn.fw->data;
154+
hdr = (const struct common_firmware_header *)adev->vcn.fw[0]->data;
145155
adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version);
146156

147157
/* Bit 20-23, it is encode major and non-zero for new naming convention.
@@ -256,9 +266,10 @@ int amdgpu_vcn_sw_fini(struct amdgpu_device *adev)
256266

257267
for (i = 0; i < adev->vcn.num_enc_rings; ++i)
258268
amdgpu_ring_fini(&adev->vcn.inst[j].ring_enc[i]);
269+
270+
amdgpu_ucode_release(&adev->vcn.fw[j]);
259271
}
260272

261-
amdgpu_ucode_release(&adev->vcn.fw);
262273
mutex_destroy(&adev->vcn.vcn1_jpeg1_workaround);
263274
mutex_destroy(&adev->vcn.vcn_pg_lock);
264275

@@ -354,11 +365,12 @@ int amdgpu_vcn_resume(struct amdgpu_device *adev)
354365
const struct common_firmware_header *hdr;
355366
unsigned int offset;
356367

357-
hdr = (const struct common_firmware_header *)adev->vcn.fw->data;
368+
hdr = (const struct common_firmware_header *)adev->vcn.fw[i]->data;
358369
if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
359370
offset = le32_to_cpu(hdr->ucode_array_offset_bytes);
360371
if (drm_dev_enter(adev_to_drm(adev), &idx)) {
361-
memcpy_toio(adev->vcn.inst[i].cpu_addr, adev->vcn.fw->data + offset,
372+
memcpy_toio(adev->vcn.inst[i].cpu_addr,
373+
adev->vcn.fw[i]->data + offset,
362374
le32_to_cpu(hdr->ucode_size_bytes));
363375
drm_dev_exit(idx);
364376
}
@@ -1043,19 +1055,19 @@ void amdgpu_vcn_setup_ucode(struct amdgpu_device *adev)
10431055
if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
10441056
const struct common_firmware_header *hdr;
10451057

1046-
hdr = (const struct common_firmware_header *)adev->vcn.fw->data;
1047-
10481058
for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
10491059
if (adev->vcn.harvest_config & (1 << i))
10501060
continue;
1061+
1062+
hdr = (const struct common_firmware_header *)adev->vcn.fw[i]->data;
10511063
/* currently only support 2 FW instances */
10521064
if (i >= 2) {
10531065
dev_info(adev->dev, "More then 2 VCN FW instances!\n");
10541066
break;
10551067
}
10561068
idx = AMDGPU_UCODE_ID_VCN + i;
10571069
adev->firmware.ucode[idx].ucode_id = idx;
1058-
adev->firmware.ucode[idx].fw = adev->vcn.fw;
1070+
adev->firmware.ucode[idx].fw = adev->vcn.fw[i];
10591071
adev->firmware.fw_size +=
10601072
ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);
10611073

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