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hegdevasantjoergroedel
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iommu/amd: Rearrange attach device code
attach_device() is just holding lock and calling do_attach(). There is not need to have another function. Just move do_attach() code to attach_device(). Similarly move do_detach() code to detach_device(). Signed-off-by: Vasant Hegde <vasant.hegde@amd.com> Reviewed-by: Joerg Roedel <jroedel@suse.de> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/20241030063556.6104-9-vasant.hegde@amd.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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drivers/iommu/amd/iommu.c

Lines changed: 36 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -2081,80 +2081,42 @@ static void pdom_detach_iommu(struct amd_iommu *iommu,
20812081
spin_unlock_irqrestore(&pdom->lock, flags);
20822082
}
20832083

2084-
static int do_attach(struct iommu_dev_data *dev_data,
2085-
struct protection_domain *domain)
2084+
/*
2085+
* If a device is not yet associated with a domain, this function makes the
2086+
* device visible in the domain
2087+
*/
2088+
static int attach_device(struct device *dev,
2089+
struct protection_domain *domain)
20862090
{
2091+
struct iommu_dev_data *dev_data = dev_iommu_priv_get(dev);
20872092
struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data);
20882093
int ret = 0;
20892094

2095+
spin_lock(&dev_data->lock);
2096+
2097+
if (dev_data->domain != NULL) {
2098+
ret = -EBUSY;
2099+
goto out;
2100+
}
2101+
20902102
/* Update data structures */
20912103
dev_data->domain = domain;
20922104
list_add(&dev_data->list, &domain->dev_list);
20932105

20942106
/* Do reference counting */
20952107
ret = pdom_attach_iommu(iommu, domain);
20962108
if (ret)
2097-
return ret;
2109+
goto out;
20982110

20992111
/* Setup GCR3 table */
21002112
if (pdom_is_sva_capable(domain)) {
21012113
ret = init_gcr3_table(dev_data, domain);
21022114
if (ret) {
21032115
pdom_detach_iommu(iommu, domain);
2104-
return ret;
2116+
goto out;
21052117
}
21062118
}
21072119

2108-
return ret;
2109-
}
2110-
2111-
static void do_detach(struct iommu_dev_data *dev_data)
2112-
{
2113-
struct protection_domain *domain = dev_data->domain;
2114-
struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data);
2115-
unsigned long flags;
2116-
2117-
/* Clear DTE and flush the entry */
2118-
dev_update_dte(dev_data, false);
2119-
2120-
/* Flush IOTLB and wait for the flushes to finish */
2121-
spin_lock_irqsave(&domain->lock, flags);
2122-
amd_iommu_domain_flush_all(domain);
2123-
spin_unlock_irqrestore(&domain->lock, flags);
2124-
2125-
/* Clear GCR3 table */
2126-
if (pdom_is_sva_capable(domain))
2127-
destroy_gcr3_table(dev_data, domain);
2128-
2129-
/* Update data structures */
2130-
dev_data->domain = NULL;
2131-
list_del(&dev_data->list);
2132-
2133-
/* decrease reference counters - needs to happen after the flushes */
2134-
pdom_detach_iommu(iommu, domain);
2135-
}
2136-
2137-
/*
2138-
* If a device is not yet associated with a domain, this function makes the
2139-
* device visible in the domain
2140-
*/
2141-
static int attach_device(struct device *dev,
2142-
struct protection_domain *domain)
2143-
{
2144-
struct iommu_dev_data *dev_data;
2145-
int ret = 0;
2146-
2147-
dev_data = dev_iommu_priv_get(dev);
2148-
2149-
spin_lock(&dev_data->lock);
2150-
2151-
if (dev_data->domain != NULL) {
2152-
ret = -EBUSY;
2153-
goto out;
2154-
}
2155-
2156-
ret = do_attach(dev_data, domain);
2157-
21582120
out:
21592121
spin_unlock(&dev_data->lock);
21602122

@@ -2168,7 +2130,9 @@ static void detach_device(struct device *dev)
21682130
{
21692131
struct iommu_dev_data *dev_data = dev_iommu_priv_get(dev);
21702132
struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data);
2133+
struct protection_domain *domain = dev_data->domain;
21712134
bool ppr = dev_data->ppr;
2135+
unsigned long flags;
21722136

21732137
spin_lock(&dev_data->lock);
21742138

@@ -2188,7 +2152,24 @@ static void detach_device(struct device *dev)
21882152
dev_data->ppr = false;
21892153
}
21902154

2191-
do_detach(dev_data);
2155+
/* Clear DTE and flush the entry */
2156+
dev_update_dte(dev_data, false);
2157+
2158+
/* Flush IOTLB and wait for the flushes to finish */
2159+
spin_lock_irqsave(&domain->lock, flags);
2160+
amd_iommu_domain_flush_all(domain);
2161+
spin_unlock_irqrestore(&domain->lock, flags);
2162+
2163+
/* Clear GCR3 table */
2164+
if (pdom_is_sva_capable(domain))
2165+
destroy_gcr3_table(dev_data, domain);
2166+
2167+
/* Update data structures */
2168+
dev_data->domain = NULL;
2169+
list_del(&dev_data->list);
2170+
2171+
/* decrease reference counters - needs to happen after the flushes */
2172+
pdom_detach_iommu(iommu, domain);
21922173

21932174
out:
21942175
spin_unlock(&dev_data->lock);

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