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FlyGoattsbogend
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MIPS: mipsmtregs: Fix target register for MFTC0
Target register of mftc0 should be __res instead of $1, this is a leftover from old .insn code. Fixes: dd6d29a ("MIPS: Implement microMIPS MT ASE helpers") Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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arch/mips/include/asm/mipsmtregs.h

Lines changed: 1 addition & 1 deletion
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@@ -322,7 +322,7 @@ static inline void ehb(void)
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" .set push \n" \
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" .set "MIPS_ISA_LEVEL" \n" \
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_ASM_SET_MFTC0 \
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" mftc0 $1, " #rt ", " #sel " \n" \
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" mftc0 %0, " #rt ", " #sel " \n" \
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_ASM_UNSET_MFTC0 \
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" .set pop \n" \
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: "=r" (__res)); \

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