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39 | 39 | #define MP8859_DISCHG_EN_MASK 0x10
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40 | 40 | #define MP8859_MODE_MASK 0x08
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41 | 41 |
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| 42 | +#define MP8859_PG_MASK 0x80 |
| 43 | +#define MP8859_OTP_MASK 0x40 |
| 44 | +#define MP8859_OTW_MASK 0x20 |
| 45 | +#define MP8859_CC_CV_MASK 0x10 |
| 46 | + |
42 | 47 | static int mp8859_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel)
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43 | 48 | {
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44 | 49 | int ret;
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@@ -112,6 +117,58 @@ static int mp8859_set_mode(struct regulator_dev *rdev, unsigned int mode)
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112 | 117 | MP8859_MODE_MASK, val);
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113 | 118 | }
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114 | 119 |
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| 120 | +static int mp8859_get_status(struct regulator_dev *rdev) |
| 121 | +{ |
| 122 | + unsigned int val; |
| 123 | + int ret; |
| 124 | + |
| 125 | + /* Output status is only meaingful when enabled */ |
| 126 | + ret = regmap_read(rdev->regmap, MP8859_CTL1_REG, &val); |
| 127 | + if (ret != 0) |
| 128 | + return ret; |
| 129 | + if (!(val & MP8859_ENABLE_MASK)) |
| 130 | + return REGULATOR_STATUS_UNDEFINED; |
| 131 | + |
| 132 | + ret = regmap_read(rdev->regmap, MP8859_STATUS_REG, &val); |
| 133 | + if (ret != 0) |
| 134 | + return ret; |
| 135 | + |
| 136 | + if (val & MP8859_PG_MASK) |
| 137 | + return REGULATOR_STATUS_ON; |
| 138 | + else |
| 139 | + return REGULATOR_STATUS_ERROR; |
| 140 | +} |
| 141 | + |
| 142 | +static int mp8859_get_error_flags(struct regulator_dev *rdev, |
| 143 | + unsigned int *flags) |
| 144 | +{ |
| 145 | + unsigned int status, enabled; |
| 146 | + int ret; |
| 147 | + |
| 148 | + *flags = 0; |
| 149 | + |
| 150 | + /* Output status is only meaingful when enabled */ |
| 151 | + ret = regmap_read(rdev->regmap, MP8859_CTL1_REG, &enabled); |
| 152 | + if (ret != 0) |
| 153 | + return ret; |
| 154 | + enabled &= MP8859_ENABLE_MASK; |
| 155 | + |
| 156 | + ret = regmap_read(rdev->regmap, MP8859_STATUS_REG, &status); |
| 157 | + if (ret != 0) |
| 158 | + return ret; |
| 159 | + |
| 160 | + if (enabled && !(status & MP8859_PG_MASK)) |
| 161 | + status |= REGULATOR_ERROR_FAIL; |
| 162 | + if (status & MP8859_OTP_MASK) |
| 163 | + status |= REGULATOR_ERROR_OVER_TEMP; |
| 164 | + if (status & MP8859_OTW_MASK) |
| 165 | + status |= REGULATOR_ERROR_OVER_TEMP_WARN; |
| 166 | + if (status & MP8859_CC_CV_MASK) |
| 167 | + status |= REGULATOR_ERROR_OVER_CURRENT; |
| 168 | + |
| 169 | + return 0; |
| 170 | +} |
| 171 | + |
115 | 172 | static const struct linear_range mp8859_dcdc_ranges[] = {
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116 | 173 | REGULATOR_LINEAR_RANGE(0, VOL_MIN_IDX, VOL_MAX_IDX, 10000),
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117 | 174 | };
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@@ -169,6 +226,8 @@ static const struct regulator_ops mp8859_ops = {
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169 | 226 | .set_mode = mp8859_set_mode,
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170 | 227 | .get_mode = mp8859_get_mode,
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171 | 228 | .set_active_discharge = regulator_set_active_discharge_regmap,
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| 229 | + .get_status = mp8859_get_status, |
| 230 | + .get_error_flags = mp8859_get_error_flags, |
172 | 231 | };
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173 | 232 |
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174 | 233 | static const struct regulator_desc mp8859_regulators[] = {
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