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openrisc: Add FPU config
Allow disabling FPU related code sequences to save space. Signed-off-by: Stafford Horne <shorne@gmail.com>
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arch/openrisc/Kconfig

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@@ -188,6 +188,15 @@ config SMP
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If you don't know what to do here, say N.
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config FPU
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bool "FPU support"
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default y
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help
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Say N here if you want to disable all floating-point related procedures
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in the kernel and reduce binary size.
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If you don't know what to do here, say Y.
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source "kernel/Kconfig.hz"
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config OPENRISC_NO_SPR_SR_DSX

arch/openrisc/kernel/ptrace.c

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@@ -88,6 +88,7 @@ static int genregs_set(struct task_struct *target,
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return ret;
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}
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#ifdef CONFIG_FPU
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/*
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* As OpenRISC shares GPRs and floating point registers we don't need to export
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* the floating point registers again. So here we only export the fpcsr special
@@ -115,13 +116,16 @@ static int fpregs_set(struct task_struct *target,
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&regs->fpcsr, 0, 4);
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return ret;
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}
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#endif
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/*
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* Define the register sets available on OpenRISC under Linux
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*/
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enum or1k_regset {
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REGSET_GENERAL,
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#ifdef CONFIG_FPU
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REGSET_FPU,
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#endif
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};
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static const struct user_regset or1k_regsets[] = {
@@ -133,6 +137,7 @@ static const struct user_regset or1k_regsets[] = {
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.regset_get = genregs_get,
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.set = genregs_set,
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},
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#ifdef CONFIG_FPU
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[REGSET_FPU] = {
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.core_note_type = NT_PRFPREG,
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.n = sizeof(struct __or1k_fpu_state) / sizeof(long),
@@ -141,6 +146,7 @@ static const struct user_regset or1k_regsets[] = {
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.regset_get = fpregs_get,
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.set = fpregs_set,
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},
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#endif
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};
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static const struct user_regset_view user_or1k_native_view = {

arch/openrisc/kernel/traps.c

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@@ -182,6 +182,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address)
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{
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if (user_mode(regs)) {
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int code = FPE_FLTUNK;
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#ifdef CONFIG_FPU
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unsigned long fpcsr = regs->fpcsr;
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if (fpcsr & SPR_FPCSR_IVF)
@@ -197,7 +198,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address)
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/* Clear all flags */
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regs->fpcsr &= ~SPR_FPCSR_ALLF;
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#endif
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force_sig_fault(SIGFPE, code, (void __user *)regs->pc);
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} else {
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pr_emerg("KERNEL: Illegal fpe exception 0x%.8lx\n", regs->pc);

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