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jgunthorpewilldeacon
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iommu/arm-smmu-v3: Allocate the CD table entry in advance
Avoid arm_smmu_attach_dev() having to undo the changes to the smmu_domain->devices list, acquire the cdptr earlier so we don't need to handle that error. Now there is a clear break in arm_smmu_attach_dev() where all the prep-work has been done non-disruptively and we commit to making the HW change, which cannot fail. This completes transforming arm_smmu_attach_dev() so that it does not disturb the HW if it fails. Tested-by: Nicolin Chen <nicolinc@nvidia.com> Tested-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Michael Shavit <mshavit@google.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Mostafa Saleh <smostafa@google.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/6-v9-5040dc602008+177d7-smmuv3_newapi_p2_jgg@nvidia.com Signed-off-by: Will Deacon <will@kernel.org>
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drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

Lines changed: 8 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -2635,6 +2635,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
26352635
struct arm_smmu_device *smmu;
26362636
struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
26372637
struct arm_smmu_master *master;
2638+
struct arm_smmu_cd *cdptr;
26382639

26392640
if (!fwspec)
26402641
return -ENOENT;
@@ -2663,6 +2664,12 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
26632664
if (ret)
26642665
return ret;
26652666

2667+
if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
2668+
cdptr = arm_smmu_alloc_cd_ptr(master, IOMMU_NO_PASID);
2669+
if (!cdptr)
2670+
return -ENOMEM;
2671+
}
2672+
26662673
/*
26672674
* Prevent arm_smmu_share_asid() from trying to change the ASID
26682675
* of either the old or new domain while we are working on it.
@@ -2682,13 +2689,6 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
26822689
switch (smmu_domain->stage) {
26832690
case ARM_SMMU_DOMAIN_S1: {
26842691
struct arm_smmu_cd target_cd;
2685-
struct arm_smmu_cd *cdptr;
2686-
2687-
cdptr = arm_smmu_alloc_cd_ptr(master, IOMMU_NO_PASID);
2688-
if (!cdptr) {
2689-
ret = -ENOMEM;
2690-
goto out_list_del;
2691-
}
26922692

26932693
arm_smmu_make_s1_cd(&target_cd, master, smmu_domain);
26942694
arm_smmu_write_cd_entry(master, IOMMU_NO_PASID, cdptr,
@@ -2705,16 +2705,8 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
27052705
}
27062706

27072707
arm_smmu_enable_ats(master, smmu_domain);
2708-
goto out_unlock;
2709-
2710-
out_list_del:
2711-
spin_lock_irqsave(&smmu_domain->devices_lock, flags);
2712-
list_del_init(&master->domain_head);
2713-
spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
2714-
2715-
out_unlock:
27162708
mutex_unlock(&arm_smmu_asid_lock);
2717-
return ret;
2709+
return 0;
27182710
}
27192711

27202712
static int arm_smmu_attach_dev_ste(struct device *dev,

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