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kkdwivediAlexei Starovoitov
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rqspinlock: Add macros for rqspinlock usage
Introduce helper macros that wrap around the rqspinlock slow path and provide an interface analogous to the raw_spin_lock API. Note that in case of error conditions, preemption and IRQ disabling is automatically unrolled before returning the error back to the caller. Ensure that in absence of CONFIG_QUEUED_SPINLOCKS support, we fallback to the test-and-set implementation. Add some comments describing the subtle memory ordering logic during unlock, and why it's safe. Signed-off-by: Kumar Kartikeya Dwivedi <memxor@gmail.com> Link: https://lore.kernel.org/r/20250316040541.108729-17-memxor@gmail.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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include/asm-generic/rqspinlock.h

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@@ -153,4 +153,91 @@ static __always_inline void release_held_lock_entry(void)
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this_cpu_dec(rqspinlock_held_locks.cnt);
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}
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#ifdef CONFIG_QUEUED_SPINLOCKS
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/**
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* res_spin_lock - acquire a queued spinlock
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* @lock: Pointer to queued spinlock structure
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*
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* Return:
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* * 0 - Lock was acquired successfully.
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* * -EDEADLK - Lock acquisition failed because of AA/ABBA deadlock.
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* * -ETIMEDOUT - Lock acquisition failed because of timeout.
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*/
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static __always_inline int res_spin_lock(rqspinlock_t *lock)
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{
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int val = 0;
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if (likely(atomic_try_cmpxchg_acquire(&lock->val, &val, _Q_LOCKED_VAL))) {
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grab_held_lock_entry(lock);
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return 0;
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}
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return resilient_queued_spin_lock_slowpath(lock, val);
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}
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#else
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#define res_spin_lock(lock) resilient_tas_spin_lock(lock)
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#endif /* CONFIG_QUEUED_SPINLOCKS */
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static __always_inline void res_spin_unlock(rqspinlock_t *lock)
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{
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struct rqspinlock_held *rqh = this_cpu_ptr(&rqspinlock_held_locks);
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if (unlikely(rqh->cnt > RES_NR_HELD))
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goto unlock;
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WRITE_ONCE(rqh->locks[rqh->cnt - 1], NULL);
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unlock:
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/*
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* Release barrier, ensures correct ordering. See release_held_lock_entry
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* for details. Perform release store instead of queued_spin_unlock,
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* since we use this function for test-and-set fallback as well. When we
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* have CONFIG_QUEUED_SPINLOCKS=n, we clear the full 4-byte lockword.
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*
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* Like release_held_lock_entry, we can do the release before the dec.
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* We simply care about not seeing the 'lock' in our table from a remote
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* CPU once the lock has been released, which doesn't rely on the dec.
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*
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* Unlike smp_wmb(), release is not a two way fence, hence it is
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* possible for a inc to move up and reorder with our clearing of the
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* entry. This isn't a problem however, as for a misdiagnosis of ABBA,
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* the remote CPU needs to hold this lock, which won't be released until
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* the store below is done, which would ensure the entry is overwritten
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* to NULL, etc.
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*/
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smp_store_release(&lock->locked, 0);
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this_cpu_dec(rqspinlock_held_locks.cnt);
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}
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#ifdef CONFIG_QUEUED_SPINLOCKS
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#define raw_res_spin_lock_init(lock) ({ *(lock) = (rqspinlock_t)__ARCH_SPIN_LOCK_UNLOCKED; })
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#else
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#define raw_res_spin_lock_init(lock) ({ *(lock) = (rqspinlock_t){0}; })
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#endif
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#define raw_res_spin_lock(lock) \
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({ \
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int __ret; \
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preempt_disable(); \
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__ret = res_spin_lock(lock); \
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if (__ret) \
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preempt_enable(); \
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__ret; \
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})
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#define raw_res_spin_unlock(lock) ({ res_spin_unlock(lock); preempt_enable(); })
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#define raw_res_spin_lock_irqsave(lock, flags) \
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({ \
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int __ret; \
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local_irq_save(flags); \
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__ret = raw_res_spin_lock(lock); \
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if (__ret) \
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local_irq_restore(flags); \
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__ret; \
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})
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#define raw_res_spin_unlock_irqrestore(lock, flags) ({ raw_res_spin_unlock(lock); local_irq_restore(flags); })
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#endif /* __ASM_GENERIC_RQSPINLOCK_H */

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